ceph/src/isa-l/igzip/stdmac.asm

   1 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
   2 ;  Copyright(c) 2011-2016 Intel Corporation All rights reserved.
   3 ;
   4 ;  Redistribution and use in source and binary forms, with or without
   5 ;  modification, are permitted provided that the following conditions
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  15 ;      from this software without specific prior written permission.
  16 ;
  17 ;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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  27 ;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  28 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  29
  30 %ifndef STDMAC_ASM
  31 %define STDMAC_ASM
  32 ;; internal macro used by push_all
  33 ;; push args L to R
  34 %macro push_all_ 1-*
  35 %xdefine _PUSH_ALL_REGS_COUNT_ %0
  36 %rep %0
  37         push %1
  38         %rotate 1
  39 %endrep
  40 %endmacro
  41
  42 ;; internal macro used by pop_all
  43 ;; pop args R to L
  44 %macro pop_all_ 1-*
  45 %rep %0
  46         %rotate -1
  47         pop %1
  48 %endrep
  49 %endmacro
  50
  51 %xdefine _PUSH_ALL_REGS_COUNT_ 0
  52 %xdefine _ALLOC_STACK_VAL_     0
  53 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  54 ;; STACK_OFFSET
  55 ;; Number of bytes subtracted from stack due to PUSH_ALL and ALLOC_STACK
  56 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  57 %define STACK_OFFSET (_PUSH_ALL_REGS_COUNT_ * 8 + _ALLOC_STACK_VAL_)
  58
  59 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  60 ;; PUSH_ALL reg1, reg2, ...
  61 ;; push args L to R, remember regs for pop_all
  62 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  63 %macro PUSH_ALL 1+
  64 %xdefine _PUSH_ALL_REGS_ %1
  65         push_all_ %1
  66 %endmacro
  67
  68 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  69 ;; POP_ALL
  70 ;; push args from prev "push_all" R to L
  71 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  72 %macro POP_ALL 0
  73         pop_all_ _PUSH_ALL_REGS_
  74 %xdefine _PUSH_ALL_REGS_COUNT_ 0
  75 %endmacro
  76
  77 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  78 ;; ALLOC_STACK n
  79 ;; subtract n from the stack pointer and remember the value for restore_stack
  80 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  81 %macro ALLOC_STACK 1
  82 %xdefine _ALLOC_STACK_VAL_ %1
  83         sub     rsp, %1
  84 %endmacro
  85
  86 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  87 ;; RESTORE_STACK
  88 ;; add n to the stack pointer, where n is the arg to the previous alloc_stack
  89 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  90 %macro RESTORE_STACK 0
  91         add     rsp, _ALLOC_STACK_VAL_
  92 %xdefine _ALLOC_STACK_VAL_     0
  93 %endmacro
  94
  95
  96 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  97 ;; NOPN n
  98 ;; Create n bytes of NOP, using nops of up to 8 bytes each
  99 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 100 %macro NOPN 1
 101
 102  %assign %%i %1
 103  %rep 200
 104   %if (%%i < 9)
 105         nopn %%i
 106         %exitrep
 107   %else
 108         nopn 8
 109         %assign %%i (%%i - 8)
 110   %endif
 111  %endrep
 112 %endmacro
 113
 114 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 115 ;; nopn n
 116 ;; Create n bytes of NOP, where n is between 1 and 9
 117 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 118 %macro nopn 1
 119 %if (%1 == 1)
 120         nop
 121 %elif (%1 == 2)
 122         db      0x66
 123         nop
 124 %elif (%1 == 3)
 125         db      0x0F
 126         db      0x1F
 127         db      0x00
 128 %elif (%1 == 4)
 129         db      0x0F
 130         db      0x1F
 131         db      0x40
 132         db      0x00
 133 %elif (%1 == 5)
 134         db      0x0F
 135         db      0x1F
 136         db      0x44
 137         db      0x00
 138         db      0x00
 139 %elif (%1 == 6)
 140         db      0x66
 141         db      0x0F
 142         db      0x1F
 143         db      0x44
 144         db      0x00
 145         db      0x00
 146 %elif (%1 == 7)
 147         db      0x0F
 148         db      0x1F
 149         db      0x80
 150         db      0x00
 151         db      0x00
 152         db      0x00
 153         db      0x00
 154 %elif (%1 == 8)
 155         db      0x0F
 156         db      0x1F
 157         db      0x84
 158         db      0x00
 159         db      0x00
 160         db      0x00
 161         db      0x00
 162         db      0x00
 163 %elif (%1 == 9)
 164         db      0x66
 165         db      0x0F
 166         db      0x1F
 167         db      0x84
 168         db      0x00
 169         db      0x00
 170         db      0x00
 171         db      0x00
 172         db      0x00
 173 %else
 174 %error Invalid value to nopn
 175 %endif
 176 %endmacro
 177
 178 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 179 ;; rolx64 dst, src, amount
 180 ;; Emulate a rolx instruction using rorx, assuming data 64 bits wide
 181 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 182 %macro rolx64 3
 183         rorx %1, %2, (64-%3)
 184 %endm
 185
 186 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 187 ;; rolx32 dst, src, amount
 188 ;; Emulate a rolx instruction using rorx, assuming data 32 bits wide
 189 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 190 %macro rolx32 3
 191         rorx %1, %2, (32-%3)
 192 %endm
 193
 194
 195 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 196 ;; Define a function void ssc(uint64_t x)
 197 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 198 %macro DEF_SSC 0
 199 global ssc
 200 ssc:
 201         mov     rax, rbx
 202         mov     rbx, rcx
 203         db      0x64
 204         db      0x67
 205         nop
 206         mov     rbx, rax
 207         ret
 208 %endm
 209
 210 ;; Implement BZHI instruction on older architectures
 211 ;; Clobbers rcx, unless rcx is %%index
 212 %macro  BZHI    4
 213 %define %%dest          %1
 214 %define %%src           %2
 215 %define %%index         %3
 216 %define %%tmp1          %4
 217
 218 %ifdef USE_HSWNI
 219         bzhi    %%dest, %%src, %%index
 220 %else
 221 %ifnidn %%index, rcx
 222         mov     rcx, %%index
 223 %endif
 224         mov     %%tmp1, 1
 225         shl     %%tmp1, cl
 226         sub     %%tmp1, 1
 227
 228 %ifnidn %%src, %%dest
 229         mov     %%dest, %%src
 230 %endif
 231
 232         and     %%dest, %%tmp1
 233 %endif
 234 %endm
 235
 236 ;; Implement shrx instruction on older architectures
 237 ;; Clobbers rcx, unless rcx is %%index
 238 %macro  SHRX    3
 239 %define %%dest          %1
 240 %define %%src           %2
 241 %define %%index         %3
 242
 243 %ifdef USE_HSWNI
 244         shrx    %%dest, %%src, %%index
 245 %else
 246 %ifnidn %%src, %%dest
 247         mov     %%dest, %%src
 248 %endif
 249 %ifnidn %%index, rcx
 250         mov     rcx, %%index
 251 %endif
 252         shr     %%dest, cl
 253 %endif
 254 %endm
 255
 256 ;; Implement shlx instruction on older architectures
 257 ;; Clobbers rcx, unless rcx is %%index
 258 %macro  SHLX    3
 259 %define %%dest          %1
 260 %define %%src           %2
 261 %define %%index         %3
 262
 263 %ifdef USE_HSWNI
 264         shlx    %%dest, %%src, %%index
 265 %else
 266 %ifnidn %%src, %%dest
 267         mov     %%dest, %%src
 268 %endif
 269 %ifnidn %%index, rcx
 270         mov     rcx, %%index
 271 %endif
 272         shl     %%dest, cl
 273 %endif
 274 %endm
 275
 276 %macro  MOVDQU  2
 277 %define %%dest  %1
 278 %define %%src   %2
 279 %if ((ARCH == 02) || (ARCH == 03) || (ARCH == 04))
 280         vmovdqu %%dest, %%src
 281 %else
 282         movdqu  %%dest, %%src
 283 %endif
 284 %endm
 285
 286 %macro  MOVD    2
 287 %define %%dest  %1
 288 %define %%src   %2
 289 %if (ARCH == 02 || ARCH == 03 || ARCH == 04)
 290         vmovd   %%dest, %%src
 291 %else
 292         movd    %%dest, %%src
 293 %endif
 294 %endm
 295
 296 %macro  MOVQ    2
 297 %define %%dest  %1
 298 %define %%src   %2
 299 %if (ARCH == 02 || ARCH == 03 || ARCH == 04)
 300         vmovq   %%dest, %%src
 301 %else
 302         movq    %%dest, %%src
 303 %endif
 304 %endm
 305
 306 %macro  PINSRD  3
 307 %define %%dest  %1
 308 %define %%src   %2
 309 %define %%offset        %3
 310 %if ((ARCH == 02) || (ARCH == 03) || (ARCH == 04))
 311         vpinsrd %%dest, %%src, %%offset
 312 %else
 313         pinsrd  %%dest, %%src, %%offset
 314 %endif
 315 %endm
 316
 317 %macro  PEXTRD  3
 318 %define %%dest  %1
 319 %define %%src   %2
 320 %define %%offset        %3
 321 %if ((ARCH == 02) || (ARCH == 03) || (ARCH == 04))
 322         vpextrd %%dest, %%src, %%offset
 323 %else
 324         pextrd  %%dest, %%src, %%offset
 325 %endif
 326 %endm
 327
 328 %macro  PSRLDQ  2
 329 %define %%dest  %1
 330 %define %%offset        %2
 331 %if ((ARCH == 02) || (ARCH == 03) || (ARCH == 04))
 332         vpsrldq %%dest, %%offset
 333 %else
 334         psrldq  %%dest, %%offset
 335 %endif
 336 %endm
 337
 338 %macro  PAND    3
 339 %define %%dest  %1
 340 %define %%src1  %2
 341 %define %%src2  %3
 342 %if (ARCH == 02 || ARCH == 03 || ARCH == 04)
 343         vpand   %%dest, %%src1, %%src2
 344 %else
 345 %ifnidn %%dest, %%src1
 346         movdqa  %%dest, %%src1
 347 %endif
 348         pand    %%dest, %%src2
 349 %endif
 350 %endm
 351
 352 %macro  PCMPEQB 3
 353 %define %%dest  %1
 354 %define %%src1  %2
 355 %define %%src2  %3
 356 %if ((ARCH == 02) || (ARCH == 03) || (ARCH == 04))
 357         vpcmpeqb        %%dest, %%src1, %%src2
 358 %else
 359 %ifnidn %%dest, %%src1
 360         movdqa  %%dest, %%src1
 361 %endif
 362         pcmpeqb %%dest, %%src2
 363 %endif
 364 %endm
 365
 366 %macro  PMOVMSKB        2
 367 %define %%dest  %1
 368 %define %%src   %2
 369 %if ((ARCH == 02) || (ARCH == 03) || (ARCH == 04))
 370         vpmovmskb       %%dest, %%src
 371 %else
 372         pmovmskb        %%dest, %%src
 373 %endif
 374 %endm
 375
 376 %macro PXOR     3
 377 %define %%dest  %1
 378 %define %%src1  %2
 379 %define %%src2  %3
 380 %if ((ARCH == 02) || (ARCH == 03) || (ARCH == 04))
 381         vpxor   %%dest, %%src1, %%src2
 382 %else
 383 %ifnidn %%dest, %%src1
 384         movdqa  %%dest, %%src1
 385 %endif
 386         pxor    %%dest, %%src2
 387 %endif
 388 %endm
 389 %endif  ;; ifndef STDMAC_ASM