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update source to Ceph Pacific 16.2.2
[ceph.git] / ceph / src / spdk / dpdk / drivers / net / ipn3ke / ipn3ke_representor.c
1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2019 Intel Corporation
3 */
4
5 #include <stdint.h>
6 #include <unistd.h>
7
8 #include <rte_bus_pci.h>
9 #include <rte_ethdev.h>
10 #include <rte_pci.h>
11 #include <rte_malloc.h>
12
13 #include <rte_mbuf.h>
14 #include <rte_sched.h>
15 #include <rte_ethdev_driver.h>
16 #include <rte_spinlock.h>
17
18 #include <rte_io.h>
19 #include <rte_rawdev.h>
20 #include <rte_rawdev_pmd.h>
21 #include <rte_bus_ifpga.h>
22 #include <ifpga_logs.h>
23
24 #include "ipn3ke_rawdev_api.h"
25 #include "ipn3ke_flow.h"
26 #include "ipn3ke_logs.h"
27 #include "ipn3ke_ethdev.h"
28
29 static int ipn3ke_rpst_scan_num;
30 static pthread_t ipn3ke_rpst_scan_thread;
31
32 /** Double linked list of representor port. */
33 TAILQ_HEAD(ipn3ke_rpst_list, ipn3ke_rpst);
34
35 static struct ipn3ke_rpst_list ipn3ke_rpst_list =
36 TAILQ_HEAD_INITIALIZER(ipn3ke_rpst_list);
37
38 static rte_spinlock_t ipn3ke_link_notify_list_lk = RTE_SPINLOCK_INITIALIZER;
39
40 static int
41 ipn3ke_rpst_link_check(struct ipn3ke_rpst *rpst);
42
43 static int
44 ipn3ke_rpst_dev_infos_get(struct rte_eth_dev *ethdev,
45 struct rte_eth_dev_info *dev_info)
46 {
47 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev);
48 struct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(ethdev);
49
50 dev_info->speed_capa =
51 (hw->retimer.mac_type ==
52 IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) ?
53 ETH_LINK_SPEED_10G :
54 ((hw->retimer.mac_type ==
55 IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) ?
56 ETH_LINK_SPEED_25G :
57 ETH_LINK_SPEED_AUTONEG);
58
59 dev_info->max_rx_queues = 1;
60 dev_info->max_tx_queues = 1;
61 dev_info->min_rx_bufsize = IPN3KE_AFU_BUF_SIZE_MIN;
62 dev_info->max_rx_pktlen = IPN3KE_AFU_FRAME_SIZE_MAX;
63 dev_info->max_mac_addrs = hw->port_num;
64 dev_info->max_vfs = 0;
65 dev_info->default_txconf = (struct rte_eth_txconf) {
66 .offloads = 0,
67 };
68 dev_info->rx_queue_offload_capa = 0;
69 dev_info->rx_offload_capa =
70 DEV_RX_OFFLOAD_VLAN_STRIP |
71 DEV_RX_OFFLOAD_QINQ_STRIP |
72 DEV_RX_OFFLOAD_IPV4_CKSUM |
73 DEV_RX_OFFLOAD_UDP_CKSUM |
74 DEV_RX_OFFLOAD_TCP_CKSUM |
75 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
76 DEV_RX_OFFLOAD_VLAN_EXTEND |
77 DEV_RX_OFFLOAD_VLAN_FILTER |
78 DEV_RX_OFFLOAD_JUMBO_FRAME;
79
80 dev_info->tx_queue_offload_capa = DEV_TX_OFFLOAD_MBUF_FAST_FREE;
81 dev_info->tx_offload_capa =
82 DEV_TX_OFFLOAD_VLAN_INSERT |
83 DEV_TX_OFFLOAD_QINQ_INSERT |
84 DEV_TX_OFFLOAD_IPV4_CKSUM |
85 DEV_TX_OFFLOAD_UDP_CKSUM |
86 DEV_TX_OFFLOAD_TCP_CKSUM |
87 DEV_TX_OFFLOAD_SCTP_CKSUM |
88 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
89 DEV_TX_OFFLOAD_TCP_TSO |
90 DEV_TX_OFFLOAD_VXLAN_TNL_TSO |
91 DEV_TX_OFFLOAD_GRE_TNL_TSO |
92 DEV_TX_OFFLOAD_IPIP_TNL_TSO |
93 DEV_TX_OFFLOAD_GENEVE_TNL_TSO |
94 DEV_TX_OFFLOAD_MULTI_SEGS |
95 dev_info->tx_queue_offload_capa;
96
97 dev_info->dev_capa =
98 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP |
99 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP;
100
101 dev_info->switch_info.name = ethdev->device->name;
102 dev_info->switch_info.domain_id = rpst->switch_domain_id;
103 dev_info->switch_info.port_id = rpst->port_id;
104
105 return 0;
106 }
107
108 static int
109 ipn3ke_rpst_dev_configure(__rte_unused struct rte_eth_dev *dev)
110 {
111 return 0;
112 }
113
114 static int
115 ipn3ke_rpst_dev_start(struct rte_eth_dev *dev)
116 {
117 struct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(dev);
118 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(dev);
119 struct rte_rawdev *rawdev;
120 uint64_t base_mac;
121 uint32_t val;
122 char attr_name[IPN3KE_RAWDEV_ATTR_LEN_MAX];
123
124 rawdev = hw->rawdev;
125
126 memset(attr_name, 0, sizeof(attr_name));
127 snprintf(attr_name, IPN3KE_RAWDEV_ATTR_LEN_MAX, "%s",
128 "LineSideBaseMAC");
129 rawdev->dev_ops->attr_get(rawdev, attr_name, &base_mac);
130 rte_ether_addr_copy((struct rte_ether_addr *)&base_mac,
131 &rpst->mac_addr);
132
133 rte_ether_addr_copy(&rpst->mac_addr, &dev->data->mac_addrs[0]);
134 dev->data->mac_addrs->addr_bytes[RTE_ETHER_ADDR_LEN - 1] =
135 (uint8_t)rpst->port_id + 1;
136
137 if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) {
138 /* Set mac address */
139 rte_memcpy(((char *)(&val)),
140 (char *)&dev->data->mac_addrs->addr_bytes[0],
141 sizeof(uint32_t));
142 (*hw->f_mac_write)(hw,
143 val,
144 IPN3KE_MAC_PRIMARY_MAC_ADDR0,
145 rpst->port_id,
146 0);
147 rte_memcpy(((char *)(&val)),
148 (char *)&dev->data->mac_addrs->addr_bytes[4],
149 sizeof(uint16_t));
150 (*hw->f_mac_write)(hw,
151 val,
152 IPN3KE_MAC_PRIMARY_MAC_ADDR1,
153 rpst->port_id,
154 0);
155
156 /* Enable the TX path */
157 ipn3ke_xmac_tx_enable(hw, rpst->port_id, 0);
158
159 /* Disables source address override */
160 ipn3ke_xmac_smac_ovd_dis(hw, rpst->port_id, 0);
161
162 /* Enable the RX path */
163 ipn3ke_xmac_rx_enable(hw, rpst->port_id, 0);
164
165 /* Clear line side TX statistics counters */
166 ipn3ke_xmac_tx_clr_10G_stcs(hw, rpst->port_id, 0);
167
168 /* Clear line side RX statistics counters */
169 ipn3ke_xmac_rx_clr_10G_stcs(hw, rpst->port_id, 0);
170
171 /* Clear NIC side TX statistics counters */
172 ipn3ke_xmac_tx_clr_10G_stcs(hw, rpst->port_id, 1);
173
174 /* Clear NIC side RX statistics counters */
175 ipn3ke_xmac_rx_clr_10G_stcs(hw, rpst->port_id, 1);
176 } else if (hw->retimer.mac_type ==
177 IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) {
178 /* Clear line side TX statistics counters */
179 ipn3ke_xmac_tx_clr_25G_stcs(hw, rpst->port_id, 0);
180
181 /* Clear line side RX statistics counters */
182 ipn3ke_xmac_rx_clr_25G_stcs(hw, rpst->port_id, 0);
183
184 /* Clear NIC side TX statistics counters */
185 ipn3ke_xmac_tx_clr_25G_stcs(hw, rpst->port_id, 1);
186
187 /* Clear NIC side RX statistics counters */
188 ipn3ke_xmac_rx_clr_25G_stcs(hw, rpst->port_id, 1);
189 }
190
191 ipn3ke_rpst_link_update(dev, 0);
192
193 return 0;
194 }
195
196 static void
197 ipn3ke_rpst_dev_stop(struct rte_eth_dev *dev)
198 {
199 struct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(dev);
200 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(dev);
201
202 if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) {
203 /* Disable the TX path */
204 ipn3ke_xmac_tx_disable(hw, rpst->port_id, 0);
205
206 /* Disable the RX path */
207 ipn3ke_xmac_rx_disable(hw, rpst->port_id, 0);
208 }
209 }
210
211 static void
212 ipn3ke_rpst_dev_close(struct rte_eth_dev *dev)
213 {
214 struct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(dev);
215 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(dev);
216
217 if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) {
218 /* Disable the TX path */
219 ipn3ke_xmac_tx_disable(hw, rpst->port_id, 0);
220
221 /* Disable the RX path */
222 ipn3ke_xmac_rx_disable(hw, rpst->port_id, 0);
223 }
224 }
225
226 /*
227 * Reset PF device only to re-initialize resources in PMD layer
228 */
229 static int
230 ipn3ke_rpst_dev_reset(struct rte_eth_dev *dev)
231 {
232 struct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(dev);
233 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(dev);
234
235 if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) {
236 /* Disable the TX path */
237 ipn3ke_xmac_tx_disable(hw, rpst->port_id, 0);
238
239 /* Disable the RX path */
240 ipn3ke_xmac_rx_disable(hw, rpst->port_id, 0);
241 }
242
243 return 0;
244 }
245
246 static int
247 ipn3ke_rpst_rx_queue_start(__rte_unused struct rte_eth_dev *dev,
248 __rte_unused uint16_t rx_queue_id)
249 {
250 return 0;
251 }
252
253 static int
254 ipn3ke_rpst_rx_queue_stop(__rte_unused struct rte_eth_dev *dev,
255 __rte_unused uint16_t rx_queue_id)
256 {
257 return 0;
258 }
259
260 static int
261 ipn3ke_rpst_tx_queue_start(__rte_unused struct rte_eth_dev *dev,
262 __rte_unused uint16_t tx_queue_id)
263 {
264 return 0;
265 }
266
267 static int
268 ipn3ke_rpst_tx_queue_stop(__rte_unused struct rte_eth_dev *dev,
269 __rte_unused uint16_t tx_queue_id)
270 {
271 return 0;
272 }
273
274 static int
275 ipn3ke_rpst_rx_queue_setup(__rte_unused struct rte_eth_dev *dev,
276 __rte_unused uint16_t queue_idx, __rte_unused uint16_t nb_desc,
277 __rte_unused unsigned int socket_id,
278 __rte_unused const struct rte_eth_rxconf *rx_conf,
279 __rte_unused struct rte_mempool *mp)
280 {
281 return 0;
282 }
283
284 static void
285 ipn3ke_rpst_rx_queue_release(__rte_unused void *rxq)
286 {
287 }
288
289 static int
290 ipn3ke_rpst_tx_queue_setup(__rte_unused struct rte_eth_dev *dev,
291 __rte_unused uint16_t queue_idx, __rte_unused uint16_t nb_desc,
292 __rte_unused unsigned int socket_id,
293 __rte_unused const struct rte_eth_txconf *tx_conf)
294 {
295 return 0;
296 }
297
298 static void
299 ipn3ke_rpst_tx_queue_release(__rte_unused void *txq)
300 {
301 }
302
303 /* Statistics collected by each port, VSI, VEB, and S-channel */
304 struct ipn3ke_rpst_eth_stats {
305 uint64_t tx_bytes; /* gotc */
306 uint64_t tx_multicast; /* mptc */
307 uint64_t tx_broadcast; /* bptc */
308 uint64_t tx_unicast; /* uptc */
309 uint64_t tx_discards; /* tdpc */
310 uint64_t tx_errors; /* tepc */
311 uint64_t rx_bytes; /* gorc */
312 uint64_t rx_multicast; /* mprc */
313 uint64_t rx_broadcast; /* bprc */
314 uint64_t rx_unicast; /* uprc */
315 uint64_t rx_discards; /* rdpc */
316 uint64_t rx_unknown_protocol; /* rupp */
317 };
318
319 /* store statistics names and its offset in stats structure */
320 struct ipn3ke_rpst_xstats_name_offset {
321 char name[RTE_ETH_XSTATS_NAME_SIZE];
322 unsigned int offset;
323 };
324
325 static const struct ipn3ke_rpst_xstats_name_offset
326 ipn3ke_rpst_stats_strings[] = {
327 {"tx_multicast_packets", offsetof(struct ipn3ke_rpst_eth_stats,
328 tx_multicast)},
329 {"tx_broadcast_packets", offsetof(struct ipn3ke_rpst_eth_stats,
330 tx_broadcast)},
331 {"tx_unicast_packets", offsetof(struct ipn3ke_rpst_eth_stats,
332 tx_unicast)},
333 {"tx_dropped_packets", offsetof(struct ipn3ke_rpst_eth_stats,
334 tx_discards)},
335 {"rx_multicast_packets", offsetof(struct ipn3ke_rpst_eth_stats,
336 rx_multicast)},
337 {"rx_broadcast_packets", offsetof(struct ipn3ke_rpst_eth_stats,
338 rx_broadcast)},
339 {"rx_unicast_packets", offsetof(struct ipn3ke_rpst_eth_stats,
340 rx_unicast)},
341 {"rx_dropped_packets", offsetof(struct ipn3ke_rpst_eth_stats,
342 rx_discards)},
343 {"rx_unknown_protocol_packets", offsetof(struct ipn3ke_rpst_eth_stats,
344 rx_unknown_protocol)},
345 };
346
347 #define IPN3KE_RPST_ETH_XSTATS_CNT (sizeof(ipn3ke_rpst_stats_strings) / \
348 sizeof(ipn3ke_rpst_stats_strings[0]))
349
350 #define IPN3KE_RPST_PRIO_XSTATS_CNT 8
351
352 /* Statistics collected by the MAC */
353 struct ipn3ke_rpst_hw_port_stats {
354 /* eth stats collected by the port */
355 struct ipn3ke_rpst_eth_stats eth;
356
357 /* additional port specific stats */
358 uint64_t tx_dropped_link_down;
359 uint64_t crc_errors;
360 uint64_t illegal_bytes;
361 uint64_t error_bytes;
362 uint64_t mac_local_faults;
363 uint64_t mac_remote_faults;
364 uint64_t rx_length_errors;
365 uint64_t link_xon_rx;
366 uint64_t link_xoff_rx;
367 uint64_t priority_xon_rx[IPN3KE_RPST_PRIO_XSTATS_CNT];
368 uint64_t priority_xoff_rx[IPN3KE_RPST_PRIO_XSTATS_CNT];
369 uint64_t link_xon_tx;
370 uint64_t link_xoff_tx;
371 uint64_t priority_xon_tx[IPN3KE_RPST_PRIO_XSTATS_CNT];
372 uint64_t priority_xoff_tx[IPN3KE_RPST_PRIO_XSTATS_CNT];
373 uint64_t priority_xon_2_xoff[IPN3KE_RPST_PRIO_XSTATS_CNT];
374 uint64_t rx_size_64;
375 uint64_t rx_size_65_127;
376 uint64_t rx_size_128_255;
377 uint64_t rx_size_256_511;
378 uint64_t rx_size_512_1023;
379 uint64_t rx_size_1024_1518;
380 uint64_t rx_size_big;
381 uint64_t rx_undersize;
382 uint64_t rx_fragments;
383 uint64_t rx_oversize;
384 uint64_t rx_jabber;
385 uint64_t tx_size_64;
386 uint64_t tx_size_65_127;
387 uint64_t tx_size_128_255;
388 uint64_t tx_size_256_511;
389 uint64_t tx_size_512_1023;
390 uint64_t tx_size_1024_1518;
391 uint64_t tx_size_1519_to_max;
392 uint64_t mac_short_packet_dropped;
393 uint64_t checksum_error;
394 /* flow director stats */
395 uint64_t fd_atr_match;
396 uint64_t fd_sb_match;
397 uint64_t fd_atr_tunnel_match;
398 uint32_t fd_atr_status;
399 uint32_t fd_sb_status;
400 /* EEE LPI */
401 uint32_t tx_lpi_status;
402 uint32_t rx_lpi_status;
403 uint64_t tx_lpi_count;
404 uint64_t rx_lpi_count;
405 };
406
407 static const struct ipn3ke_rpst_xstats_name_offset
408 ipn3ke_rpst_hw_port_strings[] = {
409 {"tx_link_down_dropped", offsetof(struct ipn3ke_rpst_hw_port_stats,
410 tx_dropped_link_down)},
411 {"rx_crc_errors", offsetof(struct ipn3ke_rpst_hw_port_stats,
412 crc_errors)},
413 {"rx_illegal_byte_errors", offsetof(struct ipn3ke_rpst_hw_port_stats,
414 illegal_bytes)},
415 {"rx_error_bytes", offsetof(struct ipn3ke_rpst_hw_port_stats,
416 error_bytes)},
417 {"mac_local_errors", offsetof(struct ipn3ke_rpst_hw_port_stats,
418 mac_local_faults)},
419 {"mac_remote_errors", offsetof(struct ipn3ke_rpst_hw_port_stats,
420 mac_remote_faults)},
421 {"rx_length_errors", offsetof(struct ipn3ke_rpst_hw_port_stats,
422 rx_length_errors)},
423 {"tx_xon_packets", offsetof(struct ipn3ke_rpst_hw_port_stats,
424 link_xon_tx)},
425 {"rx_xon_packets", offsetof(struct ipn3ke_rpst_hw_port_stats,
426 link_xon_rx)},
427 {"tx_xoff_packets", offsetof(struct ipn3ke_rpst_hw_port_stats,
428 link_xoff_tx)},
429 {"rx_xoff_packets", offsetof(struct ipn3ke_rpst_hw_port_stats,
430 link_xoff_rx)},
431 {"rx_size_64_packets", offsetof(struct ipn3ke_rpst_hw_port_stats,
432 rx_size_64)},
433 {"rx_size_65_to_127_packets", offsetof(struct ipn3ke_rpst_hw_port_stats,
434 rx_size_65_127)},
435 {"rx_size_128_to_255_packets",
436 offsetof(struct ipn3ke_rpst_hw_port_stats,
437 rx_size_128_255)},
438 {"rx_size_256_to_511_packets",
439 offsetof(struct ipn3ke_rpst_hw_port_stats,
440 rx_size_256_511)},
441 {"rx_size_512_to_1023_packets",
442 offsetof(struct ipn3ke_rpst_hw_port_stats,
443 rx_size_512_1023)},
444 {"rx_size_1024_to_1518_packets",
445 offsetof(struct ipn3ke_rpst_hw_port_stats,
446 rx_size_1024_1518)},
447 {"rx_size_1519_to_max_packets",
448 offsetof(struct ipn3ke_rpst_hw_port_stats,
449 rx_size_big)},
450 {"rx_undersized_errors", offsetof(struct ipn3ke_rpst_hw_port_stats,
451 rx_undersize)},
452 {"rx_oversize_errors", offsetof(struct ipn3ke_rpst_hw_port_stats,
453 rx_oversize)},
454 {"rx_mac_short_dropped", offsetof(struct ipn3ke_rpst_hw_port_stats,
455 mac_short_packet_dropped)},
456 {"rx_fragmented_errors", offsetof(struct ipn3ke_rpst_hw_port_stats,
457 rx_fragments)},
458 {"rx_jabber_errors", offsetof(struct ipn3ke_rpst_hw_port_stats,
459 rx_jabber)},
460 {"tx_size_64_packets", offsetof(struct ipn3ke_rpst_hw_port_stats,
461 tx_size_64)},
462 {"tx_size_65_to_127_packets",
463 offsetof(struct ipn3ke_rpst_hw_port_stats,
464 tx_size_65_127)},
465 {"tx_size_128_to_255_packets",
466 offsetof(struct ipn3ke_rpst_hw_port_stats,
467 tx_size_128_255)},
468 {"tx_size_256_to_511_packets",
469 offsetof(struct ipn3ke_rpst_hw_port_stats,
470 tx_size_256_511)},
471 {"tx_size_512_to_1023_packets",
472 offsetof(struct ipn3ke_rpst_hw_port_stats,
473 tx_size_512_1023)},
474 {"tx_size_1024_to_1518_packets",
475 offsetof(struct ipn3ke_rpst_hw_port_stats,
476 tx_size_1024_1518)},
477 {"tx_size_1519_to_max_packets",
478 offsetof(struct ipn3ke_rpst_hw_port_stats,
479 tx_size_1519_to_max)},
480 {"rx_flow_director_atr_match_packets",
481 offsetof(struct ipn3ke_rpst_hw_port_stats,
482 fd_atr_match)},
483 {"rx_flow_director_sb_match_packets",
484 offsetof(struct ipn3ke_rpst_hw_port_stats,
485 fd_sb_match)},
486 {"tx_low_power_idle_status", offsetof(struct ipn3ke_rpst_hw_port_stats,
487 tx_lpi_status)},
488 {"rx_low_power_idle_status", offsetof(struct ipn3ke_rpst_hw_port_stats,
489 rx_lpi_status)},
490 {"tx_low_power_idle_count", offsetof(struct ipn3ke_rpst_hw_port_stats,
491 tx_lpi_count)},
492 {"rx_low_power_idle_count", offsetof(struct ipn3ke_rpst_hw_port_stats,
493 rx_lpi_count)},
494 };
495
496 #define IPN3KE_RPST_HW_PORT_XSTATS_CNT (sizeof(ipn3ke_rpst_hw_port_strings) \
497 / sizeof(ipn3ke_rpst_hw_port_strings[0]))
498
499 static const struct ipn3ke_rpst_xstats_name_offset
500 ipn3ke_rpst_rxq_prio_strings[] = {
501 {"xon_packets", offsetof(struct ipn3ke_rpst_hw_port_stats,
502 priority_xon_rx)},
503 {"xoff_packets", offsetof(struct ipn3ke_rpst_hw_port_stats,
504 priority_xoff_rx)},
505 };
506
507 #define IPN3KE_RPST_RXQ_PRIO_XSTATS_CNT (sizeof(ipn3ke_rpst_rxq_prio_strings) \
508 / sizeof(ipn3ke_rpst_rxq_prio_strings[0]))
509
510 static const struct ipn3ke_rpst_xstats_name_offset
511 ipn3ke_rpst_txq_prio_strings[] = {
512 {"xon_packets", offsetof(struct ipn3ke_rpst_hw_port_stats,
513 priority_xon_tx)},
514 {"xoff_packets", offsetof(struct ipn3ke_rpst_hw_port_stats,
515 priority_xoff_tx)},
516 {"xon_to_xoff_packets", offsetof(struct ipn3ke_rpst_hw_port_stats,
517 priority_xon_2_xoff)},
518 };
519
520 #define IPN3KE_RPST_TXQ_PRIO_XSTATS_CNT (sizeof(ipn3ke_rpst_txq_prio_strings) \
521 / sizeof(ipn3ke_rpst_txq_prio_strings[0]))
522
523 static uint32_t
524 ipn3ke_rpst_xstats_calc_num(void)
525 {
526 return IPN3KE_RPST_ETH_XSTATS_CNT
527 + IPN3KE_RPST_HW_PORT_XSTATS_CNT
528 + (IPN3KE_RPST_RXQ_PRIO_XSTATS_CNT
529 * IPN3KE_RPST_PRIO_XSTATS_CNT)
530 + (IPN3KE_RPST_TXQ_PRIO_XSTATS_CNT
531 * IPN3KE_RPST_PRIO_XSTATS_CNT);
532 }
533
534 static void
535 ipn3ke_rpst_25g_nic_side_tx_stats_reset(struct ipn3ke_hw *hw,
536 uint16_t port_id)
537 {
538 uint32_t tmp = 0x00000001;
539 /* Bit[0]: Software can set this bit to the value of 1
540 * to reset all of the TX statistics registers at the same time.
541 * This bit is selfclearing.
542 */
543 (*hw->f_mac_write)(hw,
544 tmp,
545 IPN3KE_25G_TX_STATISTICS_CONFIG,
546 port_id,
547 1);
548
549 while (tmp & 0x00000001) {
550 tmp = 0x00000000;
551 (*hw->f_mac_read)(hw,
552 &tmp,
553 IPN3KE_25G_TX_STATISTICS_CONFIG,
554 port_id,
555 1);
556 if (tmp & 0x00000001)
557 usleep(5);
558 else
559 return;
560 }
561 }
562
563 static void
564 ipn3ke_rpst_25g_nic_side_rx_stats_reset(struct ipn3ke_hw *hw,
565 uint16_t port_id)
566 {
567 uint32_t tmp = 0x00000001;
568 /* Bit[0]: Software can set this bit to the value of 1
569 * to reset all of the RX statistics registers at the same time.
570 * This bit is selfclearing.
571 */
572 (*hw->f_mac_write)(hw,
573 tmp,
574 IPN3KE_25G_RX_STATISTICS_CONFIG,
575 port_id,
576 1);
577
578 while (tmp & 0x00000001) {
579 tmp = 0x00000000;
580 (*hw->f_mac_read)(hw,
581 &tmp,
582 IPN3KE_25G_RX_STATISTICS_CONFIG,
583 port_id,
584 1);
585 if (tmp & 0x00000001)
586 usleep(5);
587 else
588 return;
589 }
590 }
591
592 static void
593 ipn3ke_rpst_10g_nic_side_tx_stats_reset(struct ipn3ke_hw *hw,
594 uint16_t port_id)
595 {
596 uint32_t tmp;
597
598 /*Bit [0]: Set this register to 1 to clear all TX statistics
599 *counters.
600 *The IP core clears this bit when all counters are cleared.
601 *Bits [31:1]: Reserved.
602 */
603 tmp = 0x00000000;
604 (*hw->f_mac_read)(hw,
605 &tmp,
606 IPN3KE_10G_TX_STATS_CLR,
607 port_id,
608 1);
609 tmp |= 0x00000001;
610 (*hw->f_mac_write)(hw,
611 tmp,
612 IPN3KE_10G_TX_STATS_CLR,
613 port_id,
614 1);
615 }
616
617 static void
618 ipn3ke_rpst_10g_nic_side_rx_stats_reset(struct ipn3ke_hw *hw,
619 uint16_t port_id)
620 {
621 uint32_t tmp;
622
623 /*Bit [0]: Set this register to 1 to clear all RX statistics
624 *counters.
625 *The IP core clears this bit when all counters are cleared.
626 *Bits [31:1]: Reserved
627 */
628 tmp = 0x00000000;
629 (*hw->f_mac_read)(hw,
630 &tmp,
631 IPN3KE_10G_RX_STATS_CLR,
632 port_id,
633 1);
634 tmp |= 0x00000001;
635 (*hw->f_mac_write)(hw,
636 tmp,
637 IPN3KE_10G_RX_STATS_CLR,
638 port_id,
639 1);
640 }
641
642 static uint64_t
643 ipn3ke_rpst_read_64bits_statistics_register(uint32_t addr_lo,
644 uint32_t addr_hi, struct ipn3ke_hw *hw, uint16_t port_id)
645 {
646 uint32_t statistics_lo = 0x00000000;
647 uint32_t statistics_hi = 0x00000000;
648 uint64_t statistics = 0x0000000000000000;
649
650 (*hw->f_mac_read)(hw,
651 &statistics_lo,
652 addr_lo,
653 port_id,
654 0);
655
656 (*hw->f_mac_read)(hw,
657 &statistics_hi,
658 addr_hi,
659 port_id,
660 0);
661
662 statistics += statistics_hi;
663 statistics = statistics << IPN3KE_REGISTER_WIDTH;
664 statistics += statistics_lo;
665 return statistics;
666
667 }
668
669 static int
670 ipn3ke_rpst_read_25g_lineside_stats_registers
671 (struct ipn3ke_hw *hw,
672 uint16_t port_id,
673 struct ipn3ke_rpst_hw_port_stats *hw_stats)
674 {
675 uint32_t tmp;
676 uint64_t statistics;
677
678 memset(hw_stats, 0, sizeof(*hw_stats));
679
680 /*check Tx statistics is real time.
681 *if statistics has been paused, make it real time.
682 */
683 tmp = 0x00000000;
684 (*hw->f_mac_read)(hw,
685 &tmp,
686 IPN3KE_25G_TX_STATISTICS_CONFIG,
687 port_id,
688 0);
689
690 if (tmp & IPN3KE_25G_TX_STATISTICS_CONFIG_SHADOW_REQUEST_MASK) {
691 tmp &= 0xfffffffb;
692 (*hw->f_mac_write)(hw,
693 tmp,
694 IPN3KE_25G_TX_STATISTICS_CONFIG,
695 port_id,
696 0);
697 }
698
699 tmp = 0x00000000;
700 (*hw->f_mac_read)(hw,
701 &tmp,
702 IPN3KE_25G_TX_STATISTICS_STATUS,
703 port_id,
704 0);
705 if (tmp & IPN3KE_25G_TX_STATISTICS_STATUS_SHADOW_REQUEST_MASK) {
706 tmp = 0x00000000;
707 (*hw->f_mac_read)(hw,
708 &tmp,
709 IPN3KE_25G_TX_STATISTICS_CONFIG,
710 port_id,
711 0);
712 tmp &= 0xfffffffb;
713 (*hw->f_mac_write)(hw,
714 tmp,
715 IPN3KE_25G_TX_STATISTICS_CONFIG,
716 port_id,
717 0);
718 }
719
720 /*check Rx statistics is real time.
721 *if statistics has been paused, make it real time.
722 */
723 tmp = 0x00000000;
724 (*hw->f_mac_read)(hw,
725 &tmp,
726 IPN3KE_25G_RX_STATISTICS_CONFIG,
727 port_id,
728 0);
729 if (tmp & IPN3KE_25G_RX_STATISTICS_CONFIG_SHADOW_REQUEST_MASK) {
730 tmp &= 0xfffffffb;
731 (*hw->f_mac_write)(hw,
732 tmp,
733 IPN3KE_25G_RX_STATISTICS_CONFIG,
734 port_id,
735 0);
736 }
737
738 tmp = 0x00000000;
739 (*hw->f_mac_read)(hw,
740 &tmp,
741 IPN3KE_25G_RX_STATISTICS_STATUS,
742 port_id,
743 0);
744
745 if (tmp & IPN3KE_25G_RX_STATISTICS_STATUS_SHADOW_REQUEST_MASK) {
746 tmp = 0x00000000;
747 (*hw->f_mac_read)(hw,
748 &tmp,
749 IPN3KE_25G_RX_STATISTICS_CONFIG,
750 port_id,
751 0);
752 tmp &= 0xfffffffb;
753 (*hw->f_mac_write)(hw,
754 tmp,
755 IPN3KE_25G_RX_STATISTICS_CONFIG,
756 port_id,
757 0);
758 }
759
760 /* pause Tx counter to read the statistics */
761 tmp = 0x00000000;
762 (*hw->f_mac_read)(hw,
763 &tmp,
764 IPN3KE_25G_TX_STATISTICS_CONFIG,
765 port_id,
766 0);
767 tmp |= 0x00000004;
768 (*hw->f_mac_write)(hw,
769 tmp,
770 IPN3KE_25G_TX_STATISTICS_CONFIG,
771 port_id,
772 0);
773
774 /* pause Rx counter to read the statistics */
775 tmp = 0x00000000;
776 (*hw->f_mac_read)(hw,
777 &tmp,
778 IPN3KE_25G_RX_STATISTICS_CONFIG,
779 port_id,
780 0);
781 tmp |= 0x00000004;
782 (*hw->f_mac_write)(hw,
783 tmp,
784 IPN3KE_25G_RX_STATISTICS_CONFIG,
785 port_id,
786 0);
787
788 /*Number of transmitted frames less than 64 bytes
789 *and reporting a CRC error
790 */
791 statistics = ipn3ke_rpst_read_64bits_statistics_register(
792 IPN3KE_25G_CNTR_TX_FRAGMENTS_LO,
793 IPN3KE_25G_CNTR_TX_FRAGMENTS_HI,
794 hw, port_id);
795 hw_stats->eth.tx_errors += statistics;
796 hw_stats->crc_errors += statistics;
797
798 /*Number of transmitted oversized frames reporting a CRC error*/
799 statistics = ipn3ke_rpst_read_64bits_statistics_register(
800 IPN3KE_25G_CNTR_TX_JABBERS_LO,
801 IPN3KE_25G_CNTR_TX_JABBERS_HI,
802 hw, port_id);
803 hw_stats->eth.tx_errors += statistics;
804 hw_stats->crc_errors += statistics;
805
806 /* Number of transmitted packets with FCS errors */
807 statistics = ipn3ke_rpst_read_64bits_statistics_register(
808 IPN3KE_25G_CNTR_TX_FCS_LO,
809 IPN3KE_25G_CNTR_TX_FCS_HI,
810 hw, port_id);
811 hw_stats->eth.tx_errors += statistics;
812 hw_stats->checksum_error += statistics;
813
814 /*Number of transmitted frames with a frame of length at
815 *least 64 reporting a CRC error
816 */
817 statistics = ipn3ke_rpst_read_64bits_statistics_register(
818 IPN3KE_25G_CNTR_TX_CRCERR_LO,
819 IPN3KE_25G_CNTR_TX_CRCERR_HI,
820 hw, port_id);
821 hw_stats->eth.tx_errors += statistics;
822 hw_stats->crc_errors += statistics;
823
824 /*Number of errored multicast frames transmitted,
825 *excluding control frames
826 */
827 statistics = ipn3ke_rpst_read_64bits_statistics_register(
828 IPN3KE_25G_CNTR_TX_MCAST_DATA_ERR_LO,
829 IPN3KE_25G_CNTR_TX_MCAST_DATA_ERR_HI,
830 hw, port_id);
831 hw_stats->eth.tx_errors += statistics;
832
833 /*Number of errored broadcast frames transmitted,
834 *excluding control frames
835 */
836 statistics = ipn3ke_rpst_read_64bits_statistics_register(
837 IPN3KE_25G_CNTR_TX_BCAST_DATA_ERR_LO,
838 IPN3KE_25G_CNTR_TX_BCAST_DATA_ERR_HI,
839 hw, port_id);
840 hw_stats->eth.tx_errors += statistics;
841
842 /*Number of errored unicast frames transmitted,
843 *excluding control frames
844 */
845 statistics = ipn3ke_rpst_read_64bits_statistics_register(
846 IPN3KE_25G_CNTR_TX_UCAST_DATA_ERR_LO,
847 IPN3KE_25G_CNTR_TX_UCAST_DATA_ERR_HI,
848 hw, port_id);
849 hw_stats->eth.tx_errors += statistics;
850
851 /* Number of errored multicast control frames transmitted */
852 statistics = ipn3ke_rpst_read_64bits_statistics_register(
853 IPN3KE_25G_CNTR_TX_MCAST_CTRL_ERR_LO,
854 IPN3KE_25G_CNTR_TX_MCAST_CTRL_ERR_HI,
855 hw, port_id);
856 hw_stats->eth.tx_errors += statistics;
857
858 /* Number of errored broadcast control frames transmitted */
859 statistics = ipn3ke_rpst_read_64bits_statistics_register(
860 IPN3KE_25G_CNTR_TX_BCAST_CTRL_ERR_LO,
861 IPN3KE_25G_CNTR_TX_BCAST_CTRL_ERR_HI,
862 hw, port_id);
863 hw_stats->eth.tx_errors += statistics;
864
865 /* Number of errored unicast control frames transmitted */
866 statistics = ipn3ke_rpst_read_64bits_statistics_register(
867 IPN3KE_25G_CNTR_TX_UCAST_CTRL_ERR_LO,
868 IPN3KE_25G_CNTR_TX_UCAST_CTRL_ERR_HI,
869 hw, port_id);
870 hw_stats->eth.tx_errors += statistics;
871
872 /* Number of errored pause frames transmitted */
873 statistics = ipn3ke_rpst_read_64bits_statistics_register(
874 IPN3KE_25G_CNTR_TX_PAUSE_ERR_LO,
875 IPN3KE_25G_CNTR_TX_PAUSE_ERR_HI,
876 hw, port_id);
877 hw_stats->eth.tx_errors += statistics;
878
879 /*Number of 64-byte transmitted frames,
880 *including the CRC field but excluding the preamble
881 *and SFD bytes
882 */
883 statistics = ipn3ke_rpst_read_64bits_statistics_register(
884 IPN3KE_25G_CNTR_TX_64B_LO,
885 IPN3KE_25G_CNTR_TX_64B_HI,
886 hw, port_id);
887 hw_stats->tx_size_64 += statistics;
888
889 /* Number of transmitted frames between 65 and 127 bytes */
890 statistics = ipn3ke_rpst_read_64bits_statistics_register(
891 IPN3KE_25G_CNTR_TX_65_127B_LO,
892 IPN3KE_25G_CNTR_TX_65_127B_HI,
893 hw, port_id);
894 hw_stats->tx_size_65_127 += statistics;
895
896 /* Number of transmitted frames between 128 and 255 bytes */
897 statistics = ipn3ke_rpst_read_64bits_statistics_register(
898 IPN3KE_25G_CNTR_TX_128_255B_LO,
899 IPN3KE_25G_CNTR_TX_128_255B_HI,
900 hw, port_id);
901 hw_stats->tx_size_128_255 += statistics;
902
903 /* Number of transmitted frames between 256 and 511 bytes */
904 statistics = ipn3ke_rpst_read_64bits_statistics_register(
905 IPN3KE_25G_CNTR_TX_256_511B_LO,
906 IPN3KE_25G_CNTR_TX_256_511B_HI,
907 hw, port_id);
908 hw_stats->tx_size_256_511 += statistics;
909
910 /* Number of transmitted frames between 512 and 1023 bytes */
911 statistics = ipn3ke_rpst_read_64bits_statistics_register(
912 IPN3KE_25G_CNTR_TX_512_1023B_LO,
913 IPN3KE_25G_CNTR_TX_512_1023B_HI,
914 hw, port_id);
915 hw_stats->tx_size_512_1023 += statistics;
916
917 /* Number of transmitted frames between 1024 and 1518 bytes */
918 statistics = ipn3ke_rpst_read_64bits_statistics_register(
919 IPN3KE_25G_CNTR_TX_1024_1518B_LO,
920 IPN3KE_25G_CNTR_TX_1024_1518B_HI,
921 hw, port_id);
922 hw_stats->tx_size_1024_1518 += statistics;
923
924 /*Number of transmitted frames of size between 1519 bytes
925 *and the number of bytes specified in the MAX_TX_SIZE_CONFIG
926 *register
927 */
928 statistics = ipn3ke_rpst_read_64bits_statistics_register(
929 IPN3KE_25G_CNTR_TX_1519_MAXB_LO,
930 IPN3KE_25G_CNTR_TX_1519_MAXB_HI,
931 hw, port_id);
932 hw_stats->tx_size_1519_to_max += statistics;
933
934 /*Number of oversized frames (frames with more bytes than the
935 *number specified in the MAX_TX_SIZE_CONFIG register)
936 *transmitted
937 */
938 statistics = ipn3ke_rpst_read_64bits_statistics_register(
939 IPN3KE_25G_CNTR_TX_OVERSIZE_LO,
940 IPN3KE_25G_CNTR_TX_OVERSIZE_HI,
941 hw, port_id);
942
943 /*Number of valid multicast frames transmitted,
944 *excluding control frames
945 */
946 statistics = ipn3ke_rpst_read_64bits_statistics_register(
947 IPN3KE_25G_CNTR_TX_MCAST_DATA_OK_LO,
948 IPN3KE_25G_CNTR_TX_MCAST_DATA_OK_HI,
949 hw, port_id);
950 hw_stats->eth.tx_multicast += statistics;
951
952 /*Number of valid broadcast frames transmitted,
953 *excluding control frames
954 */
955 statistics = ipn3ke_rpst_read_64bits_statistics_register(
956 IPN3KE_25G_CNTR_TX_BCAST_DATA_OK_LO,
957 IPN3KE_25G_CNTR_TX_BCAST_DATA_OK_HI,
958 hw, port_id);
959 hw_stats->eth.tx_broadcast += statistics;
960
961 /*Number of valid unicast frames transmitted,
962 *excluding control frames
963 */
964 statistics = ipn3ke_rpst_read_64bits_statistics_register(
965 IPN3KE_25G_CNTR_TX_UCAST_DATA_OK_LO,
966 IPN3KE_25G_CNTR_TX_UCAST_DATA_OK_HI,
967 hw, port_id);
968 hw_stats->eth.tx_unicast += statistics;
969
970 /*Number of valid multicast frames transmitted,
971 *excluding data frames
972 */
973 statistics = ipn3ke_rpst_read_64bits_statistics_register(
974 IPN3KE_25G_CNTR_TX_MCAST_CTRL_LO,
975 IPN3KE_25G_CNTR_TX_MCAST_CTRL_HI,
976 hw, port_id);
977 hw_stats->eth.tx_multicast += statistics;
978
979 /*Number of valid broadcast frames transmitted,
980 *excluding data frames
981 */
982 statistics = ipn3ke_rpst_read_64bits_statistics_register(
983 IPN3KE_25G_CNTR_TX_BCAST_CTRL_LO,
984 IPN3KE_25G_CNTR_TX_BCAST_CTRL_HI,
985 hw, port_id);
986 hw_stats->eth.tx_broadcast += statistics;
987
988 /*Number of valid unicast frames transmitted,
989 *excluding data frames
990 */
991 statistics = ipn3ke_rpst_read_64bits_statistics_register(
992 IPN3KE_25G_CNTR_TX_UCAST_CTRL_LO,
993 IPN3KE_25G_CNTR_TX_UCAST_CTRL_HI,
994 hw, port_id);
995 hw_stats->eth.tx_unicast += statistics;
996
997 /* Number of valid pause frames transmitted */
998 statistics = ipn3ke_rpst_read_64bits_statistics_register(
999 IPN3KE_25G_CNTR_TX_PAUSE_LO,
1000 IPN3KE_25G_CNTR_TX_PAUSE_HI,
1001 hw, port_id);
1002
1003 /*Number of transmitted runt packets. The IP core does not
1004 *transmit frames of length less than nine bytes.
1005 *The IP core pads frames of length nine bytes to 64 bytes to
1006 *extend them to 64 bytes. Therefore, this counter does not
1007 *increment in normal operating conditions.
1008 */
1009 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1010 IPN3KE_25G_CNTR_TX_RUNT_LO,
1011 IPN3KE_25G_CNTR_TX_RUNT_HI,
1012 hw, port_id);
1013
1014 /*Number of transmitted payload bytes in frames with no FCS,
1015 *undersized, oversized, or payload length errors.
1016 *If VLAN detection is turned off for the TX MAC (bit[1]
1017 *of the TX_MAC_CONTROL register at offset 0x40A has
1018 *the value of 1), the IP core counts the VLAN header bytes
1019 *(4 bytes for VLAN and 8 bytes for stacked VLAN)
1020 *as payload bytes. This register is compliant with
1021 *the requirements for aOctetsTransmittedOK in section
1022 *5.2.2.1.8 of the IEEE Standard 802.3-2008.
1023 */
1024 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1025 IPN3KE_25G_TX_PAYLOAD_OCTETS_OK_LO,
1026 IPN3KE_25G_TX_PAYLOAD_OCTETS_OK_HI,
1027 hw, port_id);
1028 hw_stats->eth.tx_bytes += statistics;
1029
1030 /*Number of transmitted bytes in frames with no FCS, undersized,
1031 *oversized, or payload length errors. This register is
1032 *compliant with the requirements for ifOutOctets in RFC3635
1033 *(Managed Objects for Ethernet-like Interface Types)
1034 *and TX etherStatsOctets in RFC2819(Remote Network Monitoring
1035 *Management Information Base (RMON)).
1036 */
1037 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1038 IPN3KE_25G_TX_FRAME_OCTETS_OK_LO,
1039 IPN3KE_25G_TX_FRAME_OCTETS_OK_HI,
1040 hw, port_id);
1041
1042 /*Number of received frames less than 64 bytes
1043 *and reporting a CRC error
1044 */
1045 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1046 IPN3KE_25G_CNTR_RX_FRAGMENTS_LO,
1047 IPN3KE_25G_CNTR_RX_FRAGMENTS_HI,
1048 hw, port_id);
1049 hw_stats->eth.rx_discards += statistics;
1050 hw_stats->crc_errors += statistics;
1051 hw_stats->rx_length_errors += statistics;
1052
1053 /* Number of received oversized frames reporting a CRC error */
1054 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1055 IPN3KE_25G_CNTR_RX_JABBERS_LO,
1056 IPN3KE_25G_CNTR_RX_JABBERS_HI,
1057 hw, port_id);
1058 hw_stats->eth.rx_discards += statistics;
1059 hw_stats->crc_errors += statistics;
1060 hw_stats->rx_length_errors += statistics;
1061
1062 /*Number of received packets with FCS errors.
1063 *This register maintains a count of the number of pulses
1064 *on the "l<n>_rx_fcs_error" or "rx_fcs_error" output signal
1065 */
1066 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1067 IPN3KE_25G_CNTR_RX_FCS_LO,
1068 IPN3KE_25G_CNTR_RX_FCS_HI,
1069 hw, port_id);
1070 hw_stats->eth.rx_discards += statistics;
1071 hw_stats->checksum_error += statistics;
1072
1073 /*Number of received frames with a frame of length at least 64
1074 *with CRC error
1075 */
1076 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1077 IPN3KE_25G_CNTR_RX_CRCERR_LO,
1078 IPN3KE_25G_CNTR_RX_CRCERR_HI,
1079 hw, port_id);
1080 hw_stats->eth.rx_discards += statistics;
1081 hw_stats->crc_errors += statistics;
1082
1083 /*Number of errored multicast frames received,
1084 *excluding control frames
1085 */
1086 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1087 IPN3KE_25G_CNTR_RX_MCAST_DATA_ERR_LO,
1088 IPN3KE_25G_CNTR_RX_MCAST_DATA_ERR_HI,
1089 hw, port_id);
1090 hw_stats->eth.rx_discards += statistics;
1091
1092 /*Number of errored broadcast frames received,
1093 *excluding control frames
1094 */
1095 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1096 IPN3KE_25G_CNTR_RX_BCAST_DATA_ERR_LO,
1097 IPN3KE_25G_CNTR_RX_BCAST_DATA_ERR_HI,
1098 hw, port_id);
1099 hw_stats->eth.rx_discards += statistics;
1100
1101 /*Number of errored unicast frames received,
1102 *excluding control frames
1103 */
1104 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1105 IPN3KE_25G_CNTR_RX_UCAST_DATA_ERR_LO,
1106 IPN3KE_25G_CNTR_RX_UCAST_DATA_ERR_HI,
1107 hw, port_id);
1108 hw_stats->eth.rx_discards += statistics;
1109
1110 /* Number of errored multicast control frames received */
1111 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1112 IPN3KE_25G_CNTR_RX_MCAST_CTRL_ERR_LO,
1113 IPN3KE_25G_CNTR_RX_MCAST_CTRL_ERR_HI,
1114 hw, port_id);
1115 hw_stats->eth.rx_discards += statistics;
1116
1117 /* Number of errored broadcast control frames received */
1118 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1119 IPN3KE_25G_CNTR_RX_BCAST_CTRL_ERR_LO,
1120 IPN3KE_25G_CNTR_RX_BCAST_CTRL_ERR_HI,
1121 hw, port_id);
1122 hw_stats->eth.rx_discards += statistics;
1123
1124 /* Number of errored unicast control frames received */
1125 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1126 IPN3KE_25G_CNTR_RX_UCAST_CTRL_ERR_LO,
1127 IPN3KE_25G_CNTR_RX_UCAST_CTRL_ERR_HI,
1128 hw, port_id);
1129 hw_stats->eth.rx_discards += statistics;
1130
1131 /* Number of errored pause frames received */
1132 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1133 IPN3KE_25G_CNTR_RX_PAUSE_ERR_LO,
1134 IPN3KE_25G_CNTR_RX_PAUSE_ERR_HI,
1135 hw, port_id);
1136 hw_stats->eth.rx_discards += statistics;
1137
1138 /*Number of 64-byte received frames,
1139 *including the CRC field but excluding the preamble
1140 *and SFD bytes
1141 */
1142 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1143 IPN3KE_25G_CNTR_RX_64B_LO,
1144 IPN3KE_25G_CNTR_RX_64B_HI,
1145 hw, port_id);
1146 hw_stats->rx_size_64 += statistics;
1147
1148 /*Number of received frames between 65 and 127 bytes */
1149 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1150 IPN3KE_25G_CNTR_RX_65_127B_LO,
1151 IPN3KE_25G_CNTR_RX_65_127B_HI,
1152 hw, port_id);
1153 hw_stats->rx_size_65_127 += statistics;
1154
1155 /*Number of received frames between 128 and 255 bytes
1156 */
1157 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1158 IPN3KE_25G_CNTR_RX_128_255B_LO,
1159 IPN3KE_25G_CNTR_RX_128_255B_HI,
1160 hw, port_id);
1161 hw_stats->rx_size_128_255 += statistics;
1162
1163 /*Number of received frames between 256 and 511 bytes
1164 */
1165 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1166 IPN3KE_25G_CNTR_RX_256_511B_LO,
1167 IPN3KE_25G_CNTR_RX_256_511B_HI,
1168 hw, port_id);
1169 hw_stats->rx_size_256_511 += statistics;
1170
1171 /*Number of received frames between 512 and 1023 bytes
1172 */
1173 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1174 IPN3KE_25G_CNTR_RX_512_1023B_LO,
1175 IPN3KE_25G_CNTR_RX_512_1023B_HI,
1176 hw, port_id);
1177 hw_stats->rx_size_512_1023 += statistics;
1178
1179 /*Number of received frames between 1024 and 1518 bytes
1180 */
1181 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1182 IPN3KE_25G_CNTR_RX_1024_1518B_LO,
1183 IPN3KE_25G_CNTR_RX_1024_1518B_HI,
1184 hw, port_id);
1185 hw_stats->rx_size_1024_1518 += statistics;
1186
1187 /*Number of received frames of size between 1519 bytes
1188 *and the number of bytes specified in the MAX_TX_SIZE_CONFIG
1189 *register
1190 */
1191 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1192 IPN3KE_25G_CNTR_RX_1519_MAXB_LO,
1193 IPN3KE_25G_CNTR_RX_1519_MAXB_HI,
1194 hw, port_id);
1195 hw_stats->rx_size_big += statistics;
1196
1197 /*Number of oversized frames (frames with more bytes
1198 *than the number specified in the MAX_TX_SIZE_CONFIG register)
1199 *received
1200 */
1201 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1202 IPN3KE_25G_CNTR_RX_OVERSIZE_LO,
1203 IPN3KE_25G_CNTR_RX_OVERSIZE_HI,
1204 hw, port_id);
1205 hw_stats->rx_jabber += statistics;
1206
1207 /*Number of valid multicast frames received,
1208 *excluding control frames
1209 */
1210 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1211 IPN3KE_25G_CNTR_RX_MCAST_DATA_OK_LO,
1212 IPN3KE_25G_CNTR_RX_MCAST_DATA_OK_HI,
1213 hw, port_id);
1214 hw_stats->eth.rx_multicast += statistics;
1215
1216 /*Number of valid broadcast frames received,
1217 *excluding control frames
1218 */
1219 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1220 IPN3KE_25G_CNTR_RX_BCAST_DATA_OK_LO,
1221 IPN3KE_25G_CNTR_RX_BCAST_DATA_OK_HI,
1222 hw, port_id);
1223 hw_stats->eth.rx_broadcast += statistics;
1224
1225 /*Number of valid unicast frames received,
1226 *excluding control frames
1227 */
1228 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1229 IPN3KE_25G_CNTR_RX_UCAST_DATA_OK_LO,
1230 IPN3KE_25G_CNTR_RX_UCAST_DATA_OK_HI,
1231 hw, port_id);
1232 hw_stats->eth.rx_unicast += statistics;
1233
1234 /*Number of valid multicast frames received,
1235 *excluding data frames
1236 */
1237 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1238 IPN3KE_25G_CNTR_RX_MCAST_CTRL_LO,
1239 IPN3KE_25G_CNTR_RX_MCAST_CTRL_HI,
1240 hw, port_id);
1241 hw_stats->eth.rx_multicast += statistics;
1242
1243 /*Number of valid broadcast frames received,
1244 *excluding data frames
1245 */
1246 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1247 IPN3KE_25G_CNTR_RX_BCAST_CTRL_LO,
1248 IPN3KE_25G_CNTR_RX_BCAST_CTRL_HI,
1249 hw, port_id);
1250 hw_stats->eth.rx_broadcast += statistics;
1251
1252 /*Number of valid unicast frames received,
1253 *excluding data frames
1254 */
1255 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1256 IPN3KE_25G_CNTR_RX_UCAST_CTRL_LO,
1257 IPN3KE_25G_CNTR_RX_UCAST_CTRL_HI,
1258 hw, port_id);
1259 hw_stats->eth.rx_unicast += statistics;
1260
1261 /*Number of received pause frames, with or without error
1262 */
1263 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1264 IPN3KE_25G_CNTR_RX_PAUSE_LO,
1265 IPN3KE_25G_CNTR_RX_PAUSE_HI,
1266 hw, port_id);
1267
1268 /*Number of received runt packets. A runt is a packet of size
1269 *less than 64 bytes but greater than eight bytes.
1270 *If a packet is eight bytes or smaller, it is considered
1271 *a decoding error and not a runt frame, and the IP core
1272 *does not flag it nor count it as a runt.
1273 */
1274 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1275 IPN3KE_25G_CNTR_RX_RUNT_LO,
1276 IPN3KE_25G_CNTR_RX_RUNT_HI,
1277 hw, port_id);
1278
1279 /*Number of received payload bytes in frames with no FCS,
1280 *undersized, oversized, or payload length errors.
1281 *If VLAN detection is turned off for the RX MAC (bit [1] of the
1282 *"RXMAC_CONTROL" register at offset 0x50A has the value of 1),
1283 *the IP core counts the VLAN header bytes (4 bytes for VLAN and
1284 *8 bytes for stacked VLAN) as payload bytes.
1285 *This register is compliant with the requirements for
1286 *aOctetsReceivedOK in section 5.2.2.1.14 of the IEEE Standard
1287 *802.3-2008
1288 */
1289 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1290 IPN3KE_25G_RX_PAYLOAD_OCTETS_OK_LO,
1291 IPN3KE_25G_RX_PAYLOAD_OCTETS_OK_HI,
1292 hw, port_id);
1293 hw_stats->eth.rx_bytes += statistics;
1294
1295 /*Number of received bytes in frames with no FCS, undersized,
1296 *oversized, or payload length errors.
1297 *This register is compliant with the requirements for
1298 *ifInOctets in RFC3635 (Managed Objects for Ethernet-like
1299 *Interface Types) and RX etherStatsOctets in RFC2819
1300 *(Remote Network Monitoring Management Information Base
1301 *(RMON)).
1302 */
1303 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1304 IPN3KE_25G_RX_FRAME_OCTETS_OK_LO,
1305 IPN3KE_25G_RX_FRAME_OCTETS_OK_HI,
1306 hw, port_id);
1307
1308 /*resume Tx counter to real time
1309 */
1310 tmp = 0x00000000;
1311 (*hw->f_mac_read)(hw,
1312 &tmp,
1313 IPN3KE_25G_TX_STATISTICS_CONFIG,
1314 port_id,
1315 0);
1316 tmp &= 0xfffffffb;
1317 (*hw->f_mac_write)(hw,
1318 tmp,
1319 IPN3KE_25G_TX_STATISTICS_CONFIG,
1320 port_id,
1321 0);
1322
1323 /*resume Rx counter to real time
1324 */
1325 tmp = 0x00000000;
1326 (*hw->f_mac_read)(hw,
1327 &tmp,
1328 IPN3KE_25G_RX_STATISTICS_CONFIG,
1329 port_id,
1330 0);
1331 tmp &= 0xfffffffb;
1332 (*hw->f_mac_write)(hw,
1333 tmp,
1334 IPN3KE_25G_RX_STATISTICS_CONFIG,
1335 port_id,
1336 0);
1337
1338 return 0;
1339 }
1340
1341 static void
1342 ipn3ke_rpst_25g_lineside_tx_stats_reset(struct ipn3ke_hw *hw,
1343 uint16_t port_id)
1344 {
1345 uint32_t tmp = 0x00000001;
1346 /* Bit[0]: Software can set this bit to the value of 1
1347 * to reset all of the TX statistics registers at the same time.
1348 * This bit is selfclearing.
1349 */
1350 (*hw->f_mac_write)(hw,
1351 tmp,
1352 IPN3KE_25G_TX_STATISTICS_CONFIG,
1353 port_id,
1354 0);
1355
1356 while (tmp & 0x00000001) {
1357 tmp = 0x00000000;
1358 (*hw->f_mac_read)(hw,
1359 &tmp,
1360 IPN3KE_25G_TX_STATISTICS_CONFIG,
1361 port_id,
1362 0);
1363 if (tmp & 0x00000001)
1364 usleep(5);
1365 else
1366 return;
1367 }
1368 }
1369
1370 static void
1371 ipn3ke_rpst_25g_lineside_rx_stats_reset(struct ipn3ke_hw *hw,
1372 uint16_t port_id)
1373 {
1374 uint32_t tmp = 0x00000001;
1375 /* Bit[0]: Software can set this bit to the value of 1
1376 * to reset all of the RX statistics registers at the same time.
1377 * This bit is selfclearing.
1378 */
1379 (*hw->f_mac_write)(hw,
1380 tmp,
1381 IPN3KE_25G_RX_STATISTICS_CONFIG,
1382 port_id,
1383 0);
1384
1385 while (tmp & 0x00000001) {
1386 tmp = 0x00000000;
1387 (*hw->f_mac_read)(hw,
1388 &tmp,
1389 IPN3KE_25G_RX_STATISTICS_CONFIG,
1390 port_id,
1391 0);
1392 if (tmp & 0x00000001)
1393 usleep(5);
1394 else
1395 return;
1396 }
1397 }
1398
1399 static uint64_t
1400 ipn3ke_rpst_read_36bits_statistics_register(uint32_t addr_lo,
1401 uint32_t addr_hi, struct ipn3ke_hw *hw, uint16_t port_id)
1402 {
1403 uint32_t statistics_lo = 0x00000000;
1404 uint32_t statistics_hi = 0x00000000;
1405 uint64_t statistics = 0x0000000000000000;
1406
1407 (*hw->f_mac_read)(hw,
1408 &statistics_lo,
1409 addr_lo,
1410 port_id,
1411 0);
1412 (*hw->f_mac_read)(hw,
1413 &statistics_hi,
1414 addr_hi,
1415 port_id,
1416 0);
1417 statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
1418 statistics += statistics_hi;
1419 statistics = statistics << IPN3KE_REGISTER_WIDTH;
1420 statistics += statistics_lo;
1421 return statistics;
1422 }
1423
1424 static int
1425 ipn3ke_rpst_read_10g_lineside_stats_registers
1426 (struct ipn3ke_hw *hw,
1427 uint16_t port_id,
1428 struct ipn3ke_rpst_hw_port_stats *hw_stats,
1429 struct rte_eth_stats *stats)
1430 {
1431 uint64_t statistics = 0;
1432
1433 memset(hw_stats, 0, sizeof(*hw_stats));
1434 memset(stats, 0, sizeof(*stats));
1435
1436 /*36-bit statistics counter that collects the number of frames
1437 *that are successfully transmitted, including control frames.
1438 */
1439 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1440 IPN3KE_10G_TX_STATS_FRAME_OK_LO,
1441 IPN3KE_10G_TX_STATS_FRAME_OK_HI,
1442 hw, port_id);
1443 stats->opackets = statistics;
1444
1445 /*36-bit statistics counter that collects the number of frames
1446 *that are successfully received, including control frames.
1447 */
1448 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1449 IPN3KE_10G_RX_STATS_FRAME_OK_LO,
1450 IPN3KE_10G_RX_STATS_FRAME_OK_HI,
1451 hw, port_id);
1452 stats->ipackets = statistics;
1453
1454 /*36-bit statistics counter that collects the number of frames
1455 *transmitted with error, including control frames.
1456 */
1457 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1458 IPN3KE_10G_TX_STATS_FRAME_ERR_LO,
1459 IPN3KE_10G_TX_STATS_FRAME_ERR_HI,
1460 hw, port_id);
1461 stats->oerrors = statistics;
1462 hw_stats->eth.tx_errors = statistics;
1463
1464 /*36-bit statistics counter that collects the number of frames
1465 *received with error, including control frames.
1466 */
1467 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1468 IPN3KE_10G_RX_STATS_FRAME_ERR_LO,
1469 IPN3KE_10G_RX_STATS_FRAME_ERR_HI,
1470 hw, port_id);
1471 stats->ierrors = statistics;
1472 hw_stats->eth.rx_discards = statistics;
1473
1474 /*36-bit statistics counter that collects the number
1475 *of RX frames with CRC error.
1476 */
1477 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1478 IPN3KE_10G_RX_STATS_FRAME_CRC_ERR_LO,
1479 IPN3KE_10G_RX_STATS_FRAME_CRC_ERR_HI,
1480 hw, port_id);
1481 hw_stats->crc_errors = statistics;
1482
1483 /*64-bit statistics counter that collects the payload length,
1484 *including the bytes in control frames.
1485 *The payload length is the number of data and padding bytes
1486 *transmitted.
1487 *If the tx_vlan_detection[0] register bit is set to 1,
1488 *the VLAN and stacked VLAN tags are counted as part of
1489 *the TX payload.
1490 */
1491 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1492 IPN3KE_10G_TX_STATS_OCTETS_OK_LO,
1493 IPN3KE_10G_TX_STATS_OCTETS_OK_HI,
1494 hw, port_id);
1495 stats->obytes = statistics;
1496 hw_stats->eth.tx_bytes = statistics;
1497
1498 /*64-bit statistics counter that collects the payload length,
1499 *including the bytes in control frames.
1500 *The payload length is the number of data and padding bytes
1501 *received.
1502 *If the rx_vlan_detection[0] register bit is set to 1,
1503 *the VLAN and stacked VLAN tags are counted as part of
1504 *the RX payload.
1505 */
1506 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1507 IPN3KE_10G_RX_STATS_OCTETS_OK_LO,
1508 IPN3KE_10G_RX_STATS_OCTETS_OK_HI,
1509 hw, port_id);
1510 stats->ibytes = statistics;
1511 hw_stats->eth.rx_bytes = statistics;
1512
1513 /*36-bit statistics counter that collects the number of
1514 *valid pause frames transmitted.
1515 */
1516 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1517 IPN3KE_10G_TX_STATS_PAUSE_MAC_CTRL_FRAMES_LO,
1518 IPN3KE_10G_TX_STATS_PAUSE_MAC_CTRL_FRAMES_HI,
1519 hw, port_id);
1520
1521 /*36-bit statistics counter that collects the number of
1522 *valid pause frames received.
1523 */
1524 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1525 IPN3KE_10G_RX_STATS_PAUSE_MAC_CTRL_FRAMES_LO,
1526 IPN3KE_10G_RX_STATS_PAUSE_MAC_CTRL_FRAMES_HI,
1527 hw, port_id);
1528
1529 /*36-bit statistics counter that collects the number of frames
1530 *transmitted that are invalid and with error.
1531 */
1532 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1533 IPN3KE_10G_TX_STATS_IF_ERRORS_LO,
1534 IPN3KE_10G_TX_STATS_IF_ERRORS_HI,
1535 hw, port_id);
1536
1537 /*36-bit statistics counter that collects the number of frames
1538 *received that are invalid and with error.
1539 */
1540 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1541 IPN3KE_10G_RX_STATS_IF_ERRORS_LO,
1542 IPN3KE_10G_RX_STATS_IF_ERRORS_HI,
1543 hw, port_id);
1544
1545 /*36-bit statistics counter that collects the number of
1546 *good unicast frames transmitted,
1547 *excluding control frames.
1548 */
1549 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1550 IPN3KE_10G_TX_STATS_UNICAST_FRAME_OK_LO,
1551 IPN3KE_10G_TX_STATS_UNICAST_FRAME_OK_HI,
1552 hw, port_id);
1553 hw_stats->eth.tx_unicast = statistics;
1554
1555 /*36-bit statistics counter that collects the number of
1556 *good unicast frames received,
1557 *excluding control frames.
1558 */
1559 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1560 IPN3KE_10G_RX_STATS_UNICAST_FRAME_OK_LO,
1561 IPN3KE_10G_RX_STATS_UNICAST_FRAME_OK_HI,
1562 hw, port_id);
1563 hw_stats->eth.rx_unicast = statistics;
1564
1565 /*36-bit statistics counter that collects the number of
1566 *unicast frames transmitted with error,
1567 *excluding control frames.
1568 */
1569 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1570 IPN3KE_10G_TX_STATS_UNICAST_FRAME_ERR_LO,
1571 IPN3KE_10G_TX_STATS_UNICAST_FRAME_ERR_HI,
1572 hw, port_id);
1573
1574 /*36-bit statistics counter that collects the number of
1575 *unicast frames received with error,
1576 *excluding control frames.
1577 */
1578 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1579 IPN3KE_10G_RX_STATS_UNICAST_FRAME_ERR_LO,
1580 IPN3KE_10G_RX_STATS_UNICAST_FRAME_ERR_HI,
1581 hw, port_id);
1582
1583 /*36-bit statistics counter that collects the number of
1584 *good multicast frames transmitted,
1585 *excluding control frames.
1586 */
1587 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1588 IPN3KE_10G_TX_STATS_MULTICAST_FRAME_OK_LO,
1589 IPN3KE_10G_TX_STATS_MULTICAST_FRAME_OK_HI,
1590 hw, port_id);
1591 hw_stats->eth.tx_multicast = statistics;
1592
1593 /*36-bit statistics counter that collects the number of
1594 *good multicast frames received,
1595 *excluding control frames.
1596 */
1597 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1598 IPN3KE_10G_RX_STATS_MULTICAST_FRAME_OK_LO,
1599 IPN3KE_10G_RX_STATS_MULTICAST_FRAME_OK_HI,
1600 hw, port_id);
1601 hw_stats->eth.rx_multicast = statistics;
1602
1603 /*36-bit statistics counter that collects the number of
1604 *multicast frames transmitted with error,
1605 *excluding control frames.
1606 */
1607 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1608 IPN3KE_10G_TX_STATS_MULTICAST_FRAME_ERR_LO,
1609 IPN3KE_10G_TX_STATS_MULTICAST_FRAME_ERR_HI,
1610 hw, port_id);
1611
1612 /*36-bit statistics counter that collects the number
1613 *of multicast frames received with error,
1614 *excluding control frames.
1615 */
1616 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1617 IPN3KE_10G_RX_STATS_MULTICAST_FRAME_ERR_LO,
1618 IPN3KE_10G_RX_STATS_MULTICAST_FRAME_ERR_HI,
1619 hw, port_id);
1620
1621 /*36-bit statistics counter that collects the number of
1622 *good broadcast frames transmitted,
1623 *excluding control frames.
1624 */
1625 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1626 IPN3KE_10G_TX_STATS_BROADCAST_FRAME_OK_LO,
1627 IPN3KE_10G_TX_STATS_BROADCAST_FRAME_OK_HI,
1628 hw, port_id);
1629 hw_stats->eth.tx_broadcast = statistics;
1630
1631 /*36-bit statistics counter that collects the number of
1632 *good broadcast frames received,
1633 *excluding control frames.
1634 */
1635 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1636 IPN3KE_10G_RX_STATS_BROADCAST_FRAME_OK_LO,
1637 IPN3KE_10G_RX_STATS_BROADCAST_FRAME_OK_HI,
1638 hw, port_id);
1639 hw_stats->eth.rx_broadcast = statistics;
1640
1641 /*36-bit statistics counter that collects the number
1642 *of broadcast frames transmitted with error,
1643 *excluding control frames.
1644 */
1645 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1646 IPN3KE_10G_TX_STATS_BROADCAST_FRAME_ERR_LO,
1647 IPN3KE_10G_TX_STATS_BROADCAST_FRAME_ERR_HI,
1648 hw, port_id);
1649
1650 /*36-bit statistics counter that collects the number of
1651 *broadcast frames received with error,
1652 *excluding control frames.
1653 */
1654 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1655 IPN3KE_10G_RX_STATS_BROADCAST_FRAME_ERR_LO,
1656 IPN3KE_10G_RX_STATS_BROADCAST_FRAME_ERR_HI,
1657 hw, port_id);
1658
1659 /*64-bit statistics counter that collects the total number of
1660 *octets transmitted.
1661 *This count includes good, errored, and invalid frames.
1662 */
1663 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1664 IPN3KE_10G_TX_STATS_ETHER_STATS_OCTETS_LO,
1665 IPN3KE_10G_TX_STATS_ETHER_STATS_OCTETS_HI,
1666 hw, port_id);
1667
1668 /*64-bit statistics counter that collects the total number of
1669 *octets received.
1670 *This count includes good, errored, and invalid frames.
1671 */
1672 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1673 IPN3KE_10G_RX_STATS_ETHER_STATS_OCTETS_LO,
1674 IPN3KE_10G_RX_STATS_ETHER_STATS_OCTETS_HI,
1675 hw, port_id);
1676
1677 /*36-bit statistics counter that collects the total number of
1678 *good, errored, and invalid frames transmitted.
1679 */
1680 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1681 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_LO,
1682 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_HI,
1683 hw, port_id);
1684
1685 /*36-bit statistics counter that collects the total number of
1686 *good, errored, and invalid frames received.
1687 */
1688 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1689 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_LO,
1690 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_HI,
1691 hw, port_id);
1692
1693 /*36-bit statistics counter that collects the number of
1694 *undersized TX frames.
1695 */
1696 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1697 IPN3KE_10G_TX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_LO,
1698 IPN3KE_10G_TX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_HI,
1699 hw, port_id);
1700
1701 /*36-bit statistics counter that collects the number of
1702 *undersized RX frames.
1703 */
1704 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1705 IPN3KE_10G_RX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_LO,
1706 IPN3KE_10G_RX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_HI,
1707 hw, port_id);
1708 hw_stats->rx_undersize = statistics;
1709
1710 /*36-bit statistics counter that collects the number of
1711 *TX frames whose length exceeds the maximum frame length
1712 *specified.
1713 */
1714 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1715 IPN3KE_10G_TX_STATS_ETHER_STATS_OVER_SIZE_PKTS_LO,
1716 IPN3KE_10G_TX_STATS_ETHER_STATS_OVER_SIZE_PKTS_HI,
1717 hw, port_id);
1718
1719 /*36-bit statistics counter that collects the number of
1720 *RX frames whose length exceeds the maximum frame length
1721 *specified.
1722 */
1723 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1724 IPN3KE_10G_RX_STATS_ETHER_STATS_OVER_SIZE_PKTS_LO,
1725 IPN3KE_10G_RX_STATS_ETHER_STATS_OVER_SIZE_PKTS_HI,
1726 hw, port_id);
1727 hw_stats->rx_oversize = statistics;
1728
1729 /*36-bit statistics counter that collects the number of
1730 *64-byte TX frames,
1731 *including the CRC field
1732 *but excluding the preamble and SFD bytes.
1733 *This count includes good, errored, and invalid frames.
1734 */
1735 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1736 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_64_OCTETS_LO,
1737 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_64_OCTETS_HI,
1738 hw, port_id);
1739 hw_stats->tx_size_64 = statistics;
1740
1741 /*36-bit statistics counter that collects the number of
1742 *64-byte RX frames,
1743 *including the CRC field
1744 *but excluding the preamble and SFD bytes.
1745 *This count includes good, errored, and invalid frames.
1746 */
1747 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1748 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_64_OCTETS_LO,
1749 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_64_OCTETS_HI,
1750 hw, port_id);
1751 hw_stats->rx_size_64 = statistics;
1752
1753 /*36-bit statistics counter that collects the number of
1754 *TX frames between the length of 65 and 127 bytes,
1755 *including the CRC field
1756 *but excluding the preamble and SFD bytes.
1757 *This count includes good, errored, and invalid frames.
1758 */
1759 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1760 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_LO,
1761 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_HI,
1762 hw, port_id);
1763 hw_stats->tx_size_65_127 = statistics;
1764
1765 /*36-bit statistics counter that collects the number of
1766 *RX frames between the length of 65 and 127 bytes,
1767 *including the CRC field
1768 *but excluding the preamble and SFD bytes.
1769 *This count includes good, errored, and invalid frames.
1770 */
1771 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1772 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_LO,
1773 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_HI,
1774 hw, port_id);
1775 hw_stats->rx_size_65_127 = statistics;
1776
1777 /*36-bit statistics counter that collects the number of
1778 *TX frames between the length of 128 and 255 bytes,
1779 *including the CRC field
1780 *but excluding the preamble and SFD bytes.
1781 *This count includes good, errored, and invalid frames.
1782 */
1783 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1784 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_LO,
1785 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_HI,
1786 hw, port_id);
1787 hw_stats->tx_size_128_255 = statistics;
1788
1789 /*36-bit statistics counter that collects the number of
1790 *RX frames between the length of 128 and 255 bytes,
1791 *including the CRC field
1792 *but excluding the preamble and SFD bytes.
1793 *This count includes good, errored, and invalid frames.
1794 */
1795 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1796 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_LO,
1797 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_HI,
1798 hw, port_id);
1799 hw_stats->rx_size_128_255 = statistics;
1800
1801 /*36-bit statistics counter that collects the number of
1802 *TX frames between the length of 256 and 511 bytes,
1803 *including the CRC field
1804 *but excluding the preamble and SFD bytes.
1805 *This count includes good, errored, and invalid frames.
1806 */
1807 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1808 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_LO,
1809 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_HI,
1810 hw, port_id);
1811 hw_stats->tx_size_256_511 = statistics;
1812
1813 /*36-bit statistics counter that collects the number of
1814 *RX frames between the length of 256 and 511 bytes,
1815 *including the CRC field
1816 *but excluding the preamble and SFD bytes.
1817 *This count includes good, errored, and invalid frames.
1818 */
1819 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1820 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_LO,
1821 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_HI,
1822 hw, port_id);
1823 hw_stats->rx_size_256_511 = statistics;
1824
1825 /*36-bit statistics counter that collects the number of
1826 *TX frames between the length of 512 and 1023 bytes,
1827 *including the CRC field
1828 *but excluding the preamble and SFD bytes.
1829 *This count includes good, errored, and invalid frames.
1830 */
1831 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1832 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_LO,
1833 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_HI,
1834 hw, port_id);
1835 hw_stats->tx_size_512_1023 = statistics;
1836
1837 /*36-bit statistics counter that collects the number of
1838 *RX frames between the length of 512 and 1023 bytes,
1839 *including the CRC field
1840 *but excluding the preamble and SFD bytes.
1841 *This count includes good, errored, and invalid frames.
1842 */
1843 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1844 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_LO,
1845 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_HI,
1846 hw, port_id);
1847 hw_stats->rx_size_512_1023 = statistics;
1848
1849 /*36-bit statistics counter that collects the number of
1850 *TX frames between the length of 1024 and 1518 bytes,
1851 *including the CRC field but
1852 *excluding the preamble and SFD bytes.
1853 *This count includes good, errored, and invalid frames.
1854 */
1855 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1856 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_LO,
1857 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_HI,
1858 hw, port_id);
1859 hw_stats->tx_size_1024_1518 = statistics;
1860
1861 /*36-bit statistics counter that collects the number of
1862 *RX frames between the length of 1024 and 1518 bytes,
1863 *including the CRC field
1864 *but excluding the preamble and SFD bytes.
1865 *This count includes good, errored, and invalid frames.
1866 */
1867 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1868 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_LO,
1869 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_HI,
1870 hw, port_id);
1871 hw_stats->rx_size_1024_1518 = statistics;
1872
1873 /*36-bit statistics counter that collects the number of
1874 *TX frames equal or more than the length of 1,519 bytes,
1875 *including the CRC field
1876 *but excluding the preamble and SFD bytes.
1877 *This count includes good, errored, and invalid frames.
1878 */
1879 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1880 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_LO,
1881 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_HI,
1882 hw, port_id);
1883 hw_stats->tx_size_1519_to_max = statistics;
1884
1885 /*36-bit statistics counter that collects the number of
1886 *RX frames equal or more than the length of 1,519 bytes,
1887 *including the CRC field
1888 *but excluding the preamble and SFD bytes.
1889 *This count includes good,
1890 *errored, and invalid frames.
1891 */
1892 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1893 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_LO,
1894 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_HI,
1895 hw, port_id);
1896 hw_stats->rx_size_big = statistics;
1897
1898 /*36-bit statistics counter that collects the total number of
1899 *RX frames with length less than 64 bytes and CRC error.
1900 *The MAC does not drop these frames.
1901 */
1902 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1903 IPN3KE_10G_RX_STATS_ETHER_STATS_FRAGMENTS_LO,
1904 IPN3KE_10G_RX_STATS_ETHER_STATS_FRAGMENTS_HI,
1905 hw, port_id);
1906
1907 /*36-bit statistics counter that collects the number of
1908 *oversized RX frames with CRC error.
1909 *The MAC does not drop these frames.
1910 */
1911 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1912 IPN3KE_10G_RX_STATS_ETHER_STATS_JABBERS_LO,
1913 IPN3KE_10G_RX_STATS_ETHER_STATS_JABBERS_HI,
1914 hw, port_id);
1915
1916 /*36-bit statistics counter that collects the number of
1917 *RX frames with CRC error,
1918 *whose length is between 64 and the maximum frame length
1919 *specified in the register.
1920 *The MAC does not drop these frames.
1921 */
1922 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1923 IPN3KE_10G_RX_STATS_ETHER_STATS_CRC_ERR_LO,
1924 IPN3KE_10G_RX_STATS_ETHER_STATS_CRC_ERR_HI,
1925 hw, port_id);
1926
1927 /*36-bit statistics counter that collects the number of
1928 *valid TX unicast control frames.
1929 */
1930 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1931 IPN3KE_10G_TX_STATS_UNICAST_MAC_CTRL_FRAMES_LO,
1932 IPN3KE_10G_TX_STATS_UNICAST_MAC_CTRL_FRAMES_HI,
1933 hw, port_id);
1934 hw_stats->eth.tx_unicast += statistics;
1935
1936 /*36-bit statistics counter that collects the number of
1937 *valid RX unicast control frames.
1938 */
1939 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1940 IPN3KE_10G_RX_STATS_UNICAST_MAC_CTRL_FRAMES_LO,
1941 IPN3KE_10G_RX_STATS_UNICAST_MAC_CTRL_FRAMES_HI,
1942 hw, port_id);
1943 hw_stats->eth.rx_unicast += statistics;
1944
1945 /*36-bit statistics counter that collects the number of
1946 *valid TX multicast control frames.
1947 */
1948 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1949 IPN3KE_10G_TX_STATS_MULTICAST_MAC_CTRL_FRAMES_LO,
1950 IPN3KE_10G_TX_STATS_MULTICAST_MAC_CTRL_FRAMES_HI,
1951 hw, port_id);
1952 hw_stats->eth.tx_multicast += statistics;
1953
1954 /*36-bit statistics counter that collects the number of
1955 *valid RX multicast control frames.
1956 */
1957 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1958 IPN3KE_10G_RX_STATS_MULTICAST_MAC_CTRL_FRAMES_LO,
1959 IPN3KE_10G_RX_STATS_MULTICAST_MAC_CTRL_FRAMES_HI,
1960 hw, port_id);
1961 hw_stats->eth.rx_multicast += statistics;
1962
1963 /*36-bit statistics counter that collects the number of
1964 *valid TX broadcast control frames.
1965 */
1966 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1967 IPN3KE_10G_TX_STATS_BROADCAST_MAC_CTRL_FRAMES_LO,
1968 IPN3KE_10G_TX_STATS_BROADCAST_MAC_CTRL_FRAMES_HI,
1969 hw, port_id);
1970 hw_stats->eth.tx_broadcast += statistics;
1971
1972 /*36-bit statistics counter that collects the number of
1973 *valid RX broadcast control frames.
1974 */
1975 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1976 IPN3KE_10G_RX_STATS_BROADCAST_MAC_CTRL_FRAMES_LO,
1977 IPN3KE_10G_RX_STATS_BROADCAST_MAC_CTRL_FRAMES_HI,
1978 hw, port_id);
1979 hw_stats->eth.rx_broadcast += statistics;
1980
1981 /*36-bit statistics counter that collects the number of
1982 *valid TX PFC frames.
1983 */
1984 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1985 IPN3KE_10G_TX_STATS_PFC_MAC_CTRL_FRAMES_LO,
1986 IPN3KE_10G_TX_STATS_PFC_MAC_CTRL_FRAMES_HI,
1987 hw, port_id);
1988
1989 /*36-bit statistics counter that collects the number of
1990 *valid RX PFC frames.
1991 */
1992 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1993 IPN3KE_10G_RX_STATS_PFC_MAC_CTRL_FRAMES_LO,
1994 IPN3KE_10G_RX_STATS_PFC_MAC_CTRL_FRAMES_HI,
1995 hw, port_id);
1996
1997 return 0;
1998 }
1999
2000 static void
2001 ipn3ke_rpst_10g_lineside_tx_stats_reset(struct ipn3ke_hw *hw,
2002 uint16_t port_id)
2003 {
2004 uint32_t tmp;
2005
2006 /*Bit [0]: Set this register to 1 to clear all TX statistics
2007 *counters.
2008 *The IP core clears this bit when all counters are cleared.
2009 *Bits [31:1]: Reserved.
2010 */
2011 tmp = 0x00000000;
2012 (*hw->f_mac_read)(hw,
2013 &tmp,
2014 IPN3KE_10G_TX_STATS_CLR,
2015 port_id,
2016 0);
2017 tmp |= 0x00000001;
2018 (*hw->f_mac_write)(hw,
2019 tmp,
2020 IPN3KE_10G_TX_STATS_CLR,
2021 port_id,
2022 0);
2023 }
2024
2025 static void
2026 ipn3ke_rpst_10g_lineside_rx_stats_reset(struct ipn3ke_hw *hw,
2027 uint16_t port_id)
2028 {
2029 uint32_t tmp;
2030
2031 /*Bit [0]: Set this register to 1 to clear all RX statistics
2032 *counters.
2033 *The IP core clears this bit when all counters are cleared.
2034 *Bits [31:1]: Reserved
2035 */
2036 tmp = 0x00000000;
2037 (*hw->f_mac_read)(hw,
2038 &tmp,
2039 IPN3KE_10G_RX_STATS_CLR,
2040 port_id,
2041 0);
2042 tmp |= 0x00000001;
2043 (*hw->f_mac_write)(hw,
2044 tmp,
2045 IPN3KE_10G_RX_STATS_CLR,
2046 port_id,
2047 0);
2048 }
2049
2050 static int
2051 ipn3ke_rpst_stats_reset(struct rte_eth_dev *ethdev)
2052 {
2053 uint16_t port_id = 0;
2054 char *ch;
2055 int cnt = 0;
2056 struct rte_afu_device *afu_dev = NULL;
2057 struct ipn3ke_hw *hw = NULL;
2058
2059 if (!ethdev) {
2060 IPN3KE_AFU_PMD_ERR("ethernet device to reset is NULL!");
2061 return -EINVAL;
2062 }
2063
2064 afu_dev = RTE_ETH_DEV_TO_AFU(ethdev);
2065 if (!afu_dev) {
2066 IPN3KE_AFU_PMD_ERR("afu device to reset is NULL!");
2067 return -EINVAL;
2068 }
2069
2070 if (!afu_dev->shared.data) {
2071 IPN3KE_AFU_PMD_ERR("hardware data to reset is NULL!");
2072 return -EINVAL;
2073 }
2074
2075 hw = afu_dev->shared.data;
2076
2077 ch = ethdev->data->name;
2078 if (!ch) {
2079 IPN3KE_AFU_PMD_ERR("ethdev name is NULL!");
2080 return -EINVAL;
2081 }
2082 while (ch) {
2083 if (*ch == '_')
2084 cnt++;
2085 ch++;
2086 if (cnt == 3)
2087 break;
2088 }
2089 if (!ch) {
2090 IPN3KE_AFU_PMD_ERR("Can not get port_id from ethdev name!");
2091 return -EINVAL;
2092 }
2093 port_id = atoi(ch);
2094
2095 if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) {
2096 ipn3ke_rpst_25g_nic_side_tx_stats_reset(hw, port_id);
2097 ipn3ke_rpst_25g_nic_side_rx_stats_reset(hw, port_id);
2098 ipn3ke_rpst_25g_lineside_tx_stats_reset(hw, port_id);
2099 ipn3ke_rpst_25g_lineside_rx_stats_reset(hw, port_id);
2100 } else if (hw->retimer.mac_type ==
2101 IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) {
2102 ipn3ke_rpst_10g_nic_side_tx_stats_reset(hw, port_id);
2103 ipn3ke_rpst_10g_nic_side_rx_stats_reset(hw, port_id);
2104 ipn3ke_rpst_10g_lineside_tx_stats_reset(hw, port_id);
2105 ipn3ke_rpst_10g_lineside_rx_stats_reset(hw, port_id);
2106 }
2107
2108 return 0;
2109 }
2110
2111 static int
2112 ipn3ke_rpst_stats_get
2113 (struct rte_eth_dev *ethdev, struct rte_eth_stats *stats)
2114 {
2115 uint16_t port_id = 0;
2116 char *ch;
2117 int cnt = 0;
2118 int i = 0;
2119 struct rte_afu_device *afu_dev = NULL;
2120 struct ipn3ke_hw *hw = NULL;
2121 struct ipn3ke_rpst_hw_port_stats hw_stats;
2122
2123 if (!ethdev) {
2124 IPN3KE_AFU_PMD_ERR("ethernet device to get statistics is NULL");
2125 return -EINVAL;
2126 }
2127 if (!stats) {
2128 IPN3KE_AFU_PMD_ERR("Address to return statistics is NULL!");
2129 return -EINVAL;
2130 }
2131
2132 afu_dev = RTE_ETH_DEV_TO_AFU(ethdev);
2133 if (!afu_dev) {
2134 IPN3KE_AFU_PMD_ERR("afu device to get statistics is NULL!");
2135 return -EINVAL;
2136 }
2137
2138 if (!afu_dev->shared.data) {
2139 IPN3KE_AFU_PMD_ERR("hardware data to get statistics is NULL!");
2140 return -EINVAL;
2141 }
2142
2143 hw = afu_dev->shared.data;
2144
2145 ch = ethdev->data->name;
2146 if (!ch) {
2147 IPN3KE_AFU_PMD_ERR("ethdev name is NULL!");
2148 return -EINVAL;
2149 }
2150 while (ch) {
2151 if (*ch == '_')
2152 cnt++;
2153 ch++;
2154 if (cnt == 3)
2155 break;
2156 }
2157 if (!ch) {
2158 IPN3KE_AFU_PMD_ERR("Can not get port_id from ethdev name!");
2159 return -EINVAL;
2160 }
2161 port_id = atoi(ch);
2162
2163 if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) {
2164 ipn3ke_rpst_read_25g_lineside_stats_registers(hw,
2165 port_id,
2166 &hw_stats);
2167
2168 stats->ipackets = hw_stats.rx_size_64
2169 + hw_stats.rx_size_65_127
2170 + hw_stats.rx_size_128_255
2171 + hw_stats.rx_size_256_511
2172 + hw_stats.rx_size_512_1023
2173 + hw_stats.rx_size_1024_1518
2174 + hw_stats.rx_size_big
2175 + hw_stats.rx_undersize
2176 + hw_stats.rx_fragments
2177 + hw_stats.rx_oversize
2178 + hw_stats.rx_jabber;
2179 stats->opackets = hw_stats.tx_size_64
2180 + hw_stats.tx_size_65_127
2181 + hw_stats.tx_size_128_255
2182 + hw_stats.tx_size_256_511
2183 + hw_stats.tx_size_512_1023
2184 + hw_stats.tx_size_1024_1518
2185 + hw_stats.tx_size_1519_to_max;
2186 stats->ibytes = hw_stats.eth.rx_bytes;
2187 stats->obytes = hw_stats.eth.tx_bytes;
2188 stats->imissed = 0;
2189 stats->ierrors = hw_stats.eth.rx_discards
2190 + hw_stats.eth.rx_unknown_protocol;
2191 stats->oerrors = hw_stats.eth.tx_discards
2192 + hw_stats.eth.tx_errors;
2193 stats->rx_nombuf = 0;
2194 for (i = 0; i < RTE_ETHDEV_QUEUE_STAT_CNTRS; i++) {
2195 stats->q_ipackets[i] = 0;
2196 stats->q_opackets[i] = 0;
2197 stats->q_ibytes[i] = 0;
2198 stats->q_obytes[i] = 0;
2199 stats->q_errors[i] = 0;
2200 }
2201 } else {
2202 ipn3ke_rpst_read_10g_lineside_stats_registers(hw,
2203 port_id,
2204 &hw_stats,
2205 stats);
2206 }
2207
2208 return 0;
2209 }
2210
2211 static int
2212 ipn3ke_rpst_xstats_get
2213 (struct rte_eth_dev *ethdev, struct rte_eth_xstat *xstats, unsigned int n)
2214 {
2215 uint16_t port_id = 0;
2216 char *ch = NULL;
2217 int cnt = 0;
2218 unsigned int i, count, prio;
2219 struct rte_afu_device *afu_dev = NULL;
2220 struct ipn3ke_hw *hw = NULL;
2221 struct ipn3ke_rpst_hw_port_stats hw_stats;
2222 struct rte_eth_stats stats;
2223
2224 if (!xstats)
2225 return 0;
2226
2227 if (!ethdev) {
2228 IPN3KE_AFU_PMD_ERR("ethernet device to get statistics is NULL");
2229 return -EINVAL;
2230 }
2231
2232 afu_dev = RTE_ETH_DEV_TO_AFU(ethdev);
2233 if (!afu_dev) {
2234 IPN3KE_AFU_PMD_ERR("afu device to get statistics is NULL!");
2235 return -EINVAL;
2236 }
2237
2238 if (!afu_dev->shared.data) {
2239 IPN3KE_AFU_PMD_ERR("hardware data to get statistics is NULL!");
2240 return -EINVAL;
2241 }
2242
2243 hw = afu_dev->shared.data;
2244
2245 ch = ethdev->data->name;
2246 if (!ch) {
2247 IPN3KE_AFU_PMD_ERR("ethdev name is NULL!");
2248 return -EINVAL;
2249 }
2250 while (ch) {
2251 if (*ch == '_')
2252 cnt++;
2253 ch++;
2254 if (cnt == 3)
2255 break;
2256 }
2257 if (!ch) {
2258 IPN3KE_AFU_PMD_ERR("Can not get port_id from ethdev name!");
2259 return -EINVAL;
2260 }
2261 port_id = atoi(ch);
2262
2263 count = ipn3ke_rpst_xstats_calc_num();
2264 if (n < count)
2265 return count;
2266
2267 if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) {
2268 ipn3ke_rpst_read_25g_lineside_stats_registers(hw,
2269 port_id,
2270 &hw_stats);
2271 } else {
2272 ipn3ke_rpst_read_10g_lineside_stats_registers(hw,
2273 port_id,
2274 &hw_stats,
2275 &stats);
2276 }
2277
2278 count = 0;
2279
2280 /* Get stats from ipn3ke_rpst_stats */
2281 for (i = 0; i < IPN3KE_RPST_ETH_XSTATS_CNT; i++) {
2282 xstats[count].value = *(uint64_t *)(((char *)&hw_stats.eth)
2283 + ipn3ke_rpst_stats_strings[i].offset);
2284 xstats[count].id = count;
2285 count++;
2286 }
2287
2288 /* Get individiual stats from ipn3ke_rpst_hw_port */
2289 for (i = 0; i < IPN3KE_RPST_HW_PORT_XSTATS_CNT; i++) {
2290 xstats[count].value = *(uint64_t *)(((char *)(&hw_stats)) +
2291 ipn3ke_rpst_hw_port_strings[i].offset);
2292 xstats[count].id = count;
2293 count++;
2294 }
2295
2296 /* Get individiual stats from ipn3ke_rpst_rxq_pri */
2297 for (i = 0; i < IPN3KE_RPST_RXQ_PRIO_XSTATS_CNT; i++) {
2298 for (prio = 0; prio < IPN3KE_RPST_PRIO_XSTATS_CNT; prio++) {
2299 xstats[count].value =
2300 *(uint64_t *)(((char *)(&hw_stats)) +
2301 ipn3ke_rpst_rxq_prio_strings[i].offset +
2302 (sizeof(uint64_t) * prio));
2303 xstats[count].id = count;
2304 count++;
2305 }
2306 }
2307
2308 /* Get individiual stats from ipn3ke_rpst_txq_prio */
2309 for (i = 0; i < IPN3KE_RPST_TXQ_PRIO_XSTATS_CNT; i++) {
2310 for (prio = 0; prio < IPN3KE_RPST_PRIO_XSTATS_CNT; prio++) {
2311 xstats[count].value =
2312 *(uint64_t *)(((char *)(&hw_stats)) +
2313 ipn3ke_rpst_txq_prio_strings[i].offset +
2314 (sizeof(uint64_t) * prio));
2315 xstats[count].id = count;
2316 count++;
2317 }
2318 }
2319
2320 return count;
2321 }
2322
2323 static int
2324 ipn3ke_rpst_xstats_get_names
2325 (__rte_unused struct rte_eth_dev *dev,
2326 struct rte_eth_xstat_name *xstats_names,
2327 __rte_unused unsigned int limit)
2328 {
2329 unsigned int count = 0;
2330 unsigned int i, prio;
2331
2332 if (!xstats_names)
2333 return ipn3ke_rpst_xstats_calc_num();
2334
2335 /* Note: limit checked in rte_eth_xstats_names() */
2336
2337 /* Get stats from ipn3ke_rpst_stats */
2338 for (i = 0; i < IPN3KE_RPST_ETH_XSTATS_CNT; i++) {
2339 snprintf(xstats_names[count].name,
2340 sizeof(xstats_names[count].name),
2341 "%s",
2342 ipn3ke_rpst_stats_strings[i].name);
2343 count++;
2344 }
2345
2346 /* Get individiual stats from ipn3ke_rpst_hw_port */
2347 for (i = 0; i < IPN3KE_RPST_HW_PORT_XSTATS_CNT; i++) {
2348 snprintf(xstats_names[count].name,
2349 sizeof(xstats_names[count].name),
2350 "%s",
2351 ipn3ke_rpst_hw_port_strings[i].name);
2352 count++;
2353 }
2354
2355 /* Get individiual stats from ipn3ke_rpst_rxq_pri */
2356 for (i = 0; i < IPN3KE_RPST_RXQ_PRIO_XSTATS_CNT; i++) {
2357 for (prio = 0; prio < 8; prio++) {
2358 snprintf(xstats_names[count].name,
2359 sizeof(xstats_names[count].name),
2360 "rx_priority%u_%s",
2361 prio,
2362 ipn3ke_rpst_rxq_prio_strings[i].name);
2363 count++;
2364 }
2365 }
2366
2367 /* Get individiual stats from ipn3ke_rpst_txq_prio */
2368 for (i = 0; i < IPN3KE_RPST_TXQ_PRIO_XSTATS_CNT; i++) {
2369 for (prio = 0; prio < 8; prio++) {
2370 snprintf(xstats_names[count].name,
2371 sizeof(xstats_names[count].name),
2372 "tx_priority%u_%s",
2373 prio,
2374 ipn3ke_rpst_txq_prio_strings[i].name);
2375 count++;
2376 }
2377 }
2378 return count;
2379 }
2380
2381 static void
2382 ipn3ke_update_link(struct rte_rawdev *rawdev,
2383 uint16_t port, struct rte_eth_link *link)
2384 {
2385 uint64_t line_link_bitmap = 0;
2386 enum ifpga_rawdev_link_speed link_speed;
2387
2388 rawdev->dev_ops->attr_get(rawdev,
2389 "LineSideLinkStatus",
2390 (uint64_t *)&line_link_bitmap);
2391
2392 /* Parse the link status */
2393 if ((1 << port) & line_link_bitmap)
2394 link->link_status = 1;
2395 else
2396 link->link_status = 0;
2397
2398 IPN3KE_AFU_PMD_DEBUG("port is %d\n", port);
2399 IPN3KE_AFU_PMD_DEBUG("link->link_status is %d\n", link->link_status);
2400
2401 rawdev->dev_ops->attr_get(rawdev,
2402 "LineSideLinkSpeed",
2403 (uint64_t *)&link_speed);
2404 switch (link_speed) {
2405 case IFPGA_RAWDEV_LINK_SPEED_10GB:
2406 link->link_speed = ETH_SPEED_NUM_10G;
2407 break;
2408 case IFPGA_RAWDEV_LINK_SPEED_25GB:
2409 link->link_speed = ETH_SPEED_NUM_25G;
2410 break;
2411 default:
2412 IPN3KE_AFU_PMD_ERR("Unknown link speed info %u", link_speed);
2413 break;
2414 }
2415 }
2416
2417 /*
2418 * Set device link up.
2419 */
2420 int
2421 ipn3ke_rpst_dev_set_link_up(struct rte_eth_dev *dev)
2422 {
2423 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(dev);
2424 struct rte_eth_dev *pf;
2425 int ret = 0;
2426
2427 if (rpst->i40e_pf_eth) {
2428 ret = rte_eth_dev_set_link_up(rpst->i40e_pf_eth_port_id);
2429 pf = rpst->i40e_pf_eth;
2430 (*rpst->i40e_pf_eth->dev_ops->link_update)(pf, 1);
2431 }
2432
2433 return ret;
2434 }
2435
2436 /*
2437 * Set device link down.
2438 */
2439 int
2440 ipn3ke_rpst_dev_set_link_down(struct rte_eth_dev *dev)
2441 {
2442 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(dev);
2443 struct rte_eth_dev *pf;
2444 int ret = 0;
2445
2446 if (rpst->i40e_pf_eth) {
2447 ret = rte_eth_dev_set_link_down(rpst->i40e_pf_eth_port_id);
2448 pf = rpst->i40e_pf_eth;
2449 (*rpst->i40e_pf_eth->dev_ops->link_update)(pf, 1);
2450 }
2451
2452 return ret;
2453 }
2454
2455 int
2456 ipn3ke_rpst_link_update(struct rte_eth_dev *ethdev,
2457 __rte_unused int wait_to_complete)
2458 {
2459 struct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(ethdev);
2460 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev);
2461 struct rte_rawdev *rawdev;
2462 struct rte_eth_link link;
2463 struct rte_eth_dev *pf;
2464
2465 memset(&link, 0, sizeof(link));
2466
2467 link.link_duplex = ETH_LINK_FULL_DUPLEX;
2468 link.link_autoneg = !(ethdev->data->dev_conf.link_speeds &
2469 ETH_LINK_SPEED_FIXED);
2470
2471 rawdev = hw->rawdev;
2472 ipn3ke_update_link(rawdev, rpst->port_id, &link);
2473
2474 if (!rpst->ori_linfo.link_status &&
2475 link.link_status) {
2476 IPN3KE_AFU_PMD_DEBUG("Update Rpst %d Up\n", rpst->port_id);
2477 rpst->ori_linfo.link_status = link.link_status;
2478 rpst->ori_linfo.link_speed = link.link_speed;
2479
2480 rte_eth_linkstatus_set(ethdev, &link);
2481
2482 if (rpst->i40e_pf_eth) {
2483 IPN3KE_AFU_PMD_DEBUG("Update FVL PF %d Up\n",
2484 rpst->i40e_pf_eth_port_id);
2485 rte_eth_dev_set_link_up(rpst->i40e_pf_eth_port_id);
2486 pf = rpst->i40e_pf_eth;
2487 (*rpst->i40e_pf_eth->dev_ops->link_update)(pf, 1);
2488 }
2489 } else if (rpst->ori_linfo.link_status &&
2490 !link.link_status) {
2491 IPN3KE_AFU_PMD_DEBUG("Update Rpst %d Down\n",
2492 rpst->port_id);
2493 rpst->ori_linfo.link_status = link.link_status;
2494 rpst->ori_linfo.link_speed = link.link_speed;
2495
2496 rte_eth_linkstatus_set(ethdev, &link);
2497
2498 if (rpst->i40e_pf_eth) {
2499 IPN3KE_AFU_PMD_DEBUG("Update FVL PF %d Down\n",
2500 rpst->i40e_pf_eth_port_id);
2501 rte_eth_dev_set_link_down(rpst->i40e_pf_eth_port_id);
2502 pf = rpst->i40e_pf_eth;
2503 (*rpst->i40e_pf_eth->dev_ops->link_update)(pf, 1);
2504 }
2505 }
2506
2507 return 0;
2508 }
2509
2510 static int
2511 ipn3ke_rpst_link_check(struct ipn3ke_rpst *rpst)
2512 {
2513 struct ipn3ke_hw *hw;
2514 struct rte_rawdev *rawdev;
2515 struct rte_eth_link link;
2516 struct rte_eth_dev *pf;
2517
2518 if (rpst == NULL)
2519 return -1;
2520
2521 hw = rpst->hw;
2522
2523 memset(&link, 0, sizeof(link));
2524
2525 link.link_duplex = ETH_LINK_FULL_DUPLEX;
2526 link.link_autoneg = !(rpst->ethdev->data->dev_conf.link_speeds &
2527 ETH_LINK_SPEED_FIXED);
2528
2529 rawdev = hw->rawdev;
2530 ipn3ke_update_link(rawdev, rpst->port_id, &link);
2531
2532 if (!rpst->ori_linfo.link_status &&
2533 link.link_status) {
2534 IPN3KE_AFU_PMD_DEBUG("Check Rpst %d Up\n", rpst->port_id);
2535 rpst->ori_linfo.link_status = link.link_status;
2536 rpst->ori_linfo.link_speed = link.link_speed;
2537
2538 rte_eth_linkstatus_set(rpst->ethdev, &link);
2539
2540 if (rpst->i40e_pf_eth) {
2541 IPN3KE_AFU_PMD_DEBUG("Check FVL PF %d Up\n",
2542 rpst->i40e_pf_eth_port_id);
2543 rte_eth_dev_set_link_up(rpst->i40e_pf_eth_port_id);
2544 pf = rpst->i40e_pf_eth;
2545 (*rpst->i40e_pf_eth->dev_ops->link_update)(pf, 1);
2546 }
2547 } else if (rpst->ori_linfo.link_status &&
2548 !link.link_status) {
2549 IPN3KE_AFU_PMD_DEBUG("Check Rpst %d Down\n", rpst->port_id);
2550 rpst->ori_linfo.link_status = link.link_status;
2551 rpst->ori_linfo.link_speed = link.link_speed;
2552
2553 rte_eth_linkstatus_set(rpst->ethdev, &link);
2554
2555 if (rpst->i40e_pf_eth) {
2556 IPN3KE_AFU_PMD_DEBUG("Check FVL PF %d Down\n",
2557 rpst->i40e_pf_eth_port_id);
2558 rte_eth_dev_set_link_down(rpst->i40e_pf_eth_port_id);
2559 pf = rpst->i40e_pf_eth;
2560 (*rpst->i40e_pf_eth->dev_ops->link_update)(pf, 1);
2561 }
2562 }
2563
2564 return 0;
2565 }
2566
2567 static void *
2568 ipn3ke_rpst_scan_handle_request(__rte_unused void *param)
2569 {
2570 struct ipn3ke_rpst *rpst;
2571 int num = 0;
2572 #define MS 1000
2573 #define SCAN_NUM 32
2574
2575 for (;;) {
2576 num = 0;
2577 TAILQ_FOREACH(rpst, &ipn3ke_rpst_list, next) {
2578 if (rpst->i40e_pf_eth &&
2579 rpst->ethdev->data->dev_started &&
2580 rpst->i40e_pf_eth->data->dev_started)
2581 ipn3ke_rpst_link_check(rpst);
2582
2583 if (++num > SCAN_NUM)
2584 rte_delay_us(1 * MS);
2585 }
2586 rte_delay_us(50 * MS);
2587
2588 if (num == 0xffffff)
2589 return NULL;
2590 }
2591
2592 return NULL;
2593 }
2594
2595 static int
2596 ipn3ke_rpst_scan_check(void)
2597 {
2598 int ret;
2599
2600 if (ipn3ke_rpst_scan_num == 1) {
2601 ret = rte_ctrl_thread_create(&ipn3ke_rpst_scan_thread,
2602 "ipn3ke scanner",
2603 NULL,
2604 ipn3ke_rpst_scan_handle_request, NULL);
2605 if (ret) {
2606 IPN3KE_AFU_PMD_ERR("Fail to create ipn3ke rpst scan thread");
2607 return -1;
2608 }
2609 } else if (ipn3ke_rpst_scan_num == 0) {
2610 ret = pthread_cancel(ipn3ke_rpst_scan_thread);
2611 if (ret)
2612 IPN3KE_AFU_PMD_ERR("Can't cancel the thread");
2613
2614 ret = pthread_join(ipn3ke_rpst_scan_thread, NULL);
2615 if (ret)
2616 IPN3KE_AFU_PMD_ERR("Can't join the thread");
2617
2618 return ret;
2619 }
2620
2621 return 0;
2622 }
2623
2624 int
2625 ipn3ke_rpst_promiscuous_enable(struct rte_eth_dev *ethdev)
2626 {
2627 struct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(ethdev);
2628 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev);
2629 uint32_t rddata, val;
2630
2631 if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) {
2632 /* Enable all unicast */
2633 (*hw->f_mac_read)(hw,
2634 &rddata,
2635 IPN3KE_MAC_RX_FRAME_CONTROL,
2636 rpst->port_id,
2637 0);
2638 val = 1;
2639 val &= IPN3KE_MAC_RX_FRAME_CONTROL_EN_ALLUCAST_MASK;
2640 val |= rddata;
2641 (*hw->f_mac_write)(hw,
2642 val,
2643 IPN3KE_MAC_RX_FRAME_CONTROL,
2644 rpst->port_id,
2645 0);
2646 }
2647
2648 return 0;
2649 }
2650
2651 int
2652 ipn3ke_rpst_promiscuous_disable(struct rte_eth_dev *ethdev)
2653 {
2654 struct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(ethdev);
2655 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev);
2656 uint32_t rddata, val;
2657
2658 if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) {
2659 /* Disable all unicast */
2660 (*hw->f_mac_read)(hw,
2661 &rddata,
2662 IPN3KE_MAC_RX_FRAME_CONTROL,
2663 rpst->port_id,
2664 0);
2665 val = 0;
2666 val &= IPN3KE_MAC_RX_FRAME_CONTROL_EN_ALLUCAST_MASK;
2667 val |= rddata;
2668 (*hw->f_mac_write)(hw,
2669 val,
2670 IPN3KE_MAC_RX_FRAME_CONTROL,
2671 rpst->port_id,
2672 0);
2673 }
2674
2675 return 0;
2676 }
2677
2678 int
2679 ipn3ke_rpst_allmulticast_enable(struct rte_eth_dev *ethdev)
2680 {
2681 struct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(ethdev);
2682 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev);
2683 uint32_t rddata, val;
2684
2685 if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) {
2686 /* Enable all unicast */
2687 (*hw->f_mac_read)(hw,
2688 &rddata,
2689 IPN3KE_MAC_RX_FRAME_CONTROL,
2690 rpst->port_id,
2691 0);
2692 val = 1;
2693 val <<= IPN3KE_MAC_RX_FRAME_CONTROL_EN_ALLMCAST_SHIFT;
2694 val &= IPN3KE_MAC_RX_FRAME_CONTROL_EN_ALLMCAST_MASK;
2695 val |= rddata;
2696 (*hw->f_mac_write)(hw,
2697 val,
2698 IPN3KE_MAC_RX_FRAME_CONTROL,
2699 rpst->port_id,
2700 0);
2701 }
2702
2703 return 0;
2704 }
2705
2706 int
2707 ipn3ke_rpst_allmulticast_disable(struct rte_eth_dev *ethdev)
2708 {
2709 struct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(ethdev);
2710 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev);
2711 uint32_t rddata, val;
2712
2713 if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) {
2714 /* Disable all unicast */
2715 (*hw->f_mac_read)(hw,
2716 &rddata,
2717 IPN3KE_MAC_RX_FRAME_CONTROL,
2718 rpst->port_id,
2719 0);
2720 val = 0;
2721 val <<= IPN3KE_MAC_RX_FRAME_CONTROL_EN_ALLMCAST_SHIFT;
2722 val &= IPN3KE_MAC_RX_FRAME_CONTROL_EN_ALLMCAST_MASK;
2723 val |= rddata;
2724 (*hw->f_mac_write)(hw,
2725 val,
2726 IPN3KE_MAC_RX_FRAME_CONTROL,
2727 rpst->port_id,
2728 0);
2729 }
2730
2731 return 0;
2732 }
2733
2734 int
2735 ipn3ke_rpst_mac_addr_set(struct rte_eth_dev *ethdev,
2736 struct rte_ether_addr *mac_addr)
2737 {
2738 struct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(ethdev);
2739 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev);
2740 uint32_t val;
2741
2742 if (!rte_is_valid_assigned_ether_addr(mac_addr)) {
2743 IPN3KE_AFU_PMD_ERR("Tried to set invalid MAC address.");
2744 return -EINVAL;
2745 }
2746
2747 if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) {
2748 rte_ether_addr_copy(&mac_addr[0], &rpst->mac_addr);
2749
2750 /* Set mac address */
2751 rte_memcpy(((char *)(&val)), &mac_addr[0], sizeof(uint32_t));
2752 (*hw->f_mac_write)(hw,
2753 val,
2754 IPN3KE_MAC_PRIMARY_MAC_ADDR0,
2755 rpst->port_id,
2756 0);
2757 rte_memcpy(((char *)(&val)), &mac_addr[4], sizeof(uint16_t));
2758 (*hw->f_mac_write)(hw,
2759 val,
2760 IPN3KE_MAC_PRIMARY_MAC_ADDR0,
2761 rpst->port_id,
2762 0);
2763 }
2764
2765 return 0;
2766 }
2767
2768 int
2769 ipn3ke_rpst_mtu_set(struct rte_eth_dev *ethdev, uint16_t mtu)
2770 {
2771 int ret = 0;
2772 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev);
2773 struct rte_eth_dev_data *dev_data = ethdev->data;
2774 uint32_t frame_size = mtu + IPN3KE_ETH_OVERHEAD;
2775
2776 /* check if mtu is within the allowed range */
2777 if (mtu < RTE_ETHER_MIN_MTU ||
2778 frame_size > IPN3KE_MAC_FRAME_SIZE_MAX)
2779 return -EINVAL;
2780
2781 /* mtu setting is forbidden if port is start */
2782 /* make sure NIC port is stopped */
2783 if (rpst->i40e_pf_eth && rpst->i40e_pf_eth->data->dev_started) {
2784 IPN3KE_AFU_PMD_ERR("NIC port %d must "
2785 "be stopped before configuration",
2786 rpst->i40e_pf_eth->data->port_id);
2787 return -EBUSY;
2788 }
2789 /* mtu setting is forbidden if port is start */
2790 if (dev_data->dev_started) {
2791 IPN3KE_AFU_PMD_ERR("FPGA port %d must "
2792 "be stopped before configuration",
2793 dev_data->port_id);
2794 return -EBUSY;
2795 }
2796
2797 if (frame_size > RTE_ETHER_MAX_LEN)
2798 dev_data->dev_conf.rxmode.offloads |=
2799 (uint64_t)(DEV_RX_OFFLOAD_JUMBO_FRAME);
2800 else
2801 dev_data->dev_conf.rxmode.offloads &=
2802 (uint64_t)(~DEV_RX_OFFLOAD_JUMBO_FRAME);
2803
2804 dev_data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
2805
2806 if (rpst->i40e_pf_eth) {
2807 ret = rpst->i40e_pf_eth->dev_ops->mtu_set(rpst->i40e_pf_eth,
2808 mtu);
2809 if (!ret)
2810 rpst->i40e_pf_eth->data->mtu = mtu;
2811 }
2812
2813 return ret;
2814 }
2815
2816 static int
2817 ipn3ke_afu_filter_ctrl(struct rte_eth_dev *ethdev,
2818 enum rte_filter_type filter_type, enum rte_filter_op filter_op,
2819 void *arg)
2820 {
2821 int ret = 0;
2822 struct ipn3ke_hw *hw;
2823 struct ipn3ke_rpst *rpst;
2824
2825 if (ethdev == NULL)
2826 return -EINVAL;
2827
2828 hw = IPN3KE_DEV_PRIVATE_TO_HW(ethdev);
2829 rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev);
2830
2831 if (hw->acc_flow)
2832 switch (filter_type) {
2833 case RTE_ETH_FILTER_GENERIC:
2834 if (filter_op != RTE_ETH_FILTER_GET)
2835 return -EINVAL;
2836 *(const void **)arg = &ipn3ke_flow_ops;
2837 break;
2838 default:
2839 IPN3KE_AFU_PMD_WARN("Filter type (%d) not supported",
2840 filter_type);
2841 ret = -EINVAL;
2842 break;
2843 }
2844 else if (rpst->i40e_pf_eth)
2845 (*rpst->i40e_pf_eth->dev_ops->filter_ctrl)(ethdev,
2846 filter_type,
2847 filter_op,
2848 arg);
2849 else
2850 return -EINVAL;
2851
2852 return ret;
2853 }
2854
2855 static const struct eth_dev_ops ipn3ke_rpst_dev_ops = {
2856 .dev_infos_get = ipn3ke_rpst_dev_infos_get,
2857
2858 .dev_configure = ipn3ke_rpst_dev_configure,
2859 .dev_start = ipn3ke_rpst_dev_start,
2860 .dev_stop = ipn3ke_rpst_dev_stop,
2861 .dev_close = ipn3ke_rpst_dev_close,
2862 .dev_reset = ipn3ke_rpst_dev_reset,
2863
2864 .stats_get = ipn3ke_rpst_stats_get,
2865 .xstats_get = ipn3ke_rpst_xstats_get,
2866 .xstats_get_names = ipn3ke_rpst_xstats_get_names,
2867 .stats_reset = ipn3ke_rpst_stats_reset,
2868 .xstats_reset = ipn3ke_rpst_stats_reset,
2869
2870 .filter_ctrl = ipn3ke_afu_filter_ctrl,
2871
2872 .rx_queue_start = ipn3ke_rpst_rx_queue_start,
2873 .rx_queue_stop = ipn3ke_rpst_rx_queue_stop,
2874 .tx_queue_start = ipn3ke_rpst_tx_queue_start,
2875 .tx_queue_stop = ipn3ke_rpst_tx_queue_stop,
2876 .rx_queue_setup = ipn3ke_rpst_rx_queue_setup,
2877 .rx_queue_release = ipn3ke_rpst_rx_queue_release,
2878 .tx_queue_setup = ipn3ke_rpst_tx_queue_setup,
2879 .tx_queue_release = ipn3ke_rpst_tx_queue_release,
2880
2881 .dev_set_link_up = ipn3ke_rpst_dev_set_link_up,
2882 .dev_set_link_down = ipn3ke_rpst_dev_set_link_down,
2883 .link_update = ipn3ke_rpst_link_update,
2884
2885 .promiscuous_enable = ipn3ke_rpst_promiscuous_enable,
2886 .promiscuous_disable = ipn3ke_rpst_promiscuous_disable,
2887 .allmulticast_enable = ipn3ke_rpst_allmulticast_enable,
2888 .allmulticast_disable = ipn3ke_rpst_allmulticast_disable,
2889 .mac_addr_set = ipn3ke_rpst_mac_addr_set,
2890 .mtu_set = ipn3ke_rpst_mtu_set,
2891
2892 .tm_ops_get = ipn3ke_tm_ops_get,
2893 };
2894
2895 static uint16_t ipn3ke_rpst_recv_pkts(__rte_unused void *rx_q,
2896 __rte_unused struct rte_mbuf **rx_pkts, __rte_unused uint16_t nb_pkts)
2897 {
2898 return 0;
2899 }
2900
2901 static uint16_t
2902 ipn3ke_rpst_xmit_pkts(__rte_unused void *tx_queue,
2903 __rte_unused struct rte_mbuf **tx_pkts, __rte_unused uint16_t nb_pkts)
2904 {
2905 return 0;
2906 }
2907
2908 int
2909 ipn3ke_rpst_init(struct rte_eth_dev *ethdev, void *init_params)
2910 {
2911 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev);
2912 struct ipn3ke_rpst *representor_param =
2913 (struct ipn3ke_rpst *)init_params;
2914
2915 if (representor_param->port_id >= representor_param->hw->port_num)
2916 return -ENODEV;
2917
2918 if (ipn3ke_bridge_func.set_i40e_sw_dev == NULL)
2919 return -ENOMEM;
2920
2921 rpst->ethdev = ethdev;
2922 rpst->switch_domain_id = representor_param->switch_domain_id;
2923 rpst->port_id = representor_param->port_id;
2924 rpst->hw = representor_param->hw;
2925 rpst->i40e_pf_eth = representor_param->i40e_pf_eth;
2926 rpst->i40e_pf_eth_port_id = representor_param->i40e_pf_eth_port_id;
2927 if (rpst->i40e_pf_eth)
2928 ipn3ke_bridge_func.set_i40e_sw_dev(rpst->i40e_pf_eth_port_id,
2929 rpst->ethdev);
2930
2931 ethdev->data->mac_addrs = rte_zmalloc("ipn3ke", RTE_ETHER_ADDR_LEN, 0);
2932 if (!ethdev->data->mac_addrs) {
2933 IPN3KE_AFU_PMD_ERR("Failed to "
2934 "allocated memory for storing mac address");
2935 return -ENODEV;
2936 }
2937
2938 if (rpst->hw->tm_hw_enable)
2939 ipn3ke_tm_init(rpst);
2940
2941 /* Set representor device ops */
2942 ethdev->dev_ops = &ipn3ke_rpst_dev_ops;
2943
2944 /* No data-path, but need stub Rx/Tx functions to avoid crash
2945 * when testing with the likes of testpmd.
2946 */
2947 ethdev->rx_pkt_burst = ipn3ke_rpst_recv_pkts;
2948 ethdev->tx_pkt_burst = ipn3ke_rpst_xmit_pkts;
2949
2950 ethdev->data->nb_rx_queues = 1;
2951 ethdev->data->nb_tx_queues = 1;
2952
2953 ethdev->data->mac_addrs = rte_zmalloc("ipn3ke_afu_representor",
2954 RTE_ETHER_ADDR_LEN,
2955 0);
2956 if (!ethdev->data->mac_addrs) {
2957 IPN3KE_AFU_PMD_ERR("Failed to "
2958 "allocated memory for storing mac address");
2959 return -ENODEV;
2960 }
2961
2962 ethdev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
2963
2964 rte_spinlock_lock(&ipn3ke_link_notify_list_lk);
2965 TAILQ_INSERT_TAIL(&ipn3ke_rpst_list, rpst, next);
2966 ipn3ke_rpst_scan_num++;
2967 ipn3ke_rpst_scan_check();
2968 rte_spinlock_unlock(&ipn3ke_link_notify_list_lk);
2969
2970 return 0;
2971 }
2972
2973 int
2974 ipn3ke_rpst_uninit(struct rte_eth_dev *ethdev)
2975 {
2976 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev);
2977
2978 rte_spinlock_lock(&ipn3ke_link_notify_list_lk);
2979 TAILQ_REMOVE(&ipn3ke_rpst_list, rpst, next);
2980 ipn3ke_rpst_scan_num--;
2981 ipn3ke_rpst_scan_check();
2982 rte_spinlock_unlock(&ipn3ke_link_notify_list_lk);
2983
2984 return 0;
2985 }
Ceph