ceph/src/spdk/dpdk/drivers/net/sfc/base/medford2_nic.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  *
   3  * Copyright (c) 2015-2018 Solarflare Communications Inc.
   4  * All rights reserved.
   5  */
   6
   7 #include "efx.h"
   8 #include "efx_impl.h"
   9
  10
  11 #if EFSYS_OPT_MEDFORD2
  12
  13 static  __checkReturn   efx_rc_t
  14 medford2_nic_get_required_pcie_bandwidth(
  15         __in            efx_nic_t *enp,
  16         __out           uint32_t *bandwidth_mbpsp)
  17 {
  18         uint32_t bandwidth;
  19         efx_rc_t rc;
  20
  21         /* FIXME: support new Medford2 dynamic port modes */
  22
  23         if ((rc = ef10_nic_get_port_mode_bandwidth(enp,
  24                                                     &bandwidth)) != 0)
  25                 goto fail1;
  26
  27         *bandwidth_mbpsp = bandwidth;
  28
  29         return (0);
  30
  31 fail1:
  32         EFSYS_PROBE1(fail1, efx_rc_t, rc);
  33
  34         return (rc);
  35 }
  36
  37         __checkReturn   efx_rc_t
  38 medford2_board_cfg(
  39         __in            efx_nic_t *enp)
  40 {
  41         efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
  42         uint32_t sysclk, dpcpu_clk;
  43         uint32_t end_padding;
  44         uint32_t bandwidth;
  45         efx_rc_t rc;
  46
  47         /*
  48          * Enable firmware workarounds for hardware errata.
  49          * Expected responses are:
  50          *  - 0 (zero):
  51          *      Success: workaround enabled or disabled as requested.
  52          *  - MC_CMD_ERR_ENOSYS (reported as ENOTSUP):
  53          *      Firmware does not support the MC_CMD_WORKAROUND request.
  54          *      (assume that the workaround is not supported).
  55          *  - MC_CMD_ERR_ENOENT (reported as ENOENT):
  56          *      Firmware does not support the requested workaround.
  57          *  - MC_CMD_ERR_EPERM  (reported as EACCES):
  58          *      Unprivileged function cannot enable/disable workarounds.
  59          *
  60          * See efx_mcdi_request_errcode() for MCDI error translations.
  61          */
  62
  63
  64         if (EFX_PCI_FUNCTION_IS_VF(encp)) {
  65                 /*
  66                  * Interrupt testing does not work for VFs on Medford2.
  67                  * See bug50084 and bug71432 comment 21.
  68                  */
  69                 encp->enc_bug41750_workaround = B_TRUE;
  70         }
  71
  72         /* Chained multicast is always enabled on Medford2 */
  73         encp->enc_bug26807_workaround = B_TRUE;
  74
  75         /*
  76          * If the bug61265 workaround is enabled, then interrupt holdoff timers
  77          * cannot be controlled by timer table writes, so MCDI must be used
  78          * (timer table writes can still be used for wakeup timers).
  79          */
  80         rc = efx_mcdi_set_workaround(enp, MC_CMD_WORKAROUND_BUG61265, B_TRUE,
  81             NULL);
  82         if ((rc == 0) || (rc == EACCES))
  83                 encp->enc_bug61265_workaround = B_TRUE;
  84         else if ((rc == ENOTSUP) || (rc == ENOENT))
  85                 encp->enc_bug61265_workaround = B_FALSE;
  86         else
  87                 goto fail1;
  88
  89         /* Checksums for TSO sends should always be correct on Medford2. */
  90         encp->enc_bug61297_workaround = B_FALSE;
  91
  92         /* Get clock frequencies (in MHz). */
  93         if ((rc = efx_mcdi_get_clock(enp, &sysclk, &dpcpu_clk)) != 0)
  94                 goto fail2;
  95
  96         /*
  97          * The Medford2 timer quantum is 1536 dpcpu_clk cycles, documented for
  98          * the EV_TMR_VAL field of EV_TIMER_TBL. Scale for MHz and ns units.
  99          */
 100         encp->enc_evq_timer_quantum_ns = 1536000UL / dpcpu_clk; /* 1536 cycles */
 101         encp->enc_evq_timer_max_us = (encp->enc_evq_timer_quantum_ns <<
 102                     FRF_CZ_TC_TIMER_VAL_WIDTH) / 1000;
 103
 104         encp->enc_ev_desc_size = EF10_EVQ_DESC_SIZE;
 105         encp->enc_rx_desc_size = EF10_RXQ_DESC_SIZE;
 106         encp->enc_tx_desc_size = EF10_TXQ_DESC_SIZE;
 107
 108         /* Alignment for receive packet DMA buffers */
 109         encp->enc_rx_buf_align_start = 1;
 110
 111         /* Get the RX DMA end padding alignment configuration */
 112         if ((rc = efx_mcdi_get_rxdp_config(enp, &end_padding)) != 0) {
 113                 if (rc != EACCES)
 114                         goto fail3;
 115
 116                 /* Assume largest tail padding size supported by hardware */
 117                 end_padding = 256;
 118         }
 119         encp->enc_rx_buf_align_end = end_padding;
 120
 121         encp->enc_evq_max_nevs = EF10_EVQ_MAXNEVS;
 122         encp->enc_evq_min_nevs = EF10_EVQ_MINNEVS;
 123
 124         encp->enc_rxq_max_ndescs = EF10_RXQ_MAXNDESCS;
 125         encp->enc_rxq_min_ndescs = EF10_RXQ_MINNDESCS;
 126
 127         /*
 128          * The maximum supported transmit queue size is 2048. TXQs with 4096
 129          * descriptors are not supported as the top bit is used for vfifo
 130          * stuffing.
 131          */
 132         encp->enc_txq_max_ndescs = MEDFORD2_TXQ_MAXNDESCS;
 133         encp->enc_txq_min_ndescs = EF10_TXQ_MINNDESCS;
 134
 135         EFX_STATIC_ASSERT(MEDFORD2_PIOBUF_NBUFS <= EF10_MAX_PIOBUF_NBUFS);
 136         encp->enc_piobuf_limit = MEDFORD2_PIOBUF_NBUFS;
 137         encp->enc_piobuf_size = MEDFORD2_PIOBUF_SIZE;
 138         encp->enc_piobuf_min_alloc_size = MEDFORD2_MIN_PIO_ALLOC_SIZE;
 139
 140         /*
 141          * Medford2 stores a single global copy of VPD, not per-PF as on
 142          * Huntington.
 143          */
 144         encp->enc_vpd_is_global = B_TRUE;
 145
 146         rc = medford2_nic_get_required_pcie_bandwidth(enp, &bandwidth);
 147         if (rc != 0)
 148                 goto fail4;
 149         encp->enc_required_pcie_bandwidth_mbps = bandwidth;
 150         encp->enc_max_pcie_link_gen = EFX_PCIE_LINK_SPEED_GEN3;
 151
 152         return (0);
 153
 154 fail4:
 155         EFSYS_PROBE(fail4);
 156 fail3:
 157         EFSYS_PROBE(fail3);
 158 fail2:
 159         EFSYS_PROBE(fail2);
 160 fail1:
 161         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 162
 163         return (rc);
 164 }
 165
 166 #endif  /* EFSYS_OPT_MEDFORD2 */