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[ceph.git] / ceph / src / spdk / dpdk / kernel / linux / kni / ethtool / igb / igb_ethtool.c
1 // SPDX-License-Identifier: GPL-2.0
2 /*******************************************************************************
3
4 Intel(R) Gigabit Ethernet Linux driver
5 Copyright(c) 2007-2013 Intel Corporation.
6
7 Contact Information:
8 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
9 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
10
11 *******************************************************************************/
12
13 /* ethtool support for igb */
14
15 #include <linux/netdevice.h>
16 #include <linux/vmalloc.h>
17
18 #ifdef SIOCETHTOOL
19 #include <linux/ethtool.h>
20 #ifdef CONFIG_PM_RUNTIME
21 #include <linux/pm_runtime.h>
22 #endif /* CONFIG_PM_RUNTIME */
23 #include <linux/highmem.h>
24
25 #include "igb.h"
26 #include "igb_regtest.h"
27 #include <linux/if_vlan.h>
28 #ifdef ETHTOOL_GEEE
29 #include <linux/mdio.h>
30 #endif
31
32 #ifdef ETHTOOL_OPS_COMPAT
33 #include "kcompat_ethtool.c"
34 #endif
35 #ifdef ETHTOOL_GSTATS
36 struct igb_stats {
37 char stat_string[ETH_GSTRING_LEN];
38 int sizeof_stat;
39 int stat_offset;
40 };
41
42 #define IGB_STAT(_name, _stat) { \
43 .stat_string = _name, \
44 .sizeof_stat = FIELD_SIZEOF(struct igb_adapter, _stat), \
45 .stat_offset = offsetof(struct igb_adapter, _stat) \
46 }
47 static const struct igb_stats igb_gstrings_stats[] = {
48 IGB_STAT("rx_packets", stats.gprc),
49 IGB_STAT("tx_packets", stats.gptc),
50 IGB_STAT("rx_bytes", stats.gorc),
51 IGB_STAT("tx_bytes", stats.gotc),
52 IGB_STAT("rx_broadcast", stats.bprc),
53 IGB_STAT("tx_broadcast", stats.bptc),
54 IGB_STAT("rx_multicast", stats.mprc),
55 IGB_STAT("tx_multicast", stats.mptc),
56 IGB_STAT("multicast", stats.mprc),
57 IGB_STAT("collisions", stats.colc),
58 IGB_STAT("rx_crc_errors", stats.crcerrs),
59 IGB_STAT("rx_no_buffer_count", stats.rnbc),
60 IGB_STAT("rx_missed_errors", stats.mpc),
61 IGB_STAT("tx_aborted_errors", stats.ecol),
62 IGB_STAT("tx_carrier_errors", stats.tncrs),
63 IGB_STAT("tx_window_errors", stats.latecol),
64 IGB_STAT("tx_abort_late_coll", stats.latecol),
65 IGB_STAT("tx_deferred_ok", stats.dc),
66 IGB_STAT("tx_single_coll_ok", stats.scc),
67 IGB_STAT("tx_multi_coll_ok", stats.mcc),
68 IGB_STAT("tx_timeout_count", tx_timeout_count),
69 IGB_STAT("rx_long_length_errors", stats.roc),
70 IGB_STAT("rx_short_length_errors", stats.ruc),
71 IGB_STAT("rx_align_errors", stats.algnerrc),
72 IGB_STAT("tx_tcp_seg_good", stats.tsctc),
73 IGB_STAT("tx_tcp_seg_failed", stats.tsctfc),
74 IGB_STAT("rx_flow_control_xon", stats.xonrxc),
75 IGB_STAT("rx_flow_control_xoff", stats.xoffrxc),
76 IGB_STAT("tx_flow_control_xon", stats.xontxc),
77 IGB_STAT("tx_flow_control_xoff", stats.xofftxc),
78 IGB_STAT("rx_long_byte_count", stats.gorc),
79 IGB_STAT("tx_dma_out_of_sync", stats.doosync),
80 #ifndef IGB_NO_LRO
81 IGB_STAT("lro_aggregated", lro_stats.coal),
82 IGB_STAT("lro_flushed", lro_stats.flushed),
83 #endif /* IGB_LRO */
84 IGB_STAT("tx_smbus", stats.mgptc),
85 IGB_STAT("rx_smbus", stats.mgprc),
86 IGB_STAT("dropped_smbus", stats.mgpdc),
87 IGB_STAT("os2bmc_rx_by_bmc", stats.o2bgptc),
88 IGB_STAT("os2bmc_tx_by_bmc", stats.b2ospc),
89 IGB_STAT("os2bmc_tx_by_host", stats.o2bspc),
90 IGB_STAT("os2bmc_rx_by_host", stats.b2ogprc),
91 #ifdef HAVE_PTP_1588_CLOCK
92 IGB_STAT("tx_hwtstamp_timeouts", tx_hwtstamp_timeouts),
93 IGB_STAT("rx_hwtstamp_cleared", rx_hwtstamp_cleared),
94 #endif /* HAVE_PTP_1588_CLOCK */
95 };
96
97 #define IGB_NETDEV_STAT(_net_stat) { \
98 .stat_string = #_net_stat, \
99 .sizeof_stat = FIELD_SIZEOF(struct net_device_stats, _net_stat), \
100 .stat_offset = offsetof(struct net_device_stats, _net_stat) \
101 }
102 static const struct igb_stats igb_gstrings_net_stats[] = {
103 IGB_NETDEV_STAT(rx_errors),
104 IGB_NETDEV_STAT(tx_errors),
105 IGB_NETDEV_STAT(tx_dropped),
106 IGB_NETDEV_STAT(rx_length_errors),
107 IGB_NETDEV_STAT(rx_over_errors),
108 IGB_NETDEV_STAT(rx_frame_errors),
109 IGB_NETDEV_STAT(rx_fifo_errors),
110 IGB_NETDEV_STAT(tx_fifo_errors),
111 IGB_NETDEV_STAT(tx_heartbeat_errors)
112 };
113
114 #define IGB_GLOBAL_STATS_LEN ARRAY_SIZE(igb_gstrings_stats)
115 #define IGB_NETDEV_STATS_LEN ARRAY_SIZE(igb_gstrings_net_stats)
116 #define IGB_RX_QUEUE_STATS_LEN \
117 (sizeof(struct igb_rx_queue_stats) / sizeof(u64))
118 #define IGB_TX_QUEUE_STATS_LEN \
119 (sizeof(struct igb_tx_queue_stats) / sizeof(u64))
120 #define IGB_QUEUE_STATS_LEN \
121 ((((struct igb_adapter *)netdev_priv(netdev))->num_rx_queues * \
122 IGB_RX_QUEUE_STATS_LEN) + \
123 (((struct igb_adapter *)netdev_priv(netdev))->num_tx_queues * \
124 IGB_TX_QUEUE_STATS_LEN))
125 #define IGB_STATS_LEN \
126 (IGB_GLOBAL_STATS_LEN + IGB_NETDEV_STATS_LEN + IGB_QUEUE_STATS_LEN)
127
128 #endif /* ETHTOOL_GSTATS */
129 #ifdef ETHTOOL_TEST
130 static const char igb_gstrings_test[][ETH_GSTRING_LEN] = {
131 "Register test (offline)", "Eeprom test (offline)",
132 "Interrupt test (offline)", "Loopback test (offline)",
133 "Link test (on/offline)"
134 };
135 #define IGB_TEST_LEN (sizeof(igb_gstrings_test) / ETH_GSTRING_LEN)
136 #endif /* ETHTOOL_TEST */
137
138 #ifndef ETHTOOL_GLINKSETTINGS
139 static int igb_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
140 {
141 struct igb_adapter *adapter = netdev_priv(netdev);
142 struct e1000_hw *hw = &adapter->hw;
143 u32 status;
144
145 if (hw->phy.media_type == e1000_media_type_copper) {
146
147 ecmd->supported = (SUPPORTED_10baseT_Half |
148 SUPPORTED_10baseT_Full |
149 SUPPORTED_100baseT_Half |
150 SUPPORTED_100baseT_Full |
151 SUPPORTED_1000baseT_Full|
152 SUPPORTED_Autoneg |
153 SUPPORTED_TP |
154 SUPPORTED_Pause);
155 ecmd->advertising = ADVERTISED_TP;
156
157 if (hw->mac.autoneg == 1) {
158 ecmd->advertising |= ADVERTISED_Autoneg;
159 /* the e1000 autoneg seems to match ethtool nicely */
160 ecmd->advertising |= hw->phy.autoneg_advertised;
161 }
162
163 ecmd->port = PORT_TP;
164 ecmd->phy_address = hw->phy.addr;
165 ecmd->transceiver = XCVR_INTERNAL;
166
167 } else {
168 ecmd->supported = (SUPPORTED_1000baseT_Full |
169 SUPPORTED_100baseT_Full |
170 SUPPORTED_FIBRE |
171 SUPPORTED_Autoneg |
172 SUPPORTED_Pause);
173 if (hw->mac.type == e1000_i354)
174 ecmd->supported |= (SUPPORTED_2500baseX_Full);
175
176 ecmd->advertising = ADVERTISED_FIBRE;
177
178 switch (adapter->link_speed) {
179 case SPEED_2500:
180 ecmd->advertising = ADVERTISED_2500baseX_Full;
181 break;
182 case SPEED_1000:
183 ecmd->advertising = ADVERTISED_1000baseT_Full;
184 break;
185 case SPEED_100:
186 ecmd->advertising = ADVERTISED_100baseT_Full;
187 break;
188 default:
189 break;
190 }
191
192 if (hw->mac.autoneg == 1)
193 ecmd->advertising |= ADVERTISED_Autoneg;
194
195 ecmd->port = PORT_FIBRE;
196 ecmd->transceiver = XCVR_EXTERNAL;
197 }
198
199 if (hw->mac.autoneg != 1)
200 ecmd->advertising &= ~(ADVERTISED_Pause |
201 ADVERTISED_Asym_Pause);
202
203 if (hw->fc.requested_mode == e1000_fc_full)
204 ecmd->advertising |= ADVERTISED_Pause;
205 else if (hw->fc.requested_mode == e1000_fc_rx_pause)
206 ecmd->advertising |= (ADVERTISED_Pause |
207 ADVERTISED_Asym_Pause);
208 else if (hw->fc.requested_mode == e1000_fc_tx_pause)
209 ecmd->advertising |= ADVERTISED_Asym_Pause;
210 else
211 ecmd->advertising &= ~(ADVERTISED_Pause |
212 ADVERTISED_Asym_Pause);
213
214 status = E1000_READ_REG(hw, E1000_STATUS);
215
216 if (status & E1000_STATUS_LU) {
217 if ((hw->mac.type == e1000_i354) &&
218 (status & E1000_STATUS_2P5_SKU) &&
219 !(status & E1000_STATUS_2P5_SKU_OVER))
220 ecmd->speed = SPEED_2500;
221 else if (status & E1000_STATUS_SPEED_1000)
222 ecmd->speed = SPEED_1000;
223 else if (status & E1000_STATUS_SPEED_100)
224 ecmd->speed = SPEED_100;
225 else
226 ecmd->speed = SPEED_10;
227
228 if ((status & E1000_STATUS_FD) ||
229 hw->phy.media_type != e1000_media_type_copper)
230 ecmd->duplex = DUPLEX_FULL;
231 else
232 ecmd->duplex = DUPLEX_HALF;
233
234 } else {
235 ecmd->speed = -1;
236 ecmd->duplex = -1;
237 }
238
239 if ((hw->phy.media_type == e1000_media_type_fiber) ||
240 hw->mac.autoneg)
241 ecmd->autoneg = AUTONEG_ENABLE;
242 else
243 ecmd->autoneg = AUTONEG_DISABLE;
244 #ifdef ETH_TP_MDI_X
245
246 /* MDI-X => 2; MDI =>1; Invalid =>0 */
247 if (hw->phy.media_type == e1000_media_type_copper)
248 ecmd->eth_tp_mdix = hw->phy.is_mdix ? ETH_TP_MDI_X :
249 ETH_TP_MDI;
250 else
251 ecmd->eth_tp_mdix = ETH_TP_MDI_INVALID;
252
253 #ifdef ETH_TP_MDI_AUTO
254 if (hw->phy.mdix == AUTO_ALL_MODES)
255 ecmd->eth_tp_mdix_ctrl = ETH_TP_MDI_AUTO;
256 else
257 ecmd->eth_tp_mdix_ctrl = hw->phy.mdix;
258
259 #endif
260 #endif /* ETH_TP_MDI_X */
261 return 0;
262 }
263 #endif
264
265 #ifndef ETHTOOL_SLINKSETTINGS
266 static int igb_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
267 {
268 struct igb_adapter *adapter = netdev_priv(netdev);
269 struct e1000_hw *hw = &adapter->hw;
270
271 if (ecmd->duplex == DUPLEX_HALF) {
272 if (!hw->dev_spec._82575.eee_disable)
273 dev_info(pci_dev_to_dev(adapter->pdev), "EEE disabled: not supported with half duplex\n");
274 hw->dev_spec._82575.eee_disable = true;
275 } else {
276 if (hw->dev_spec._82575.eee_disable)
277 dev_info(pci_dev_to_dev(adapter->pdev), "EEE enabled\n");
278 hw->dev_spec._82575.eee_disable = false;
279 }
280
281 /* When SoL/IDER sessions are active, autoneg/speed/duplex
282 * cannot be changed */
283 if (e1000_check_reset_block(hw)) {
284 dev_err(pci_dev_to_dev(adapter->pdev), "Cannot change link "
285 "characteristics when SoL/IDER is active.\n");
286 return -EINVAL;
287 }
288
289 #ifdef ETH_TP_MDI_AUTO
290 /*
291 * MDI setting is only allowed when autoneg enabled because
292 * some hardware doesn't allow MDI setting when speed or
293 * duplex is forced.
294 */
295 if (ecmd->eth_tp_mdix_ctrl) {
296 if (hw->phy.media_type != e1000_media_type_copper)
297 return -EOPNOTSUPP;
298
299 if ((ecmd->eth_tp_mdix_ctrl != ETH_TP_MDI_AUTO) &&
300 (ecmd->autoneg != AUTONEG_ENABLE)) {
301 dev_err(&adapter->pdev->dev, "forcing MDI/MDI-X state is not supported when link speed and/or duplex are forced\n");
302 return -EINVAL;
303 }
304 }
305
306 #endif /* ETH_TP_MDI_AUTO */
307 while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
308 usleep_range(1000, 2000);
309
310 if (ecmd->autoneg == AUTONEG_ENABLE) {
311 hw->mac.autoneg = 1;
312 if (hw->phy.media_type == e1000_media_type_fiber) {
313 hw->phy.autoneg_advertised = ecmd->advertising |
314 ADVERTISED_FIBRE |
315 ADVERTISED_Autoneg;
316 switch (adapter->link_speed) {
317 case SPEED_2500:
318 hw->phy.autoneg_advertised =
319 ADVERTISED_2500baseX_Full;
320 break;
321 case SPEED_1000:
322 hw->phy.autoneg_advertised =
323 ADVERTISED_1000baseT_Full;
324 break;
325 case SPEED_100:
326 hw->phy.autoneg_advertised =
327 ADVERTISED_100baseT_Full;
328 break;
329 default:
330 break;
331 }
332 } else {
333 hw->phy.autoneg_advertised = ecmd->advertising |
334 ADVERTISED_TP |
335 ADVERTISED_Autoneg;
336 }
337 ecmd->advertising = hw->phy.autoneg_advertised;
338 if (adapter->fc_autoneg)
339 hw->fc.requested_mode = e1000_fc_default;
340 } else {
341 if (igb_set_spd_dplx(adapter, ecmd->speed + ecmd->duplex)) {
342 clear_bit(__IGB_RESETTING, &adapter->state);
343 return -EINVAL;
344 }
345 }
346
347 #ifdef ETH_TP_MDI_AUTO
348 /* MDI-X => 2; MDI => 1; Auto => 3 */
349 if (ecmd->eth_tp_mdix_ctrl) {
350 /* fix up the value for auto (3 => 0) as zero is mapped
351 * internally to auto
352 */
353 if (ecmd->eth_tp_mdix_ctrl == ETH_TP_MDI_AUTO)
354 hw->phy.mdix = AUTO_ALL_MODES;
355 else
356 hw->phy.mdix = ecmd->eth_tp_mdix_ctrl;
357 }
358
359 #endif /* ETH_TP_MDI_AUTO */
360 /* reset the link */
361 if (netif_running(adapter->netdev)) {
362 igb_down(adapter);
363 igb_up(adapter);
364 } else
365 igb_reset(adapter);
366
367 clear_bit(__IGB_RESETTING, &adapter->state);
368 return 0;
369 }
370 #endif
371
372 static u32 igb_get_link(struct net_device *netdev)
373 {
374 struct igb_adapter *adapter = netdev_priv(netdev);
375 struct e1000_mac_info *mac = &adapter->hw.mac;
376
377 /*
378 * If the link is not reported up to netdev, interrupts are disabled,
379 * and so the physical link state may have changed since we last
380 * looked. Set get_link_status to make sure that the true link
381 * state is interrogated, rather than pulling a cached and possibly
382 * stale link state from the driver.
383 */
384 if (!netif_carrier_ok(netdev))
385 mac->get_link_status = 1;
386
387 return igb_has_link(adapter);
388 }
389
390 static void igb_get_pauseparam(struct net_device *netdev,
391 struct ethtool_pauseparam *pause)
392 {
393 struct igb_adapter *adapter = netdev_priv(netdev);
394 struct e1000_hw *hw = &adapter->hw;
395
396 pause->autoneg =
397 (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
398
399 if (hw->fc.current_mode == e1000_fc_rx_pause)
400 pause->rx_pause = 1;
401 else if (hw->fc.current_mode == e1000_fc_tx_pause)
402 pause->tx_pause = 1;
403 else if (hw->fc.current_mode == e1000_fc_full) {
404 pause->rx_pause = 1;
405 pause->tx_pause = 1;
406 }
407 }
408
409 static int igb_set_pauseparam(struct net_device *netdev,
410 struct ethtool_pauseparam *pause)
411 {
412 struct igb_adapter *adapter = netdev_priv(netdev);
413 struct e1000_hw *hw = &adapter->hw;
414 int retval = 0;
415
416 adapter->fc_autoneg = pause->autoneg;
417
418 while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
419 usleep_range(1000, 2000);
420
421 if (adapter->fc_autoneg == AUTONEG_ENABLE) {
422 hw->fc.requested_mode = e1000_fc_default;
423 if (netif_running(adapter->netdev)) {
424 igb_down(adapter);
425 igb_up(adapter);
426 } else {
427 igb_reset(adapter);
428 }
429 } else {
430 if (pause->rx_pause && pause->tx_pause)
431 hw->fc.requested_mode = e1000_fc_full;
432 else if (pause->rx_pause && !pause->tx_pause)
433 hw->fc.requested_mode = e1000_fc_rx_pause;
434 else if (!pause->rx_pause && pause->tx_pause)
435 hw->fc.requested_mode = e1000_fc_tx_pause;
436 else if (!pause->rx_pause && !pause->tx_pause)
437 hw->fc.requested_mode = e1000_fc_none;
438
439 hw->fc.current_mode = hw->fc.requested_mode;
440
441 if (hw->phy.media_type == e1000_media_type_fiber) {
442 retval = hw->mac.ops.setup_link(hw);
443 /* implicit goto out */
444 } else {
445 retval = e1000_force_mac_fc(hw);
446 if (retval)
447 goto out;
448 e1000_set_fc_watermarks_generic(hw);
449 }
450 }
451
452 out:
453 clear_bit(__IGB_RESETTING, &adapter->state);
454 return retval;
455 }
456
457 static u32 igb_get_msglevel(struct net_device *netdev)
458 {
459 struct igb_adapter *adapter = netdev_priv(netdev);
460 return adapter->msg_enable;
461 }
462
463 static void igb_set_msglevel(struct net_device *netdev, u32 data)
464 {
465 struct igb_adapter *adapter = netdev_priv(netdev);
466 adapter->msg_enable = data;
467 }
468
469 static int igb_get_regs_len(struct net_device *netdev)
470 {
471 #define IGB_REGS_LEN 555
472 return IGB_REGS_LEN * sizeof(u32);
473 }
474
475 static void igb_get_regs(struct net_device *netdev,
476 struct ethtool_regs *regs, void *p)
477 {
478 struct igb_adapter *adapter = netdev_priv(netdev);
479 struct e1000_hw *hw = &adapter->hw;
480 u32 *regs_buff = p;
481 u8 i;
482
483 memset(p, 0, IGB_REGS_LEN * sizeof(u32));
484
485 regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id;
486
487 /* General Registers */
488 regs_buff[0] = E1000_READ_REG(hw, E1000_CTRL);
489 regs_buff[1] = E1000_READ_REG(hw, E1000_STATUS);
490 regs_buff[2] = E1000_READ_REG(hw, E1000_CTRL_EXT);
491 regs_buff[3] = E1000_READ_REG(hw, E1000_MDIC);
492 regs_buff[4] = E1000_READ_REG(hw, E1000_SCTL);
493 regs_buff[5] = E1000_READ_REG(hw, E1000_CONNSW);
494 regs_buff[6] = E1000_READ_REG(hw, E1000_VET);
495 regs_buff[7] = E1000_READ_REG(hw, E1000_LEDCTL);
496 regs_buff[8] = E1000_READ_REG(hw, E1000_PBA);
497 regs_buff[9] = E1000_READ_REG(hw, E1000_PBS);
498 regs_buff[10] = E1000_READ_REG(hw, E1000_FRTIMER);
499 regs_buff[11] = E1000_READ_REG(hw, E1000_TCPTIMER);
500
501 /* NVM Register */
502 regs_buff[12] = E1000_READ_REG(hw, E1000_EECD);
503
504 /* Interrupt */
505 /* Reading EICS for EICR because they read the
506 * same but EICS does not clear on read */
507 regs_buff[13] = E1000_READ_REG(hw, E1000_EICS);
508 regs_buff[14] = E1000_READ_REG(hw, E1000_EICS);
509 regs_buff[15] = E1000_READ_REG(hw, E1000_EIMS);
510 regs_buff[16] = E1000_READ_REG(hw, E1000_EIMC);
511 regs_buff[17] = E1000_READ_REG(hw, E1000_EIAC);
512 regs_buff[18] = E1000_READ_REG(hw, E1000_EIAM);
513 /* Reading ICS for ICR because they read the
514 * same but ICS does not clear on read */
515 regs_buff[19] = E1000_READ_REG(hw, E1000_ICS);
516 regs_buff[20] = E1000_READ_REG(hw, E1000_ICS);
517 regs_buff[21] = E1000_READ_REG(hw, E1000_IMS);
518 regs_buff[22] = E1000_READ_REG(hw, E1000_IMC);
519 regs_buff[23] = E1000_READ_REG(hw, E1000_IAC);
520 regs_buff[24] = E1000_READ_REG(hw, E1000_IAM);
521 regs_buff[25] = E1000_READ_REG(hw, E1000_IMIRVP);
522
523 /* Flow Control */
524 regs_buff[26] = E1000_READ_REG(hw, E1000_FCAL);
525 regs_buff[27] = E1000_READ_REG(hw, E1000_FCAH);
526 regs_buff[28] = E1000_READ_REG(hw, E1000_FCTTV);
527 regs_buff[29] = E1000_READ_REG(hw, E1000_FCRTL);
528 regs_buff[30] = E1000_READ_REG(hw, E1000_FCRTH);
529 regs_buff[31] = E1000_READ_REG(hw, E1000_FCRTV);
530
531 /* Receive */
532 regs_buff[32] = E1000_READ_REG(hw, E1000_RCTL);
533 regs_buff[33] = E1000_READ_REG(hw, E1000_RXCSUM);
534 regs_buff[34] = E1000_READ_REG(hw, E1000_RLPML);
535 regs_buff[35] = E1000_READ_REG(hw, E1000_RFCTL);
536 regs_buff[36] = E1000_READ_REG(hw, E1000_MRQC);
537 regs_buff[37] = E1000_READ_REG(hw, E1000_VT_CTL);
538
539 /* Transmit */
540 regs_buff[38] = E1000_READ_REG(hw, E1000_TCTL);
541 regs_buff[39] = E1000_READ_REG(hw, E1000_TCTL_EXT);
542 regs_buff[40] = E1000_READ_REG(hw, E1000_TIPG);
543 regs_buff[41] = E1000_READ_REG(hw, E1000_DTXCTL);
544
545 /* Wake Up */
546 regs_buff[42] = E1000_READ_REG(hw, E1000_WUC);
547 regs_buff[43] = E1000_READ_REG(hw, E1000_WUFC);
548 regs_buff[44] = E1000_READ_REG(hw, E1000_WUS);
549 regs_buff[45] = E1000_READ_REG(hw, E1000_IPAV);
550 regs_buff[46] = E1000_READ_REG(hw, E1000_WUPL);
551
552 /* MAC */
553 regs_buff[47] = E1000_READ_REG(hw, E1000_PCS_CFG0);
554 regs_buff[48] = E1000_READ_REG(hw, E1000_PCS_LCTL);
555 regs_buff[49] = E1000_READ_REG(hw, E1000_PCS_LSTAT);
556 regs_buff[50] = E1000_READ_REG(hw, E1000_PCS_ANADV);
557 regs_buff[51] = E1000_READ_REG(hw, E1000_PCS_LPAB);
558 regs_buff[52] = E1000_READ_REG(hw, E1000_PCS_NPTX);
559 regs_buff[53] = E1000_READ_REG(hw, E1000_PCS_LPABNP);
560
561 /* Statistics */
562 regs_buff[54] = adapter->stats.crcerrs;
563 regs_buff[55] = adapter->stats.algnerrc;
564 regs_buff[56] = adapter->stats.symerrs;
565 regs_buff[57] = adapter->stats.rxerrc;
566 regs_buff[58] = adapter->stats.mpc;
567 regs_buff[59] = adapter->stats.scc;
568 regs_buff[60] = adapter->stats.ecol;
569 regs_buff[61] = adapter->stats.mcc;
570 regs_buff[62] = adapter->stats.latecol;
571 regs_buff[63] = adapter->stats.colc;
572 regs_buff[64] = adapter->stats.dc;
573 regs_buff[65] = adapter->stats.tncrs;
574 regs_buff[66] = adapter->stats.sec;
575 regs_buff[67] = adapter->stats.htdpmc;
576 regs_buff[68] = adapter->stats.rlec;
577 regs_buff[69] = adapter->stats.xonrxc;
578 regs_buff[70] = adapter->stats.xontxc;
579 regs_buff[71] = adapter->stats.xoffrxc;
580 regs_buff[72] = adapter->stats.xofftxc;
581 regs_buff[73] = adapter->stats.fcruc;
582 regs_buff[74] = adapter->stats.prc64;
583 regs_buff[75] = adapter->stats.prc127;
584 regs_buff[76] = adapter->stats.prc255;
585 regs_buff[77] = adapter->stats.prc511;
586 regs_buff[78] = adapter->stats.prc1023;
587 regs_buff[79] = adapter->stats.prc1522;
588 regs_buff[80] = adapter->stats.gprc;
589 regs_buff[81] = adapter->stats.bprc;
590 regs_buff[82] = adapter->stats.mprc;
591 regs_buff[83] = adapter->stats.gptc;
592 regs_buff[84] = adapter->stats.gorc;
593 regs_buff[86] = adapter->stats.gotc;
594 regs_buff[88] = adapter->stats.rnbc;
595 regs_buff[89] = adapter->stats.ruc;
596 regs_buff[90] = adapter->stats.rfc;
597 regs_buff[91] = adapter->stats.roc;
598 regs_buff[92] = adapter->stats.rjc;
599 regs_buff[93] = adapter->stats.mgprc;
600 regs_buff[94] = adapter->stats.mgpdc;
601 regs_buff[95] = adapter->stats.mgptc;
602 regs_buff[96] = adapter->stats.tor;
603 regs_buff[98] = adapter->stats.tot;
604 regs_buff[100] = adapter->stats.tpr;
605 regs_buff[101] = adapter->stats.tpt;
606 regs_buff[102] = adapter->stats.ptc64;
607 regs_buff[103] = adapter->stats.ptc127;
608 regs_buff[104] = adapter->stats.ptc255;
609 regs_buff[105] = adapter->stats.ptc511;
610 regs_buff[106] = adapter->stats.ptc1023;
611 regs_buff[107] = adapter->stats.ptc1522;
612 regs_buff[108] = adapter->stats.mptc;
613 regs_buff[109] = adapter->stats.bptc;
614 regs_buff[110] = adapter->stats.tsctc;
615 regs_buff[111] = adapter->stats.iac;
616 regs_buff[112] = adapter->stats.rpthc;
617 regs_buff[113] = adapter->stats.hgptc;
618 regs_buff[114] = adapter->stats.hgorc;
619 regs_buff[116] = adapter->stats.hgotc;
620 regs_buff[118] = adapter->stats.lenerrs;
621 regs_buff[119] = adapter->stats.scvpc;
622 regs_buff[120] = adapter->stats.hrmpc;
623
624 for (i = 0; i < 4; i++)
625 regs_buff[121 + i] = E1000_READ_REG(hw, E1000_SRRCTL(i));
626 for (i = 0; i < 4; i++)
627 regs_buff[125 + i] = E1000_READ_REG(hw, E1000_PSRTYPE(i));
628 for (i = 0; i < 4; i++)
629 regs_buff[129 + i] = E1000_READ_REG(hw, E1000_RDBAL(i));
630 for (i = 0; i < 4; i++)
631 regs_buff[133 + i] = E1000_READ_REG(hw, E1000_RDBAH(i));
632 for (i = 0; i < 4; i++)
633 regs_buff[137 + i] = E1000_READ_REG(hw, E1000_RDLEN(i));
634 for (i = 0; i < 4; i++)
635 regs_buff[141 + i] = E1000_READ_REG(hw, E1000_RDH(i));
636 for (i = 0; i < 4; i++)
637 regs_buff[145 + i] = E1000_READ_REG(hw, E1000_RDT(i));
638 for (i = 0; i < 4; i++)
639 regs_buff[149 + i] = E1000_READ_REG(hw, E1000_RXDCTL(i));
640
641 for (i = 0; i < 10; i++)
642 regs_buff[153 + i] = E1000_READ_REG(hw, E1000_EITR(i));
643 for (i = 0; i < 8; i++)
644 regs_buff[163 + i] = E1000_READ_REG(hw, E1000_IMIR(i));
645 for (i = 0; i < 8; i++)
646 regs_buff[171 + i] = E1000_READ_REG(hw, E1000_IMIREXT(i));
647 for (i = 0; i < 16; i++)
648 regs_buff[179 + i] = E1000_READ_REG(hw, E1000_RAL(i));
649 for (i = 0; i < 16; i++)
650 regs_buff[195 + i] = E1000_READ_REG(hw, E1000_RAH(i));
651
652 for (i = 0; i < 4; i++)
653 regs_buff[211 + i] = E1000_READ_REG(hw, E1000_TDBAL(i));
654 for (i = 0; i < 4; i++)
655 regs_buff[215 + i] = E1000_READ_REG(hw, E1000_TDBAH(i));
656 for (i = 0; i < 4; i++)
657 regs_buff[219 + i] = E1000_READ_REG(hw, E1000_TDLEN(i));
658 for (i = 0; i < 4; i++)
659 regs_buff[223 + i] = E1000_READ_REG(hw, E1000_TDH(i));
660 for (i = 0; i < 4; i++)
661 regs_buff[227 + i] = E1000_READ_REG(hw, E1000_TDT(i));
662 for (i = 0; i < 4; i++)
663 regs_buff[231 + i] = E1000_READ_REG(hw, E1000_TXDCTL(i));
664 for (i = 0; i < 4; i++)
665 regs_buff[235 + i] = E1000_READ_REG(hw, E1000_TDWBAL(i));
666 for (i = 0; i < 4; i++)
667 regs_buff[239 + i] = E1000_READ_REG(hw, E1000_TDWBAH(i));
668 for (i = 0; i < 4; i++)
669 regs_buff[243 + i] = E1000_READ_REG(hw, E1000_DCA_TXCTRL(i));
670
671 for (i = 0; i < 4; i++)
672 regs_buff[247 + i] = E1000_READ_REG(hw, E1000_IP4AT_REG(i));
673 for (i = 0; i < 4; i++)
674 regs_buff[251 + i] = E1000_READ_REG(hw, E1000_IP6AT_REG(i));
675 for (i = 0; i < 32; i++)
676 regs_buff[255 + i] = E1000_READ_REG(hw, E1000_WUPM_REG(i));
677 for (i = 0; i < 128; i++)
678 regs_buff[287 + i] = E1000_READ_REG(hw, E1000_FFMT_REG(i));
679 for (i = 0; i < 128; i++)
680 regs_buff[415 + i] = E1000_READ_REG(hw, E1000_FFVT_REG(i));
681 for (i = 0; i < 4; i++)
682 regs_buff[543 + i] = E1000_READ_REG(hw, E1000_FFLT_REG(i));
683
684 regs_buff[547] = E1000_READ_REG(hw, E1000_TDFH);
685 regs_buff[548] = E1000_READ_REG(hw, E1000_TDFT);
686 regs_buff[549] = E1000_READ_REG(hw, E1000_TDFHS);
687 regs_buff[550] = E1000_READ_REG(hw, E1000_TDFPC);
688 if (hw->mac.type > e1000_82580) {
689 regs_buff[551] = adapter->stats.o2bgptc;
690 regs_buff[552] = adapter->stats.b2ospc;
691 regs_buff[553] = adapter->stats.o2bspc;
692 regs_buff[554] = adapter->stats.b2ogprc;
693 }
694 }
695
696 static int igb_get_eeprom_len(struct net_device *netdev)
697 {
698 struct igb_adapter *adapter = netdev_priv(netdev);
699 return adapter->hw.nvm.word_size * 2;
700 }
701
702 static int igb_get_eeprom(struct net_device *netdev,
703 struct ethtool_eeprom *eeprom, u8 *bytes)
704 {
705 struct igb_adapter *adapter = netdev_priv(netdev);
706 struct e1000_hw *hw = &adapter->hw;
707 u16 *eeprom_buff;
708 int first_word, last_word;
709 int ret_val = 0;
710 u16 i;
711
712 if (eeprom->len == 0)
713 return -EINVAL;
714
715 eeprom->magic = hw->vendor_id | (hw->device_id << 16);
716
717 first_word = eeprom->offset >> 1;
718 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
719
720 eeprom_buff = kmalloc(sizeof(u16) *
721 (last_word - first_word + 1), GFP_KERNEL);
722 if (!eeprom_buff)
723 return -ENOMEM;
724
725 if (hw->nvm.type == e1000_nvm_eeprom_spi)
726 ret_val = e1000_read_nvm(hw, first_word,
727 last_word - first_word + 1,
728 eeprom_buff);
729 else {
730 for (i = 0; i < last_word - first_word + 1; i++) {
731 ret_val = e1000_read_nvm(hw, first_word + i, 1,
732 &eeprom_buff[i]);
733 if (ret_val)
734 break;
735 }
736 }
737
738 /* Device's eeprom is always little-endian, word addressable */
739 for (i = 0; i < last_word - first_word + 1; i++)
740 eeprom_buff[i] = le16_to_cpu(eeprom_buff[i]);
741
742 memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1),
743 eeprom->len);
744 kfree(eeprom_buff);
745
746 return ret_val;
747 }
748
749 static int igb_set_eeprom(struct net_device *netdev,
750 struct ethtool_eeprom *eeprom, u8 *bytes)
751 {
752 struct igb_adapter *adapter = netdev_priv(netdev);
753 struct e1000_hw *hw = &adapter->hw;
754 u16 *eeprom_buff;
755 void *ptr;
756 int max_len, first_word, last_word, ret_val = 0;
757 u16 i;
758
759 if (eeprom->len == 0)
760 return -EOPNOTSUPP;
761
762 if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
763 return -EFAULT;
764
765 max_len = hw->nvm.word_size * 2;
766
767 first_word = eeprom->offset >> 1;
768 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
769 eeprom_buff = kmalloc(max_len, GFP_KERNEL);
770 if (!eeprom_buff)
771 return -ENOMEM;
772
773 ptr = (void *)eeprom_buff;
774
775 if (eeprom->offset & 1) {
776 /* need read/modify/write of first changed EEPROM word */
777 /* only the second byte of the word is being modified */
778 ret_val = e1000_read_nvm(hw, first_word, 1,
779 &eeprom_buff[0]);
780 ptr++;
781 }
782 if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
783 /* need read/modify/write of last changed EEPROM word */
784 /* only the first byte of the word is being modified */
785 ret_val = e1000_read_nvm(hw, last_word, 1,
786 &eeprom_buff[last_word - first_word]);
787 }
788
789 /* Device's eeprom is always little-endian, word addressable */
790 for (i = 0; i < last_word - first_word + 1; i++)
791 le16_to_cpus(&eeprom_buff[i]);
792
793 memcpy(ptr, bytes, eeprom->len);
794
795 for (i = 0; i < last_word - first_word + 1; i++)
796 cpu_to_le16s(&eeprom_buff[i]);
797
798 ret_val = e1000_write_nvm(hw, first_word,
799 last_word - first_word + 1, eeprom_buff);
800
801 /* Update the checksum if write succeeded.
802 * and flush shadow RAM for 82573 controllers */
803 if (ret_val == 0)
804 e1000_update_nvm_checksum(hw);
805
806 kfree(eeprom_buff);
807 return ret_val;
808 }
809
810 static void igb_get_drvinfo(struct net_device *netdev,
811 struct ethtool_drvinfo *drvinfo)
812 {
813 struct igb_adapter *adapter = netdev_priv(netdev);
814
815 strncpy(drvinfo->driver, igb_driver_name, sizeof(drvinfo->driver) - 1);
816 strncpy(drvinfo->version, igb_driver_version, sizeof(drvinfo->version) - 1);
817
818 strlcpy(drvinfo->fw_version, adapter->fw_version,
819 sizeof(drvinfo->fw_version));
820 strlcpy(drvinfo->bus_info, pci_name(adapter->pdev),
821 sizeof(drvinfo->bus_info));
822 drvinfo->n_stats = IGB_STATS_LEN;
823 drvinfo->testinfo_len = IGB_TEST_LEN;
824 drvinfo->regdump_len = igb_get_regs_len(netdev);
825 drvinfo->eedump_len = igb_get_eeprom_len(netdev);
826 }
827
828 static void igb_get_ringparam(struct net_device *netdev,
829 struct ethtool_ringparam *ring)
830 {
831 struct igb_adapter *adapter = netdev_priv(netdev);
832
833 ring->rx_max_pending = IGB_MAX_RXD;
834 ring->tx_max_pending = IGB_MAX_TXD;
835 ring->rx_mini_max_pending = 0;
836 ring->rx_jumbo_max_pending = 0;
837 ring->rx_pending = adapter->rx_ring_count;
838 ring->tx_pending = adapter->tx_ring_count;
839 ring->rx_mini_pending = 0;
840 ring->rx_jumbo_pending = 0;
841 }
842
843 static int igb_set_ringparam(struct net_device *netdev,
844 struct ethtool_ringparam *ring)
845 {
846 struct igb_adapter *adapter = netdev_priv(netdev);
847 struct igb_ring *temp_ring;
848 int i, err = 0;
849 u16 new_rx_count, new_tx_count;
850
851 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
852 return -EINVAL;
853
854 new_rx_count = min(ring->rx_pending, (u32)IGB_MAX_RXD);
855 new_rx_count = max(new_rx_count, (u16)IGB_MIN_RXD);
856 new_rx_count = ALIGN(new_rx_count, REQ_RX_DESCRIPTOR_MULTIPLE);
857
858 new_tx_count = min(ring->tx_pending, (u32)IGB_MAX_TXD);
859 new_tx_count = max(new_tx_count, (u16)IGB_MIN_TXD);
860 new_tx_count = ALIGN(new_tx_count, REQ_TX_DESCRIPTOR_MULTIPLE);
861
862 if ((new_tx_count == adapter->tx_ring_count) &&
863 (new_rx_count == adapter->rx_ring_count)) {
864 /* nothing to do */
865 return 0;
866 }
867
868 while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
869 usleep_range(1000, 2000);
870
871 if (!netif_running(adapter->netdev)) {
872 for (i = 0; i < adapter->num_tx_queues; i++)
873 adapter->tx_ring[i]->count = new_tx_count;
874 for (i = 0; i < adapter->num_rx_queues; i++)
875 adapter->rx_ring[i]->count = new_rx_count;
876 adapter->tx_ring_count = new_tx_count;
877 adapter->rx_ring_count = new_rx_count;
878 goto clear_reset;
879 }
880
881 if (adapter->num_tx_queues > adapter->num_rx_queues)
882 temp_ring = vmalloc(adapter->num_tx_queues * sizeof(struct igb_ring));
883 else
884 temp_ring = vmalloc(adapter->num_rx_queues * sizeof(struct igb_ring));
885
886 if (!temp_ring) {
887 err = -ENOMEM;
888 goto clear_reset;
889 }
890
891 igb_down(adapter);
892
893 /*
894 * We can't just free everything and then setup again,
895 * because the ISRs in MSI-X mode get passed pointers
896 * to the tx and rx ring structs.
897 */
898 if (new_tx_count != adapter->tx_ring_count) {
899 for (i = 0; i < adapter->num_tx_queues; i++) {
900 memcpy(&temp_ring[i], adapter->tx_ring[i],
901 sizeof(struct igb_ring));
902
903 temp_ring[i].count = new_tx_count;
904 err = igb_setup_tx_resources(&temp_ring[i]);
905 if (err) {
906 while (i) {
907 i--;
908 igb_free_tx_resources(&temp_ring[i]);
909 }
910 goto err_setup;
911 }
912 }
913
914 for (i = 0; i < adapter->num_tx_queues; i++) {
915 igb_free_tx_resources(adapter->tx_ring[i]);
916
917 memcpy(adapter->tx_ring[i], &temp_ring[i],
918 sizeof(struct igb_ring));
919 }
920
921 adapter->tx_ring_count = new_tx_count;
922 }
923
924 if (new_rx_count != adapter->rx_ring_count) {
925 for (i = 0; i < adapter->num_rx_queues; i++) {
926 memcpy(&temp_ring[i], adapter->rx_ring[i],
927 sizeof(struct igb_ring));
928
929 temp_ring[i].count = new_rx_count;
930 err = igb_setup_rx_resources(&temp_ring[i]);
931 if (err) {
932 while (i) {
933 i--;
934 igb_free_rx_resources(&temp_ring[i]);
935 }
936 goto err_setup;
937 }
938
939 }
940
941 for (i = 0; i < adapter->num_rx_queues; i++) {
942 igb_free_rx_resources(adapter->rx_ring[i]);
943
944 memcpy(adapter->rx_ring[i], &temp_ring[i],
945 sizeof(struct igb_ring));
946 }
947
948 adapter->rx_ring_count = new_rx_count;
949 }
950 err_setup:
951 igb_up(adapter);
952 vfree(temp_ring);
953 clear_reset:
954 clear_bit(__IGB_RESETTING, &adapter->state);
955 return err;
956 }
957 static bool reg_pattern_test(struct igb_adapter *adapter, u64 *data,
958 int reg, u32 mask, u32 write)
959 {
960 struct e1000_hw *hw = &adapter->hw;
961 u32 pat, val;
962 static const u32 _test[] =
963 {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
964 for (pat = 0; pat < ARRAY_SIZE(_test); pat++) {
965 E1000_WRITE_REG(hw, reg, (_test[pat] & write));
966 val = E1000_READ_REG(hw, reg) & mask;
967 if (val != (_test[pat] & write & mask)) {
968 dev_err(pci_dev_to_dev(adapter->pdev), "pattern test reg %04X "
969 "failed: got 0x%08X expected 0x%08X\n",
970 E1000_REGISTER(hw, reg), val, (_test[pat] & write & mask));
971 *data = E1000_REGISTER(hw, reg);
972 return 1;
973 }
974 }
975
976 return 0;
977 }
978
979 static bool reg_set_and_check(struct igb_adapter *adapter, u64 *data,
980 int reg, u32 mask, u32 write)
981 {
982 struct e1000_hw *hw = &adapter->hw;
983 u32 val;
984 E1000_WRITE_REG(hw, reg, write & mask);
985 val = E1000_READ_REG(hw, reg);
986 if ((write & mask) != (val & mask)) {
987 dev_err(pci_dev_to_dev(adapter->pdev), "set/check reg %04X test failed:"
988 " got 0x%08X expected 0x%08X\n", reg,
989 (val & mask), (write & mask));
990 *data = E1000_REGISTER(hw, reg);
991 return 1;
992 }
993
994 return 0;
995 }
996
997 #define REG_PATTERN_TEST(reg, mask, write) \
998 do { \
999 if (reg_pattern_test(adapter, data, reg, mask, write)) \
1000 return 1; \
1001 } while (0)
1002
1003 #define REG_SET_AND_CHECK(reg, mask, write) \
1004 do { \
1005 if (reg_set_and_check(adapter, data, reg, mask, write)) \
1006 return 1; \
1007 } while (0)
1008
1009 static int igb_reg_test(struct igb_adapter *adapter, u64 *data)
1010 {
1011 struct e1000_hw *hw = &adapter->hw;
1012 struct igb_reg_test *test;
1013 u32 value, before, after;
1014 u32 i, toggle;
1015
1016 switch (adapter->hw.mac.type) {
1017 case e1000_i350:
1018 case e1000_i354:
1019 test = reg_test_i350;
1020 toggle = 0x7FEFF3FF;
1021 break;
1022 case e1000_i210:
1023 case e1000_i211:
1024 test = reg_test_i210;
1025 toggle = 0x7FEFF3FF;
1026 break;
1027 case e1000_82580:
1028 test = reg_test_82580;
1029 toggle = 0x7FEFF3FF;
1030 break;
1031 case e1000_82576:
1032 test = reg_test_82576;
1033 toggle = 0x7FFFF3FF;
1034 break;
1035 default:
1036 test = reg_test_82575;
1037 toggle = 0x7FFFF3FF;
1038 break;
1039 }
1040
1041 /* Because the status register is such a special case,
1042 * we handle it separately from the rest of the register
1043 * tests. Some bits are read-only, some toggle, and some
1044 * are writable on newer MACs.
1045 */
1046 before = E1000_READ_REG(hw, E1000_STATUS);
1047 value = (E1000_READ_REG(hw, E1000_STATUS) & toggle);
1048 E1000_WRITE_REG(hw, E1000_STATUS, toggle);
1049 after = E1000_READ_REG(hw, E1000_STATUS) & toggle;
1050 if (value != after) {
1051 dev_err(pci_dev_to_dev(adapter->pdev), "failed STATUS register test "
1052 "got: 0x%08X expected: 0x%08X\n", after, value);
1053 *data = 1;
1054 return 1;
1055 }
1056 /* restore previous status */
1057 E1000_WRITE_REG(hw, E1000_STATUS, before);
1058
1059 /* Perform the remainder of the register test, looping through
1060 * the test table until we either fail or reach the null entry.
1061 */
1062 while (test->reg) {
1063 for (i = 0; i < test->array_len; i++) {
1064 switch (test->test_type) {
1065 case PATTERN_TEST:
1066 REG_PATTERN_TEST(test->reg +
1067 (i * test->reg_offset),
1068 test->mask,
1069 test->write);
1070 break;
1071 case SET_READ_TEST:
1072 REG_SET_AND_CHECK(test->reg +
1073 (i * test->reg_offset),
1074 test->mask,
1075 test->write);
1076 break;
1077 case WRITE_NO_TEST:
1078 writel(test->write,
1079 (adapter->hw.hw_addr + test->reg)
1080 + (i * test->reg_offset));
1081 break;
1082 case TABLE32_TEST:
1083 REG_PATTERN_TEST(test->reg + (i * 4),
1084 test->mask,
1085 test->write);
1086 break;
1087 case TABLE64_TEST_LO:
1088 REG_PATTERN_TEST(test->reg + (i * 8),
1089 test->mask,
1090 test->write);
1091 break;
1092 case TABLE64_TEST_HI:
1093 REG_PATTERN_TEST((test->reg + 4) + (i * 8),
1094 test->mask,
1095 test->write);
1096 break;
1097 }
1098 }
1099 test++;
1100 }
1101
1102 *data = 0;
1103 return 0;
1104 }
1105
1106 static int igb_eeprom_test(struct igb_adapter *adapter, u64 *data)
1107 {
1108 *data = 0;
1109
1110 /* Validate NVM checksum */
1111 if (e1000_validate_nvm_checksum(&adapter->hw) < 0)
1112 *data = 2;
1113
1114 return *data;
1115 }
1116
1117 static irqreturn_t igb_test_intr(int irq, void *data)
1118 {
1119 struct igb_adapter *adapter = data;
1120 struct e1000_hw *hw = &adapter->hw;
1121
1122 adapter->test_icr |= E1000_READ_REG(hw, E1000_ICR);
1123
1124 return IRQ_HANDLED;
1125 }
1126
1127 static int igb_intr_test(struct igb_adapter *adapter, u64 *data)
1128 {
1129 struct e1000_hw *hw = &adapter->hw;
1130 struct net_device *netdev = adapter->netdev;
1131 u32 mask, ics_mask, i = 0, shared_int = TRUE;
1132 u32 irq = adapter->pdev->irq;
1133
1134 *data = 0;
1135
1136 /* Hook up test interrupt handler just for this test */
1137 if (adapter->msix_entries) {
1138 if (request_irq(adapter->msix_entries[0].vector,
1139 &igb_test_intr, 0, netdev->name, adapter)) {
1140 *data = 1;
1141 return -1;
1142 }
1143 } else if (adapter->flags & IGB_FLAG_HAS_MSI) {
1144 shared_int = FALSE;
1145 if (request_irq(irq,
1146 igb_test_intr, 0, netdev->name, adapter)) {
1147 *data = 1;
1148 return -1;
1149 }
1150 } else if (!request_irq(irq, igb_test_intr, IRQF_PROBE_SHARED,
1151 netdev->name, adapter)) {
1152 shared_int = FALSE;
1153 } else if (request_irq(irq, &igb_test_intr, IRQF_SHARED,
1154 netdev->name, adapter)) {
1155 *data = 1;
1156 return -1;
1157 }
1158 dev_info(pci_dev_to_dev(adapter->pdev), "testing %s interrupt\n",
1159 (shared_int ? "shared" : "unshared"));
1160
1161 /* Disable all the interrupts */
1162 E1000_WRITE_REG(hw, E1000_IMC, ~0);
1163 E1000_WRITE_FLUSH(hw);
1164 usleep_range(10000, 20000);
1165
1166 /* Define all writable bits for ICS */
1167 switch (hw->mac.type) {
1168 case e1000_82575:
1169 ics_mask = 0x37F47EDD;
1170 break;
1171 case e1000_82576:
1172 ics_mask = 0x77D4FBFD;
1173 break;
1174 case e1000_82580:
1175 ics_mask = 0x77DCFED5;
1176 break;
1177 case e1000_i350:
1178 case e1000_i354:
1179 ics_mask = 0x77DCFED5;
1180 break;
1181 case e1000_i210:
1182 case e1000_i211:
1183 ics_mask = 0x774CFED5;
1184 break;
1185 default:
1186 ics_mask = 0x7FFFFFFF;
1187 break;
1188 }
1189
1190 /* Test each interrupt */
1191 for (; i < 31; i++) {
1192 /* Interrupt to test */
1193 mask = 1 << i;
1194
1195 if (!(mask & ics_mask))
1196 continue;
1197
1198 if (!shared_int) {
1199 /* Disable the interrupt to be reported in
1200 * the cause register and then force the same
1201 * interrupt and see if one gets posted. If
1202 * an interrupt was posted to the bus, the
1203 * test failed.
1204 */
1205 adapter->test_icr = 0;
1206
1207 /* Flush any pending interrupts */
1208 E1000_WRITE_REG(hw, E1000_ICR, ~0);
1209
1210 E1000_WRITE_REG(hw, E1000_IMC, mask);
1211 E1000_WRITE_REG(hw, E1000_ICS, mask);
1212 E1000_WRITE_FLUSH(hw);
1213 usleep_range(10000, 20000);
1214
1215 if (adapter->test_icr & mask) {
1216 *data = 3;
1217 break;
1218 }
1219 }
1220
1221 /* Enable the interrupt to be reported in
1222 * the cause register and then force the same
1223 * interrupt and see if one gets posted. If
1224 * an interrupt was not posted to the bus, the
1225 * test failed.
1226 */
1227 adapter->test_icr = 0;
1228
1229 /* Flush any pending interrupts */
1230 E1000_WRITE_REG(hw, E1000_ICR, ~0);
1231
1232 E1000_WRITE_REG(hw, E1000_IMS, mask);
1233 E1000_WRITE_REG(hw, E1000_ICS, mask);
1234 E1000_WRITE_FLUSH(hw);
1235 usleep_range(10000, 20000);
1236
1237 if (!(adapter->test_icr & mask)) {
1238 *data = 4;
1239 break;
1240 }
1241
1242 if (!shared_int) {
1243 /* Disable the other interrupts to be reported in
1244 * the cause register and then force the other
1245 * interrupts and see if any get posted. If
1246 * an interrupt was posted to the bus, the
1247 * test failed.
1248 */
1249 adapter->test_icr = 0;
1250
1251 /* Flush any pending interrupts */
1252 E1000_WRITE_REG(hw, E1000_ICR, ~0);
1253
1254 E1000_WRITE_REG(hw, E1000_IMC, ~mask);
1255 E1000_WRITE_REG(hw, E1000_ICS, ~mask);
1256 E1000_WRITE_FLUSH(hw);
1257 usleep_range(10000, 20000);
1258
1259 if (adapter->test_icr & mask) {
1260 *data = 5;
1261 break;
1262 }
1263 }
1264 }
1265
1266 /* Disable all the interrupts */
1267 E1000_WRITE_REG(hw, E1000_IMC, ~0);
1268 E1000_WRITE_FLUSH(hw);
1269 usleep_range(10000, 20000);
1270
1271 /* Unhook test interrupt handler */
1272 if (adapter->msix_entries)
1273 free_irq(adapter->msix_entries[0].vector, adapter);
1274 else
1275 free_irq(irq, adapter);
1276
1277 return *data;
1278 }
1279
1280 static void igb_free_desc_rings(struct igb_adapter *adapter)
1281 {
1282 igb_free_tx_resources(&adapter->test_tx_ring);
1283 igb_free_rx_resources(&adapter->test_rx_ring);
1284 }
1285
1286 static int igb_setup_desc_rings(struct igb_adapter *adapter)
1287 {
1288 struct igb_ring *tx_ring = &adapter->test_tx_ring;
1289 struct igb_ring *rx_ring = &adapter->test_rx_ring;
1290 struct e1000_hw *hw = &adapter->hw;
1291 int ret_val;
1292
1293 /* Setup Tx descriptor ring and Tx buffers */
1294 tx_ring->count = IGB_DEFAULT_TXD;
1295 tx_ring->dev = pci_dev_to_dev(adapter->pdev);
1296 tx_ring->netdev = adapter->netdev;
1297 tx_ring->reg_idx = adapter->vfs_allocated_count;
1298
1299 if (igb_setup_tx_resources(tx_ring)) {
1300 ret_val = 1;
1301 goto err_nomem;
1302 }
1303
1304 igb_setup_tctl(adapter);
1305 igb_configure_tx_ring(adapter, tx_ring);
1306
1307 /* Setup Rx descriptor ring and Rx buffers */
1308 rx_ring->count = IGB_DEFAULT_RXD;
1309 rx_ring->dev = pci_dev_to_dev(adapter->pdev);
1310 rx_ring->netdev = adapter->netdev;
1311 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
1312 rx_ring->rx_buffer_len = IGB_RX_HDR_LEN;
1313 #endif
1314 rx_ring->reg_idx = adapter->vfs_allocated_count;
1315
1316 if (igb_setup_rx_resources(rx_ring)) {
1317 ret_val = 2;
1318 goto err_nomem;
1319 }
1320
1321 /* set the default queue to queue 0 of PF */
1322 E1000_WRITE_REG(hw, E1000_MRQC, adapter->vfs_allocated_count << 3);
1323
1324 /* enable receive ring */
1325 igb_setup_rctl(adapter);
1326 igb_configure_rx_ring(adapter, rx_ring);
1327
1328 igb_alloc_rx_buffers(rx_ring, igb_desc_unused(rx_ring));
1329
1330 return 0;
1331
1332 err_nomem:
1333 igb_free_desc_rings(adapter);
1334 return ret_val;
1335 }
1336
1337 static void igb_phy_disable_receiver(struct igb_adapter *adapter)
1338 {
1339 struct e1000_hw *hw = &adapter->hw;
1340
1341 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1342 e1000_write_phy_reg(hw, 29, 0x001F);
1343 e1000_write_phy_reg(hw, 30, 0x8FFC);
1344 e1000_write_phy_reg(hw, 29, 0x001A);
1345 e1000_write_phy_reg(hw, 30, 0x8FF0);
1346 }
1347
1348 static int igb_integrated_phy_loopback(struct igb_adapter *adapter)
1349 {
1350 struct e1000_hw *hw = &adapter->hw;
1351 u32 ctrl_reg = 0;
1352
1353 hw->mac.autoneg = FALSE;
1354
1355 if (hw->phy.type == e1000_phy_m88) {
1356 if (hw->phy.id != I210_I_PHY_ID) {
1357 /* Auto-MDI/MDIX Off */
1358 e1000_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, 0x0808);
1359 /* reset to update Auto-MDI/MDIX */
1360 e1000_write_phy_reg(hw, PHY_CONTROL, 0x9140);
1361 /* autoneg off */
1362 e1000_write_phy_reg(hw, PHY_CONTROL, 0x8140);
1363 } else {
1364 /* force 1000, set loopback */
1365 e1000_write_phy_reg(hw, I347AT4_PAGE_SELECT, 0);
1366 e1000_write_phy_reg(hw, PHY_CONTROL, 0x4140);
1367 }
1368 } else {
1369 /* enable MII loopback */
1370 if (hw->phy.type == e1000_phy_82580)
1371 e1000_write_phy_reg(hw, I82577_PHY_LBK_CTRL, 0x8041);
1372 }
1373
1374 /* force 1000, set loopback */
1375 e1000_write_phy_reg(hw, PHY_CONTROL, 0x4140);
1376
1377 /* Now set up the MAC to the same speed/duplex as the PHY. */
1378 ctrl_reg = E1000_READ_REG(hw, E1000_CTRL);
1379 ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1380 ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1381 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1382 E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
1383 E1000_CTRL_FD | /* Force Duplex to FULL */
1384 E1000_CTRL_SLU); /* Set link up enable bit */
1385
1386 if (hw->phy.type == e1000_phy_m88)
1387 ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
1388
1389 E1000_WRITE_REG(hw, E1000_CTRL, ctrl_reg);
1390
1391 /* Disable the receiver on the PHY so when a cable is plugged in, the
1392 * PHY does not begin to autoneg when a cable is reconnected to the NIC.
1393 */
1394 if (hw->phy.type == e1000_phy_m88)
1395 igb_phy_disable_receiver(adapter);
1396
1397 mdelay(500);
1398 return 0;
1399 }
1400
1401 static int igb_set_phy_loopback(struct igb_adapter *adapter)
1402 {
1403 return igb_integrated_phy_loopback(adapter);
1404 }
1405
1406 static int igb_setup_loopback_test(struct igb_adapter *adapter)
1407 {
1408 struct e1000_hw *hw = &adapter->hw;
1409 u32 reg;
1410
1411 reg = E1000_READ_REG(hw, E1000_CTRL_EXT);
1412
1413 /* use CTRL_EXT to identify link type as SGMII can appear as copper */
1414 if (reg & E1000_CTRL_EXT_LINK_MODE_MASK) {
1415 if ((hw->device_id == E1000_DEV_ID_DH89XXCC_SGMII) ||
1416 (hw->device_id == E1000_DEV_ID_DH89XXCC_SERDES) ||
1417 (hw->device_id == E1000_DEV_ID_DH89XXCC_BACKPLANE) ||
1418 (hw->device_id == E1000_DEV_ID_DH89XXCC_SFP)) {
1419
1420 /* Enable DH89xxCC MPHY for near end loopback */
1421 reg = E1000_READ_REG(hw, E1000_MPHY_ADDR_CTL);
1422 reg = (reg & E1000_MPHY_ADDR_CTL_OFFSET_MASK) |
1423 E1000_MPHY_PCS_CLK_REG_OFFSET;
1424 E1000_WRITE_REG(hw, E1000_MPHY_ADDR_CTL, reg);
1425
1426 reg = E1000_READ_REG(hw, E1000_MPHY_DATA);
1427 reg |= E1000_MPHY_PCS_CLK_REG_DIGINELBEN;
1428 E1000_WRITE_REG(hw, E1000_MPHY_DATA, reg);
1429 }
1430
1431 reg = E1000_READ_REG(hw, E1000_RCTL);
1432 reg |= E1000_RCTL_LBM_TCVR;
1433 E1000_WRITE_REG(hw, E1000_RCTL, reg);
1434
1435 E1000_WRITE_REG(hw, E1000_SCTL, E1000_ENABLE_SERDES_LOOPBACK);
1436
1437 reg = E1000_READ_REG(hw, E1000_CTRL);
1438 reg &= ~(E1000_CTRL_RFCE |
1439 E1000_CTRL_TFCE |
1440 E1000_CTRL_LRST);
1441 reg |= E1000_CTRL_SLU |
1442 E1000_CTRL_FD;
1443 E1000_WRITE_REG(hw, E1000_CTRL, reg);
1444
1445 /* Unset switch control to serdes energy detect */
1446 reg = E1000_READ_REG(hw, E1000_CONNSW);
1447 reg &= ~E1000_CONNSW_ENRGSRC;
1448 E1000_WRITE_REG(hw, E1000_CONNSW, reg);
1449
1450 /* Unset sigdetect for SERDES loopback on
1451 * 82580 and newer devices
1452 */
1453 if (hw->mac.type >= e1000_82580) {
1454 reg = E1000_READ_REG(hw, E1000_PCS_CFG0);
1455 reg |= E1000_PCS_CFG_IGN_SD;
1456 E1000_WRITE_REG(hw, E1000_PCS_CFG0, reg);
1457 }
1458
1459 /* Set PCS register for forced speed */
1460 reg = E1000_READ_REG(hw, E1000_PCS_LCTL);
1461 reg &= ~E1000_PCS_LCTL_AN_ENABLE; /* Disable Autoneg*/
1462 reg |= E1000_PCS_LCTL_FLV_LINK_UP | /* Force link up */
1463 E1000_PCS_LCTL_FSV_1000 | /* Force 1000 */
1464 E1000_PCS_LCTL_FDV_FULL | /* SerDes Full duplex */
1465 E1000_PCS_LCTL_FSD | /* Force Speed */
1466 E1000_PCS_LCTL_FORCE_LINK; /* Force Link */
1467 E1000_WRITE_REG(hw, E1000_PCS_LCTL, reg);
1468
1469 return 0;
1470 }
1471
1472 return igb_set_phy_loopback(adapter);
1473 }
1474
1475 static void igb_loopback_cleanup(struct igb_adapter *adapter)
1476 {
1477 struct e1000_hw *hw = &adapter->hw;
1478 u32 rctl;
1479 u16 phy_reg;
1480
1481 if ((hw->device_id == E1000_DEV_ID_DH89XXCC_SGMII) ||
1482 (hw->device_id == E1000_DEV_ID_DH89XXCC_SERDES) ||
1483 (hw->device_id == E1000_DEV_ID_DH89XXCC_BACKPLANE) ||
1484 (hw->device_id == E1000_DEV_ID_DH89XXCC_SFP)) {
1485 u32 reg;
1486
1487 /* Disable near end loopback on DH89xxCC */
1488 reg = E1000_READ_REG(hw, E1000_MPHY_ADDR_CTL);
1489 reg = (reg & E1000_MPHY_ADDR_CTL_OFFSET_MASK ) |
1490 E1000_MPHY_PCS_CLK_REG_OFFSET;
1491 E1000_WRITE_REG(hw, E1000_MPHY_ADDR_CTL, reg);
1492
1493 reg = E1000_READ_REG(hw, E1000_MPHY_DATA);
1494 reg &= ~E1000_MPHY_PCS_CLK_REG_DIGINELBEN;
1495 E1000_WRITE_REG(hw, E1000_MPHY_DATA, reg);
1496 }
1497
1498 rctl = E1000_READ_REG(hw, E1000_RCTL);
1499 rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
1500 E1000_WRITE_REG(hw, E1000_RCTL, rctl);
1501
1502 hw->mac.autoneg = TRUE;
1503 e1000_read_phy_reg(hw, PHY_CONTROL, &phy_reg);
1504 if (phy_reg & MII_CR_LOOPBACK) {
1505 phy_reg &= ~MII_CR_LOOPBACK;
1506 if (hw->phy.type == I210_I_PHY_ID)
1507 e1000_write_phy_reg(hw, I347AT4_PAGE_SELECT, 0);
1508 e1000_write_phy_reg(hw, PHY_CONTROL, phy_reg);
1509 e1000_phy_commit(hw);
1510 }
1511 }
1512 static void igb_create_lbtest_frame(struct sk_buff *skb,
1513 unsigned int frame_size)
1514 {
1515 memset(skb->data, 0xFF, frame_size);
1516 frame_size /= 2;
1517 memset(&skb->data[frame_size], 0xAA, frame_size - 1);
1518 memset(&skb->data[frame_size + 10], 0xBE, 1);
1519 memset(&skb->data[frame_size + 12], 0xAF, 1);
1520 }
1521
1522 static int igb_check_lbtest_frame(struct igb_rx_buffer *rx_buffer,
1523 unsigned int frame_size)
1524 {
1525 unsigned char *data;
1526 bool match = true;
1527
1528 frame_size >>= 1;
1529
1530 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
1531 data = rx_buffer->skb->data;
1532 #else
1533 data = kmap(rx_buffer->page);
1534 #endif
1535
1536 if (data[3] != 0xFF ||
1537 data[frame_size + 10] != 0xBE ||
1538 data[frame_size + 12] != 0xAF)
1539 match = false;
1540
1541 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
1542 kunmap(rx_buffer->page);
1543
1544 #endif
1545 return match;
1546 }
1547
1548 static u16 igb_clean_test_rings(struct igb_ring *rx_ring,
1549 struct igb_ring *tx_ring,
1550 unsigned int size)
1551 {
1552 union e1000_adv_rx_desc *rx_desc;
1553 struct igb_rx_buffer *rx_buffer_info;
1554 struct igb_tx_buffer *tx_buffer_info;
1555 u16 rx_ntc, tx_ntc, count = 0;
1556
1557 /* initialize next to clean and descriptor values */
1558 rx_ntc = rx_ring->next_to_clean;
1559 tx_ntc = tx_ring->next_to_clean;
1560 rx_desc = IGB_RX_DESC(rx_ring, rx_ntc);
1561
1562 while (igb_test_staterr(rx_desc, E1000_RXD_STAT_DD)) {
1563 /* check rx buffer */
1564 rx_buffer_info = &rx_ring->rx_buffer_info[rx_ntc];
1565
1566 /* sync Rx buffer for CPU read */
1567 dma_sync_single_for_cpu(rx_ring->dev,
1568 rx_buffer_info->dma,
1569 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
1570 IGB_RX_HDR_LEN,
1571 #else
1572 IGB_RX_BUFSZ,
1573 #endif
1574 DMA_FROM_DEVICE);
1575
1576 /* verify contents of skb */
1577 if (igb_check_lbtest_frame(rx_buffer_info, size))
1578 count++;
1579
1580 /* sync Rx buffer for device write */
1581 dma_sync_single_for_device(rx_ring->dev,
1582 rx_buffer_info->dma,
1583 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
1584 IGB_RX_HDR_LEN,
1585 #else
1586 IGB_RX_BUFSZ,
1587 #endif
1588 DMA_FROM_DEVICE);
1589
1590 /* unmap buffer on tx side */
1591 tx_buffer_info = &tx_ring->tx_buffer_info[tx_ntc];
1592 igb_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
1593
1594 /* increment rx/tx next to clean counters */
1595 rx_ntc++;
1596 if (rx_ntc == rx_ring->count)
1597 rx_ntc = 0;
1598 tx_ntc++;
1599 if (tx_ntc == tx_ring->count)
1600 tx_ntc = 0;
1601
1602 /* fetch next descriptor */
1603 rx_desc = IGB_RX_DESC(rx_ring, rx_ntc);
1604 }
1605
1606 /* re-map buffers to ring, store next to clean values */
1607 igb_alloc_rx_buffers(rx_ring, count);
1608 rx_ring->next_to_clean = rx_ntc;
1609 tx_ring->next_to_clean = tx_ntc;
1610
1611 return count;
1612 }
1613
1614 static int igb_run_loopback_test(struct igb_adapter *adapter)
1615 {
1616 struct igb_ring *tx_ring = &adapter->test_tx_ring;
1617 struct igb_ring *rx_ring = &adapter->test_rx_ring;
1618 u16 i, j, lc, good_cnt;
1619 int ret_val = 0;
1620 unsigned int size = IGB_RX_HDR_LEN;
1621 netdev_tx_t tx_ret_val;
1622 struct sk_buff *skb;
1623
1624 /* allocate test skb */
1625 skb = alloc_skb(size, GFP_KERNEL);
1626 if (!skb)
1627 return 11;
1628
1629 /* place data into test skb */
1630 igb_create_lbtest_frame(skb, size);
1631 skb_put(skb, size);
1632
1633 /*
1634 * Calculate the loop count based on the largest descriptor ring
1635 * The idea is to wrap the largest ring a number of times using 64
1636 * send/receive pairs during each loop
1637 */
1638
1639 if (rx_ring->count <= tx_ring->count)
1640 lc = ((tx_ring->count / 64) * 2) + 1;
1641 else
1642 lc = ((rx_ring->count / 64) * 2) + 1;
1643
1644 for (j = 0; j <= lc; j++) { /* loop count loop */
1645 /* reset count of good packets */
1646 good_cnt = 0;
1647
1648 /* place 64 packets on the transmit queue*/
1649 for (i = 0; i < 64; i++) {
1650 skb_get(skb);
1651 tx_ret_val = igb_xmit_frame_ring(skb, tx_ring);
1652 if (tx_ret_val == NETDEV_TX_OK)
1653 good_cnt++;
1654 }
1655
1656 if (good_cnt != 64) {
1657 ret_val = 12;
1658 break;
1659 }
1660
1661 /* allow 200 milliseconds for packets to go from tx to rx */
1662 msleep(200);
1663
1664 good_cnt = igb_clean_test_rings(rx_ring, tx_ring, size);
1665 if (good_cnt != 64) {
1666 ret_val = 13;
1667 break;
1668 }
1669 } /* end loop count loop */
1670
1671 /* free the original skb */
1672 kfree_skb(skb);
1673
1674 return ret_val;
1675 }
1676
1677 static int igb_loopback_test(struct igb_adapter *adapter, u64 *data)
1678 {
1679 /* PHY loopback cannot be performed if SoL/IDER
1680 * sessions are active */
1681 if (e1000_check_reset_block(&adapter->hw)) {
1682 dev_err(pci_dev_to_dev(adapter->pdev),
1683 "Cannot do PHY loopback test "
1684 "when SoL/IDER is active.\n");
1685 *data = 0;
1686 goto out;
1687 }
1688 if (adapter->hw.mac.type == e1000_i354) {
1689 dev_info(&adapter->pdev->dev,
1690 "Loopback test not supported on i354.\n");
1691 *data = 0;
1692 goto out;
1693 }
1694 *data = igb_setup_desc_rings(adapter);
1695 if (*data)
1696 goto out;
1697 *data = igb_setup_loopback_test(adapter);
1698 if (*data)
1699 goto err_loopback;
1700 *data = igb_run_loopback_test(adapter);
1701
1702 igb_loopback_cleanup(adapter);
1703
1704 err_loopback:
1705 igb_free_desc_rings(adapter);
1706 out:
1707 return *data;
1708 }
1709
1710 static int igb_link_test(struct igb_adapter *adapter, u64 *data)
1711 {
1712 u32 link;
1713 int i, time;
1714
1715 *data = 0;
1716 time = 0;
1717 if (adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
1718 int i = 0;
1719 adapter->hw.mac.serdes_has_link = FALSE;
1720
1721 /* On some blade server designs, link establishment
1722 * could take as long as 2-3 minutes */
1723 do {
1724 e1000_check_for_link(&adapter->hw);
1725 if (adapter->hw.mac.serdes_has_link)
1726 goto out;
1727 msleep(20);
1728 } while (i++ < 3750);
1729
1730 *data = 1;
1731 } else {
1732 for (i=0; i < IGB_MAX_LINK_TRIES; i++) {
1733 link = igb_has_link(adapter);
1734 if (link)
1735 goto out;
1736 else {
1737 time++;
1738 msleep(1000);
1739 }
1740 }
1741 if (!link)
1742 *data = 1;
1743 }
1744 out:
1745 return *data;
1746 }
1747
1748 static void igb_diag_test(struct net_device *netdev,
1749 struct ethtool_test *eth_test, u64 *data)
1750 {
1751 struct igb_adapter *adapter = netdev_priv(netdev);
1752 u16 autoneg_advertised;
1753 u8 forced_speed_duplex, autoneg;
1754 bool if_running = netif_running(netdev);
1755
1756 set_bit(__IGB_TESTING, &adapter->state);
1757 if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1758 /* Offline tests */
1759
1760 /* save speed, duplex, autoneg settings */
1761 autoneg_advertised = adapter->hw.phy.autoneg_advertised;
1762 forced_speed_duplex = adapter->hw.mac.forced_speed_duplex;
1763 autoneg = adapter->hw.mac.autoneg;
1764
1765 dev_info(pci_dev_to_dev(adapter->pdev), "offline testing starting\n");
1766
1767 /* power up link for link test */
1768 igb_power_up_link(adapter);
1769
1770 /* Link test performed before hardware reset so autoneg doesn't
1771 * interfere with test result */
1772 if (igb_link_test(adapter, &data[4]))
1773 eth_test->flags |= ETH_TEST_FL_FAILED;
1774
1775 if (if_running)
1776 /* indicate we're in test mode */
1777 dev_close(netdev);
1778 else
1779 igb_reset(adapter);
1780
1781 if (igb_reg_test(adapter, &data[0]))
1782 eth_test->flags |= ETH_TEST_FL_FAILED;
1783
1784 igb_reset(adapter);
1785 if (igb_eeprom_test(adapter, &data[1]))
1786 eth_test->flags |= ETH_TEST_FL_FAILED;
1787
1788 igb_reset(adapter);
1789 if (igb_intr_test(adapter, &data[2]))
1790 eth_test->flags |= ETH_TEST_FL_FAILED;
1791
1792 igb_reset(adapter);
1793
1794 /* power up link for loopback test */
1795 igb_power_up_link(adapter);
1796
1797 if (igb_loopback_test(adapter, &data[3]))
1798 eth_test->flags |= ETH_TEST_FL_FAILED;
1799
1800 /* restore speed, duplex, autoneg settings */
1801 adapter->hw.phy.autoneg_advertised = autoneg_advertised;
1802 adapter->hw.mac.forced_speed_duplex = forced_speed_duplex;
1803 adapter->hw.mac.autoneg = autoneg;
1804
1805 /* force this routine to wait until autoneg complete/timeout */
1806 adapter->hw.phy.autoneg_wait_to_complete = TRUE;
1807 igb_reset(adapter);
1808 adapter->hw.phy.autoneg_wait_to_complete = FALSE;
1809
1810 clear_bit(__IGB_TESTING, &adapter->state);
1811 if (if_running)
1812 dev_open(netdev);
1813 } else {
1814 dev_info(pci_dev_to_dev(adapter->pdev), "online testing starting\n");
1815
1816 /* PHY is powered down when interface is down */
1817 if (if_running && igb_link_test(adapter, &data[4]))
1818 eth_test->flags |= ETH_TEST_FL_FAILED;
1819 else
1820 data[4] = 0;
1821
1822 /* Online tests aren't run; pass by default */
1823 data[0] = 0;
1824 data[1] = 0;
1825 data[2] = 0;
1826 data[3] = 0;
1827
1828 clear_bit(__IGB_TESTING, &adapter->state);
1829 }
1830 msleep_interruptible(4 * 1000);
1831 }
1832
1833 static void igb_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1834 {
1835 struct igb_adapter *adapter = netdev_priv(netdev);
1836
1837 wol->supported = WAKE_UCAST | WAKE_MCAST |
1838 WAKE_BCAST | WAKE_MAGIC |
1839 WAKE_PHY;
1840 wol->wolopts = 0;
1841
1842 if (!(adapter->flags & IGB_FLAG_WOL_SUPPORTED))
1843 return;
1844
1845 /* apply any specific unsupported masks here */
1846 switch (adapter->hw.device_id) {
1847 default:
1848 break;
1849 }
1850
1851 if (adapter->wol & E1000_WUFC_EX)
1852 wol->wolopts |= WAKE_UCAST;
1853 if (adapter->wol & E1000_WUFC_MC)
1854 wol->wolopts |= WAKE_MCAST;
1855 if (adapter->wol & E1000_WUFC_BC)
1856 wol->wolopts |= WAKE_BCAST;
1857 if (adapter->wol & E1000_WUFC_MAG)
1858 wol->wolopts |= WAKE_MAGIC;
1859 if (adapter->wol & E1000_WUFC_LNKC)
1860 wol->wolopts |= WAKE_PHY;
1861 }
1862
1863 static int igb_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1864 {
1865 struct igb_adapter *adapter = netdev_priv(netdev);
1866
1867 if (wol->wolopts & (WAKE_ARP | WAKE_MAGICSECURE))
1868 return -EOPNOTSUPP;
1869
1870 if (!(adapter->flags & IGB_FLAG_WOL_SUPPORTED))
1871 return wol->wolopts ? -EOPNOTSUPP : 0;
1872
1873 /* these settings will always override what we currently have */
1874 adapter->wol = 0;
1875
1876 if (wol->wolopts & WAKE_UCAST)
1877 adapter->wol |= E1000_WUFC_EX;
1878 if (wol->wolopts & WAKE_MCAST)
1879 adapter->wol |= E1000_WUFC_MC;
1880 if (wol->wolopts & WAKE_BCAST)
1881 adapter->wol |= E1000_WUFC_BC;
1882 if (wol->wolopts & WAKE_MAGIC)
1883 adapter->wol |= E1000_WUFC_MAG;
1884 if (wol->wolopts & WAKE_PHY)
1885 adapter->wol |= E1000_WUFC_LNKC;
1886 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1887
1888 return 0;
1889 }
1890
1891 /* bit defines for adapter->led_status */
1892 #ifdef HAVE_ETHTOOL_SET_PHYS_ID
1893 static int igb_set_phys_id(struct net_device *netdev,
1894 enum ethtool_phys_id_state state)
1895 {
1896 struct igb_adapter *adapter = netdev_priv(netdev);
1897 struct e1000_hw *hw = &adapter->hw;
1898
1899 switch (state) {
1900 case ETHTOOL_ID_ACTIVE:
1901 e1000_blink_led(hw);
1902 return 2;
1903 case ETHTOOL_ID_ON:
1904 e1000_led_on(hw);
1905 break;
1906 case ETHTOOL_ID_OFF:
1907 e1000_led_off(hw);
1908 break;
1909 case ETHTOOL_ID_INACTIVE:
1910 e1000_led_off(hw);
1911 e1000_cleanup_led(hw);
1912 break;
1913 }
1914
1915 return 0;
1916 }
1917 #else
1918 static int igb_phys_id(struct net_device *netdev, u32 data)
1919 {
1920 struct igb_adapter *adapter = netdev_priv(netdev);
1921 struct e1000_hw *hw = &adapter->hw;
1922 unsigned long timeout;
1923
1924 timeout = data * 1000;
1925
1926 /*
1927 * msleep_interruptable only accepts unsigned int so we are limited
1928 * in how long a duration we can wait
1929 */
1930 if (!timeout || timeout > UINT_MAX)
1931 timeout = UINT_MAX;
1932
1933 e1000_blink_led(hw);
1934 msleep_interruptible(timeout);
1935
1936 e1000_led_off(hw);
1937 e1000_cleanup_led(hw);
1938
1939 return 0;
1940 }
1941 #endif /* HAVE_ETHTOOL_SET_PHYS_ID */
1942
1943 static int igb_set_coalesce(struct net_device *netdev,
1944 struct ethtool_coalesce *ec)
1945 {
1946 struct igb_adapter *adapter = netdev_priv(netdev);
1947 int i;
1948
1949 if ((ec->rx_coalesce_usecs > IGB_MAX_ITR_USECS) ||
1950 ((ec->rx_coalesce_usecs > 3) &&
1951 (ec->rx_coalesce_usecs < IGB_MIN_ITR_USECS)) ||
1952 (ec->rx_coalesce_usecs == 2))
1953 {
1954 printk("set_coalesce:invalid parameter..");
1955 return -EINVAL;
1956 }
1957
1958 if ((ec->tx_coalesce_usecs > IGB_MAX_ITR_USECS) ||
1959 ((ec->tx_coalesce_usecs > 3) &&
1960 (ec->tx_coalesce_usecs < IGB_MIN_ITR_USECS)) ||
1961 (ec->tx_coalesce_usecs == 2))
1962 return -EINVAL;
1963
1964 if ((adapter->flags & IGB_FLAG_QUEUE_PAIRS) && ec->tx_coalesce_usecs)
1965 return -EINVAL;
1966
1967 if (ec->tx_max_coalesced_frames_irq)
1968 adapter->tx_work_limit = ec->tx_max_coalesced_frames_irq;
1969
1970 /* If ITR is disabled, disable DMAC */
1971 if (ec->rx_coalesce_usecs == 0) {
1972 adapter->dmac = IGB_DMAC_DISABLE;
1973 }
1974
1975 /* convert to rate of irq's per second */
1976 if (ec->rx_coalesce_usecs && ec->rx_coalesce_usecs <= 3)
1977 adapter->rx_itr_setting = ec->rx_coalesce_usecs;
1978 else
1979 adapter->rx_itr_setting = ec->rx_coalesce_usecs << 2;
1980
1981 /* convert to rate of irq's per second */
1982 if (adapter->flags & IGB_FLAG_QUEUE_PAIRS)
1983 adapter->tx_itr_setting = adapter->rx_itr_setting;
1984 else if (ec->tx_coalesce_usecs && ec->tx_coalesce_usecs <= 3)
1985 adapter->tx_itr_setting = ec->tx_coalesce_usecs;
1986 else
1987 adapter->tx_itr_setting = ec->tx_coalesce_usecs << 2;
1988
1989 for (i = 0; i < adapter->num_q_vectors; i++) {
1990 struct igb_q_vector *q_vector = adapter->q_vector[i];
1991 q_vector->tx.work_limit = adapter->tx_work_limit;
1992 if (q_vector->rx.ring)
1993 q_vector->itr_val = adapter->rx_itr_setting;
1994 else
1995 q_vector->itr_val = adapter->tx_itr_setting;
1996 if (q_vector->itr_val && q_vector->itr_val <= 3)
1997 q_vector->itr_val = IGB_START_ITR;
1998 q_vector->set_itr = 1;
1999 }
2000
2001 return 0;
2002 }
2003
2004 static int igb_get_coalesce(struct net_device *netdev,
2005 struct ethtool_coalesce *ec)
2006 {
2007 struct igb_adapter *adapter = netdev_priv(netdev);
2008
2009 if (adapter->rx_itr_setting <= 3)
2010 ec->rx_coalesce_usecs = adapter->rx_itr_setting;
2011 else
2012 ec->rx_coalesce_usecs = adapter->rx_itr_setting >> 2;
2013
2014 ec->tx_max_coalesced_frames_irq = adapter->tx_work_limit;
2015
2016 if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS)) {
2017 if (adapter->tx_itr_setting <= 3)
2018 ec->tx_coalesce_usecs = adapter->tx_itr_setting;
2019 else
2020 ec->tx_coalesce_usecs = adapter->tx_itr_setting >> 2;
2021 }
2022
2023 return 0;
2024 }
2025
2026 static int igb_nway_reset(struct net_device *netdev)
2027 {
2028 struct igb_adapter *adapter = netdev_priv(netdev);
2029 if (netif_running(netdev))
2030 igb_reinit_locked(adapter);
2031 return 0;
2032 }
2033
2034 #ifdef HAVE_ETHTOOL_GET_SSET_COUNT
2035 static int igb_get_sset_count(struct net_device *netdev, int sset)
2036 {
2037 switch (sset) {
2038 case ETH_SS_STATS:
2039 return IGB_STATS_LEN;
2040 case ETH_SS_TEST:
2041 return IGB_TEST_LEN;
2042 default:
2043 return -ENOTSUPP;
2044 }
2045 }
2046 #else
2047 static int igb_get_stats_count(struct net_device *netdev)
2048 {
2049 return IGB_STATS_LEN;
2050 }
2051
2052 static int igb_diag_test_count(struct net_device *netdev)
2053 {
2054 return IGB_TEST_LEN;
2055 }
2056 #endif
2057
2058 static void igb_get_ethtool_stats(struct net_device *netdev,
2059 struct ethtool_stats *stats, u64 *data)
2060 {
2061 struct igb_adapter *adapter = netdev_priv(netdev);
2062 #ifdef HAVE_NETDEV_STATS_IN_NETDEV
2063 struct net_device_stats *net_stats = &netdev->stats;
2064 #else
2065 struct net_device_stats *net_stats = &adapter->net_stats;
2066 #endif
2067 u64 *queue_stat;
2068 int i, j, k;
2069 char *p;
2070
2071 igb_update_stats(adapter);
2072
2073 for (i = 0; i < IGB_GLOBAL_STATS_LEN; i++) {
2074 p = (char *)adapter + igb_gstrings_stats[i].stat_offset;
2075 data[i] = (igb_gstrings_stats[i].sizeof_stat ==
2076 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
2077 }
2078 for (j = 0; j < IGB_NETDEV_STATS_LEN; j++, i++) {
2079 p = (char *)net_stats + igb_gstrings_net_stats[j].stat_offset;
2080 data[i] = (igb_gstrings_net_stats[j].sizeof_stat ==
2081 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
2082 }
2083 for (j = 0; j < adapter->num_tx_queues; j++) {
2084 queue_stat = (u64 *)&adapter->tx_ring[j]->tx_stats;
2085 for (k = 0; k < IGB_TX_QUEUE_STATS_LEN; k++, i++)
2086 data[i] = queue_stat[k];
2087 }
2088 for (j = 0; j < adapter->num_rx_queues; j++) {
2089 queue_stat = (u64 *)&adapter->rx_ring[j]->rx_stats;
2090 for (k = 0; k < IGB_RX_QUEUE_STATS_LEN; k++, i++)
2091 data[i] = queue_stat[k];
2092 }
2093 }
2094
2095 static void igb_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
2096 {
2097 struct igb_adapter *adapter = netdev_priv(netdev);
2098 u8 *p = data;
2099 int i;
2100
2101 switch (stringset) {
2102 case ETH_SS_TEST:
2103 memcpy(data, *igb_gstrings_test,
2104 IGB_TEST_LEN*ETH_GSTRING_LEN);
2105 break;
2106 case ETH_SS_STATS:
2107 for (i = 0; i < IGB_GLOBAL_STATS_LEN; i++) {
2108 memcpy(p, igb_gstrings_stats[i].stat_string,
2109 ETH_GSTRING_LEN);
2110 p += ETH_GSTRING_LEN;
2111 }
2112 for (i = 0; i < IGB_NETDEV_STATS_LEN; i++) {
2113 memcpy(p, igb_gstrings_net_stats[i].stat_string,
2114 ETH_GSTRING_LEN);
2115 p += ETH_GSTRING_LEN;
2116 }
2117 for (i = 0; i < adapter->num_tx_queues; i++) {
2118 sprintf(p, "tx_queue_%u_packets", i);
2119 p += ETH_GSTRING_LEN;
2120 sprintf(p, "tx_queue_%u_bytes", i);
2121 p += ETH_GSTRING_LEN;
2122 sprintf(p, "tx_queue_%u_restart", i);
2123 p += ETH_GSTRING_LEN;
2124 }
2125 for (i = 0; i < adapter->num_rx_queues; i++) {
2126 sprintf(p, "rx_queue_%u_packets", i);
2127 p += ETH_GSTRING_LEN;
2128 sprintf(p, "rx_queue_%u_bytes", i);
2129 p += ETH_GSTRING_LEN;
2130 sprintf(p, "rx_queue_%u_drops", i);
2131 p += ETH_GSTRING_LEN;
2132 sprintf(p, "rx_queue_%u_csum_err", i);
2133 p += ETH_GSTRING_LEN;
2134 sprintf(p, "rx_queue_%u_alloc_failed", i);
2135 p += ETH_GSTRING_LEN;
2136 sprintf(p, "rx_queue_%u_ipv4_packets", i);
2137 p += ETH_GSTRING_LEN;
2138 sprintf(p, "rx_queue_%u_ipv4e_packets", i);
2139 p += ETH_GSTRING_LEN;
2140 sprintf(p, "rx_queue_%u_ipv6_packets", i);
2141 p += ETH_GSTRING_LEN;
2142 sprintf(p, "rx_queue_%u_ipv6e_packets", i);
2143 p += ETH_GSTRING_LEN;
2144 sprintf(p, "rx_queue_%u_tcp_packets", i);
2145 p += ETH_GSTRING_LEN;
2146 sprintf(p, "rx_queue_%u_udp_packets", i);
2147 p += ETH_GSTRING_LEN;
2148 sprintf(p, "rx_queue_%u_sctp_packets", i);
2149 p += ETH_GSTRING_LEN;
2150 sprintf(p, "rx_queue_%u_nfs_packets", i);
2151 p += ETH_GSTRING_LEN;
2152 }
2153 /* BUG_ON(p - data != IGB_STATS_LEN * ETH_GSTRING_LEN); */
2154 break;
2155 }
2156 }
2157
2158 #ifdef HAVE_ETHTOOL_GET_TS_INFO
2159 static int igb_get_ts_info(struct net_device *dev,
2160 struct ethtool_ts_info *info)
2161 {
2162 struct igb_adapter *adapter = netdev_priv(dev);
2163
2164 switch (adapter->hw.mac.type) {
2165 #ifdef HAVE_PTP_1588_CLOCK
2166 case e1000_82575:
2167 info->so_timestamping =
2168 SOF_TIMESTAMPING_TX_SOFTWARE |
2169 SOF_TIMESTAMPING_RX_SOFTWARE |
2170 SOF_TIMESTAMPING_SOFTWARE;
2171 return 0;
2172 case e1000_82576:
2173 case e1000_82580:
2174 case e1000_i350:
2175 case e1000_i354:
2176 case e1000_i210:
2177 case e1000_i211:
2178 info->so_timestamping =
2179 SOF_TIMESTAMPING_TX_SOFTWARE |
2180 SOF_TIMESTAMPING_RX_SOFTWARE |
2181 SOF_TIMESTAMPING_SOFTWARE |
2182 SOF_TIMESTAMPING_TX_HARDWARE |
2183 SOF_TIMESTAMPING_RX_HARDWARE |
2184 SOF_TIMESTAMPING_RAW_HARDWARE;
2185
2186 if (adapter->ptp_clock)
2187 info->phc_index = ptp_clock_index(adapter->ptp_clock);
2188 else
2189 info->phc_index = -1;
2190
2191 info->tx_types =
2192 (1 << HWTSTAMP_TX_OFF) |
2193 (1 << HWTSTAMP_TX_ON);
2194
2195 info->rx_filters = 1 << HWTSTAMP_FILTER_NONE;
2196
2197 /* 82576 does not support timestamping all packets. */
2198 if (adapter->hw.mac.type >= e1000_82580)
2199 info->rx_filters |= 1 << HWTSTAMP_FILTER_ALL;
2200 else
2201 info->rx_filters |=
2202 (1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
2203 (1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
2204 (1 << HWTSTAMP_FILTER_PTP_V2_L2_SYNC) |
2205 (1 << HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
2206 (1 << HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ) |
2207 (1 << HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ) |
2208 (1 << HWTSTAMP_FILTER_PTP_V2_EVENT);
2209
2210 return 0;
2211 #endif /* HAVE_PTP_1588_CLOCK */
2212 default:
2213 return -EOPNOTSUPP;
2214 }
2215 }
2216 #endif /* HAVE_ETHTOOL_GET_TS_INFO */
2217
2218 #ifdef CONFIG_PM_RUNTIME
2219 static int igb_ethtool_begin(struct net_device *netdev)
2220 {
2221 struct igb_adapter *adapter = netdev_priv(netdev);
2222
2223 pm_runtime_get_sync(&adapter->pdev->dev);
2224
2225 return 0;
2226 }
2227
2228 static void igb_ethtool_complete(struct net_device *netdev)
2229 {
2230 struct igb_adapter *adapter = netdev_priv(netdev);
2231
2232 pm_runtime_put(&adapter->pdev->dev);
2233 }
2234 #endif /* CONFIG_PM_RUNTIME */
2235
2236 #ifndef HAVE_NDO_SET_FEATURES
2237 static u32 igb_get_rx_csum(struct net_device *netdev)
2238 {
2239 return !!(netdev->features & NETIF_F_RXCSUM);
2240 }
2241
2242 static int igb_set_rx_csum(struct net_device *netdev, u32 data)
2243 {
2244 const u32 feature_list = NETIF_F_RXCSUM;
2245
2246 if (data)
2247 netdev->features |= feature_list;
2248 else
2249 netdev->features &= ~feature_list;
2250
2251 return 0;
2252 }
2253
2254 static int igb_set_tx_csum(struct net_device *netdev, u32 data)
2255 {
2256 struct igb_adapter *adapter = netdev_priv(netdev);
2257 #ifdef NETIF_F_IPV6_CSUM
2258 u32 feature_list = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
2259 #else
2260 u32 feature_list = NETIF_F_IP_CSUM;
2261 #endif
2262
2263 if (adapter->hw.mac.type >= e1000_82576)
2264 feature_list |= NETIF_F_SCTP_CSUM;
2265
2266 if (data)
2267 netdev->features |= feature_list;
2268 else
2269 netdev->features &= ~feature_list;
2270
2271 return 0;
2272 }
2273
2274 #ifdef NETIF_F_TSO
2275 static int igb_set_tso(struct net_device *netdev, u32 data)
2276 {
2277 #ifdef NETIF_F_TSO6
2278 const u32 feature_list = NETIF_F_TSO | NETIF_F_TSO6;
2279 #else
2280 const u32 feature_list = NETIF_F_TSO;
2281 #endif
2282
2283 if (data)
2284 netdev->features |= feature_list;
2285 else
2286 netdev->features &= ~feature_list;
2287
2288 #ifndef HAVE_NETDEV_VLAN_FEATURES
2289 if (!data) {
2290 struct igb_adapter *adapter = netdev_priv(netdev);
2291 struct net_device *v_netdev;
2292 int i;
2293
2294 /* disable TSO on all VLANs if they're present */
2295 if (!adapter->vlgrp)
2296 goto tso_out;
2297
2298 for (i = 0; i < VLAN_GROUP_ARRAY_LEN; i++) {
2299 v_netdev = vlan_group_get_device(adapter->vlgrp, i);
2300 if (!v_netdev)
2301 continue;
2302
2303 v_netdev->features &= ~feature_list;
2304 vlan_group_set_device(adapter->vlgrp, i, v_netdev);
2305 }
2306 }
2307
2308 tso_out:
2309
2310 #endif /* HAVE_NETDEV_VLAN_FEATURES */
2311 return 0;
2312 }
2313
2314 #endif /* NETIF_F_TSO */
2315 #ifdef ETHTOOL_GFLAGS
2316 static int igb_set_flags(struct net_device *netdev, u32 data)
2317 {
2318 u32 supported_flags = ETH_FLAG_RXVLAN | ETH_FLAG_TXVLAN |
2319 ETH_FLAG_RXHASH;
2320 #ifndef HAVE_VLAN_RX_REGISTER
2321 u32 changed = netdev->features ^ data;
2322 #endif
2323 int rc;
2324 #ifndef IGB_NO_LRO
2325
2326 supported_flags |= ETH_FLAG_LRO;
2327 #endif
2328 /*
2329 * Since there is no support for separate tx vlan accel
2330 * enabled make sure tx flag is cleared if rx is.
2331 */
2332 if (!(data & ETH_FLAG_RXVLAN))
2333 data &= ~ETH_FLAG_TXVLAN;
2334
2335 rc = ethtool_op_set_flags(netdev, data, supported_flags);
2336 if (rc)
2337 return rc;
2338 #ifndef HAVE_VLAN_RX_REGISTER
2339
2340 if (changed & ETH_FLAG_RXVLAN)
2341 igb_vlan_mode(netdev, data);
2342 #endif
2343
2344 return 0;
2345 }
2346
2347 #endif /* ETHTOOL_GFLAGS */
2348 #endif /* HAVE_NDO_SET_FEATURES */
2349 #ifdef ETHTOOL_SADV_COAL
2350 static int igb_set_adv_coal(struct net_device *netdev, struct ethtool_value *edata)
2351 {
2352 struct igb_adapter *adapter = netdev_priv(netdev);
2353
2354 switch (edata->data) {
2355 case IGB_DMAC_DISABLE:
2356 adapter->dmac = edata->data;
2357 break;
2358 case IGB_DMAC_MIN:
2359 adapter->dmac = edata->data;
2360 break;
2361 case IGB_DMAC_500:
2362 adapter->dmac = edata->data;
2363 break;
2364 case IGB_DMAC_EN_DEFAULT:
2365 adapter->dmac = edata->data;
2366 break;
2367 case IGB_DMAC_2000:
2368 adapter->dmac = edata->data;
2369 break;
2370 case IGB_DMAC_3000:
2371 adapter->dmac = edata->data;
2372 break;
2373 case IGB_DMAC_4000:
2374 adapter->dmac = edata->data;
2375 break;
2376 case IGB_DMAC_5000:
2377 adapter->dmac = edata->data;
2378 break;
2379 case IGB_DMAC_6000:
2380 adapter->dmac = edata->data;
2381 break;
2382 case IGB_DMAC_7000:
2383 adapter->dmac = edata->data;
2384 break;
2385 case IGB_DMAC_8000:
2386 adapter->dmac = edata->data;
2387 break;
2388 case IGB_DMAC_9000:
2389 adapter->dmac = edata->data;
2390 break;
2391 case IGB_DMAC_MAX:
2392 adapter->dmac = edata->data;
2393 break;
2394 default:
2395 adapter->dmac = IGB_DMAC_DISABLE;
2396 printk("set_dmac: invalid setting, setting DMAC to %d\n",
2397 adapter->dmac);
2398 }
2399 printk("%s: setting DMAC to %d\n", netdev->name, adapter->dmac);
2400 return 0;
2401 }
2402 #endif /* ETHTOOL_SADV_COAL */
2403 #ifdef ETHTOOL_GADV_COAL
2404 static void igb_get_dmac(struct net_device *netdev,
2405 struct ethtool_value *edata)
2406 {
2407 struct igb_adapter *adapter = netdev_priv(netdev);
2408 edata->data = adapter->dmac;
2409
2410 return;
2411 }
2412 #endif
2413
2414 #ifdef ETHTOOL_GEEE
2415 static int igb_get_eee(struct net_device *netdev, struct ethtool_eee *edata)
2416 {
2417 struct igb_adapter *adapter = netdev_priv(netdev);
2418 struct e1000_hw *hw = &adapter->hw;
2419 u32 ret_val;
2420 u16 phy_data;
2421
2422 if ((hw->mac.type < e1000_i350) ||
2423 (hw->phy.media_type != e1000_media_type_copper))
2424 return -EOPNOTSUPP;
2425
2426 edata->supported = (SUPPORTED_1000baseT_Full |
2427 SUPPORTED_100baseT_Full);
2428
2429 if (!hw->dev_spec._82575.eee_disable)
2430 edata->advertised =
2431 mmd_eee_adv_to_ethtool_adv_t(adapter->eee_advert);
2432
2433 /* The IPCNFG and EEER registers are not supported on I354. */
2434 if (hw->mac.type == e1000_i354) {
2435 e1000_get_eee_status_i354(hw, (bool *)&edata->eee_active);
2436 } else {
2437 u32 eeer;
2438
2439 eeer = E1000_READ_REG(hw, E1000_EEER);
2440
2441 /* EEE status on negotiated link */
2442 if (eeer & E1000_EEER_EEE_NEG)
2443 edata->eee_active = true;
2444
2445 if (eeer & E1000_EEER_TX_LPI_EN)
2446 edata->tx_lpi_enabled = true;
2447 }
2448
2449 /* EEE Link Partner Advertised */
2450 switch (hw->mac.type) {
2451 case e1000_i350:
2452 ret_val = e1000_read_emi_reg(hw, E1000_EEE_LP_ADV_ADDR_I350,
2453 &phy_data);
2454 if (ret_val)
2455 return -ENODATA;
2456
2457 edata->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(phy_data);
2458
2459 break;
2460 case e1000_i354:
2461 case e1000_i210:
2462 case e1000_i211:
2463 ret_val = e1000_read_xmdio_reg(hw, E1000_EEE_LP_ADV_ADDR_I210,
2464 E1000_EEE_LP_ADV_DEV_I210,
2465 &phy_data);
2466 if (ret_val)
2467 return -ENODATA;
2468
2469 edata->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(phy_data);
2470
2471 break;
2472 default:
2473 break;
2474 }
2475
2476 edata->eee_enabled = !hw->dev_spec._82575.eee_disable;
2477
2478 if ((hw->mac.type == e1000_i354) &&
2479 (edata->eee_enabled))
2480 edata->tx_lpi_enabled = true;
2481
2482 /*
2483 * report correct negotiated EEE status for devices that
2484 * wrongly report EEE at half-duplex
2485 */
2486 if (adapter->link_duplex == HALF_DUPLEX) {
2487 edata->eee_enabled = false;
2488 edata->eee_active = false;
2489 edata->tx_lpi_enabled = false;
2490 edata->advertised &= ~edata->advertised;
2491 }
2492
2493 return 0;
2494 }
2495 #endif
2496
2497 #ifdef ETHTOOL_SEEE
2498 static int igb_set_eee(struct net_device *netdev,
2499 struct ethtool_eee *edata)
2500 {
2501 struct igb_adapter *adapter = netdev_priv(netdev);
2502 struct e1000_hw *hw = &adapter->hw;
2503 struct ethtool_eee eee_curr;
2504 s32 ret_val;
2505
2506 if ((hw->mac.type < e1000_i350) ||
2507 (hw->phy.media_type != e1000_media_type_copper))
2508 return -EOPNOTSUPP;
2509
2510 ret_val = igb_get_eee(netdev, &eee_curr);
2511 if (ret_val)
2512 return ret_val;
2513
2514 if (eee_curr.eee_enabled) {
2515 if (eee_curr.tx_lpi_enabled != edata->tx_lpi_enabled) {
2516 dev_err(pci_dev_to_dev(adapter->pdev),
2517 "Setting EEE tx-lpi is not supported\n");
2518 return -EINVAL;
2519 }
2520
2521 /* Tx LPI time is not implemented currently */
2522 if (edata->tx_lpi_timer) {
2523 dev_err(pci_dev_to_dev(adapter->pdev),
2524 "Setting EEE Tx LPI timer is not supported\n");
2525 return -EINVAL;
2526 }
2527
2528 if (edata->advertised &
2529 ~(ADVERTISE_100_FULL | ADVERTISE_1000_FULL)) {
2530 dev_err(pci_dev_to_dev(adapter->pdev),
2531 "EEE Advertisement supports only 100Tx and or 100T full duplex\n");
2532 return -EINVAL;
2533 }
2534
2535 } else if (!edata->eee_enabled) {
2536 dev_err(pci_dev_to_dev(adapter->pdev),
2537 "Setting EEE options is not supported with EEE disabled\n");
2538 return -EINVAL;
2539 }
2540
2541 adapter->eee_advert = ethtool_adv_to_mmd_eee_adv_t(edata->advertised);
2542
2543 if (hw->dev_spec._82575.eee_disable != !edata->eee_enabled) {
2544 hw->dev_spec._82575.eee_disable = !edata->eee_enabled;
2545
2546 /* reset link */
2547 if (netif_running(netdev))
2548 igb_reinit_locked(adapter);
2549 else
2550 igb_reset(adapter);
2551 }
2552
2553 return 0;
2554 }
2555 #endif /* ETHTOOL_SEEE */
2556
2557 #ifdef ETHTOOL_GRXRINGS
2558 static int igb_get_rss_hash_opts(struct igb_adapter *adapter,
2559 struct ethtool_rxnfc *cmd)
2560 {
2561 cmd->data = 0;
2562
2563 /* Report default options for RSS on igb */
2564 switch (cmd->flow_type) {
2565 case TCP_V4_FLOW:
2566 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2567 case UDP_V4_FLOW:
2568 if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
2569 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2570 case SCTP_V4_FLOW:
2571 case AH_ESP_V4_FLOW:
2572 case AH_V4_FLOW:
2573 case ESP_V4_FLOW:
2574 case IPV4_FLOW:
2575 cmd->data |= RXH_IP_SRC | RXH_IP_DST;
2576 break;
2577 case TCP_V6_FLOW:
2578 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2579 case UDP_V6_FLOW:
2580 if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
2581 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2582 case SCTP_V6_FLOW:
2583 case AH_ESP_V6_FLOW:
2584 case AH_V6_FLOW:
2585 case ESP_V6_FLOW:
2586 case IPV6_FLOW:
2587 cmd->data |= RXH_IP_SRC | RXH_IP_DST;
2588 break;
2589 default:
2590 return -EINVAL;
2591 }
2592
2593 return 0;
2594 }
2595
2596 static int igb_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
2597 #ifdef HAVE_ETHTOOL_GET_RXNFC_VOID_RULE_LOCS
2598 void *rule_locs)
2599 #else
2600 u32 *rule_locs)
2601 #endif
2602 {
2603 struct igb_adapter *adapter = netdev_priv(dev);
2604 int ret = -EOPNOTSUPP;
2605
2606 switch (cmd->cmd) {
2607 case ETHTOOL_GRXRINGS:
2608 cmd->data = adapter->num_rx_queues;
2609 ret = 0;
2610 break;
2611 case ETHTOOL_GRXFH:
2612 ret = igb_get_rss_hash_opts(adapter, cmd);
2613 break;
2614 default:
2615 break;
2616 }
2617
2618 return ret;
2619 }
2620
2621 #define UDP_RSS_FLAGS (IGB_FLAG_RSS_FIELD_IPV4_UDP | \
2622 IGB_FLAG_RSS_FIELD_IPV6_UDP)
2623 static int igb_set_rss_hash_opt(struct igb_adapter *adapter,
2624 struct ethtool_rxnfc *nfc)
2625 {
2626 u32 flags = adapter->flags;
2627
2628 /*
2629 * RSS does not support anything other than hashing
2630 * to queues on src and dst IPs and ports
2631 */
2632 if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST |
2633 RXH_L4_B_0_1 | RXH_L4_B_2_3))
2634 return -EINVAL;
2635
2636 switch (nfc->flow_type) {
2637 case TCP_V4_FLOW:
2638 case TCP_V6_FLOW:
2639 if (!(nfc->data & RXH_IP_SRC) ||
2640 !(nfc->data & RXH_IP_DST) ||
2641 !(nfc->data & RXH_L4_B_0_1) ||
2642 !(nfc->data & RXH_L4_B_2_3))
2643 return -EINVAL;
2644 break;
2645 case UDP_V4_FLOW:
2646 if (!(nfc->data & RXH_IP_SRC) ||
2647 !(nfc->data & RXH_IP_DST))
2648 return -EINVAL;
2649 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
2650 case 0:
2651 flags &= ~IGB_FLAG_RSS_FIELD_IPV4_UDP;
2652 break;
2653 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
2654 flags |= IGB_FLAG_RSS_FIELD_IPV4_UDP;
2655 break;
2656 default:
2657 return -EINVAL;
2658 }
2659 break;
2660 case UDP_V6_FLOW:
2661 if (!(nfc->data & RXH_IP_SRC) ||
2662 !(nfc->data & RXH_IP_DST))
2663 return -EINVAL;
2664 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
2665 case 0:
2666 flags &= ~IGB_FLAG_RSS_FIELD_IPV6_UDP;
2667 break;
2668 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
2669 flags |= IGB_FLAG_RSS_FIELD_IPV6_UDP;
2670 break;
2671 default:
2672 return -EINVAL;
2673 }
2674 break;
2675 case AH_ESP_V4_FLOW:
2676 case AH_V4_FLOW:
2677 case ESP_V4_FLOW:
2678 case SCTP_V4_FLOW:
2679 case AH_ESP_V6_FLOW:
2680 case AH_V6_FLOW:
2681 case ESP_V6_FLOW:
2682 case SCTP_V6_FLOW:
2683 if (!(nfc->data & RXH_IP_SRC) ||
2684 !(nfc->data & RXH_IP_DST) ||
2685 (nfc->data & RXH_L4_B_0_1) ||
2686 (nfc->data & RXH_L4_B_2_3))
2687 return -EINVAL;
2688 break;
2689 default:
2690 return -EINVAL;
2691 }
2692
2693 /* if we changed something we need to update flags */
2694 if (flags != adapter->flags) {
2695 struct e1000_hw *hw = &adapter->hw;
2696 u32 mrqc = E1000_READ_REG(hw, E1000_MRQC);
2697
2698 if ((flags & UDP_RSS_FLAGS) &&
2699 !(adapter->flags & UDP_RSS_FLAGS))
2700 DPRINTK(DRV, WARNING,
2701 "enabling UDP RSS: fragmented packets may arrive out of order to the stack above\n");
2702
2703 adapter->flags = flags;
2704
2705 /* Perform hash on these packet types */
2706 mrqc |= E1000_MRQC_RSS_FIELD_IPV4 |
2707 E1000_MRQC_RSS_FIELD_IPV4_TCP |
2708 E1000_MRQC_RSS_FIELD_IPV6 |
2709 E1000_MRQC_RSS_FIELD_IPV6_TCP;
2710
2711 mrqc &= ~(E1000_MRQC_RSS_FIELD_IPV4_UDP |
2712 E1000_MRQC_RSS_FIELD_IPV6_UDP);
2713
2714 if (flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
2715 mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
2716
2717 if (flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
2718 mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
2719
2720 E1000_WRITE_REG(hw, E1000_MRQC, mrqc);
2721 }
2722
2723 return 0;
2724 }
2725
2726 static int igb_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
2727 {
2728 struct igb_adapter *adapter = netdev_priv(dev);
2729 int ret = -EOPNOTSUPP;
2730
2731 switch (cmd->cmd) {
2732 case ETHTOOL_SRXFH:
2733 ret = igb_set_rss_hash_opt(adapter, cmd);
2734 break;
2735 default:
2736 break;
2737 }
2738
2739 return ret;
2740 }
2741 #endif /* ETHTOOL_GRXRINGS */
2742
2743 static const struct ethtool_ops igb_ethtool_ops = {
2744 #ifndef ETHTOOL_GLINKSETTINGS
2745 .get_settings = igb_get_settings,
2746 #endif
2747 #ifndef ETHTOOL_SLINKSETTINGS
2748 .set_settings = igb_set_settings,
2749 #endif
2750 .get_drvinfo = igb_get_drvinfo,
2751 .get_regs_len = igb_get_regs_len,
2752 .get_regs = igb_get_regs,
2753 .get_wol = igb_get_wol,
2754 .set_wol = igb_set_wol,
2755 .get_msglevel = igb_get_msglevel,
2756 .set_msglevel = igb_set_msglevel,
2757 .nway_reset = igb_nway_reset,
2758 .get_link = igb_get_link,
2759 .get_eeprom_len = igb_get_eeprom_len,
2760 .get_eeprom = igb_get_eeprom,
2761 .set_eeprom = igb_set_eeprom,
2762 .get_ringparam = igb_get_ringparam,
2763 .set_ringparam = igb_set_ringparam,
2764 .get_pauseparam = igb_get_pauseparam,
2765 .set_pauseparam = igb_set_pauseparam,
2766 .self_test = igb_diag_test,
2767 .get_strings = igb_get_strings,
2768 #ifndef HAVE_RHEL6_ETHTOOL_OPS_EXT_STRUCT
2769 #ifdef HAVE_ETHTOOL_SET_PHYS_ID
2770 .set_phys_id = igb_set_phys_id,
2771 #else
2772 .phys_id = igb_phys_id,
2773 #endif /* HAVE_ETHTOOL_SET_PHYS_ID */
2774 #endif /* HAVE_RHEL6_ETHTOOL_OPS_EXT_STRUCT */
2775 #ifdef HAVE_ETHTOOL_GET_SSET_COUNT
2776 .get_sset_count = igb_get_sset_count,
2777 #else
2778 .get_stats_count = igb_get_stats_count,
2779 .self_test_count = igb_diag_test_count,
2780 #endif
2781 .get_ethtool_stats = igb_get_ethtool_stats,
2782 #ifdef HAVE_ETHTOOL_GET_PERM_ADDR
2783 .get_perm_addr = ethtool_op_get_perm_addr,
2784 #endif
2785 .get_coalesce = igb_get_coalesce,
2786 .set_coalesce = igb_set_coalesce,
2787 #ifndef HAVE_RHEL6_ETHTOOL_OPS_EXT_STRUCT
2788 #ifdef HAVE_ETHTOOL_GET_TS_INFO
2789 .get_ts_info = igb_get_ts_info,
2790 #endif /* HAVE_ETHTOOL_GET_TS_INFO */
2791 #endif /* HAVE_RHEL6_ETHTOOL_OPS_EXT_STRUCT */
2792 #ifdef CONFIG_PM_RUNTIME
2793 .begin = igb_ethtool_begin,
2794 .complete = igb_ethtool_complete,
2795 #endif /* CONFIG_PM_RUNTIME */
2796 #ifndef HAVE_NDO_SET_FEATURES
2797 .get_rx_csum = igb_get_rx_csum,
2798 .set_rx_csum = igb_set_rx_csum,
2799 .get_tx_csum = ethtool_op_get_tx_csum,
2800 .set_tx_csum = igb_set_tx_csum,
2801 .get_sg = ethtool_op_get_sg,
2802 .set_sg = ethtool_op_set_sg,
2803 #ifdef NETIF_F_TSO
2804 .get_tso = ethtool_op_get_tso,
2805 .set_tso = igb_set_tso,
2806 #endif
2807 #ifdef ETHTOOL_GFLAGS
2808 .get_flags = ethtool_op_get_flags,
2809 .set_flags = igb_set_flags,
2810 #endif /* ETHTOOL_GFLAGS */
2811 #endif /* HAVE_NDO_SET_FEATURES */
2812 #ifdef ETHTOOL_GADV_COAL
2813 .get_advcoal = igb_get_adv_coal,
2814 .set_advcoal = igb_set_dmac_coal,
2815 #endif /* ETHTOOL_GADV_COAL */
2816 #ifndef HAVE_RHEL6_ETHTOOL_OPS_EXT_STRUCT
2817 #ifdef ETHTOOL_GEEE
2818 .get_eee = igb_get_eee,
2819 #endif
2820 #ifdef ETHTOOL_SEEE
2821 .set_eee = igb_set_eee,
2822 #endif
2823 #endif /* HAVE_RHEL6_ETHTOOL_OPS_EXT_STRUCT */
2824 #ifdef ETHTOOL_GRXRINGS
2825 .get_rxnfc = igb_get_rxnfc,
2826 .set_rxnfc = igb_set_rxnfc,
2827 #endif
2828 };
2829
2830 #ifdef HAVE_RHEL6_ETHTOOL_OPS_EXT_STRUCT
2831 static const struct ethtool_ops_ext igb_ethtool_ops_ext = {
2832 .size = sizeof(struct ethtool_ops_ext),
2833 .get_ts_info = igb_get_ts_info,
2834 .set_phys_id = igb_set_phys_id,
2835 .get_eee = igb_get_eee,
2836 .set_eee = igb_set_eee,
2837 };
2838
2839 void igb_set_ethtool_ops(struct net_device *netdev)
2840 {
2841 SET_ETHTOOL_OPS(netdev, &igb_ethtool_ops);
2842 set_ethtool_ops_ext(netdev, &igb_ethtool_ops_ext);
2843 }
2844 #else
2845 void igb_set_ethtool_ops(struct net_device *netdev)
2846 {
2847 /* have to "undeclare" const on this struct to remove warnings */
2848 SET_ETHTOOL_OPS(netdev, (struct ethtool_ops *)&igb_ethtool_ops);
2849 }
2850 #endif /* HAVE_RHEL6_ETHTOOL_OPS_EXT_STRUCT */
2851 #endif /* SIOCETHTOOL */
Ceph