projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| d7133859 OM |
1 | //\r |
| 2 | // Copyright (c) 2014, ARM Limited. All rights reserved.\r | |
| 3 | //\r | |
| 4059386c | 4 | // SPDX-License-Identifier: BSD-2-Clause-Patent\r |
| d7133859 OM |
5 | //\r |
| 6 | //\r | |
| 7 | \r | |
| 8 | // For the moment we assume this will run in SVC mode on ARMv7\r | |
| 9 | \r | |
| d7133859 | 10 | \r |
| efda1775 | 11 | INCLUDE AsmMacroExport.inc\r |
| d7133859 OM |
12 | \r |
| 13 | //UINT32\r | |
| 14 | //EFIAPI\r | |
| 15 | //ArmGicGetControlSystemRegisterEnable (\r | |
| 16 | // VOID\r | |
| 17 | // );\r | |
| efda1775 | 18 | RVCT_ASM_EXPORT ArmGicV3GetControlSystemRegisterEnable\r |
| d7133859 OM |
19 | mrc p15, 0, r0, c12, c12, 5 // ICC_SRE\r |
| 20 | bx lr\r | |
| 21 | \r | |
| 22 | //VOID\r | |
| 23 | //EFIAPI\r | |
| 24 | //ArmGicSetControlSystemRegisterEnable (\r | |
| 25 | // IN UINT32 ControlSystemRegisterEnable\r | |
| 26 | // );\r | |
| efda1775 | 27 | RVCT_ASM_EXPORT ArmGicV3SetControlSystemRegisterEnable\r |
| d7133859 OM |
28 | mcr p15, 0, r0, c12, c12, 5 // ICC_SRE\r |
| 29 | isb\r | |
| 30 | bx lr\r | |
| 31 | \r | |
| 32 | //VOID\r | |
| 33 | //ArmGicV3EnableInterruptInterface (\r | |
| 34 | // VOID\r | |
| 35 | // );\r | |
| efda1775 | 36 | RVCT_ASM_EXPORT ArmGicV3EnableInterruptInterface\r |
| d7133859 OM |
37 | mov r0, #1\r |
| 38 | mcr p15, 0, r0, c12, c12, 7 // ICC_IGRPEN1\r | |
| 39 | bx lr\r | |
| 40 | \r | |
| 41 | //VOID\r | |
| 42 | //ArmGicV3DisableInterruptInterface (\r | |
| 43 | // VOID\r | |
| 44 | // );\r | |
| efda1775 | 45 | RVCT_ASM_EXPORT ArmGicV3DisableInterruptInterface\r |
| d7133859 OM |
46 | mov r0, #0\r |
| 47 | mcr p15, 0, r0, c12, c12, 7 // ICC_IGRPEN1\r | |
| 48 | bx lr\r | |
| 49 | \r | |
| 50 | //VOID\r | |
| 51 | //ArmGicV3EndOfInterrupt (\r | |
| 52 | // IN UINTN InterruptId\r | |
| 53 | // );\r | |
| efda1775 | 54 | RVCT_ASM_EXPORT ArmGicV3EndOfInterrupt\r |
| d7133859 OM |
55 | mcr p15, 0, r0, c12, c12, 1 //ICC_EOIR1\r |
| 56 | bx lr\r | |
| 57 | \r | |
| 58 | //UINTN\r | |
| 59 | //ArmGicV3AcknowledgeInterrupt (\r | |
| 60 | // VOID\r | |
| 61 | // );\r | |
| efda1775 | 62 | RVCT_ASM_EXPORT ArmGicV3AcknowledgeInterrupt\r |
| 66127011 | 63 | mrc p15, 0, r0, c12, c12, 0 //ICC_IAR1\r |
| d7133859 OM |
64 | bx lr\r |
| 65 | \r | |
| 66 | //VOID\r | |
| 67 | //ArmGicV3SetPriorityMask (\r | |
| 68 | // IN UINTN Priority\r | |
| 69 | // );\r | |
| efda1775 | 70 | RVCT_ASM_EXPORT ArmGicV3SetPriorityMask\r |
| d7133859 OM |
71 | mcr p15, 0, r0, c4, c6, 0 //ICC_PMR\r |
| 72 | bx lr\r | |
| 73 | \r | |
| 74 | //VOID\r | |
| 75 | //ArmGicV3SetBinaryPointer (\r | |
| 76 | // IN UINTN BinaryPoint\r | |
| 77 | // );\r | |
| efda1775 | 78 | RVCT_ASM_EXPORT ArmGicV3SetBinaryPointer\r |
| d7133859 OM |
79 | mcr p15, 0, r0, c12, c12, 3 //ICC_BPR1\r |
| 80 | bx lr\r | |
| 81 | \r | |
| 82 | END\r |