projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| e7aac7fc RC |
1 | #===============================================================================\r |
| 2 | # Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.\r | |
| 3 | #\r | |
| 4 | # SPDX-License-Identifier: BSD-2-Clause-Patent\r | |
| 5 | #===============================================================================\r | |
| 6 | \r | |
| 7 | .text\r | |
| 8 | .align 3\r | |
| 9 | \r | |
| 10 | #include <AsmMacroIoLibV8.h>\r | |
| 11 | #include <IndustryStandard/ArmStdSmc.h>\r | |
| 12 | #include <Library/ArmLib.h>\r | |
| 13 | \r | |
| 14 | #include "MpServicesInternal.h"\r | |
| 15 | \r | |
| 16 | GCC_ASM_IMPORT (gApStacksBase)\r | |
| 17 | GCC_ASM_IMPORT (gProcessorIDs)\r | |
| 18 | GCC_ASM_IMPORT (ApProcedure)\r | |
| 19 | GCC_ASM_IMPORT (gApStackSize)\r | |
| 20 | GCC_ASM_IMPORT (gTcr)\r | |
| 21 | GCC_ASM_IMPORT (gTtbr0)\r | |
| 22 | GCC_ASM_IMPORT (gMair)\r | |
| 23 | \r | |
| 24 | GCC_ASM_EXPORT (ApEntryPoint)\r | |
| 25 | \r | |
| 26 | // Entry-point for the AP\r | |
| 27 | // VOID\r | |
| 28 | // ApEntryPoint (\r | |
| 29 | // VOID\r | |
| 30 | // );\r | |
| 31 | ASM_PFX(ApEntryPoint):\r | |
| 32 | // Configure the MMU and caches\r | |
| 33 | ldr x0, gTcr\r | |
| 34 | bl ArmSetTCR\r | |
| 35 | ldr x0, gTtbr0\r | |
| 36 | bl ArmSetTTBR0\r | |
| 37 | ldr x0, gMair\r | |
| 38 | bl ArmSetMAIR\r | |
| 39 | bl ArmDisableAlignmentCheck\r | |
| 40 | bl ArmEnableStackAlignmentCheck\r | |
| 41 | bl ArmEnableInstructionCache\r | |
| 42 | bl ArmEnableDataCache\r | |
| 43 | bl ArmEnableMmu\r | |
| 44 | \r | |
| 45 | mrs x0, mpidr_el1\r | |
| 46 | // Mask the non-affinity bits\r | |
| 47 | bic x0, x0, 0x00ff000000\r | |
| 48 | and x0, x0, 0xffffffffff\r | |
| 49 | ldr x1, gProcessorIDs\r | |
| 50 | mov x2, 0 // x2 = processor index\r | |
| 51 | \r | |
| 52 | // Find index in gProcessorIDs for current processor\r | |
| 53 | 1:\r | |
| 54 | ldr x3, [x1, x2, lsl #3] // x4 = gProcessorIDs + x2 * 8\r | |
| 55 | cmp x3, #-1 // check if we've reached the end of gProcessorIDs\r | |
| 56 | beq ProcessorNotFound\r | |
| 57 | add x2, x2, 1 // x2++\r | |
| 58 | cmp x0, x3 // if mpidr_el1 != gProcessorIDs[x] then loop\r | |
| 59 | bne 1b\r | |
| 60 | \r | |
| 61 | // Calculate stack address\r | |
| 62 | // x2 contains the index for the current processor plus 1\r | |
| 63 | ldr x0, gApStacksBase\r | |
| 64 | ldr x1, gApStackSize\r | |
| 65 | mul x3, x2, x1 // x3 = (ProcessorIndex + 1) * gApStackSize\r | |
| 66 | add sp, x0, x3 // sp = gApStacksBase + x3\r | |
| 67 | mov x29, xzr\r | |
| 68 | bl ApProcedure // doesn't return\r | |
| 69 | \r | |
| 70 | ProcessorNotFound:\r | |
| 71 | // Turn off the processor\r | |
| 72 | MOV32 (w0, ARM_SMC_ID_PSCI_CPU_OFF)\r | |
| 73 | smc #0\r | |
| 74 | b .\r |