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2ef2b01e A |
1 | /** @file\r |
2 | \r | |
3 | Copyright (c) 2008-2009, Apple Inc. All rights reserved.\r | |
4 | \r | |
5 | All rights reserved. This program and the accompanying materials\r | |
6 | are licensed and made available under the terms and conditions of the BSD License\r | |
7 | which accompanies this distribution. The full text of the license may be found at\r | |
8 | http://opensource.org/licenses/bsd-license.php\r | |
9 | \r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
12 | \r | |
13 | **/\r | |
14 | \r | |
15 | #include "CpuDxe.h"\r | |
16 | \r | |
8a4d81e6 A |
17 | BOOLEAN gExceptionContext = FALSE;\r |
18 | BOOLEAN mInterruptState = FALSE;\r | |
19 | \r | |
2ef2b01e A |
20 | EFI_STATUS\r |
21 | EFIAPI\r | |
22 | CpuFlushCpuDataCache (\r | |
23 | IN EFI_CPU_ARCH_PROTOCOL *This,\r | |
24 | IN EFI_PHYSICAL_ADDRESS Start,\r | |
25 | IN UINT64 Length,\r | |
26 | IN EFI_CPU_FLUSH_TYPE FlushType\r | |
27 | )\r | |
28 | {\r | |
29 | switch (FlushType) {\r | |
30 | case EfiCpuFlushTypeWriteBack:\r | |
8a4d81e6 | 31 | WriteBackDataCacheRange ((VOID *)(UINTN)Start, (UINTN)Length);\r |
2ef2b01e A |
32 | break;\r |
33 | case EfiCpuFlushTypeInvalidate:\r | |
8a4d81e6 | 34 | InvalidateDataCacheRange ((VOID *)(UINTN)Start, (UINTN)Length);\r |
2ef2b01e A |
35 | break;\r |
36 | case EfiCpuFlushTypeWriteBackInvalidate:\r | |
8a4d81e6 | 37 | WriteBackInvalidateDataCacheRange ((VOID *)(UINTN)Start, (UINTN)Length);\r |
2ef2b01e A |
38 | break;\r |
39 | default:\r | |
40 | return EFI_INVALID_PARAMETER;\r | |
41 | }\r | |
42 | \r | |
43 | return EFI_SUCCESS;\r | |
44 | }\r | |
45 | \r | |
46 | EFI_STATUS\r | |
47 | EFIAPI\r | |
48 | CpuEnableInterrupt (\r | |
49 | IN EFI_CPU_ARCH_PROTOCOL *This\r | |
50 | )\r | |
51 | {\r | |
8a4d81e6 A |
52 | if (!gExceptionContext) {\r |
53 | ArmEnableInterrupts ();\r | |
2ef2b01e | 54 | }\r |
8a4d81e6 A |
55 | \r |
56 | mInterruptState = TRUE;\r | |
2ef2b01e A |
57 | return EFI_SUCCESS;\r |
58 | }\r | |
59 | \r | |
60 | \r | |
61 | EFI_STATUS\r | |
62 | EFIAPI\r | |
63 | CpuDisableInterrupt (\r | |
64 | IN EFI_CPU_ARCH_PROTOCOL *This\r | |
65 | )\r | |
66 | {\r | |
8a4d81e6 A |
67 | if (!gExceptionContext) {\r |
68 | ArmDisableInterrupts ();\r | |
2ef2b01e | 69 | }\r |
8a4d81e6 A |
70 | \r |
71 | mInterruptState = FALSE;\r | |
2ef2b01e A |
72 | return EFI_SUCCESS;\r |
73 | }\r | |
74 | \r | |
75 | EFI_STATUS\r | |
76 | EFIAPI\r | |
77 | CpuGetInterruptState (\r | |
78 | IN EFI_CPU_ARCH_PROTOCOL *This,\r | |
79 | OUT BOOLEAN *State\r | |
80 | )\r | |
81 | {\r | |
82 | if (State == NULL) {\r | |
83 | return EFI_INVALID_PARAMETER;\r | |
84 | }\r | |
85 | \r | |
8a4d81e6 | 86 | *State = mInterruptState;\r |
2ef2b01e A |
87 | return EFI_SUCCESS;\r |
88 | }\r | |
89 | \r | |
90 | EFI_STATUS\r | |
91 | EFIAPI\r | |
92 | CpuInit (\r | |
93 | IN EFI_CPU_ARCH_PROTOCOL *This,\r | |
94 | IN EFI_CPU_INIT_TYPE InitType\r | |
95 | )\r | |
96 | {\r | |
97 | return EFI_UNSUPPORTED;\r | |
98 | }\r | |
99 | \r | |
100 | EFI_STATUS\r | |
101 | EFIAPI\r | |
102 | CpuRegisterInterruptHandler (\r | |
103 | IN EFI_CPU_ARCH_PROTOCOL *This,\r | |
104 | IN EFI_EXCEPTION_TYPE InterruptType,\r | |
105 | IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler\r | |
106 | )\r | |
107 | {\r | |
8a4d81e6 | 108 | return RegisterInterruptHandler (InterruptType, InterruptHandler);\r |
2ef2b01e A |
109 | }\r |
110 | \r | |
111 | EFI_STATUS\r | |
112 | EFIAPI\r | |
113 | CpuGetTimerValue (\r | |
114 | IN EFI_CPU_ARCH_PROTOCOL *This,\r | |
115 | IN UINT32 TimerIndex,\r | |
116 | OUT UINT64 *TimerValue,\r | |
117 | OUT UINT64 *TimerPeriod OPTIONAL\r | |
118 | )\r | |
119 | {\r | |
120 | return EFI_UNSUPPORTED;\r | |
121 | }\r | |
122 | \r | |
123 | EFI_STATUS\r | |
124 | EFIAPI\r | |
125 | CpuSetMemoryAttributes (\r | |
126 | IN EFI_CPU_ARCH_PROTOCOL *This,\r | |
127 | IN EFI_PHYSICAL_ADDRESS BaseAddress,\r | |
128 | IN UINT64 Length,\r | |
129 | IN UINT64 Attributes\r | |
130 | )\r | |
131 | {\r | |
132 | return EFI_UNSUPPORTED;\r | |
133 | }\r | |
134 | \r | |
135 | //\r | |
136 | // Globals used to initialize the protocol\r | |
137 | //\r | |
138 | EFI_HANDLE mCpuHandle = NULL;\r | |
139 | EFI_CPU_ARCH_PROTOCOL mCpu = {\r | |
140 | CpuFlushCpuDataCache,\r | |
141 | CpuEnableInterrupt,\r | |
142 | CpuDisableInterrupt,\r | |
143 | CpuGetInterruptState,\r | |
144 | CpuInit,\r | |
145 | CpuRegisterInterruptHandler,\r | |
146 | CpuGetTimerValue,\r | |
147 | CpuSetMemoryAttributes,\r | |
148 | 0, // NumberOfTimers\r | |
149 | 4, // DmaBufferAlignment\r | |
150 | };\r | |
151 | \r | |
152 | EFI_STATUS\r | |
153 | CpuDxeInitialize (\r | |
154 | IN EFI_HANDLE ImageHandle,\r | |
155 | IN EFI_SYSTEM_TABLE *SystemTable\r | |
156 | )\r | |
8a4d81e6 A |
157 | { \r |
158 | InitializeExceptions (&mCpu); \r | |
159 | return gBS->InstallMultipleProtocolInterfaces (&mCpuHandle, &gEfiCpuArchProtocolGuid, &mCpu, NULL);\r | |
2ef2b01e A |
160 | }\r |
161 | \r |