ArmPkg/CpuPei: Declare the CPU HOB

[mirror_edk2.git] / ArmPkg / Drivers / CpuPei / CpuPei.c

/**@file\r
\r
Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>\r
Copyright (c) 2011 Hewlett Packard Corporation. All rights reserved.<BR>\r
This program and the accompanying materials                          \r
are licensed and made available under the terms and conditions of the BSD License         \r
which accompanies this distribution.  The full text of the license may be found at        \r
http://opensource.org/licenses/bsd-license.php                                            \r
                                                                                          \r
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     \r
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             \r
\r
Module Name:\r
\r
  MemoryInit.c\r
   \r
Abstract:\r
\r
  PEIM to provide fake memory init\r
\r
**/\r
\r
\r
\r
//\r
// The package level header files this module uses\r
//\r
#include <PiPei.h>\r
//\r
// The protocols, PPI and GUID defintions for this module\r
//\r
\r
//\r
// The Library classes this module consumes\r
//\r
#include <Library/DebugLib.h>\r
#include <Library/PeimEntryPoint.h>\r
#include <Library/PcdLib.h>\r
#include <Library/HobLib.h>\r
#include <Library/ArmLib.h>\r
\r
//\r
// Module globals\r
//\r
\r
#define DDR_ATTRIBUTES_CACHED                ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK\r
#define DDR_ATTRIBUTES_UNCACHED              ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED\r
\r
EFI_STATUS\r
FindMainMemory(\r
  OUT UINT32    *PhysicalBase,\r
  OUT UINT32    *Length\r
  )\r
{\r
  EFI_PEI_HOB_POINTERS      NextHob;\r
\r
  // look at the resource descriptor hobs, choose the first system memory one\r
  NextHob.Raw = GetHobList ();\r
  while ((NextHob.Raw = GetNextHob (EFI_HOB_TYPE_RESOURCE_DESCRIPTOR, NextHob.Raw)) != NULL) {\r
    if(NextHob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY)\r
    {\r
      *PhysicalBase = (UINT32)NextHob.ResourceDescriptor->PhysicalStart;\r
      *Length = (UINT32)NextHob.ResourceDescriptor->ResourceLength;\r
      return EFI_SUCCESS;\r
    }\r
\r
    NextHob.Raw = GET_NEXT_HOB (NextHob);\r
  }\r
\r
  return EFI_NOT_FOUND;\r
}\r
\r
VOID\r
ConfigureMmu ( VOID )\r
{\r
  EFI_STATUS                 Status;\r
  UINTN                         Idx;\r
  UINT32                        CacheAttributes;\r
  UINT32                        SystemMemoryBase;\r
  UINT32                        SystemMemoryLength;\r
  UINT32                        SystemMemoryLastAddress;\r
  ARM_MEMORY_REGION_DESCRIPTOR  MemoryTable[4];\r
  VOID                          *TranslationTableBase;\r
  UINTN                         TranslationTableSize;\r
\r
  if (FeaturePcdGet(PcdCacheEnable) == TRUE) {\r
    CacheAttributes = DDR_ATTRIBUTES_CACHED;\r
  } else {\r
    CacheAttributes = DDR_ATTRIBUTES_UNCACHED;\r
  }\r
\r
  Idx = 0;\r
  \r
  // Main Memory\r
  Status = FindMainMemory (&SystemMemoryBase, &SystemMemoryLength);\r
  ASSERT_EFI_ERROR (Status);\r
\r
  SystemMemoryLastAddress = SystemMemoryBase + (SystemMemoryLength-1);\r
\r
  // if system memory does not begin at 0\r
  if(SystemMemoryBase > 0) {\r
    MemoryTable[Idx].PhysicalBase = 0;\r
    MemoryTable[Idx].VirtualBase  = 0;\r
    MemoryTable[Idx].Length       = SystemMemoryBase;\r
    MemoryTable[Idx].Attributes   = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;\r
    Idx++;\r
  }\r
\r
  MemoryTable[Idx].PhysicalBase = SystemMemoryBase;\r
  MemoryTable[Idx].VirtualBase  = SystemMemoryBase;\r
  MemoryTable[Idx].Length       = SystemMemoryLength;\r
  MemoryTable[Idx].Attributes   = (ARM_MEMORY_REGION_ATTRIBUTES)CacheAttributes;\r
  Idx++;\r
\r
  // if system memory does not go to the last address (0xFFFFFFFF)\r
  if( SystemMemoryLastAddress < MAX_ADDRESS ) {\r
    MemoryTable[Idx].PhysicalBase = SystemMemoryLastAddress + 1;\r
    MemoryTable[Idx].VirtualBase  = MemoryTable[Idx].PhysicalBase;\r
    MemoryTable[Idx].Length       = MAX_ADDRESS - MemoryTable[Idx].PhysicalBase + 1;\r
    MemoryTable[Idx].Attributes   = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;\r
    Idx++;\r
  }\r
\r
  // End of Table\r
  MemoryTable[Idx].PhysicalBase = 0;\r
  MemoryTable[Idx].VirtualBase  = 0;\r
  MemoryTable[Idx].Length       = 0;\r
  MemoryTable[Idx].Attributes   = (ARM_MEMORY_REGION_ATTRIBUTES)0;\r
   \r
  DEBUG ((EFI_D_INFO, "Enabling MMU, setting 0x%08x + %d MB to %a\n",\r
    SystemMemoryBase, SystemMemoryLength/1024/1024,\r
    (CacheAttributes == DDR_ATTRIBUTES_CACHED) ? "cacheable" : "uncacheable"));\r
\r
  ArmConfigureMmu (MemoryTable, &TranslationTableBase, &TranslationTableSize);\r
  \r
  BuildMemoryAllocationHob((EFI_PHYSICAL_ADDRESS)(UINTN)TranslationTableBase, TranslationTableSize, EfiBootServicesData);\r
}\r
\r
\r
EFI_STATUS\r
EFIAPI\r
InitializeCpuPeim (\r
  IN       EFI_PEI_FILE_HANDLE  FileHandle,\r
  IN CONST EFI_PEI_SERVICES     **PeiServices\r
  )\r
/*++\r
\r
Routine Description:\r
\r
  \r
\r
Arguments:\r
\r
  FileHandle  - Handle of the file being invoked.\r
  PeiServices - Describes the list of possible PEI Services.\r
    \r
Returns:\r
\r
  Status -  EFI_SUCCESS if the boot mode could be set\r
\r
--*/\r
{\r
  // Enable program flow prediction, if supported.\r
  ArmEnableBranchPrediction ();\r
\r
  // publish the CPU memory and io spaces sizes\r
  BuildCpuHob (PcdGet8 (PcdPrePiCpuMemorySize), PcdGet8 (PcdPrePiCpuIoSize));\r
\r
  ConfigureMmu();\r
\r
  return EFI_SUCCESS;\r
}\r