ArmPkg/ArmGicLib: Changed ArmGicSendSgiTo() to allow to send a specific SGI

[mirror_edk2.git] / ArmPkg / Drivers / PL390Gic / PL390Gic.c

/** @file\r
*\r
*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r
*  \r
*  This program and the accompanying materials                          \r
*  are licensed and made available under the terms and conditions of the BSD License         \r
*  which accompanies this distribution.  The full text of the license may be found at        \r
*  http://opensource.org/licenses/bsd-license.php                                            \r
*\r
*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     \r
*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             \r
*\r
**/\r
\r
#include <Uefi.h>\r
#include <Library/IoLib.h>\r
#include <Library/ArmGicLib.h>\r
#include <Library/PcdLib.h>\r
\r
UINTN\r
EFIAPI\r
ArmGicGetMaxNumInterrupts (\r
  IN  INTN          GicDistributorBase\r
  )\r
{\r
  return 32 * ((MmioRead32 (GicDistributorBase + ARM_GIC_ICDICTR) & 0x1F) + 1);\r
}\r
\r
VOID\r
EFIAPI\r
ArmGicSendSgiTo (\r
  IN  INTN          GicDistributorBase,\r
  IN  INTN          TargetListFilter,\r
  IN  INTN          CPUTargetList,\r
  IN  INTN          SgiId\r
  )\r
{\r
  MmioWrite32 (GicDistributorBase + ARM_GIC_ICDSGIR, ((TargetListFilter & 0x3) << 24) | ((CPUTargetList & 0xFF) << 16) | SgiId);\r
}\r
\r
UINT32\r
EFIAPI\r
ArmGicAcknowledgeSgiFrom (\r
  IN  INTN          GicInterruptInterfaceBase,\r
  IN  INTN          CoreId\r
  )\r
{\r
  INTN            InterruptId;\r
\r
  InterruptId = MmioRead32 (GicInterruptInterfaceBase + ARM_GIC_ICCIAR);\r
\r
  // Check if the Interrupt ID is valid, The read from Interrupt Ack register returns CPU ID and Interrupt ID\r
  if ((((CoreId & 0x7) << 10) | PcdGet32(PcdGicSgiIntId)) == InterruptId) {\r
    // Got SGI number 0 hence signal End of Interrupt by writing to ICCEOIR\r
    MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCEIOR, InterruptId);\r
    return 1;\r
  } else {\r
    return 0;\r
  }\r
}\r
\r
UINT32\r
EFIAPI\r
ArmGicAcknowledgeSgi2From (\r
  IN  INTN          GicInterruptInterfaceBase,\r
  IN  INTN          CoreId,\r
  IN  INTN          SgiId\r
  )\r
{\r
  INTN            InterruptId;\r
\r
  InterruptId = MmioRead32(GicInterruptInterfaceBase + ARM_GIC_ICCIAR);\r
\r
  // Check if the Interrupt ID is valid, The read from Interrupt Ack register returns CPU ID and Interrupt ID\r
  if((((CoreId & 0x7) << 10) | (SgiId & 0x3FF)) == (InterruptId & 0x1FFF)) {\r
    // Got SGI number 0 hence signal End of Interrupt by writing to ICCEOIR\r
    MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCEIOR, InterruptId);\r
    return 1;\r
  } else {\r
    return 0;\r
  }\r
}\r