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ArmPkg/ArmLib: Move common definitions from ArmV7Lib.h & AArch64Lib.h to ArmLib.h
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1/** @file\r
2 Macros to work around lack of Apple support for LDR register, =expr\r
3\r
4 Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
0a6f2862 5 Portions copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>\r
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6\r
7 This program and the accompanying materials\r
8 are licensed and made available under the terms and conditions of the BSD License\r
9 which accompanies this distribution. The full text of the license may be found at\r
10 http://opensource.org/licenses/bsd-license.php\r
11\r
12 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
13 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
14\r
15**/\r
16\r
17\r
18#ifndef __MACRO_IO_LIBV8_H__\r
19#define __MACRO_IO_LIBV8_H__\r
20\r
21#if defined (__GNUC__)\r
22\r
23#define MmioWrite32(Address, Data) \\r
24 ldr x1, =Address ; \\r
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25 ldr w0, =Data ; \\r
26 str w0, [x1]\r
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27\r
28#define MmioOr32(Address, OrData) \\r
29 ldr x1, =Address ; \\r
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30 ldr w2, =OrData ; \\r
31 ldr w0, [x1] ; \\r
32 orr w0, w0, w2 ; \\r
33 str w0, [x1]\r
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34\r
35#define MmioAnd32(Address, AndData) \\r
36 ldr x1, =Address ; \\r
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37 ldr w2, =AndData ; \\r
38 ldr w0, [x1] ; \\r
39 and w0, w0, w2 ; \\r
40 str w0, [x1]\r
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41\r
42#define MmioAndThenOr32(Address, AndData, OrData) \\r
43 ldr x1, =Address ; \\r
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44 ldr w0, [x1] ; \\r
45 ldr w2, =AndData ; \\r
46 and w0, w0, w2 ; \\r
47 ldr w2, =OrData ; \\r
48 orr w0, w0, w2 ; \\r
49 str w0, [x1]\r
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50\r
51#define MmioWriteFromReg32(Address, Reg) \\r
52 ldr x1, =Address ; \\r
53 str Reg, [x1]\r
54\r
55#define MmioRead32(Address) \\r
56 ldr x1, =Address ; \\r
0a6f2862 57 ldr w0, [x1]\r
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58\r
59#define MmioReadToReg32(Address, Reg) \\r
60 ldr x1, =Address ; \\r
61 ldr Reg, [x1]\r
62\r
63#define LoadConstant(Data) \\r
64 ldr x0, =Data\r
65\r
66#define LoadConstantToReg(Data, Reg) \\r
67 ldr Reg, =Data\r
68\r
69#define SetPrimaryStack(StackTop, GlobalSize, Tmp, Tmp1) \\r
70 ands Tmp, GlobalSize, #15 ; \\r
71 mov Tmp1, #16 ; \\r
72 sub Tmp1, Tmp1, Tmp ; \\r
73 csel Tmp, Tmp1, Tmp, ne ; \\r
74 add GlobalSize, GlobalSize, Tmp ; \\r
75 sub sp, StackTop, GlobalSize ; \\r
76 ; \\r
77 mov Tmp, sp ; \\r
78 mov GlobalSize, #0x0 ; \\r
79_SetPrimaryStackInitGlobals: ; \\r
80 cmp Tmp, StackTop ; \\r
81 b.eq _SetPrimaryStackEnd ; \\r
82 str GlobalSize, [Tmp], #8 ; \\r
83 b _SetPrimaryStackInitGlobals ; \\r
84_SetPrimaryStackEnd:\r
85\r
86// Initialize the Global Variable with '0'\r
87#define InitializePrimaryStack(GlobalSize, Tmp1, Tmp2) \\r
88 and Tmp1, GlobalSize, #15 ; \\r
89 mov Tmp2, #16 ; \\r
90 sub Tmp2, Tmp2, Tmp1 ; \\r
91 add GlobalSize, GlobalSize, Tmp2 ; \\r
92 ; \\r
93 mov Tmp1, sp ; \\r
94 sub sp, sp, GlobalSize ; \\r
95 mov GlobalSize, #0x0 ; \\r
96_InitializePrimaryStackLoop: ; \\r
97 mov Tmp2, sp ; \\r
98 cmp Tmp1, Tmp2 ; \\r
99 bls _InitializePrimaryStackEnd ; \\r
100 str GlobalSize, [Tmp1, #-8]! ; \\r
101 b _InitializePrimaryStackLoop ; \\r
102_InitializePrimaryStackEnd:\r
103\r
104// CurrentEL : 0xC = EL3; 8 = EL2; 4 = EL1\r
105// This only selects between EL1 and EL2, else we die.\r
106// Provide the Macro with a safe temp xreg to use.\r
107#define EL1_OR_EL2(SAFE_XREG) \\r
108 mrs SAFE_XREG, CurrentEL ;\\r
109 cmp SAFE_XREG, #0x4 ;\\r
110 b.eq 1f ;\\r
111 cmp SAFE_XREG, #0x8 ;\\r
112 b.eq 2f ;\\r
113 b dead ;// We should never get here.\r
114\r
115// CurrentEL : 0xC = EL3; 8 = EL2; 4 = EL1\r
116// This only selects between EL1 and EL2 and EL3, else we die.\r
117// Provide the Macro with a safe temp xreg to use.\r
118#define EL1_OR_EL2_OR_EL3(SAFE_XREG) \\r
119 mrs SAFE_XREG, CurrentEL ;\\r
120 cmp SAFE_XREG, #0x4 ;\\r
121 b.eq 1f ;\\r
122 cmp SAFE_XREG, #0x8 ;\\r
123 b.eq 2f ;\\r
124 cmp SAFE_XREG, #0xC ;\\r
125 b.eq 3f ;\\r
126 b dead ;// We should never get here.\r
127\r
128#else\r
129\r
0a6f2862 130#error RVCT AArch64 tool chain is not supported\r
25402f5d 131\r
0a6f2862 132#endif // __GNUC__ \r
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133\r
134#endif // __MACRO_IO_LIBV8_H__\r
135\r