projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| bbf79aa2 SV |
1 | /** @file\r |
| 2 | *\r | |
| 3 | * Copyright (c) 2012-2017, ARM Limited. All rights reserved.\r | |
| 4 | *\r | |
| 4059386c | 5 | * SPDX-License-Identifier: BSD-2-Clause-Patent\r |
| bbf79aa2 SV |
6 | *\r |
| 7 | **/\r | |
| 8 | \r | |
| cc15a619 PG |
9 | #ifndef ARM_MM_SVC_H_\r |
| 10 | #define ARM_MM_SVC_H_\r | |
| bbf79aa2 SV |
11 | \r |
| 12 | /*\r | |
| 13 | * SVC IDs to allow the MM secure partition to initialise itself, handle\r | |
| 14 | * delegated events and request the Secure partition manager to perform\r | |
| 15 | * privileged operations on its behalf.\r | |
| 16 | */\r | |
| 429309e0 MK |
17 | #define ARM_SVC_ID_SPM_VERSION_AARCH32 0x84000060\r |
| 18 | #define ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH32 0x84000061\r | |
| 19 | #define ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH32 0x84000064\r | |
| 20 | #define ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH32 0x84000065\r | |
| 21 | #define ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH64 0xC4000061\r | |
| 22 | #define ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH64 0xC4000064\r | |
| 23 | #define ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH64 0xC4000065\r | |
| bbf79aa2 | 24 | \r |
| 03e19e6b EC |
25 | /* Generic IDs when using AArch32 or AArch64 execution state */\r |
| 26 | #ifdef MDE_CPU_AARCH64\r | |
| 429309e0 MK |
27 | #define ARM_SVC_ID_SP_EVENT_COMPLETE ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH64\r |
| 28 | #define ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH64\r | |
| 29 | #define ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH64\r | |
| 03e19e6b EC |
30 | #endif\r |
| 31 | #ifdef MDE_CPU_ARM\r | |
| 429309e0 MK |
32 | #define ARM_SVC_ID_SP_EVENT_COMPLETE ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH32\r |
| 33 | #define ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH32\r | |
| 34 | #define ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH32\r | |
| 03e19e6b EC |
35 | #endif\r |
| 36 | \r | |
| bbf79aa2 | 37 | #define SET_MEM_ATTR_DATA_PERM_MASK 0x3\r |
| 429309e0 MK |
38 | #define SET_MEM_ATTR_DATA_PERM_SHIFT 0\r |
| 39 | #define SET_MEM_ATTR_DATA_PERM_NO_ACCESS 0\r | |
| 40 | #define SET_MEM_ATTR_DATA_PERM_RW 1\r | |
| 41 | #define SET_MEM_ATTR_DATA_PERM_RO 3\r | |
| bbf79aa2 SV |
42 | \r |
| 43 | #define SET_MEM_ATTR_CODE_PERM_MASK 0x1\r | |
| 429309e0 MK |
44 | #define SET_MEM_ATTR_CODE_PERM_SHIFT 2\r |
| 45 | #define SET_MEM_ATTR_CODE_PERM_X 0\r | |
| 46 | #define SET_MEM_ATTR_CODE_PERM_XN 1\r | |
| bbf79aa2 SV |
47 | \r |
| 48 | #define SET_MEM_ATTR_MAKE_PERM_REQUEST(d_perm, c_perm) \\r | |
| 49 | ((((c_perm) & SET_MEM_ATTR_CODE_PERM_MASK) << SET_MEM_ATTR_CODE_PERM_SHIFT) | \\r | |
| 50 | (( (d_perm) & SET_MEM_ATTR_DATA_PERM_MASK) << SET_MEM_ATTR_DATA_PERM_SHIFT))\r | |
| 51 | \r | |
| 37b2516b | 52 | /* MM SVC Return error codes */\r |
| 429309e0 MK |
53 | #define ARM_SVC_SPM_RET_SUCCESS 0\r |
| 54 | #define ARM_SVC_SPM_RET_NOT_SUPPORTED -1\r | |
| 55 | #define ARM_SVC_SPM_RET_INVALID_PARAMS -2\r | |
| 56 | #define ARM_SVC_SPM_RET_DENIED -3\r | |
| 57 | #define ARM_SVC_SPM_RET_NO_MEMORY -5\r | |
| 58 | \r | |
| 59 | #define SPM_MAJOR_VERSION 0\r | |
| 60 | #define SPM_MINOR_VERSION 1\r | |
| 2385e1de | 61 | \r |
| cc15a619 | 62 | #endif // ARM_MM_SVC_H_\r |