Arm Packages: Fix builds for XCODE32 toolchain

[mirror_edk2.git] / ArmPkg / Library / ArmArchTimerLib / ArmArchTimerLib.c

/** @file\r
  Generic ARM implementation of TimerLib.h\r
\r
  Copyright (c) 2011, ARM Limited. All rights reserved.\r
  \r
  This program and the accompanying materials\r
  are licensed and made available under the terms and conditions of the BSD License\r
  which accompanies this distribution.  The full text of the license may be found at\r
  http://opensource.org/licenses/bsd-license.php\r
\r
  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
**/\r
\r
\r
#include <Base.h>\r
#include <Library/BaseLib.h>\r
#include <Library/TimerLib.h>\r
#include <Library/DebugLib.h>\r
#include <Library/PcdLib.h>\r
#include <Library/ArmV7ArchTimerLib.h>\r
#include <Chipset/ArmV7.h>\r
\r
#define TICKS_PER_MICRO_SEC     (PcdGet32 (PcdArmArchTimerFreqInHz)/1000000U)\r
\r
RETURN_STATUS\r
EFIAPI\r
ArmArchTimerLibConstructor (\r
  VOID\r
  )\r
{\r
  // Check if the ARM Generic Timer Extension is implemented\r
  if (ArmIsArchTimerImplemented ()) {\r
\r
    UINTN TimerFreq;\r
\r
    // Check if Architectural Timer frequency is valid number (should not be 0)\r
    ASSERT (PcdGet32 (PcdArmArchTimerFreqInHz));\r
\r
    // Check if ticks/uS is not 0. The Architectural timer runs at constant\r
    // frequency irrespective of CPU frequency. According to General Timer Ref\r
    // manual lower bound of the frequency is in the range of 1-10MHz\r
    ASSERT (TICKS_PER_MICRO_SEC);\r
\r
    // If the security extensions are not implemented set Timer Frequency\r
    if ((ArmReadIdPfr1 () & 0xF0)) {\r
      ArmArchTimerSetTimerFreq (PcdGet32 (PcdArmArchTimerFreqInHz));\r
    }\r
\r
    // Architectural Timer Frequency must be set in the Secure privileged(if secure extensions are supported) mode.\r
    // If the reset value (0) is returned just ASSERT.\r
    TimerFreq = ArmArchTimerGetTimerFreq ();\r
    ASSERT (TimerFreq);\r
\r
  } else {\r
    DEBUG ((EFI_D_ERROR, "ARM Architectural Timer is not available in the CPU, Hence cann't use this library \n"));\r
    ASSERT (0);\r
  }\r
\r
  return RETURN_SUCCESS;\r
}\r
\r
\r
/**\r
  Stalls the CPU for the number of microseconds specified by MicroSeconds.\r
\r
  @param  MicroSeconds  The minimum number of microseconds to delay.\r
\r
  @return The value of MicroSeconds inputted.\r
\r
**/\r
UINTN\r
EFIAPI\r
MicroSecondDelay (\r
  IN      UINTN                     MicroSeconds\r
  )\r
{\r
  UINT64 TimerTicks64;\r
  UINT64 SystemCounterVal;\r
\r
  // Calculate counter ticks that can represent requsted delay\r
  TimerTicks64 = MultU64x32 (MicroSeconds, TICKS_PER_MICRO_SEC);\r
\r
  // Read System Counter value\r
  SystemCounterVal = ArmArchTimerGetSystemCount ();\r
\r
  TimerTicks64 += SystemCounterVal;\r
\r
  // Wait until delay count is expired.\r
  while (SystemCounterVal < TimerTicks64) {\r
    SystemCounterVal = ArmArchTimerGetSystemCount ();\r
  }\r
\r
  return MicroSeconds;\r
}\r
\r
\r
/**\r
  Stalls the CPU for at least the given number of nanoseconds.\r
\r
  Stalls the CPU for the number of nanoseconds specified by NanoSeconds.\r
\r
  When the timer frequency is 1MHz, each tick corresponds to 1 microsecond.\r
  Therefore, the nanosecond delay will be rounded up to the nearest 1 microsecond.\r
\r
  @param  NanoSeconds The minimum number of nanoseconds to delay.\r
\r
  @return The value of NanoSeconds inputted.\r
\r
**/\r
UINTN\r
EFIAPI\r
NanoSecondDelay (\r
  IN  UINTN NanoSeconds\r
  )\r
{\r
  UINTN  MicroSeconds;\r
\r
  // Round up to 1us Tick Number\r
  MicroSeconds = NanoSeconds / 1000;\r
  MicroSeconds += ((NanoSeconds % 1000) == 0) ? 0 : 1;\r
\r
  MicroSecondDelay (MicroSeconds);\r
\r
  return NanoSeconds;\r
}\r
\r
/**\r
  Retrieves the current value of a 64-bit free running performance counter.\r
\r
  The counter can either count up by 1 or count down by 1. If the physical\r
  performance counter counts by a larger increment, then the counter values\r
  must be translated. The properties of the counter can be retrieved from\r
  GetPerformanceCounterProperties().\r
\r
  @return The current value of the free running performance counter.\r
\r
**/\r
UINT64\r
EFIAPI\r
GetPerformanceCounter (\r
  VOID\r
  )\r
{\r
  // Just return the value of system count\r
  return ArmArchTimerGetSystemCount ();\r
}\r
\r
/**\r
  Retrieves the 64-bit frequency in Hz and the range of performance counter\r
  values.\r
\r
  If StartValue is not NULL, then the value that the performance counter starts\r
  with immediately after is it rolls over is returned in StartValue. If\r
  EndValue is not NULL, then the value that the performance counter end with\r
  immediately before it rolls over is returned in EndValue. The 64-bit\r
  frequency of the performance counter in Hz is always returned. If StartValue\r
  is less than EndValue, then the performance counter counts up. If StartValue\r
  is greater than EndValue, then the performance counter counts down. For\r
  example, a 64-bit free running counter that counts up would have a StartValue\r
  of 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running counter\r
  that counts down would have a StartValue of 0xFFFFFF and an EndValue of 0.\r
\r
  @param  StartValue  The value the performance counter starts with when it\r
                      rolls over.\r
  @param  EndValue    The value that the performance counter ends with before\r
                      it rolls over.\r
\r
  @return The frequency in Hz.\r
\r
**/\r
UINT64\r
EFIAPI\r
GetPerformanceCounterProperties (\r
  OUT      UINT64                    *StartValue,  OPTIONAL\r
  OUT      UINT64                    *EndValue     OPTIONAL\r
  )\r
{\r
  if (StartValue != NULL) {\r
    // Timer starts with the reload value\r
    *StartValue = (UINT64)0ULL ;\r
  }\r
\r
  if (EndValue != NULL) {\r
    // Timer counts down to 0x0\r
    *EndValue = 0xFFFFFFFFFFFFFFFFUL;\r
  }\r
\r
  return (UINT64)ArmArchTimerGetTimerFreq ();\r
}\r