projects / mirror_edk2.git / blame
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| 25402f5d HL |
1 | /** @file\r |
| 2 | \r | |
| 3 | Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r | |
| 4 | Portions Copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>\r | |
| 5 | \r | |
| 6 | This program and the accompanying materials\r | |
| 7 | are licensed and made available under the terms and conditions of the BSD License\r | |
| 8 | which accompanies this distribution. The full text of the license may be found at\r | |
| 9 | http://opensource.org/licenses/bsd-license.php\r | |
| 10 | \r | |
| 11 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
| 12 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
| 13 | \r | |
| 14 | **/\r | |
| 15 | \r | |
| 16 | #ifndef __AARCH64_LIB_H__\r | |
| 17 | #define __AARCH64_LIB_H__\r | |
| 18 | \r | |
| 19 | typedef VOID (*AARCH64_CACHE_OPERATION)(UINTN);\r | |
| 20 | \r | |
| 21 | VOID\r | |
| 22 | EFIAPI\r | |
| 23 | ArmDrainWriteBuffer (\r | |
| 24 | VOID\r | |
| 25 | );\r | |
| 26 | \r | |
| 27 | VOID\r | |
| 28 | EFIAPI\r | |
| 29 | ArmInvalidateDataCacheEntryBySetWay (\r | |
| 30 | IN UINTN SetWayFormat\r | |
| 31 | );\r | |
| 32 | \r | |
| 33 | VOID\r | |
| 34 | EFIAPI\r | |
| 35 | ArmCleanDataCacheEntryBySetWay (\r | |
| 36 | IN UINTN SetWayFormat\r | |
| 37 | );\r | |
| 38 | \r | |
| 39 | VOID\r | |
| 40 | EFIAPI\r | |
| 41 | ArmCleanDataCacheToPoUEntryBySetWay (\r | |
| 42 | IN UINTN SetWayFormat\r | |
| 43 | );\r | |
| 44 | \r | |
| 45 | VOID\r | |
| 46 | EFIAPI\r | |
| 47 | ArmCleanInvalidateDataCacheEntryBySetWay (\r | |
| 48 | IN UINTN SetWayFormat\r | |
| 49 | );\r | |
| 50 | \r | |
| 51 | VOID\r | |
| 52 | EFIAPI\r | |
| 53 | ArmEnableAsynchronousAbort (\r | |
| 54 | VOID\r | |
| 55 | );\r | |
| 56 | \r | |
| 57 | UINTN\r | |
| 58 | EFIAPI\r | |
| 59 | ArmDisableAsynchronousAbort (\r | |
| 60 | VOID\r | |
| 61 | );\r | |
| 62 | \r | |
| 63 | VOID\r | |
| 64 | EFIAPI\r | |
| 65 | ArmEnableIrq (\r | |
| 66 | VOID\r | |
| 67 | );\r | |
| 68 | \r | |
| 69 | UINTN\r | |
| 70 | EFIAPI\r | |
| 71 | ArmDisableIrq (\r | |
| 72 | VOID\r | |
| 73 | );\r | |
| 74 | \r | |
| 75 | VOID\r | |
| 76 | EFIAPI\r | |
| 77 | ArmEnableFiq (\r | |
| 78 | VOID\r | |
| 79 | );\r | |
| 80 | \r | |
| 81 | UINTN\r | |
| 82 | EFIAPI\r | |
| 83 | ArmDisableFiq (\r | |
| 84 | VOID\r | |
| 85 | );\r | |
| 86 | \r | |
| 87 | VOID\r | |
| 88 | AArch64PerformPoUDataCacheOperation (\r | |
| 89 | IN AARCH64_CACHE_OPERATION DataCacheOperation\r | |
| 90 | );\r | |
| 91 | \r | |
| 92 | VOID\r | |
| 93 | AArch64AllDataCachesOperation (\r | |
| 94 | IN AARCH64_CACHE_OPERATION DataCacheOperation\r | |
| 95 | );\r | |
| 96 | \r | |
| 97 | #endif // __AARCH64_LIB_H__\r | |
| 98 | \r |