| 3402aac7 |
1 | #------------------------------------------------------------------------------\r |
| da9675a2 |
2 | #\r |
| 3 | # Copyright (c) 2011, ARM Limited. All rights reserved.\r |
| 4 | #\r |
| 5 | # This program and the accompanying materials\r |
| 6 | # are licensed and made available under the terms and conditions of the BSD License\r |
| 7 | # which accompanies this distribution. The full text of the license may be found at\r |
| 8 | # http://opensource.org/licenses/bsd-license.php\r |
| 9 | #\r |
| 10 | # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r |
| 11 | # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r |
| 12 | #\r |
| 13 | #------------------------------------------------------------------------------\r |
| 14 | \r |
| 15 | .text\r |
| 16 | .align 2\r |
| 17 | \r |
| 18 | GCC_ASM_EXPORT (ArmReadCntFrq)\r |
| 19 | GCC_ASM_EXPORT (ArmWriteCntFrq)\r |
| 20 | GCC_ASM_EXPORT (ArmReadCntPct)\r |
| 21 | GCC_ASM_EXPORT (ArmReadCntkCtl)\r |
| 22 | GCC_ASM_EXPORT (ArmWriteCntkCtl)\r |
| 23 | GCC_ASM_EXPORT (ArmReadCntpTval)\r |
| 24 | GCC_ASM_EXPORT (ArmWriteCntpTval)\r |
| 25 | GCC_ASM_EXPORT (ArmReadCntpCtl)\r |
| 26 | GCC_ASM_EXPORT (ArmWriteCntpCtl)\r |
| 27 | GCC_ASM_EXPORT (ArmReadCntvTval)\r |
| 28 | GCC_ASM_EXPORT (ArmWriteCntvTval)\r |
| 29 | GCC_ASM_EXPORT (ArmReadCntvCtl)\r |
| 30 | GCC_ASM_EXPORT (ArmWriteCntvCtl)\r |
| 31 | GCC_ASM_EXPORT (ArmReadCntvCt)\r |
| 32 | GCC_ASM_EXPORT (ArmReadCntpCval)\r |
| 33 | GCC_ASM_EXPORT (ArmWriteCntpCval)\r |
| 34 | GCC_ASM_EXPORT (ArmReadCntvCval)\r |
| 35 | GCC_ASM_EXPORT (ArmWriteCntvCval)\r |
| 36 | GCC_ASM_EXPORT (ArmReadCntvOff)\r |
| 37 | GCC_ASM_EXPORT (ArmWriteCntvOff)\r |
| 38 | \r |
| 39 | ASM_PFX(ArmReadCntFrq):\r |
| 40 | mrc p15, 0, r0, c14, c0, 0 @ Read CNTFRQ\r |
| 41 | bx lr\r |
| 42 | \r |
| 43 | ASM_PFX(ArmWriteCntFrq):\r |
| 44 | mcr p15, 0, r0, c14, c0, 0 @ Write to CNTFRQ\r |
| 45 | bx lr\r |
| 46 | \r |
| 47 | ASM_PFX(ArmReadCntPct):\r |
| 48 | mrrc p15, 0, r0, r1, c14 @ Read CNTPT (Physical counter register)\r |
| 49 | bx lr\r |
| 50 | \r |
| 51 | ASM_PFX(ArmReadCntkCtl):\r |
| 52 | mrc p15, 0, r0, c14, c1, 0 @ Read CNTK_CTL (Timer PL1 Control Register)\r |
| 53 | bx lr\r |
| 54 | \r |
| 55 | ASM_PFX(ArmWriteCntkCtl):\r |
| 56 | mcr p15, 0, r0, c14, c1, 0 @ Write to CNTK_CTL (Timer PL1 Control Register)\r |
| 57 | bx lr\r |
| 58 | \r |
| 59 | ASM_PFX(ArmReadCntpTval):\r |
| 60 | mrc p15, 0, r0, c14, c2, 0 @ Read CNTP_TVAL (PL1 physical timer value register)\r |
| 61 | bx lr\r |
| 62 | \r |
| 63 | ASM_PFX(ArmWriteCntpTval):\r |
| 64 | mcr p15, 0, r0, c14, c2, 0 @ Write to CNTP_TVAL (PL1 physical timer value register)\r |
| 65 | bx lr\r |
| 66 | \r |
| 67 | ASM_PFX(ArmReadCntpCtl):\r |
| 68 | mrc p15, 0, r0, c14, c2, 1 @ Read CNTP_CTL (PL1 Physical Timer Control Register)\r |
| 69 | bx lr\r |
| 70 | \r |
| 71 | ASM_PFX(ArmWriteCntpCtl):\r |
| 72 | mcr p15, 0, r0, c14, c2, 1 @ Write to CNTP_CTL (PL1 Physical Timer Control Register)\r |
| 73 | bx lr\r |
| 74 | \r |
| 75 | ASM_PFX(ArmReadCntvTval):\r |
| 76 | mrc p15, 0, r0, c14, c3, 0 @ Read CNTV_TVAL (Virtual Timer Value register)\r |
| 77 | bx lr\r |
| 78 | \r |
| 79 | ASM_PFX(ArmWriteCntvTval):\r |
| 80 | mcr p15, 0, r0, c14, c3, 0 @ Write to CNTV_TVAL (Virtual Timer Value register)\r |
| 81 | bx lr\r |
| 82 | \r |
| 83 | ASM_PFX(ArmReadCntvCtl):\r |
| 84 | mrc p15, 0, r0, c14, c3, 1 @ Read CNTV_CTL (Virtual Timer Control Register)\r |
| 85 | bx lr\r |
| 86 | \r |
| 87 | ASM_PFX(ArmWriteCntvCtl):\r |
| 88 | mcr p15, 0, r0, c14, c3, 1 @ Write to CNTV_CTL (Virtual Timer Control Register)\r |
| 89 | bx lr\r |
| 90 | \r |
| 91 | ASM_PFX(ArmReadCntvCt):\r |
| 92 | mrrc p15, 1, r0, r1, c14 @ Read CNTVCT (Virtual Count Register)\r |
| 93 | bx lr\r |
| 94 | \r |
| 95 | ASM_PFX(ArmReadCntpCval):\r |
| 96 | mrrc p15, 2, r0, r1, c14 @ Read CNTP_CTVAL (Physical Timer Compare Value Register)\r |
| 97 | bx lr\r |
| 98 | \r |
| 99 | ASM_PFX(ArmWriteCntpCval):\r |
| 100 | mcrr p15, 2, r0, r1, c14 @ Write to CNTP_CTVAL (Physical Timer Compare Value Register)\r |
| 101 | bx lr\r |
| 102 | \r |
| 103 | ASM_PFX(ArmReadCntvCval):\r |
| 104 | mrrc p15, 3, r0, r1, c14 @ Read CNTV_CTVAL (Virtual Timer Compare Value Register)\r |
| 105 | bx lr\r |
| 106 | \r |
| 107 | ASM_PFX(ArmWriteCntvCval):\r |
| 108 | mcrr p15, 3, r0, r1, c14 @ write to CNTV_CTVAL (Virtual Timer Compare Value Register)\r |
| 109 | bx lr\r |
| 110 | \r |
| 111 | ASM_PFX(ArmReadCntvOff):\r |
| 112 | mrrc p15, 4, r0, r1, c14 @ Read CNTVOFF (virtual Offset register)\r |
| 113 | bx lr\r |
| 114 | \r |
| 115 | ASM_PFX(ArmWriteCntvOff):\r |
| 116 | mcrr p15, 4, r0, r1, c14 @ Write to CNTVOFF (Virtual Offset register)\r |
| 117 | bx lr\r |
| 118 | \r |
| 119 | ASM_FUNCTION_REMOVE_IF_UNREFERENCED\r |
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