ARM Packages: Removed trailing spaces

[mirror_edk2.git] / ArmPkg / Library / ArmLib / ArmV7 / ArmV7ArchTimerSupport.asm

//------------------------------------------------------------------------------\r
//\r
// Copyright (c) 2011, ARM Limited. All rights reserved.\r
//\r
// This program and the accompanying materials\r
// are licensed and made available under the terms and conditions of the BSD License\r
// which accompanies this distribution.  The full text of the license may be found at\r
// http://opensource.org/licenses/bsd-license.php\r
//\r
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
//\r
//------------------------------------------------------------------------------\r
\r
    EXPORT  ArmReadCntFrq\r
    EXPORT  ArmWriteCntFrq\r
    EXPORT  ArmReadCntPct\r
    EXPORT  ArmReadCntkCtl\r
    EXPORT  ArmWriteCntkCtl\r
    EXPORT  ArmReadCntpTval\r
    EXPORT  ArmWriteCntpTval\r
    EXPORT  ArmReadCntpCtl\r
    EXPORT  ArmWriteCntpCtl\r
    EXPORT  ArmReadCntvTval\r
    EXPORT  ArmWriteCntvTval\r
    EXPORT  ArmReadCntvCtl\r
    EXPORT  ArmWriteCntvCtl\r
    EXPORT  ArmReadCntvCt\r
    EXPORT  ArmReadCntpCval\r
    EXPORT  ArmWriteCntpCval\r
    EXPORT  ArmReadCntvCval\r
    EXPORT  ArmWriteCntvCval\r
    EXPORT  ArmReadCntvOff\r
    EXPORT  ArmWriteCntvOff\r
\r
    AREA    ArmV7ArchTimerSupport, CODE, READONLY\r
    PRESERVE8\r
\r
ArmReadCntFrq\r
  mrc    p15, 0, r0, c14, c0, 0    ; Read CNTFRQ\r
  bx     lr\r
\r
ArmWriteCntFrq\r
  mcr    p15, 0, r0, c14, c0, 0    ; Write to CNTFRQ\r
  bx     lr\r
\r
ArmReadCntPct\r
  mrrc   p15, 0, r0, r1, c14       ; Read CNTPT (Physical counter register)\r
  bx     lr\r
\r
ArmReadCntkCtl\r
  mrc    p15, 0, r0, c14, c1, 0    ; Read CNTK_CTL (Timer PL1 Control Register)\r
  bx     lr\r
\r
ArmWriteCntkCtl\r
  mcr    p15, 0, r0, c14, c1, 0    ; Write to CNTK_CTL (Timer PL1 Control Register)\r
  bx     lr\r
\r
ArmReadCntpTval\r
  mrc    p15, 0, r0, c14, c2, 0    ; Read CNTP_TVAL (PL1 physical timer value register)\r
  bx     lr\r
\r
ArmWriteCntpTval\r
  mcr    p15, 0, r0, c14, c2, 0    ; Write to CNTP_TVAL (PL1 physical timer value register)\r
  bx     lr\r
\r
ArmReadCntpCtl\r
  mrc    p15, 0, r0, c14, c2, 1    ; Read CNTP_CTL (PL1 Physical Timer Control Register)\r
  bx     lr\r
\r
ArmWriteCntpCtl\r
  mcr    p15, 0, r0, c14, c2, 1    ; Write to  CNTP_CTL (PL1 Physical Timer Control Register)\r
  bx     lr\r
\r
ArmReadCntvTval\r
  mrc    p15, 0, r0, c14, c3, 0    ; Read CNTV_TVAL (Virtual Timer Value register)\r
  bx     lr\r
\r
ArmWriteCntvTval\r
  mcr    p15, 0, r0, c14, c3, 0    ; Write to CNTV_TVAL (Virtual Timer Value register)\r
  bx     lr\r
\r
ArmReadCntvCtl\r
  mrc    p15, 0, r0, c14, c3, 1    ; Read CNTV_CTL (Virtual Timer Control Register)\r
  bx     lr\r
\r
ArmWriteCntvCtl\r
  mcr    p15, 0, r0, c14, c3, 1    ; Write to CNTV_CTL (Virtual Timer Control Register)\r
  bx     lr\r
\r
ArmReadCntvCt\r
  mrrc   p15, 1, r0, r1, c14       ; Read CNTVCT  (Virtual Count Register)\r
  bx     lr\r
\r
ArmReadCntpCval\r
  mrrc   p15, 2, r0, r1, c14       ; Read CNTP_CTVAL (Physical Timer Compare Value Register)\r
  bx     lr\r
\r
ArmWriteCntpCval\r
  mcrr   p15, 2, r0, r1, c14       ; Write to CNTP_CTVAL (Physical Timer Compare Value Register)\r
  bx     lr\r
\r
ArmReadCntvCval\r
  mrrc   p15, 3, r0, r1, c14       ; Read CNTV_CTVAL (Virtual Timer Compare Value Register)\r
  bx     lr\r
\r
ArmWriteCntvCval\r
  mcrr   p15, 3, r0, r1, c14       ; write to  CNTV_CTVAL (Virtual Timer Compare Value Register)\r
  bx     lr\r
\r
ArmReadCntvOff\r
  mrrc   p15, 4, r0, r1, c14       ; Read CNTVOFF (virtual Offset register)\r
  bx     lr\r
\r
ArmWriteCntvOff\r
  mcrr   p15, 4, r0, r1, c14       ; Write to CNTVOFF (Virtual Offset register)\r
  bx     lr\r
\r
 END\r