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1e57a462 | 1 | /** @file\r |
2 | \r | |
3 | Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r | |
01674afd | 4 | Copyright (c) 2011 - 2014, ARM Limited. All rights reserved.\r |
3402aac7 | 5 | \r |
1e57a462 | 6 | This program and the accompanying materials\r |
7 | are licensed and made available under the terms and conditions of the BSD License\r | |
8 | which accompanies this distribution. The full text of the license may be found at\r | |
9 | http://opensource.org/licenses/bsd-license.php\r | |
10 | \r | |
11 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
12 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
13 | \r | |
14 | **/\r | |
15 | #include <Uefi.h>\r | |
16 | #include <Chipset/ArmV7.h>\r | |
17 | #include <Library/ArmLib.h>\r | |
18 | #include <Library/BaseLib.h>\r | |
19 | #include <Library/IoLib.h>\r | |
20 | #include "ArmV7Lib.h"\r | |
21 | #include "ArmLibPrivate.h"\r | |
22 | \r | |
1e57a462 | 23 | UINTN\r |
24 | EFIAPI\r | |
25 | ArmDataCacheLineLength (\r | |
26 | VOID\r | |
27 | )\r | |
28 | {\r | |
29 | UINT32 CCSIDR = ReadCCSIDR (0) & 7;\r | |
30 | \r | |
31 | // * 4 converts to bytes\r | |
32 | return (1 << (CCSIDR + 2)) * 4;\r | |
33 | }\r | |
3402aac7 | 34 | \r |
1e57a462 | 35 | UINTN\r |
36 | EFIAPI\r | |
37 | ArmInstructionCacheLineLength (\r | |
38 | VOID\r | |
39 | )\r | |
40 | {\r | |
41 | UINT32 CCSIDR = ReadCCSIDR (1) & 7;\r | |
42 | \r | |
43 | // * 4 converts to bytes\r | |
44 | return (1 << (CCSIDR + 2)) * 4;\r | |
45 | \r | |
46 | // return 64;\r | |
47 | }\r | |
48 | \r | |
49 | \r | |
50 | VOID\r | |
51 | ArmV7DataCacheOperation (\r | |
52 | IN ARM_V7_CACHE_OPERATION DataCacheOperation\r | |
53 | )\r | |
54 | {\r | |
55 | UINTN SavedInterruptState;\r | |
56 | \r | |
57 | SavedInterruptState = ArmGetInterruptState ();\r | |
58 | ArmDisableInterrupts ();\r | |
3402aac7 | 59 | \r |
1e57a462 | 60 | ArmV7AllDataCachesOperation (DataCacheOperation);\r |
3402aac7 | 61 | \r |
1e57a462 | 62 | ArmDrainWriteBuffer ();\r |
3402aac7 | 63 | \r |
1e57a462 | 64 | if (SavedInterruptState) {\r |
65 | ArmEnableInterrupts ();\r | |
66 | }\r | |
67 | }\r | |
68 | \r | |
1e57a462 | 69 | VOID\r |
70 | EFIAPI\r | |
71 | ArmInvalidateDataCache (\r | |
72 | VOID\r | |
73 | )\r | |
74 | {\r | |
01674afd | 75 | ArmDrainWriteBuffer ();\r |
1e57a462 | 76 | ArmV7DataCacheOperation (ArmInvalidateDataCacheEntryBySetWay);\r |
77 | }\r | |
78 | \r | |
79 | VOID\r | |
80 | EFIAPI\r | |
81 | ArmCleanInvalidateDataCache (\r | |
82 | VOID\r | |
83 | )\r | |
84 | {\r | |
01674afd | 85 | ArmDrainWriteBuffer ();\r |
1e57a462 | 86 | ArmV7DataCacheOperation (ArmCleanInvalidateDataCacheEntryBySetWay);\r |
87 | }\r | |
88 | \r | |
89 | VOID\r | |
90 | EFIAPI\r | |
91 | ArmCleanDataCache (\r | |
92 | VOID\r | |
93 | )\r | |
94 | {\r | |
01674afd | 95 | ArmDrainWriteBuffer ();\r |
1e57a462 | 96 | ArmV7DataCacheOperation (ArmCleanDataCacheEntryBySetWay);\r |
97 | }\r |