projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| d7f03464 AB |
1 | #------------------------------------------------------------------------------\r |
| 2 | #\r | |
| 3 | # Copyright (c) 2016, Linaro Limited. All rights reserved.\r | |
| 4 | #\r | |
| 5 | # This program and the accompanying materials\r | |
| 6 | # are licensed and made available under the terms and conditions of the BSD License\r | |
| 7 | # which accompanies this distribution. The full text of the license may be found at\r | |
| 8 | # http://opensource.org/licenses/bsd-license.php\r | |
| 9 | #\r | |
| 10 | # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
| 11 | # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
| 12 | #\r | |
| 13 | #------------------------------------------------------------------------------\r | |
| 14 | \r | |
| 15 | #include <AsmMacroIoLibV8.h>\r | |
| 16 | \r | |
| 17 | .set CTRL_M_BIT, (1 << 0)\r | |
| 18 | \r | |
| 19 | .macro __replace_entry, el\r | |
| 20 | \r | |
| 21 | // disable the MMU\r | |
| 22 | mrs x8, sctlr_el\el\r | |
| 23 | bic x9, x8, #CTRL_M_BIT\r | |
| 24 | msr sctlr_el\el, x9\r | |
| 25 | isb\r | |
| 26 | \r | |
| 27 | // write updated entry\r | |
| 28 | str x1, [x0]\r | |
| 29 | \r | |
| 30 | // invalidate again to get rid of stale clean cachelines that may\r | |
| 31 | // have been filled speculatively since the last invalidate\r | |
| 32 | dmb sy\r | |
| 33 | dc ivac, x0\r | |
| 34 | \r | |
| 35 | // flush the TLBs\r | |
| 36 | .if \el == 1\r | |
| 37 | tlbi vmalle1\r | |
| 38 | .else\r | |
| 39 | tlbi alle\el\r | |
| 40 | .endif\r | |
| 41 | dsb sy\r | |
| 42 | \r | |
| 43 | // re-enable the MMU\r | |
| 44 | msr sctlr_el\el, x8\r | |
| 45 | isb\r | |
| 46 | .endm\r | |
| 47 | \r | |
| 48 | //VOID\r | |
| 49 | //ArmReplaceLiveTranslationEntry (\r | |
| 50 | // IN UINT64 *Entry,\r | |
| 51 | // IN UINT64 Value\r | |
| 52 | // )\r | |
| e4d37ada | 53 | ASM_FUNC(ArmReplaceLiveTranslationEntry)\r |
| d7f03464 AB |
54 | \r |
| 55 | // disable interrupts\r | |
| 56 | mrs x2, daif\r | |
| 57 | msr daifset, #0xf\r | |
| 58 | isb\r | |
| 59 | \r | |
| 60 | // clean and invalidate first so that we don't clobber\r | |
| 61 | // adjacent entries that are dirty in the caches\r | |
| 62 | dc civac, x0\r | |
| 63 | dsb ish\r | |
| 64 | \r | |
| 65 | EL1_OR_EL2_OR_EL3(x3)\r | |
| 66 | 1:__replace_entry 1\r | |
| 67 | b 4f\r | |
| 68 | 2:__replace_entry 2\r | |
| 69 | b 4f\r | |
| 70 | 3:__replace_entry 3\r | |
| 71 | \r | |
| 72 | 4:msr daif, x2\r | |
| 73 | ret\r | |
| 74 | \r | |
| 2b47cdc9 AB |
75 | ASM_GLOBAL ASM_PFX(ArmReplaceLiveTranslationEntrySize)\r |
| 76 | \r | |
| d7f03464 AB |
77 | ASM_PFX(ArmReplaceLiveTranslationEntrySize):\r |
| 78 | .long . - ArmReplaceLiveTranslationEntry\r |