ArmPkg: remove unused ArmGicSecLib library implementation

[mirror_edk2.git] / ArmPlatformPkg / ArmVExpressPkg / Library / ArmVExpressSecLibCTA9x4 / CTA9x4Boot.asm

//\r
//  Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r
//\r
//  This program and the accompanying materials\r
//  are licensed and made available under the terms and conditions of the BSD License\r
//  which accompanies this distribution.  The full text of the license may be found at\r
//  http://opensource.org/licenses/bsd-license.php\r
//\r
//  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
//  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
//\r
//\r
\r
#include <Base.h>\r
#include <Library/ArmPlatformLib.h>\r
#include <Drivers/PL35xSmc.h>\r
#include <ArmPlatform.h>\r
#include <AutoGen.h>\r
\r
  INCLUDE AsmMacroIoLib.inc\r
\r
  EXPORT  ArmPlatformSecBootAction\r
  EXPORT  ArmPlatformSecBootMemoryInit\r
  IMPORT  PL35xSmcInitialize\r
\r
  PRESERVE8\r
  AREA    CTA9x4BootMode, CODE, READONLY\r
\r
//\r
// For each Chip Select: ChipSelect / SetCycle / SetOpMode\r
//\r
VersatileExpressSmcConfiguration\r
    // NOR Flash 0\r
    DCD     PL350_SMC_DIRECT_CMD_ADDR_CS(0)\r
    DCD     PL350_SMC_SET_CYCLE_NAND_T_RC(0xA) :OR: PL350_SMC_SET_CYCLE_NAND_T_WC(0x3) :OR: PL350_SMC_SET_CYCLE_NAND_T_REA(0x1) :OR: PL350_SMC_SET_CYCLE_NAND_T_WP(0x7) :OR: PL350_SMC_SET_CYCLE_NAND_T_AR(0x1)\r
    DCD     PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_RD_BURST_LENGTH_CONT :OR: PL350_SMC_SET_OPMODE_SET_WR_BURST_LENGTH_CONT :OR: PL350_SMC_SET_OPMODE_SET_ADV\r
\r
    // NOR Flash 1\r
    DCD     PL350_SMC_DIRECT_CMD_ADDR_CS(4)\r
    DCD     PL350_SMC_SET_CYCLE_NAND_T_RC(0xA) :OR: PL350_SMC_SET_CYCLE_NAND_T_WC(0x3) :OR: PL350_SMC_SET_CYCLE_NAND_T_REA(0x1) :OR: PL350_SMC_SET_CYCLE_NAND_T_WP(0x7) :OR: PL350_SMC_SET_CYCLE_NAND_T_AR(0x1)\r
    DCD     PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_RD_BURST_LENGTH_CONT :OR: PL350_SMC_SET_OPMODE_SET_WR_BURST_LENGTH_CONT :OR: PL350_SMC_SET_OPMODE_SET_ADV\r
\r
    // SRAM\r
    DCD     PL350_SMC_DIRECT_CMD_ADDR_CS(2)\r
    DCD     PL350_SMC_SET_CYCLE_SRAM_T_RC(0x8) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WC(0x5) :OR: PL350_SMC_SET_CYCLE_SRAM_T_CEOE(0x1) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WP(0x6) :OR: PL350_SMC_SET_CYCLE_SRAM_T_PC(0x1) :OR: PL350_SMC_SET_CYCLE_SRAM_T_TR(0x1)\r
    DCD     PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_ADV\r
\r
    // Usb/Eth/VRAM\r
    DCD     PL350_SMC_DIRECT_CMD_ADDR_CS(3)\r
    DCD     PL350_SMC_SET_CYCLE_SRAM_T_RC(0xA) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WC(0xA) :OR: PL350_SMC_SET_CYCLE_SRAM_T_CEOE(0x2) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WP(0x2) :OR: PL350_SMC_SET_CYCLE_SRAM_T_PC(0x3) :OR: PL350_SMC_SET_CYCLE_SRAM_T_TR(0x6)\r
    DCD     PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_RD_SYNC :OR: PL350_SMC_SET_OPMODE_SET_WR_SYNC\r
\r
    // Memory Mapped Peripherals\r
    DCD     PL350_SMC_DIRECT_CMD_ADDR_CS(7)\r
    DCD     PL350_SMC_SET_CYCLE_SRAM_T_RC(0x6) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WC(0x5) :OR: PL350_SMC_SET_CYCLE_SRAM_T_CEOE(0x1) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WP(0x2) :OR: PL350_SMC_SET_CYCLE_SRAM_T_PC(0x1) :OR: PL350_SMC_SET_CYCLE_SRAM_T_TR(0x1)\r
    DCD     PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_RD_SYNC :OR: PL350_SMC_SET_OPMODE_SET_WR_SYNC\r
\r
    // VRAM\r
    DCD     PL350_SMC_DIRECT_CMD_ADDR_CS(1)\r
    DCD     0x00049249\r
    DCD     PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_RD_SYNC :OR: PL350_SMC_SET_OPMODE_SET_WR_SYNC\r
VersatileExpressSmcConfigurationEnd\r
\r
/**\r
  Call at the beginning of the platform boot up\r
\r
  This function allows the firmware platform to do extra actions at the early\r
  stage of the platform power up.\r
\r
  Note: This function must be implemented in assembler as there is no stack set up yet\r
\r
**/\r
ArmPlatformSecBootAction\r
  bx  lr\r
\r
/**\r
  Initialize the memory where the initial stacks will reside\r
\r
  This memory can contain the initial stacks (Secure and Secure Monitor stacks).\r
  In some platform, this region is already initialized and the implementation of this function can\r
  do nothing. This memory can also represent the Secure RAM.\r
  This function is called before the satck has been set up. Its implementation must ensure the stack\r
  pointer is not used (probably required to use assembly language)\r
\r
**/\r
ArmPlatformSecBootMemoryInit\r
  mov   r5, lr\r
\r
  //\r
  // Initialize PL354 SMC\r
  //\r
  mov32 r1, ARM_VE_SMC_CTRL_BASE\r
  ldr   r2, =VersatileExpressSmcConfiguration\r
  ldr   r3, =VersatileExpressSmcConfigurationEnd\r
  blx   PL35xSmcInitialize\r
\r
  //\r
  // Page mode setup for VRAM\r
  //\r
  mov32 r2, VRAM_MOTHERBOARD_BASE\r
\r
  // Read current state\r
  ldr     r0, [r2, #0]\r
  ldr     r0, [r2, #0]\r
  ldr     r0, = 0x00000000\r
  str     r0, [r2, #0]\r
  ldr     r0, [r2, #0]\r
\r
  // Enable page mode\r
  ldr     r0, [r2, #0]\r
  ldr     r0, [r2, #0]\r
  ldr     r0, = 0x00000000\r
  str     r0, [r2, #0]\r
  ldr     r0, = 0x00900090\r
  str     r0, [r2, #0]\r
\r
  // Confirm page mode enabled\r
  ldr     r0, [r2, #0]\r
  ldr     r0, [r2, #0]\r
  ldr     r0, = 0x00000000\r
  str     r0, [r2, #0]\r
  ldr     r0, [r2, #0]\r
\r
  bx    r5\r
\r
  END\r