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ArmPlatformPkg: Tidy PL011 UART driver
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1e57a462 1/** @file\r
2 Serial I/O Port library functions with no library constructor/destructor\r
3\r
4 Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>\r
9f08a052 5 Copyright (c) 2012 - 2016, ARM Ltd. All rights reserved.<BR>\r
921e987b 6 Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>\r
3402aac7 7\r
1e57a462 8 This program and the accompanying materials\r
9 are licensed and made available under the terms and conditions of the BSD License\r
10 which accompanies this distribution. The full text of the license may be found at\r
11 http://opensource.org/licenses/bsd-license.php\r
12\r
13 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
14 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
15\r
16**/\r
17\r
18#include <Base.h>\r
19\r
20#include <Library/IoLib.h>\r
21#include <Library/PcdLib.h>\r
22#include <Library/SerialPortLib.h>\r
1e57a462 23\r
24#include <Drivers/PL011Uart.h>\r
25\r
26\r
27/**\r
28\r
29 Programmed hardware of Serial port.\r
30\r
31 @return Always return RETURN_UNSUPPORTED.\r
32\r
33**/\r
34RETURN_STATUS\r
35EFIAPI\r
36SerialPortInitialize (\r
37 VOID\r
38 )\r
39{\r
15e277d5 40 UINT64 BaudRate;\r
41 UINT32 ReceiveFifoDepth;\r
42 EFI_PARITY_TYPE Parity;\r
43 UINT8 DataBits;\r
44 EFI_STOP_BITS_TYPE StopBits;\r
45\r
46 BaudRate = (UINTN)PcdGet64 (PcdUartDefaultBaudRate);\r
9f08a052 47 ReceiveFifoDepth = 0; // Use default FIFO depth\r
15e277d5 48 Parity = (EFI_PARITY_TYPE)PcdGet8 (PcdUartDefaultParity);\r
49 DataBits = PcdGet8 (PcdUartDefaultDataBits);\r
50 StopBits = (EFI_STOP_BITS_TYPE) PcdGet8 (PcdUartDefaultStopBits);\r
51\r
1e57a462 52 return PL011UartInitializePort (\r
53 (UINTN)PcdGet64 (PcdSerialRegisterBase),\r
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54 &BaudRate,\r
55 &ReceiveFifoDepth,\r
56 &Parity,\r
57 &DataBits,\r
58 &StopBits\r
59 );\r
1e57a462 60}\r
61\r
62/**\r
63 Write data to serial device.\r
64\r
65 @param Buffer Point of data buffer which need to be written.\r
66 @param NumberOfBytes Number of output bytes which are cached in Buffer.\r
67\r
68 @retval 0 Write data failed.\r
69 @retval !0 Actual number of bytes written to serial device.\r
70\r
71**/\r
72UINTN\r
73EFIAPI\r
74SerialPortWrite (\r
75 IN UINT8 *Buffer,\r
76 IN UINTN NumberOfBytes\r
77 )\r
78{\r
79 return PL011UartWrite ((UINTN)PcdGet64 (PcdSerialRegisterBase), Buffer, NumberOfBytes);\r
80}\r
81\r
82/**\r
83 Read data from serial device and save the data in buffer.\r
84\r
85 @param Buffer Point of data buffer which need to be written.\r
86 @param NumberOfBytes Number of output bytes which are cached in Buffer.\r
87\r
88 @retval 0 Read data failed.\r
89 @retval !0 Actual number of bytes read from serial device.\r
90\r
91**/\r
92UINTN\r
93EFIAPI\r
94SerialPortRead (\r
95 OUT UINT8 *Buffer,\r
96 IN UINTN NumberOfBytes\r
97)\r
98{\r
99 return PL011UartRead ((UINTN)PcdGet64 (PcdSerialRegisterBase), Buffer, NumberOfBytes);\r
100}\r
101\r
102/**\r
103 Check to see if any data is available to be read from the debug device.\r
104\r
105 @retval EFI_SUCCESS At least one byte of data is available to be read\r
106 @retval EFI_NOT_READY No data is available to be read\r
107 @retval EFI_DEVICE_ERROR The serial device is not functioning properly\r
108\r
109**/\r
110BOOLEAN\r
111EFIAPI\r
112SerialPortPoll (\r
113 VOID\r
114 )\r
115{\r
116 return PL011UartPoll ((UINTN)PcdGet64 (PcdSerialRegisterBase));\r
117}\r
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118/**\r
119 Set new attributes to PL011.\r
120\r
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121 @param BaudRate The baud rate of the serial device. If the\r
122 baud rate is not supported, the speed will\r
123 be reduced down to the nearest supported one\r
124 and the variable's value will be updated\r
125 accordingly.\r
126 @param ReceiveFifoDepth The number of characters the device will\r
127 buffer on input. If the specified value is\r
128 not supported, the variable's value will\r
129 be reduced down to the nearest supported one.\r
130 @param Timeout If applicable, the number of microseconds the\r
131 device will wait before timing out a Read or\r
132 a Write operation.\r
133 @param Parity If applicable, this is the EFI_PARITY_TYPE\r
134 that is computed or checked as each character\r
135 is transmitted or received. If the device\r
136 does not support parity, the value is the\r
137 default parity value.\r
921e987b 138 @param DataBits The number of data bits in each character\r
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139 @param StopBits If applicable, the EFI_STOP_BITS_TYPE number\r
140 of stop bits per character. If the device\r
141 does not support stop bits, the value is the\r
142 default stop bit value.\r
921e987b 143\r
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144 @retval EFI_SUCCESS All attributes were set correctly.\r
145 @retval EFI_INVALID_PARAMETERS One or more attributes has an unsupported\r
146 value.\r
921e987b
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147\r
148**/\r
149RETURN_STATUS\r
150EFIAPI\r
151SerialPortSetAttributes (\r
152 IN OUT UINT64 *BaudRate,\r
153 IN OUT UINT32 *ReceiveFifoDepth,\r
154 IN OUT UINT32 *Timeout,\r
155 IN OUT EFI_PARITY_TYPE *Parity,\r
156 IN OUT UINT8 *DataBits,\r
157 IN OUT EFI_STOP_BITS_TYPE *StopBits\r
158 )\r
159{\r
160 return PL011UartInitializePort (\r
9f08a052
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161 (UINTN)PcdGet64 (PcdSerialRegisterBase),\r
162 BaudRate,\r
163 ReceiveFifoDepth,\r
164 Parity,\r
165 DataBits,\r
166 StopBits\r
167 );\r
921e987b
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168}\r
169\r
170/**\r
171\r
172 Assert or deassert the control signals on a serial port.\r
173 The following control signals are set according their bit settings :\r
174 . Request to Send\r
175 . Data Terminal Ready\r
176\r
177 @param[in] Control The following bits are taken into account :\r
178 . EFI_SERIAL_REQUEST_TO_SEND : assert/deassert the\r
179 "Request To Send" control signal if this bit is\r
180 equal to one/zero.\r
181 . EFI_SERIAL_DATA_TERMINAL_READY : assert/deassert\r
182 the "Data Terminal Ready" control signal if this\r
183 bit is equal to one/zero.\r
184 . EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE : enable/disable\r
185 the hardware loopback if this bit is equal to\r
186 one/zero.\r
187 . EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE : not supported.\r
188 . EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE : enable/\r
189 disable the hardware flow control based on CTS (Clear\r
190 To Send) and RTS (Ready To Send) control signals.\r
191\r
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192 @retval RETURN_SUCCESS The new control bits were set on the device.\r
193 @retval RETURN_UNSUPPORTED The device does not support this operation.\r
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194\r
195**/\r
196RETURN_STATUS\r
197EFIAPI\r
198SerialPortSetControl (\r
199 IN UINT32 Control\r
200 )\r
201{\r
202 return PL011UartSetControl ((UINTN)PcdGet64 (PcdSerialRegisterBase), Control);\r
203}\r
204\r
205/**\r
1e57a462 206\r
921e987b
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207 Retrieve the status of the control bits on a serial device.\r
208\r
209 @param[out] Control Status of the control bits on a serial device :\r
210\r
9f08a052
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211 . EFI_SERIAL_DATA_CLEAR_TO_SEND,\r
212 EFI_SERIAL_DATA_SET_READY,\r
213 EFI_SERIAL_RING_INDICATE,\r
214 EFI_SERIAL_CARRIER_DETECT,\r
215 EFI_SERIAL_REQUEST_TO_SEND,\r
216 EFI_SERIAL_DATA_TERMINAL_READY\r
217 are all related to the DTE (Data Terminal Equipment)\r
218 and DCE (Data Communication Equipment) modes of\r
219 operation of the serial device.\r
220 . EFI_SERIAL_INPUT_BUFFER_EMPTY : equal to one if the\r
221 receive buffer is empty, 0 otherwise.\r
222 . EFI_SERIAL_OUTPUT_BUFFER_EMPTY : equal to one if the\r
223 transmit buffer is empty, 0 otherwise.\r
224 . EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE : equal to one if\r
225 the hardware loopback is enabled (the output feeds\r
226 the receive buffer), 0 otherwise.\r
227 . EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE : equal to one\r
228 if a loopback is accomplished by software, else 0.\r
229 . EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE : equal to\r
230 one if the hardware flow control based on CTS (Clear\r
231 To Send) and RTS (Ready To Send) control signals is\r
232 enabled, 0 otherwise.\r
233\r
234 @retval RETURN_SUCCESS The control bits were read from the device.\r
921e987b
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235\r
236**/\r
237RETURN_STATUS\r
238EFIAPI\r
239SerialPortGetControl (\r
240 OUT UINT32 *Control\r
241 )\r
242{\r
243 return PL011UartGetControl ((UINTN)PcdGet64 (PcdSerialRegisterBase), Control);\r
244}\r