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1 | //\r |
| 2 | // Copyright (c) 2011, ARM Limited. All rights reserved.\r |
| 3 | // \r |
| 4 | // This program and the accompanying materials \r |
| 5 | // are licensed and made available under the terms and conditions of the BSD License \r |
| 6 | // which accompanies this distribution. The full text of the license may be found at \r |
| 7 | // http://opensource.org/licenses/bsd-license.php \r |
| 8 | //\r |
| 9 | // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r |
| 10 | // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r |
| 11 | //\r |
| 12 | //\r |
| 13 | \r |
| 14 | #include <AsmMacroIoLib.h>\r |
| 15 | #include <Base.h>\r |
| 16 | #include <Library/PcdLib.h>\r |
| 17 | #include <AutoGen.h>\r |
| 18 | \r |
| 19 | .text\r |
| 20 | .align 3\r |
| 21 | \r |
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22 | GCC_ASM_IMPORT(CEntryPoint)\r |
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23 | GCC_ASM_IMPORT(ArmReadMpidr)\r |
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24 | GCC_ASM_EXPORT(_ModuleEntryPoint)\r |
| 25 | \r |
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26 | StartupAddr: .word CEntryPoint\r |
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27 | \r |
| 28 | ASM_PFX(_ModuleEntryPoint):\r |
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29 | // Identify CPU ID\r |
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30 | bl ASM_PFX(ArmReadMpidr)\r |
| 31 | // Get ID of this CPU in Multicore system\r |
| 32 | LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCoreMask), r1)\r |
| 33 | and r0, r0, r1\r |
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34 | \r |
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35 | // Calculate the top of the primary stack\r |
| 36 | LoadConstantToReg (FixedPcdGet32(PcdCPUCoresStackBase), r1)\r |
| 37 | LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)\r |
| 38 | add r2, r2, r1\r |
| 39 | \r |
| 40 | // Is it the Primary Core ?\r |
| 41 | LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r1)\r |
| 42 | cmp r0, r1\r |
| 43 | beq _SetupPrimaryCoreStack\r |
| 44 | \r |
| 45 | _SetupSecondaryCoreStack:\r |
| 46 | // r2 = Top of the primary stack = Base of the Secondary Stacks\r |
| 47 | \r |
| 48 | // Get the position of the cores (ClusterId * 4) + CoreId\r |
| 49 | GetCorePositionInStack(r3, r0, r1)\r |
| 50 | // The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack\r |
| 51 | add r3, r3, #1\r |
| 52 | \r |
| 53 | LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r1)\r |
| 54 | // StackOffset = CorePos * StackSize\r |
| 55 | mul r3, r3, r1\r |
| 56 | // SP = StackBase + StackOffset\r |
| 57 | add sp, r2, r3\r |
| 58 | \r |
| 59 | b _PrepareArguments\r |
| 60 | \r |
| 61 | _SetupPrimaryCoreStack:\r |
| 62 | // r2 = Top of the primary stack\r |
| 63 | LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r3)\r |
| 64 | \r |
| 65 | // The reserved space for global variable must be 8-bytes aligned for pushing\r |
| 66 | // 64-bit variable on the stack\r |
| 67 | SetPrimaryStack (r2, r3, r1)\r |
| 68 | \r |
| 69 | // Set all the PEI global variables to 0\r |
| 70 | mov r3, sp\r |
| 71 | mov r1, #0x0\r |
| 72 | _InitGlobals:\r |
| 73 | str r1, [r3], #4\r |
| 74 | cmp r3, r2\r |
| 75 | blt _InitGlobals\r |
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76 | \r |
| 77 | _PrepareArguments:\r |
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78 | // The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector\r |
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79 | LoadConstantToReg (FixedPcdGet32(PcdNormalFvBaseAddress), r2)\r |
| 80 | add r2, r2, #4\r |
| 81 | ldr r1, [r2]\r |
| 82 | \r |
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83 | // move sec startup address into a data register\r |
| 84 | // ensure we're jumping to FV version of the code (not boot remapped alias)\r |
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85 | ldr r2, StartupAddr\r |
| 86 | \r |
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87 | // jump to PrePeiCore C code\r |
| 88 | // r0 = mp_id\r |
| 89 | // r1 = pei_core_address\r |
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90 | blx r2\r |
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91 | \r |
| 92 | _NeverReturn:\r |
| 93 | b _NeverReturn\r |
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