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ArmPlatformPkg: Introduce Primary core macros
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1d5d0ae9 1//\r
2// Copyright (c) 2011, ARM Limited. All rights reserved.\r
3// \r
4// This program and the accompanying materials \r
5// are licensed and made available under the terms and conditions of the BSD License \r
6// which accompanies this distribution. The full text of the license may be found at \r
7// http://opensource.org/licenses/bsd-license.php \r
8//\r
9// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
10// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
11//\r
12//\r
13\r
14#include <AsmMacroIoLib.h>\r
15#include <Base.h>\r
16#include <Library/PcdLib.h>\r
17#include <AutoGen.h>\r
18\r
19 INCLUDE AsmMacroIoLib.inc\r
20 \r
21 IMPORT CEntryPoint\r
0787bc61 22 IMPORT ArmReadMpidr\r
1d5d0ae9 23 EXPORT _ModuleEntryPoint\r
24 \r
25 PRESERVE8\r
26 AREA PrePeiCoreEntryPoint, CODE, READONLY\r
27 \r
28StartupAddr DCD CEntryPoint\r
29\r
1d5d0ae9 30_ModuleEntryPoint\r
31 // Identify CPU ID\r
0787bc61 32 bl ArmReadMpidr\r
33 // Get ID of this CPU in Multicore system\r
34 LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCoreMask), r1)\r
35 and r0, r0, r1\r
1d5d0ae9 36\r
37_SetupStack\r
38 // Setup Stack for the 4 CPU cores\r
47a8e12f 39 LoadConstantToReg (FixedPcdGet32(PcdCPUCoresNonSecStackBase), r1)\r
40 LoadConstantToReg (FixedPcdGet32(PcdCPUCoresNonSecStackSize), r2)\r
1d5d0ae9 41 \r
47a8e12f 42 mov r3, r0 // r3 = core_id\r
43 mul r3, r3, r2 // r3 = core_id * stack_size = offset from the stack base\r
44 add r3, r3, r1 // r3 = stack_base + offset\r
45 add r3, r3, r2, LSR #1 // r3 = stack_offset + (stack_size/2) <-- the top half is for the heap\r
46 mov sp, r3\r
1d5d0ae9 47\r
47a8e12f 48 // Only allocate memory in top of the primary core stack\r
49 cmp r0, #0\r
50 bne _PrepareArguments\r
51\r
52_AllocateGlobalPeiVariables\r
53 // Reserve top of the stack for Global PEI Variables (eg: PeiServicesTablePointer)\r
54 LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r1)\r
55 sub sp, sp, r1\r
56\r
57_PrepareArguments\r
1d5d0ae9 58 // The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector\r
1ad14bc8 59 LoadConstantToReg (FixedPcdGet32(PcdNormalFvBaseAddress), r2)\r
1d5d0ae9 60 add r2, r2, #4\r
61 ldr r1, [r2]\r
62\r
63 // move sec startup address into a data register\r
64 // ensure we're jumping to FV version of the code (not boot remapped alias)\r
65 ldr r2, StartupAddr\r
66\r
262a9b04 67 // jump to PrePeiCore C code\r
0787bc61 68 // r0 = mp_id\r
1d5d0ae9 69 // r1 = pei_core_address\r
70 blx r2\r
71\r
72 END\r