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1d5d0ae9 1//\r
2// Copyright (c) 2011, ARM Limited. All rights reserved.\r
3// \r
4// This program and the accompanying materials \r
5// are licensed and made available under the terms and conditions of the BSD License \r
6// which accompanies this distribution. The full text of the license may be found at \r
7// http://opensource.org/licenses/bsd-license.php \r
8//\r
9// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
10// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
11//\r
12//\r
13\r
14#include <AsmMacroIoLib.h>\r
15#include <Base.h>\r
16#include <Library/PcdLib.h>\r
17#include <AutoGen.h>\r
18\r
19 INCLUDE AsmMacroIoLib.inc\r
20 \r
21 IMPORT CEntryPoint\r
22 EXPORT _ModuleEntryPoint\r
23 \r
24 PRESERVE8\r
25 AREA PrePeiCoreEntryPoint, CODE, READONLY\r
26 \r
27StartupAddr DCD CEntryPoint\r
28\r
29SCC_SYS_SW EQU 0x0004\r
30\r
31_ModuleEntryPoint\r
32 // Identify CPU ID\r
33 mrc p15, 0, r0, c0, c0, 5\r
34 and r0, #0xf\r
35\r
36_SetupStack\r
37 // Setup Stack for the 4 CPU cores\r
38 LoadConstantToReg (FixedPcdGet32(PcdCPUCoresNonSecStackBase) ,r1)\r
39 LoadConstantToReg (FixedPcdGet32(PcdCPUCoresNonSecStackSize) ,r2)\r
40 \r
41 mov r3,r0 // r3 = core_id\r
42 mul r3,r3,r2 // r3 = core_id * stack_size = offset from the stack base\r
43 add r3,r3,r1 // r3 = stack_base + offset\r
44 add r3,r3,r2,LSR #1 // r3 = stack_offset + (stack_size/2) <-- the top half is for the heap\r
45 mov sp, r3\r
46\r
47 // The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector\r
48 LoadConstantToReg (FixedPcdGet32(PcdEmbeddedFdBaseAddress), r2)\r
49 add r2, r2, #4\r
50 ldr r1, [r2]\r
51\r
52 // move sec startup address into a data register\r
53 // ensure we're jumping to FV version of the code (not boot remapped alias)\r
54 ldr r2, StartupAddr\r
55\r
56 // jump to SEC C code\r
57 // r0 = core_id\r
58 // r1 = pei_core_address\r
59 blx r2\r
60\r
61 END\r