projects / mirror_edk2.git / blame
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|---|---|---|
| 42a8f2ce MM |
1 | /** @file\r |
| 2 | Head file for BDS Platform specific code\r | |
| 3 | \r | |
| 4 | Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>\r | |
| 5 | This program and the accompanying materials\r | |
| 6 | are licensed and made available under the terms and conditions of the BSD License\r | |
| 7 | which accompanies this distribution. The full text of the license may be found at\r | |
| 8 | http://opensource.org/licenses/bsd-license.php\r | |
| 9 | \r | |
| 10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
| 11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
| 12 | **/\r | |
| 13 | \r | |
| 14 | #ifndef _PLATFORM_CONSOLE_H\r | |
| 15 | #define _PLATFORM_CONSOLE_H\r | |
| 16 | \r | |
| 17 | #include <PiDxe.h>\r | |
| 18 | #include <IndustryStandard/Pci.h>\r | |
| 19 | #include <Library/DebugLib.h>\r | |
| 20 | #include <Library/BaseMemoryLib.h>\r | |
| 21 | #include <Library/UefiBootServicesTableLib.h>\r | |
| 22 | #include <Library/MemoryAllocationLib.h>\r | |
| 23 | #include <Library/BaseLib.h>\r | |
| 24 | #include <Library/PcdLib.h>\r | |
| 25 | #include <Library/UefiLib.h>\r | |
| 26 | #include <Library/DevicePathLib.h>\r | |
| 27 | #include <Protocol/PciIo.h>\r | |
| 28 | \r | |
| 29 | #define IS_PCI_ISA_PDECODE(_p) IS_CLASS3 (_p, PCI_CLASS_BRIDGE, PCI_CLASS_BRIDGE_ISA_PDECODE, 0)\r | |
| 30 | #define IS_PCI_16550SERIAL(_p) IS_CLASS3 (_p, PCI_CLASS_SCC, PCI_SUBCLASS_SERIAL, PCI_IF_16550)\r | |
| 31 | \r | |
| 32 | //\r | |
| 33 | // Type definitions\r | |
| 34 | //\r | |
| 35 | \r | |
| 36 | //\r | |
| 37 | // Platform Root Bridge\r | |
| 38 | //\r | |
| 39 | typedef struct {\r | |
| 40 | ACPI_HID_DEVICE_PATH PciRootBridge;\r | |
| 41 | EFI_DEVICE_PATH_PROTOCOL End;\r | |
| 42 | } PLATFORM_ROOT_BRIDGE_DEVICE_PATH;\r | |
| 43 | \r | |
| 44 | typedef\r | |
| 45 | EFI_STATUS\r | |
| 46 | (EFIAPI *PROTOCOL_INSTANCE_CALLBACK)(\r | |
| 47 | IN EFI_HANDLE Handle,\r | |
| 48 | IN VOID *Instance,\r | |
| 49 | IN VOID *Context\r | |
| 50 | );\r | |
| 51 | \r | |
| 52 | /**\r | |
| 53 | @param[in] Handle - Handle of PCI device instance\r | |
| 54 | @param[in] PciIo - PCI IO protocol instance\r | |
| 55 | @param[in] Pci - PCI Header register block\r | |
| 56 | **/\r | |
| 57 | typedef\r | |
| 58 | EFI_STATUS\r | |
| 59 | (EFIAPI *VISIT_PCI_INSTANCE_CALLBACK)(\r | |
| 60 | IN EFI_HANDLE Handle,\r | |
| 61 | IN EFI_PCI_IO_PROTOCOL *PciIo,\r | |
| 62 | IN PCI_TYPE00 *Pci\r | |
| 63 | );\r | |
| 64 | \r | |
| 65 | /**\r | |
| 66 | Platform console init. Include the platform firmware vendor, revision\r | |
| 67 | and so crc check.\r | |
| 68 | \r | |
| 69 | **/\r | |
| 70 | VOID\r | |
| 71 | EFIAPI\r | |
| 72 | PlatformConsoleInit (\r | |
| 73 | VOID\r | |
| 74 | );\r | |
| 75 | \r | |
| 76 | #endif\r |