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1 | # WARNING: do not edit!\r |
2 | # Generated from openssl/crypto/x86cpuid.pl\r | |
3 | #\r | |
4 | # Copyright 2004-2020 The OpenSSL Project Authors. All Rights Reserved.\r | |
5 | #\r | |
6 | # Licensed under the OpenSSL license (the "License"). You may not use\r | |
7 | # this file except in compliance with the License. You can obtain a copy\r | |
8 | # in the file LICENSE in the source distribution or at\r | |
9 | # https://www.openssl.org/source/license.html\r | |
10 | \r | |
11 | .text\r | |
12 | .globl OPENSSL_ia32_cpuid\r | |
13 | .type OPENSSL_ia32_cpuid,@function\r | |
14 | .align 16\r | |
15 | OPENSSL_ia32_cpuid:\r | |
16 | .L_OPENSSL_ia32_cpuid_begin:\r | |
17 | pushl %ebp\r | |
18 | pushl %ebx\r | |
19 | pushl %esi\r | |
20 | pushl %edi\r | |
21 | xorl %edx,%edx\r | |
22 | pushfl\r | |
23 | popl %eax\r | |
24 | movl %eax,%ecx\r | |
25 | xorl $2097152,%eax\r | |
26 | pushl %eax\r | |
27 | popfl\r | |
28 | pushfl\r | |
29 | popl %eax\r | |
30 | xorl %eax,%ecx\r | |
31 | xorl %eax,%eax\r | |
32 | movl 20(%esp),%esi\r | |
33 | movl %eax,8(%esi)\r | |
34 | btl $21,%ecx\r | |
35 | jnc .L000nocpuid\r | |
36 | .byte 0x0f,0xa2\r | |
37 | movl %eax,%edi\r | |
38 | xorl %eax,%eax\r | |
39 | cmpl $1970169159,%ebx\r | |
40 | setne %al\r | |
41 | movl %eax,%ebp\r | |
42 | cmpl $1231384169,%edx\r | |
43 | setne %al\r | |
44 | orl %eax,%ebp\r | |
45 | cmpl $1818588270,%ecx\r | |
46 | setne %al\r | |
47 | orl %eax,%ebp\r | |
48 | jz .L001intel\r | |
49 | cmpl $1752462657,%ebx\r | |
50 | setne %al\r | |
51 | movl %eax,%esi\r | |
52 | cmpl $1769238117,%edx\r | |
53 | setne %al\r | |
54 | orl %eax,%esi\r | |
55 | cmpl $1145913699,%ecx\r | |
56 | setne %al\r | |
57 | orl %eax,%esi\r | |
58 | jnz .L001intel\r | |
59 | movl $2147483648,%eax\r | |
60 | .byte 0x0f,0xa2\r | |
61 | cmpl $2147483649,%eax\r | |
62 | jb .L001intel\r | |
63 | movl %eax,%esi\r | |
64 | movl $2147483649,%eax\r | |
65 | .byte 0x0f,0xa2\r | |
66 | orl %ecx,%ebp\r | |
67 | andl $2049,%ebp\r | |
68 | cmpl $2147483656,%esi\r | |
69 | jb .L001intel\r | |
70 | movl $2147483656,%eax\r | |
71 | .byte 0x0f,0xa2\r | |
72 | movzbl %cl,%esi\r | |
73 | incl %esi\r | |
74 | movl $1,%eax\r | |
75 | xorl %ecx,%ecx\r | |
76 | .byte 0x0f,0xa2\r | |
77 | btl $28,%edx\r | |
78 | jnc .L002generic\r | |
79 | shrl $16,%ebx\r | |
80 | andl $255,%ebx\r | |
81 | cmpl %esi,%ebx\r | |
82 | ja .L002generic\r | |
83 | andl $4026531839,%edx\r | |
84 | jmp .L002generic\r | |
85 | .L001intel:\r | |
86 | cmpl $4,%edi\r | |
87 | movl $-1,%esi\r | |
88 | jb .L003nocacheinfo\r | |
89 | movl $4,%eax\r | |
90 | movl $0,%ecx\r | |
91 | .byte 0x0f,0xa2\r | |
92 | movl %eax,%esi\r | |
93 | shrl $14,%esi\r | |
94 | andl $4095,%esi\r | |
95 | .L003nocacheinfo:\r | |
96 | movl $1,%eax\r | |
97 | xorl %ecx,%ecx\r | |
98 | .byte 0x0f,0xa2\r | |
99 | andl $3220176895,%edx\r | |
100 | cmpl $0,%ebp\r | |
101 | jne .L004notintel\r | |
102 | orl $1073741824,%edx\r | |
103 | andb $15,%ah\r | |
104 | cmpb $15,%ah\r | |
105 | jne .L004notintel\r | |
106 | orl $1048576,%edx\r | |
107 | .L004notintel:\r | |
108 | btl $28,%edx\r | |
109 | jnc .L002generic\r | |
110 | andl $4026531839,%edx\r | |
111 | cmpl $0,%esi\r | |
112 | je .L002generic\r | |
113 | orl $268435456,%edx\r | |
114 | shrl $16,%ebx\r | |
115 | cmpb $1,%bl\r | |
116 | ja .L002generic\r | |
117 | andl $4026531839,%edx\r | |
118 | .L002generic:\r | |
119 | andl $2048,%ebp\r | |
120 | andl $4294965247,%ecx\r | |
121 | movl %edx,%esi\r | |
122 | orl %ecx,%ebp\r | |
123 | cmpl $7,%edi\r | |
124 | movl 20(%esp),%edi\r | |
125 | jb .L005no_extended_info\r | |
126 | movl $7,%eax\r | |
127 | xorl %ecx,%ecx\r | |
128 | .byte 0x0f,0xa2\r | |
129 | movl %ebx,8(%edi)\r | |
130 | .L005no_extended_info:\r | |
131 | btl $27,%ebp\r | |
132 | jnc .L006clear_avx\r | |
133 | xorl %ecx,%ecx\r | |
134 | .byte 15,1,208\r | |
135 | andl $6,%eax\r | |
136 | cmpl $6,%eax\r | |
137 | je .L007done\r | |
138 | cmpl $2,%eax\r | |
139 | je .L006clear_avx\r | |
140 | .L008clear_xmm:\r | |
141 | andl $4261412861,%ebp\r | |
142 | andl $4278190079,%esi\r | |
143 | .L006clear_avx:\r | |
144 | andl $4026525695,%ebp\r | |
145 | andl $4294967263,8(%edi)\r | |
146 | .L007done:\r | |
147 | movl %esi,%eax\r | |
148 | movl %ebp,%edx\r | |
149 | .L000nocpuid:\r | |
150 | popl %edi\r | |
151 | popl %esi\r | |
152 | popl %ebx\r | |
153 | popl %ebp\r | |
154 | ret\r | |
155 | .size OPENSSL_ia32_cpuid,.-.L_OPENSSL_ia32_cpuid_begin\r | |
156 | .globl OPENSSL_rdtsc\r | |
157 | .type OPENSSL_rdtsc,@function\r | |
158 | .align 16\r | |
159 | OPENSSL_rdtsc:\r | |
160 | .L_OPENSSL_rdtsc_begin:\r | |
161 | xorl %eax,%eax\r | |
162 | xorl %edx,%edx\r | |
163 | leal OPENSSL_ia32cap_P,%ecx\r | |
164 | btl $4,(%ecx)\r | |
165 | jnc .L009notsc\r | |
166 | .byte 0x0f,0x31\r | |
167 | .L009notsc:\r | |
168 | ret\r | |
169 | .size OPENSSL_rdtsc,.-.L_OPENSSL_rdtsc_begin\r | |
170 | .globl OPENSSL_instrument_halt\r | |
171 | .type OPENSSL_instrument_halt,@function\r | |
172 | .align 16\r | |
173 | OPENSSL_instrument_halt:\r | |
174 | .L_OPENSSL_instrument_halt_begin:\r | |
175 | leal OPENSSL_ia32cap_P,%ecx\r | |
176 | btl $4,(%ecx)\r | |
177 | jnc .L010nohalt\r | |
178 | .long 2421723150\r | |
179 | andl $3,%eax\r | |
180 | jnz .L010nohalt\r | |
181 | pushfl\r | |
182 | popl %eax\r | |
183 | btl $9,%eax\r | |
184 | jnc .L010nohalt\r | |
185 | .byte 0x0f,0x31\r | |
186 | pushl %edx\r | |
187 | pushl %eax\r | |
188 | hlt\r | |
189 | .byte 0x0f,0x31\r | |
190 | subl (%esp),%eax\r | |
191 | sbbl 4(%esp),%edx\r | |
192 | addl $8,%esp\r | |
193 | ret\r | |
194 | .L010nohalt:\r | |
195 | xorl %eax,%eax\r | |
196 | xorl %edx,%edx\r | |
197 | ret\r | |
198 | .size OPENSSL_instrument_halt,.-.L_OPENSSL_instrument_halt_begin\r | |
199 | .globl OPENSSL_far_spin\r | |
200 | .type OPENSSL_far_spin,@function\r | |
201 | .align 16\r | |
202 | OPENSSL_far_spin:\r | |
203 | .L_OPENSSL_far_spin_begin:\r | |
204 | pushfl\r | |
205 | popl %eax\r | |
206 | btl $9,%eax\r | |
207 | jnc .L011nospin\r | |
208 | movl 4(%esp),%eax\r | |
209 | movl 8(%esp),%ecx\r | |
210 | .long 2430111262\r | |
211 | xorl %eax,%eax\r | |
212 | movl (%ecx),%edx\r | |
213 | jmp .L012spin\r | |
214 | .align 16\r | |
215 | .L012spin:\r | |
216 | incl %eax\r | |
217 | cmpl (%ecx),%edx\r | |
218 | je .L012spin\r | |
219 | .long 529567888\r | |
220 | ret\r | |
221 | .L011nospin:\r | |
222 | xorl %eax,%eax\r | |
223 | xorl %edx,%edx\r | |
224 | ret\r | |
225 | .size OPENSSL_far_spin,.-.L_OPENSSL_far_spin_begin\r | |
226 | .globl OPENSSL_wipe_cpu\r | |
227 | .type OPENSSL_wipe_cpu,@function\r | |
228 | .align 16\r | |
229 | OPENSSL_wipe_cpu:\r | |
230 | .L_OPENSSL_wipe_cpu_begin:\r | |
231 | xorl %eax,%eax\r | |
232 | xorl %edx,%edx\r | |
233 | leal OPENSSL_ia32cap_P,%ecx\r | |
234 | movl (%ecx),%ecx\r | |
235 | btl $1,(%ecx)\r | |
236 | jnc .L013no_x87\r | |
237 | .long 4007259865,4007259865,4007259865,4007259865,2430851995\r | |
238 | .L013no_x87:\r | |
239 | leal 4(%esp),%eax\r | |
240 | ret\r | |
241 | .size OPENSSL_wipe_cpu,.-.L_OPENSSL_wipe_cpu_begin\r | |
242 | .globl OPENSSL_atomic_add\r | |
243 | .type OPENSSL_atomic_add,@function\r | |
244 | .align 16\r | |
245 | OPENSSL_atomic_add:\r | |
246 | .L_OPENSSL_atomic_add_begin:\r | |
247 | movl 4(%esp),%edx\r | |
248 | movl 8(%esp),%ecx\r | |
249 | pushl %ebx\r | |
250 | nop\r | |
251 | movl (%edx),%eax\r | |
252 | .L014spin:\r | |
253 | leal (%eax,%ecx,1),%ebx\r | |
254 | nop\r | |
255 | .long 447811568\r | |
256 | jne .L014spin\r | |
257 | movl %ebx,%eax\r | |
258 | popl %ebx\r | |
259 | ret\r | |
260 | .size OPENSSL_atomic_add,.-.L_OPENSSL_atomic_add_begin\r | |
261 | .globl OPENSSL_cleanse\r | |
262 | .type OPENSSL_cleanse,@function\r | |
263 | .align 16\r | |
264 | OPENSSL_cleanse:\r | |
265 | .L_OPENSSL_cleanse_begin:\r | |
266 | movl 4(%esp),%edx\r | |
267 | movl 8(%esp),%ecx\r | |
268 | xorl %eax,%eax\r | |
269 | cmpl $7,%ecx\r | |
270 | jae .L015lot\r | |
271 | cmpl $0,%ecx\r | |
272 | je .L016ret\r | |
273 | .L017little:\r | |
274 | movb %al,(%edx)\r | |
275 | subl $1,%ecx\r | |
276 | leal 1(%edx),%edx\r | |
277 | jnz .L017little\r | |
278 | .L016ret:\r | |
279 | ret\r | |
280 | .align 16\r | |
281 | .L015lot:\r | |
282 | testl $3,%edx\r | |
283 | jz .L018aligned\r | |
284 | movb %al,(%edx)\r | |
285 | leal -1(%ecx),%ecx\r | |
286 | leal 1(%edx),%edx\r | |
287 | jmp .L015lot\r | |
288 | .L018aligned:\r | |
289 | movl %eax,(%edx)\r | |
290 | leal -4(%ecx),%ecx\r | |
291 | testl $-4,%ecx\r | |
292 | leal 4(%edx),%edx\r | |
293 | jnz .L018aligned\r | |
294 | cmpl $0,%ecx\r | |
295 | jne .L017little\r | |
296 | ret\r | |
297 | .size OPENSSL_cleanse,.-.L_OPENSSL_cleanse_begin\r | |
298 | .globl CRYPTO_memcmp\r | |
299 | .type CRYPTO_memcmp,@function\r | |
300 | .align 16\r | |
301 | CRYPTO_memcmp:\r | |
302 | .L_CRYPTO_memcmp_begin:\r | |
303 | pushl %esi\r | |
304 | pushl %edi\r | |
305 | movl 12(%esp),%esi\r | |
306 | movl 16(%esp),%edi\r | |
307 | movl 20(%esp),%ecx\r | |
308 | xorl %eax,%eax\r | |
309 | xorl %edx,%edx\r | |
310 | cmpl $0,%ecx\r | |
311 | je .L019no_data\r | |
312 | .L020loop:\r | |
313 | movb (%esi),%dl\r | |
314 | leal 1(%esi),%esi\r | |
315 | xorb (%edi),%dl\r | |
316 | leal 1(%edi),%edi\r | |
317 | orb %dl,%al\r | |
318 | decl %ecx\r | |
319 | jnz .L020loop\r | |
320 | negl %eax\r | |
321 | shrl $31,%eax\r | |
322 | .L019no_data:\r | |
323 | popl %edi\r | |
324 | popl %esi\r | |
325 | ret\r | |
326 | .size CRYPTO_memcmp,.-.L_CRYPTO_memcmp_begin\r | |
327 | .globl OPENSSL_instrument_bus\r | |
328 | .type OPENSSL_instrument_bus,@function\r | |
329 | .align 16\r | |
330 | OPENSSL_instrument_bus:\r | |
331 | .L_OPENSSL_instrument_bus_begin:\r | |
332 | pushl %ebp\r | |
333 | pushl %ebx\r | |
334 | pushl %esi\r | |
335 | pushl %edi\r | |
336 | movl $0,%eax\r | |
337 | popl %edi\r | |
338 | popl %esi\r | |
339 | popl %ebx\r | |
340 | popl %ebp\r | |
341 | ret\r | |
342 | .size OPENSSL_instrument_bus,.-.L_OPENSSL_instrument_bus_begin\r | |
343 | .globl OPENSSL_instrument_bus2\r | |
344 | .type OPENSSL_instrument_bus2,@function\r | |
345 | .align 16\r | |
346 | OPENSSL_instrument_bus2:\r | |
347 | .L_OPENSSL_instrument_bus2_begin:\r | |
348 | pushl %ebp\r | |
349 | pushl %ebx\r | |
350 | pushl %esi\r | |
351 | pushl %edi\r | |
352 | movl $0,%eax\r | |
353 | popl %edi\r | |
354 | popl %esi\r | |
355 | popl %ebx\r | |
356 | popl %ebp\r | |
357 | ret\r | |
358 | .size OPENSSL_instrument_bus2,.-.L_OPENSSL_instrument_bus2_begin\r | |
359 | .globl OPENSSL_ia32_rdrand_bytes\r | |
360 | .type OPENSSL_ia32_rdrand_bytes,@function\r | |
361 | .align 16\r | |
362 | OPENSSL_ia32_rdrand_bytes:\r | |
363 | .L_OPENSSL_ia32_rdrand_bytes_begin:\r | |
364 | pushl %edi\r | |
365 | pushl %ebx\r | |
366 | xorl %eax,%eax\r | |
367 | movl 12(%esp),%edi\r | |
368 | movl 16(%esp),%ebx\r | |
369 | cmpl $0,%ebx\r | |
370 | je .L021done\r | |
371 | movl $8,%ecx\r | |
372 | .L022loop:\r | |
373 | .byte 15,199,242\r | |
374 | jc .L023break\r | |
375 | loop .L022loop\r | |
376 | jmp .L021done\r | |
377 | .align 16\r | |
378 | .L023break:\r | |
379 | cmpl $4,%ebx\r | |
380 | jb .L024tail\r | |
381 | movl %edx,(%edi)\r | |
382 | leal 4(%edi),%edi\r | |
383 | addl $4,%eax\r | |
384 | subl $4,%ebx\r | |
385 | jz .L021done\r | |
386 | movl $8,%ecx\r | |
387 | jmp .L022loop\r | |
388 | .align 16\r | |
389 | .L024tail:\r | |
390 | movb %dl,(%edi)\r | |
391 | leal 1(%edi),%edi\r | |
392 | incl %eax\r | |
393 | shrl $8,%edx\r | |
394 | decl %ebx\r | |
395 | jnz .L024tail\r | |
396 | .L021done:\r | |
397 | xorl %edx,%edx\r | |
398 | popl %ebx\r | |
399 | popl %edi\r | |
400 | ret\r | |
401 | .size OPENSSL_ia32_rdrand_bytes,.-.L_OPENSSL_ia32_rdrand_bytes_begin\r | |
402 | .globl OPENSSL_ia32_rdseed_bytes\r | |
403 | .type OPENSSL_ia32_rdseed_bytes,@function\r | |
404 | .align 16\r | |
405 | OPENSSL_ia32_rdseed_bytes:\r | |
406 | .L_OPENSSL_ia32_rdseed_bytes_begin:\r | |
407 | pushl %edi\r | |
408 | pushl %ebx\r | |
409 | xorl %eax,%eax\r | |
410 | movl 12(%esp),%edi\r | |
411 | movl 16(%esp),%ebx\r | |
412 | cmpl $0,%ebx\r | |
413 | je .L025done\r | |
414 | movl $8,%ecx\r | |
415 | .L026loop:\r | |
416 | .byte 15,199,250\r | |
417 | jc .L027break\r | |
418 | loop .L026loop\r | |
419 | jmp .L025done\r | |
420 | .align 16\r | |
421 | .L027break:\r | |
422 | cmpl $4,%ebx\r | |
423 | jb .L028tail\r | |
424 | movl %edx,(%edi)\r | |
425 | leal 4(%edi),%edi\r | |
426 | addl $4,%eax\r | |
427 | subl $4,%ebx\r | |
428 | jz .L025done\r | |
429 | movl $8,%ecx\r | |
430 | jmp .L026loop\r | |
431 | .align 16\r | |
432 | .L028tail:\r | |
433 | movb %dl,(%edi)\r | |
434 | leal 1(%edi),%edi\r | |
435 | incl %eax\r | |
436 | shrl $8,%edx\r | |
437 | decl %ebx\r | |
438 | jnz .L028tail\r | |
439 | .L025done:\r | |
440 | xorl %edx,%edx\r | |
441 | popl %ebx\r | |
442 | popl %edi\r | |
443 | ret\r | |
444 | .size OPENSSL_ia32_rdseed_bytes,.-.L_OPENSSL_ia32_rdseed_bytes_begin\r | |
445 | .hidden OPENSSL_cpuid_setup\r | |
446 | .hidden OPENSSL_ia32cap_P\r | |
447 | .comm OPENSSL_ia32cap_P,16,4\r | |
448 | .section .init\r | |
449 | call OPENSSL_cpuid_setup\r |