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1 | #------------------------------------------------------------------------------\r |
| 2 | #*\r |
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3 | #* Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>\r |
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4 | #* This program and the accompanying materials \r |
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5 | #* are licensed and made available under the terms and conditions of the BSD License \r |
| 6 | #* which accompanies this distribution. The full text of the license may be found at \r |
| 7 | #* http://opensource.org/licenses/bsd-license.php \r |
| 8 | #* \r |
| 9 | #* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r |
| 10 | #* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r |
| 11 | #* \r |
| 12 | #* st16_64.asm\r |
| 13 | #* \r |
| 14 | #* Abstract:\r |
| 15 | #*\r |
| 16 | #------------------------------------------------------------------------------\r |
| 17 | \r |
| 18 | \r |
| 19 | .stack: \r |
| 20 | .486p: \r |
| 21 | .code16\r |
| 22 | \r |
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23 | .equ FAT_DIRECTORY_ENTRY_SIZE, 0x020\r |
| 24 | .equ FAT_DIRECTORY_ENTRY_SHIFT, 5\r |
| 25 | .equ BLOCK_SIZE, 0x0200\r |
| 26 | .equ BLOCK_MASK, 0x01ff\r |
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27 | .equ BLOCK_SHIFT, 9\r |
| 28 | \r |
| 29 | .org 0x0\r |
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30 | \r |
| 31 | .global _start\r |
| 32 | _start:\r |
| 33 | \r |
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34 | Ia32Jump: \r |
| 35 | jmp BootSectorEntryPoint # JMP inst - 3 bytes\r |
| 36 | nop\r |
| 37 | \r |
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38 | OemId: .ascii "INTEL " # OemId - 8 bytes\r |
| 39 | \r |
| 40 | SectorSize: .word 0 # Sector Size - 16 bits\r |
| 41 | SectorsPerCluster: .byte 0 # Sector Per Cluster - 8 bits\r |
| 42 | ReservedSectors: .word 0 # Reserved Sectors - 16 bits\r |
| 43 | NoFats: .byte 0 # Number of FATs - 8 bits\r |
| 44 | RootEntries: .word 0 # Root Entries - 16 bits\r |
| 45 | Sectors: .word 0 # Number of Sectors - 16 bits\r |
| 46 | Media: .byte 0 # Media - 8 bits - ignored\r |
| 47 | SectorsPerFat: .word 0 # Sectors Per FAT - 16 bits\r |
| 48 | SectorsPerTrack: .word 0 # Sectors Per Track - 16 bits - ignored\r |
| 49 | Heads: .word 0 # Heads - 16 bits - ignored\r |
| 50 | HiddenSectors: .long 0 # Hidden Sectors - 32 bits - ignored\r |
| 51 | LargeSectors: .long 0 # Large Sectors - 32 bits \r |
| 52 | PhysicalDrive: .byte 0 # PhysicalDriveNumber - 8 bits - ignored\r |
| 53 | CurrentHead: .byte 0 # Current Head - 8 bits\r |
| 54 | Signature: .byte 0 # Signature - 8 bits - ignored\r |
| 55 | VolId: .ascii " " # Volume Serial Number- 4 bytes\r |
| 56 | FatLabel: .ascii " " # Label - 11 bytes\r |
| 57 | SystemId: .ascii "FAT16 " # SystemId - 8 bytes\r |
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58 | \r |
| 59 | BootSectorEntryPoint: \r |
| 60 | # ASSUME ds:@code\r |
| 61 | # ASSUME ss:@code\r |
| 62 | # ds = 1000, es = 2000 + x (size of first cluster >> 4)\r |
| 63 | # cx = Start Cluster of EfiLdr\r |
| 64 | # dx = Start Cluster of Efivar.bin\r |
| 65 | \r |
| 66 | # Re use the BPB data stored in Boot Sector\r |
| 67 | movw $0x7c00,%bp\r |
| 68 | \r |
| 69 | pushw %cx\r |
| 70 | # Read Efivar.bin\r |
| 71 | # 1000:dx = DirectoryEntry of Efivar.bin -> BS.com has filled already\r |
| 72 | movw $0x1900,%ax\r |
| 73 | movw %ax,%es\r |
| 74 | testw %dx,%dx\r |
| 75 | jnz CheckVarStoreSize\r |
| 76 | \r |
| 77 | movb $1,%al\r |
| 78 | NoVarStore: \r |
| 79 | pushw %es\r |
| 80 | # Set the 5th byte start @ 0:19000 to non-zero indicating we should init var store header in DxeIpl\r |
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81 | movb %al, %es:(4)\r |
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82 | jmp SaveVolumeId\r |
| 83 | \r |
| 84 | CheckVarStoreSize: \r |
| 85 | movw %dx,%di\r |
| 86 | cmpl $0x4000, %ds:2(%di)\r |
| 87 | movb $2,%al\r |
| 88 | jne NoVarStore\r |
| 89 | \r |
| 90 | LoadVarStore: \r |
| 91 | movb $0,%al\r |
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92 | movb %al, %es:(4)\r |
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93 | movw (%di), %cx\r |
| 94 | # ES:DI = 1500:0\r |
| 95 | xorw %di,%di\r |
| 96 | pushw %es\r |
| 97 | movw $0x1500,%ax\r |
| 98 | movw %ax,%es\r |
| 99 | call ReadFile\r |
| 100 | SaveVolumeId: \r |
| 101 | popw %es\r |
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102 | movw VolId(%bp), %ax\r |
| 103 | movw %ax, %es:(0) # Save Volume Id to 0:19000. we will find the correct volume according to this VolumeId\r |
| 104 | movw VolId+2(%bp), %ax\r |
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105 | movw %ax, %es:(2)\r |
| 106 | \r |
| 107 | # Read Efildr\r |
| 108 | popw %cx\r |
| 109 | # cx = Start Cluster of Efildr -> BS.com has filled already\r |
| 110 | # ES:DI = 2000:0, first cluster will be read again\r |
| 111 | xorw %di,%di # di = 0\r |
| 112 | movw $0x2000,%ax\r |
| 113 | movw %ax,%es\r |
| 114 | call ReadFile\r |
| 115 | movw %cs,%ax\r |
| 116 | movw %ax, %cs:JumpSegment\r |
| 117 | \r |
| 118 | CheckEm64T: \r |
| 119 | movl $0x80000001,%eax\r |
| 120 | # cpuid\r |
| 121 | .word 0xA20F\r |
| 122 | btl $29,%edx\r |
| 123 | jc CheckEm64TPass\r |
| 124 | pushw %cs\r |
| 125 | popw %ds\r |
| 126 | leaw Em64String,%si\r |
| 127 | movw $18,%cx\r |
| 128 | jmp PrintStringAndHalt\r |
| 129 | CheckEm64TPass: \r |
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130 | JumpFarInstruction: \r |
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131 | .byte 0xea\r |
| 69b1c021 |
132 | JumpOffset: \r |
| f3eb2131 |
133 | .word 0x200\r |
| 69b1c021 |
134 | JumpSegment: \r |
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135 | .word 0x2000\r |
| 136 | \r |
| 137 | \r |
| 138 | \r |
| 139 | # ****************************************************************************\r |
| 140 | # ReadFile\r |
| 141 | #\r |
| 142 | # Arguments:\r |
| 143 | # CX = Start Cluster of File\r |
| 144 | # ES:DI = Buffer to store file content read from disk\r |
| 145 | #\r |
| 146 | # Return:\r |
| 147 | # (ES << 4 + DI) = end of file content Buffer\r |
| 148 | #\r |
| 149 | # ****************************************************************************\r |
| 150 | ReadFile: \r |
| 151 | # si = NumberOfClusters\r |
| 152 | # cx = ClusterNumber\r |
| 153 | # dx = CachedFatSectorNumber\r |
| 154 | # ds:0000 = CacheFatSectorBuffer\r |
| 155 | # es:di = Buffer to load file\r |
| 156 | # bx = NextClusterNumber\r |
| 157 | pusha\r |
| 158 | movw $1,%si # NumberOfClusters = 1\r |
| 159 | pushw %cx # Push Start Cluster onto stack\r |
| 160 | movw $0xfff,%dx # CachedFatSectorNumber = 0xfff\r |
| 161 | FatChainLoop: \r |
| 162 | movw %cx,%ax # ax = ClusterNumber \r |
| 163 | andw $0xfff8,%ax # ax = ax & 0xfff8\r |
| 164 | cmpw $0xfff8,%ax # See if this is the last cluster\r |
| 165 | je FoundLastCluster # Jump if last cluster found\r |
| 166 | movw %cx,%ax # ax = ClusterNumber\r |
| 167 | shlw %ax # FatOffset = ClusterNumber * 2\r |
| 168 | pushw %si # Save si\r |
| 169 | movw %ax,%si # si = FatOffset\r |
| 170 | shrw $BLOCK_SHIFT, %ax # ax = FatOffset >> BLOCK_SHIFT\r |
| 171 | addw ReservedSectors(%bp), %ax # ax = FatSectorNumber = ReservedSectors + (FatOffset >> BLOCK_OFFSET)\r |
| 172 | andw $BLOCK_MASK, %si # si = FatOffset & BLOCK_MASK\r |
| 173 | cmpw %dx,%ax # Compare FatSectorNumber to CachedFatSectorNumber\r |
| 174 | je SkipFatRead\r |
| 175 | movw $2,%bx\r |
| 176 | pushw %es\r |
| 177 | pushw %ds\r |
| 178 | popw %es\r |
| 179 | call ReadBlocks # Read 2 blocks starting at AX storing at ES:DI\r |
| 180 | popw %es\r |
| 181 | movw %ax,%dx # CachedFatSectorNumber = FatSectorNumber\r |
| 182 | SkipFatRead: \r |
| 183 | movw (%si), %bx # bx = NextClusterNumber\r |
| 184 | movw %cx,%ax # ax = ClusterNumber\r |
| 185 | popw %si # Restore si\r |
| 186 | decw %bx # bx = NextClusterNumber - 1\r |
| 187 | cmpw %cx,%bx # See if (NextClusterNumber-1)==ClusterNumber\r |
| 188 | jne ReadClusters\r |
| 189 | incw %bx # bx = NextClusterNumber\r |
| 190 | incw %si # NumberOfClusters++\r |
| 191 | movw %bx,%cx # ClusterNumber = NextClusterNumber\r |
| 192 | jmp FatChainLoop\r |
| 193 | ReadClusters: \r |
| 194 | incw %bx\r |
| 195 | popw %ax # ax = StartCluster\r |
| 196 | pushw %bx # StartCluster = NextClusterNumber\r |
| 197 | movw %bx,%cx # ClusterNumber = NextClusterNumber\r |
| 198 | subw $2,%ax # ax = StartCluster - 2\r |
| 199 | xorb %bh,%bh\r |
| 200 | movb SectorsPerCluster(%bp), %bl # bx = SectorsPerCluster\r |
| 201 | mulw %bx # ax = (StartCluster - 2) * SectorsPerCluster\r |
| 202 | addw (%bp), %ax # ax = FirstClusterLBA + (StartCluster-2)*SectorsPerCluster\r |
| 203 | pushw %ax # save start sector\r |
| 204 | movw %si,%ax # ax = NumberOfClusters\r |
| 205 | mulw %bx # ax = NumberOfClusters * SectorsPerCluster\r |
| 206 | movw %ax,%bx # bx = Number of Sectors\r |
| 207 | popw %ax # ax = Start Sector\r |
| 208 | call ReadBlocks\r |
| 209 | movw $1,%si # NumberOfClusters = 1\r |
| 210 | jmp FatChainLoop\r |
| 211 | FoundLastCluster: \r |
| 212 | popw %cx\r |
| 213 | popa\r |
| 214 | ret\r |
| 215 | \r |
| 216 | \r |
| 217 | # ****************************************************************************\r |
| 218 | # ReadBlocks - Reads a set of blocks from a block device\r |
| 219 | #\r |
| 220 | # AX = Start LBA\r |
| 221 | # BX = Number of Blocks to Read\r |
| 222 | # ES:DI = Buffer to store sectors read from disk\r |
| 223 | # ****************************************************************************\r |
| 224 | \r |
| 225 | # cx = Blocks\r |
| 226 | # bx = NumberOfBlocks\r |
| 227 | # si = StartLBA\r |
| 228 | \r |
| 229 | ReadBlocks: \r |
| 230 | pusha\r |
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231 | addl LBAOffsetForBootSector(%bp), %eax # Add LBAOffsetForBootSector to Start LBA\r |
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232 | addl HiddenSectors(%bp), %eax # Add HiddenSectors to Start LBA\r |
| 233 | movl %eax,%esi # esi = Start LBA\r |
| 234 | movw %bx,%cx # cx = Number of blocks to read\r |
| 235 | ReadCylinderLoop: \r |
| 236 | movw $0x7bfc,%bp # bp = 0x7bfc\r |
| 237 | movl %esi,%eax # eax = Start LBA\r |
| 238 | xorl %edx,%edx # edx = 0\r |
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239 | movzwl (%bp), %ebx # bx = MaxSector\r |
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240 | divl %ebx # ax = StartLBA / MaxSector\r |
| 241 | incw %dx # dx = (StartLBA % MaxSector) + 1\r |
| 242 | \r |
| 243 | movw (%bp), %bx # bx = MaxSector\r |
| 244 | subw %dx,%bx # bx = MaxSector - Sector\r |
| 245 | incw %bx # bx = MaxSector - Sector + 1\r |
| 246 | cmpw %bx,%cx # Compare (Blocks) to (MaxSector - Sector + 1)\r |
| 247 | jg LimitTransfer\r |
| 248 | movw %cx,%bx # bx = Blocks\r |
| 249 | LimitTransfer: \r |
| 250 | pushw %ax # save ax\r |
| 251 | movw %es,%ax # ax = es\r |
| 252 | shrw $(BLOCK_SHIFT-4), %ax # ax = Number of blocks into mem system\r |
| 253 | andw $0x7f,%ax # ax = Number of blocks into current seg\r |
| 254 | addw %bx,%ax # ax = End Block number of transfer\r |
| 255 | cmpw $0x80,%ax # See if it crosses a 64K boundry\r |
| 256 | jle NotCrossing64KBoundry # Branch if not crossing 64K boundry\r |
| 257 | subw $0x80,%ax # ax = Number of blocks past 64K boundry\r |
| 258 | subw %ax,%bx # Decrease transfer size by block overage\r |
| 259 | NotCrossing64KBoundry: \r |
| 260 | popw %ax # restore ax\r |
| 261 | \r |
| 262 | pushw %cx\r |
| 263 | movb %dl,%cl # cl = (StartLBA % MaxSector) + 1 = Sector\r |
| 264 | xorw %dx,%dx # dx = 0\r |
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265 | divw 2(%bp) # ax = ax / (MaxHead + 1) = Cylinder \r |
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266 | # dx = ax % (MaxHead + 1) = Head\r |
| 267 | \r |
| 268 | pushw %bx # Save number of blocks to transfer\r |
| 269 | movb %dl,%dh # dh = Head\r |
| 270 | movw $0x7c00,%bp # bp = 0x7c00\r |
| 271 | movb PhysicalDrive(%bp), %dl # dl = Drive Number\r |
| 272 | movb %al,%ch # ch = Cylinder\r |
| 273 | movb %bl,%al # al = Blocks\r |
| 274 | movb $2,%ah # ah = Function 2\r |
| 275 | movw %di,%bx # es:bx = Buffer address\r |
| 276 | int $0x13\r |
| 277 | jc DiskError\r |
| 278 | popw %bx\r |
| 279 | popw %cx\r |
| 280 | movzwl %bx,%ebx\r |
| 281 | addl %ebx,%esi # StartLBA = StartLBA + NumberOfBlocks\r |
| 282 | subw %bx,%cx # Blocks = Blocks - NumberOfBlocks\r |
| 283 | movw %es,%ax\r |
| 284 | shlw $(BLOCK_SHIFT-4), %bx\r |
| 285 | addw %bx,%ax\r |
| 286 | movw %ax,%es # es:di = es:di + NumberOfBlocks*BLOCK_SIZE\r |
| 287 | cmpw $0,%cx\r |
| 288 | jne ReadCylinderLoop\r |
| 289 | popa\r |
| 290 | ret\r |
| 291 | \r |
| 292 | DiskError: \r |
| 293 | pushw %cs\r |
| 294 | popw %ds\r |
| 295 | leaw ErrorString,%si\r |
| 296 | movw $7,%cx\r |
| 297 | jmp PrintStringAndHalt\r |
| 298 | \r |
| 299 | PrintStringAndHalt: \r |
| 300 | movw $0xb800,%ax\r |
| 301 | movw %ax,%es\r |
| 302 | movw $160,%di\r |
| 303 | rep\r |
| 304 | movsw\r |
| 305 | Halt: \r |
| 306 | jmp Halt\r |
| 307 | \r |
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308 | ErrorString: \r |
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309 | .byte 'S', 0x0c, 'E', 0x0c, 'r', 0x0c, 'r', 0x0c, 'o', 0x0c, 'r', 0x0c, '!',0x0c\r |
| 310 | \r |
| 311 | .org 0x01fa\r |
| 312 | LBAOffsetForBootSector: \r |
| 313 | .long 0x0\r |
| 314 | \r |
| 315 | .org 0x01fe\r |
| 316 | .word 0xaa55\r |
| 317 | \r |
| 318 | #******************************************************************************\r |
| 319 | #******************************************************************************\r |
| 320 | #******************************************************************************\r |
| 321 | \r |
| 322 | .equ DELAY_PORT, 0x0ed # Port to use for 1uS delay\r |
| 323 | .equ KBD_CONTROL_PORT, 0x060 # 8042 control port \r |
| 324 | .equ KBD_STATUS_PORT, 0x064 # 8042 status port \r |
| 325 | .equ WRITE_DATA_PORT_CMD, 0x0d1 # 8042 command to write the data port\r |
| 326 | .equ ENABLE_A20_CMD, 0x0df # 8042 command to enable A20\r |
| 327 | \r |
| 328 | .org 0x200\r |
| 329 | jmp start\r |
| 330 | Em64String: \r |
| 331 | .byte 'E', 0x0c, 'm', 0x0c, '6', 0x0c, '4', 0x0c, 'T', 0x0c, ' ', 0x0c, 'U', 0x0c, 'n', 0x0c, 's', 0x0c, 'u', 0x0c, 'p', 0x0c, 'p', 0x0c, 'o', 0x0c, 'r', 0x0c, 't', 0x0c, 'e', 0x0c, 'd', 0x0c, '!', 0x0c\r |
| 332 | \r |
| 333 | start: \r |
| 334 | movw %cs,%ax\r |
| 335 | movw %ax,%ds\r |
| 336 | movw %ax,%es\r |
| 337 | movw %ax,%ss\r |
| 338 | movw $MyStack, %sp\r |
| 339 | \r |
| 340 | # mov ax,0b800h\r |
| 341 | # mov es,ax\r |
| 342 | # mov byte ptr es:[160],'a'\r |
| 343 | # mov ax,cs\r |
| 344 | # mov es,ax\r |
| 345 | \r |
| 346 | movl $0,%ebx\r |
| 347 | leal MemoryMap, %edi\r |
| 348 | MemMapLoop: \r |
| 349 | movl $0xe820,%eax\r |
| 350 | movl $20,%ecx\r |
| 351 | movl $0x534d4150, %edx # SMAP\r |
| 352 | int $0x15\r |
| 353 | jc MemMapDone\r |
| 354 | addl $20,%edi\r |
| 355 | cmpl $0,%ebx\r |
| 356 | je MemMapDone\r |
| 357 | jmp MemMapLoop\r |
| 358 | MemMapDone: \r |
| 359 | leal MemoryMap, %eax\r |
| 360 | subl %eax,%edi # Get the address of the memory map\r |
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361 | movl %edi, MemoryMapSize # Save the size of the memory map\r |
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362 | \r |
| 363 | xorl %ebx,%ebx\r |
| 364 | movw %cs,%bx # BX=segment\r |
| 365 | shll $4,%ebx # BX="linear" address of segment base\r |
| 72f7d3c3 |
366 | leal GDT_BASE(%ebx), %eax # EAX=PHYSICAL address of gdt\r |
| 367 | movl %eax, (gdtr + 2) # Put address of gdt into the gdtr\r |
| 368 | leal IDT_BASE(%ebx), %eax # EAX=PHYSICAL address of idt\r |
| 369 | movl %eax, (idtr + 2) # Put address of idt into the idtr\r |
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370 | leal MemoryMapSize(%ebx), %edx # Physical base address of the memory map\r |
| 371 | \r |
| 372 | # mov ax,0b800h\r |
| 373 | # mov es,ax\r |
| 374 | # mov byte ptr es:[162],'b'\r |
| 375 | # mov ax,cs\r |
| 376 | # mov es,ax\r |
| 377 | \r |
| 378 | #\r |
| 379 | # Enable A20 Gate \r |
| 380 | #\r |
| 381 | \r |
| 382 | movw $0x2401,%ax # Enable A20 Gate\r |
| 383 | int $0x15\r |
| 384 | jnc A20GateEnabled # Jump if it suceeded\r |
| 385 | \r |
| 386 | #\r |
| 387 | # If INT 15 Function 2401 is not supported, then attempt to Enable A20 manually.\r |
| 388 | #\r |
| 389 | \r |
| 390 | call Empty8042InputBuffer # Empty the Input Buffer on the 8042 controller\r |
| 391 | jnz Timeout8042 # Jump if the 8042 timed out\r |
| 392 | outw %ax, $DELAY_PORT # Delay 1 uS\r |
| 393 | movb $WRITE_DATA_PORT_CMD, %al # 8042 cmd to write output port\r |
| 394 | outb %al, $KBD_STATUS_PORT # Send command to the 8042\r |
| 395 | call Empty8042InputBuffer # Empty the Input Buffer on the 8042 controller\r |
| 396 | jnz Timeout8042 # Jump if the 8042 timed out\r |
| 397 | movb $ENABLE_A20_CMD, %al # gate address bit 20 on\r |
| 398 | outb %al, $KBD_CONTROL_PORT # Send command to thre 8042\r |
| 399 | call Empty8042InputBuffer # Empty the Input Buffer on the 8042 controller\r |
| 400 | movw $25,%cx # Delay 25 uS for the command to complete on the 8042\r |
| 401 | Delay25uS: \r |
| 402 | outw %ax, $DELAY_PORT # Delay 1 uS\r |
| 403 | loop Delay25uS\r |
| 404 | Timeout8042: \r |
| 405 | \r |
| 406 | \r |
| 407 | A20GateEnabled: \r |
| 408 | \r |
| 409 | #\r |
| 410 | # DISABLE INTERRUPTS - Entering Protected Mode\r |
| 411 | #\r |
| 412 | \r |
| 413 | cli\r |
| 414 | \r |
| 415 | # mov ax,0b800h\r |
| 416 | # mov es,ax\r |
| 417 | # mov byte ptr es:[164],'c'\r |
| 418 | # mov ax,cs\r |
| 419 | # mov es,ax\r |
| 420 | \r |
| 421 | leal OffsetIn32BitProtectedMode, %eax\r |
| 422 | addl $0x20000+0x6,%eax\r |
| b29a823d |
423 | movl %eax, OffsetIn32BitProtectedMode \r |
| f3eb2131 |
424 | \r |
| 425 | leal OffsetInLongMode, %eax\r |
| 426 | addl $0x20000+0x6,%eax\r |
| 427 | movl %eax, OffsetInLongMode \r |
| 428 | \r |
| 429 | #\r |
| 430 | # load GDT\r |
| 431 | #\r |
| 432 | .byte 0x66\r |
| 433 | lgdt gdtr\r |
| 434 | \r |
| 435 | #\r |
| 436 | # Enable Protect Mode (set CR0.PE=1)\r |
| 437 | #\r |
| 69b1c021 |
438 | movl %cr0, %eax # Read CR0.\r |
| f3eb2131 |
439 | orl $0x1,%eax # Set PE=1\r |
| 440 | movl %eax, %cr0 # Write CR0.\r |
| 441 | .byte 0x66\r |
| 442 | .byte 0xea # jmp far 16:32\r |
| 443 | OffsetIn32BitProtectedMode: \r |
| 444 | .long 0x0000000 # offset $+8 (In32BitProtectedMode)\r |
| 445 | .word 0x10 # selector (flat CS)\r |
| 446 | In32BitProtectedMode: \r |
| 447 | \r |
| 448 | #\r |
| 449 | # Entering Long Mode\r |
| 450 | #\r |
| 451 | .byte 0x66\r |
| 452 | movw $8,%ax\r |
| 453 | movw %ax,%ds\r |
| 454 | movw %ax,%es\r |
| 455 | movw %ax,%ss\r |
| 456 | \r |
| 457 | #\r |
| 458 | # Enable the 64-bit page-translation-table entries by\r |
| 459 | # setting CR4.PAE=1 (this is _required_ before activating\r |
| 460 | # long mode). Paging is not enabled until after long mode\r |
| 461 | # is enabled.\r |
| 462 | #\r |
| 463 | .byte 0xf\r |
| 464 | .byte 0x20\r |
| 465 | .byte 0xe0\r |
| 466 | # mov eax, cr4\r |
| 467 | btsl $5,%eax\r |
| 468 | .byte 0xf\r |
| 469 | .byte 0x22\r |
| 470 | .byte 0xe0\r |
| 471 | # mov cr4, eax\r |
| 472 | \r |
| 473 | #\r |
| 474 | # This is the Trapolean Page Tables that are guarenteed\r |
| 475 | # under 4GB.\r |
| 476 | #\r |
| 477 | # Address Map:\r |
| 478 | # 10000 ~ 12000 - efildr (loaded)\r |
| 479 | # 20000 ~ 21000 - start64.com\r |
| 480 | # 21000 ~ 22000 - efi64.com\r |
| 481 | # 22000 ~ 90000 - efildr\r |
| 482 | # 90000 ~ 96000 - 4G pagetable (will be reload later)\r |
| 483 | #\r |
| 484 | .byte 0xb8\r |
| 485 | .long 0x90000\r |
| 486 | # mov eax, 90000h\r |
| 487 | movl %eax, %cr3\r |
| 488 | \r |
| 489 | #\r |
| 490 | # Enable long mode (set EFER.LME=1).\r |
| 491 | #\r |
| 492 | .byte 0xb9\r |
| 493 | .long 0xc0000080\r |
| 494 | # mov ecx, 0c0000080h ; EFER MSR number.\r |
| 495 | .byte 0xf\r |
| 496 | .byte 0x32\r |
| 497 | # rdmsr ; Read EFER.\r |
| 498 | .byte 0xf\r |
| 499 | .byte 0xba\r |
| 500 | .byte 0xe8\r |
| 501 | .byte 0x8\r |
| 502 | # bts eax, 8 ; Set LME=1.\r |
| 503 | .byte 0xf\r |
| 504 | .byte 0x30\r |
| 505 | # wrmsr ; Write EFER.\r |
| 506 | \r |
| 507 | #\r |
| 508 | # Enable paging to activate long mode (set CR0.PG=1)\r |
| 509 | #\r |
| 69b1c021 |
510 | movl %cr0, %eax # Read CR0.\r |
| f3eb2131 |
511 | .byte 0xf\r |
| 512 | .byte 0xba\r |
| 513 | .byte 0xe8\r |
| 514 | .byte 0x1f\r |
| 515 | # bts eax, 31 ; Set PG=1.\r |
| 516 | movl %eax, %cr0 # Write CR0.\r |
| 517 | jmp GoToLongMode\r |
| 518 | GoToLongMode: \r |
| 519 | \r |
| 520 | .byte 0x67\r |
| 521 | .byte 0xea # Far Jump $+9:Selector to reload CS\r |
| 522 | OffsetInLongMode: \r |
| 523 | .long 00000000 # $+9 Offset is ensuing instruction boundary\r |
| 524 | .word 0x38 # Selector is our code selector, 38h\r |
| 525 | \r |
| 526 | InLongMode: \r |
| 527 | .byte 0x66\r |
| 528 | movw $0x30,%ax\r |
| 529 | movw %ax,%ds\r |
| 530 | \r |
| 531 | .byte 0x66\r |
| 532 | movw $0x18,%ax\r |
| 533 | movw %ax,%es\r |
| 534 | movw %ax,%ss\r |
| 535 | movw %ax,%ds\r |
| 536 | \r |
| 537 | .byte 0xbd\r |
| 538 | .long 0x400000\r |
| 539 | # mov ebp,000400000h ; Destination of EFILDR32\r |
| 540 | .byte 0xbb\r |
| 541 | .long 0x70000\r |
| 542 | # mov ebx,000070000h ; Length of copy\r |
| 543 | \r |
| 544 | #\r |
| 545 | # load idt later\r |
| 546 | #\r |
| 547 | .byte 0x48\r |
| 548 | .byte 0x33\r |
| 549 | .byte 0xc0\r |
| 550 | # xor rax, rax\r |
| 551 | .byte 0x66\r |
| 552 | movw $idtr, %ax\r |
| 553 | .byte 0x48\r |
| 554 | .byte 0x5\r |
| 555 | .long 0x20000\r |
| 556 | # add rax, 20000h\r |
| 557 | \r |
| 558 | .byte 0xf\r |
| 559 | .byte 0x1\r |
| 560 | .byte 0x18\r |
| 561 | # lidt fword ptr [rax]\r |
| 562 | \r |
| 563 | .byte 0x48\r |
| 564 | .byte 0xc7\r |
| 565 | .byte 0xc0\r |
| 566 | .long 0x21000\r |
| 567 | # mov rax, 21000h\r |
| 568 | .byte 0x50\r |
| 569 | # push rax\r |
| 570 | \r |
| 571 | # ret\r |
| 572 | .byte 0xc3\r |
| 573 | \r |
| 574 | Empty8042InputBuffer: \r |
| 575 | movw $0,%cx\r |
| 576 | Empty8042Loop: \r |
| 577 | outw %ax, $DELAY_PORT # Delay 1us\r |
| 578 | inb $KBD_STATUS_PORT, %al # Read the 8042 Status Port\r |
| 579 | andb $0x2,%al # Check the Input Buffer Full Flag\r |
| 580 | loopnz Empty8042Loop # Loop until the input buffer is empty or a timout of 65536 uS\r |
| 581 | ret\r |
| 582 | \r |
| 583 | ##############################################################################\r |
| 584 | # data\r |
| 585 | ##############################################################################\r |
| 586 | \r |
| 9811c392 |
587 | .p2align 1\r |
| f3eb2131 |
588 | \r |
| b29a823d |
589 | gdtr: .long GDT_END - GDT_BASE - 1 # GDT limit \r |
| f3eb2131 |
590 | .long 0 # (GDT base gets set above)\r |
| 591 | ##############################################################################\r |
| 592 | # global descriptor table (GDT)\r |
| 593 | ##############################################################################\r |
| 594 | \r |
| 9811c392 |
595 | .p2align 1\r |
| f3eb2131 |
596 | \r |
| 597 | GDT_BASE: \r |
| 598 | # null descriptor\r |
| 599 | .equ NULL_SEL, .-GDT_BASE # Selector [0x0]\r |
| 600 | .word 0 # limit 15:0\r |
| 601 | .word 0 # base 15:0\r |
| 602 | .byte 0 # base 23:16\r |
| 603 | .byte 0 # type\r |
| 604 | .byte 0 # limit 19:16, flags\r |
| 605 | .byte 0 # base 31:24\r |
| 606 | \r |
| 607 | # linear data segment descriptor\r |
| 608 | .equ LINEAR_SEL, .-GDT_BASE # Selector [0x8]\r |
| 609 | .word 0xFFFF # limit 0xFFFFF\r |
| 610 | .word 0 # base 0\r |
| 611 | .byte 0\r |
| 612 | .byte 0x92 # present, ring 0, data, expand-up, writable\r |
| 613 | .byte 0xCF # page-granular, 32-bit\r |
| 614 | .byte 0\r |
| 615 | \r |
| 616 | # linear code segment descriptor\r |
| 617 | .equ LINEAR_CODE_SEL, .-GDT_BASE # Selector [0x10]\r |
| 618 | .word 0xFFFF # limit 0xFFFFF\r |
| 619 | .word 0 # base 0\r |
| 620 | .byte 0\r |
| 621 | .byte 0x9A # present, ring 0, data, expand-up, writable\r |
| 622 | .byte 0xCF # page-granular, 32-bit\r |
| 623 | .byte 0\r |
| 624 | \r |
| 625 | # system data segment descriptor\r |
| 626 | .equ SYS_DATA_SEL, .-GDT_BASE # Selector [0x18]\r |
| 627 | .word 0xFFFF # limit 0xFFFFF\r |
| 628 | .word 0 # base 0\r |
| 629 | .byte 0\r |
| 630 | .byte 0x92 # present, ring 0, data, expand-up, writable\r |
| 631 | .byte 0xCF # page-granular, 32-bit\r |
| 632 | .byte 0\r |
| 633 | \r |
| 634 | # system code segment descriptor\r |
| 635 | .equ SYS_CODE_SEL, .-GDT_BASE # Selector [0x20]\r |
| 636 | .word 0xFFFF # limit 0xFFFFF\r |
| 637 | .word 0 # base 0\r |
| 638 | .byte 0\r |
| 639 | .byte 0x9A # present, ring 0, data, expand-up, writable\r |
| 640 | .byte 0xCF # page-granular, 32-bit\r |
| 641 | .byte 0\r |
| 642 | \r |
| 643 | # spare segment descriptor\r |
| 644 | .equ SPARE3_SEL, .-GDT_BASE # Selector [0x28]\r |
| 645 | .word 0 # limit 0xFFFFF\r |
| 646 | .word 0 # base 0\r |
| 647 | .byte 0\r |
| 648 | .byte 0 # present, ring 0, data, expand-up, writable\r |
| 649 | .byte 0 # page-granular, 32-bit\r |
| 650 | .byte 0\r |
| 651 | \r |
| 652 | #\r |
| 653 | # system data segment descriptor\r |
| 654 | #\r |
| 655 | .equ SYS_DATA64_SEL, .-GDT_BASE # Selector [0x30]\r |
| 656 | .word 0xFFFF # limit 0xFFFFF\r |
| 657 | .word 0 # base 0\r |
| 658 | .byte 0\r |
| 659 | .byte 0x92 # P | DPL [1..2] | 1 | 1 | C | R | A\r |
| 660 | .byte 0xCF # G | D | L | AVL | Segment [19..16]\r |
| 661 | .byte 0\r |
| 662 | \r |
| 663 | #\r |
| 664 | # system code segment descriptor\r |
| 665 | #\r |
| 666 | .equ SYS_CODE64_SEL, .-GDT_BASE # Selector [0x38]\r |
| 667 | .word 0xFFFF # limit 0xFFFFF\r |
| 668 | .word 0 # base 0\r |
| 669 | .byte 0\r |
| 670 | .byte 0x9A # P | DPL [1..2] | 1 | 1 | C | R | A\r |
| 671 | .byte 0xAF # G | D | L | AVL | Segment [19..16]\r |
| 672 | .byte 0\r |
| 673 | \r |
| 674 | # spare segment descriptor\r |
| 675 | .equ SPARE4_SEL, .-GDT_BASE # Selector [0x40]\r |
| 676 | .word 0 # limit 0xFFFFF\r |
| 677 | .word 0 # base 0\r |
| 678 | .byte 0\r |
| 679 | .byte 0 # present, ring 0, data, expand-up, writable\r |
| 680 | .byte 0 # page-granular, 32-bit\r |
| 681 | .byte 0\r |
| 682 | \r |
| 683 | GDT_END: \r |
| 684 | \r |
| 9811c392 |
685 | .p2align 1\r |
| f3eb2131 |
686 | \r |
| 687 | \r |
| 688 | \r |
| 689 | idtr: .long IDT_END - IDT_BASE - 1 # IDT limit\r |
| 690 | .quad 0 # (IDT base gets set above)\r |
| 691 | \r |
| 692 | ##############################################################################\r |
| 693 | # interrupt descriptor table (IDT)\r |
| 694 | #\r |
| 695 | # Note: The hardware IRQ's specified in this table are the normal PC/AT IRQ\r |
| 696 | # mappings. This implementation only uses the system timer and all other\r |
| 697 | # IRQs will remain masked. The descriptors for vectors 33+ are provided\r |
| 698 | # for convenience.\r |
| 699 | ##############################################################################\r |
| 700 | \r |
| 701 | #idt_tag db "IDT",0 \r |
| 9811c392 |
702 | .p2align 1\r |
| f3eb2131 |
703 | \r |
| 704 | \r |
| 705 | IDT_BASE: \r |
| 706 | # divide by zero (INT 0)\r |
| 707 | .equ DIV_ZERO_SEL, .-IDT_BASE\r |
| b29a823d |
708 | .word 0 # offset 15:0\r |
| f3eb2131 |
709 | .long SYS_CODE64_SEL # selector 15:0\r |
| 710 | .byte 0 # 0 for interrupt gate\r |
| 711 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
712 | .word 0 # offset 31:16\r |
| 713 | .long 0 # offset 63:32\r |
| 714 | .long 0 # 0 for reserved\r |
| f3eb2131 |
715 | \r |
| 716 | # debug exception (INT 1)\r |
| 717 | .equ DEBUG_EXCEPT_SEL, .-IDT_BASE\r |
| b29a823d |
718 | .word 0 # offset 15:0\r |
| f3eb2131 |
719 | .long SYS_CODE64_SEL # selector 15:0\r |
| 720 | .byte 0 # 0 for interrupt gate\r |
| 721 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
722 | .word 0 # offset 31:16\r |
| 723 | .long 0 # offset 63:32\r |
| 724 | .long 0 # 0 for reserved\r |
| f3eb2131 |
725 | \r |
| 726 | # NMI (INT 2)\r |
| 727 | .equ NMI_SEL, .-IDT_BASE\r |
| b29a823d |
728 | .word 0 # offset 15:0\r |
| f3eb2131 |
729 | .long SYS_CODE64_SEL # selector 15:0\r |
| 730 | .byte 0 # 0 for interrupt gate\r |
| 731 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
732 | .word 0 # offset 31:16\r |
| 733 | .long 0 # offset 63:32\r |
| 734 | .long 0 # 0 for reserved\r |
| f3eb2131 |
735 | \r |
| 736 | # soft breakpoint (INT 3)\r |
| 737 | .equ BREAKPOINT_SEL, .-IDT_BASE\r |
| b29a823d |
738 | .word 0 # offset 15:0\r |
| f3eb2131 |
739 | .long SYS_CODE64_SEL # selector 15:0\r |
| 740 | .byte 0 # 0 for interrupt gate\r |
| 741 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
742 | .word 0 # offset 31:16\r |
| 743 | .long 0 # offset 63:32\r |
| 744 | .long 0 # 0 for reserved\r |
| f3eb2131 |
745 | \r |
| 746 | # overflow (INT 4)\r |
| 747 | .equ OVERFLOW_SEL, .-IDT_BASE\r |
| b29a823d |
748 | .word 0 # offset 15:0\r |
| f3eb2131 |
749 | .long SYS_CODE64_SEL # selector 15:0\r |
| 750 | .byte 0 # 0 for interrupt gate\r |
| 751 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
752 | .word 0 # offset 31:16\r |
| 753 | .long 0 # offset 63:32\r |
| 754 | .long 0 # 0 for reserved\r |
| f3eb2131 |
755 | \r |
| 756 | # bounds check (INT 5)\r |
| 757 | .equ BOUNDS_CHECK_SEL, .-IDT_BASE\r |
| b29a823d |
758 | .word 0 # offset 15:0\r |
| f3eb2131 |
759 | .long SYS_CODE64_SEL # selector 15:0\r |
| 760 | .byte 0 # 0 for interrupt gate\r |
| 761 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
762 | .word 0 # offset 31:16\r |
| 763 | .long 0 # offset 63:32\r |
| 764 | .long 0 # 0 for reserved\r |
| f3eb2131 |
765 | \r |
| 766 | # invalid opcode (INT 6)\r |
| 767 | .equ INVALID_OPCODE_SEL, .-IDT_BASE\r |
| b29a823d |
768 | .word 0 # offset 15:0\r |
| f3eb2131 |
769 | .long SYS_CODE64_SEL # selector 15:0\r |
| 770 | .byte 0 # 0 for interrupt gate\r |
| 771 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
772 | .word 0 # offset 31:16\r |
| 773 | .long 0 # offset 63:32\r |
| 774 | .long 0 # 0 for reserved\r |
| f3eb2131 |
775 | \r |
| 776 | # device not available (INT 7)\r |
| 777 | .equ DEV_NOT_AVAIL_SEL, .-IDT_BASE\r |
| b29a823d |
778 | .word 0 # offset 15:0\r |
| f3eb2131 |
779 | .long SYS_CODE64_SEL # selector 15:0\r |
| 780 | .byte 0 # 0 for interrupt gate\r |
| 781 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
782 | .word 0 # offset 31:16\r |
| 783 | .long 0 # offset 63:32\r |
| 784 | .long 0 # 0 for reserved\r |
| f3eb2131 |
785 | \r |
| 786 | # double fault (INT 8)\r |
| 787 | .equ DOUBLE_FAULT_SEL, .-IDT_BASE\r |
| b29a823d |
788 | .word 0 # offset 15:0\r |
| f3eb2131 |
789 | .long SYS_CODE64_SEL # selector 15:0\r |
| 790 | .byte 0 # 0 for interrupt gate\r |
| 791 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
792 | .word 0 # offset 31:16\r |
| 793 | .long 0 # offset 63:32\r |
| 794 | .long 0 # 0 for reserved\r |
| f3eb2131 |
795 | \r |
| 796 | # Coprocessor segment overrun - reserved (INT 9)\r |
| 797 | .equ RSVD_INTR_SEL1, .-IDT_BASE\r |
| b29a823d |
798 | .word 0 # offset 15:0\r |
| f3eb2131 |
799 | .long SYS_CODE64_SEL # selector 15:0\r |
| 800 | .byte 0 # 0 for interrupt gate\r |
| 801 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
802 | .word 0 # offset 31:16\r |
| 803 | .long 0 # offset 63:32\r |
| 804 | .long 0 # 0 for reserved\r |
| f3eb2131 |
805 | \r |
| 806 | # invalid TSS (INT 0ah)\r |
| 807 | .equ INVALID_TSS_SEL, .-IDT_BASE\r |
| b29a823d |
808 | .word 0 # offset 15:0\r |
| f3eb2131 |
809 | .long SYS_CODE64_SEL # selector 15:0\r |
| 810 | .byte 0 # 0 for interrupt gate\r |
| 811 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
812 | .word 0 # offset 31:16\r |
| 813 | .long 0 # offset 63:32\r |
| 814 | .long 0 # 0 for reserved\r |
| f3eb2131 |
815 | \r |
| 816 | # segment not present (INT 0bh)\r |
| 817 | .equ SEG_NOT_PRESENT_SEL, .-IDT_BASE\r |
| b29a823d |
818 | .word 0 # offset 15:0\r |
| f3eb2131 |
819 | .long SYS_CODE64_SEL # selector 15:0\r |
| 820 | .byte 0 # 0 for interrupt gate\r |
| 821 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
822 | .word 0 # offset 31:16\r |
| 823 | .long 0 # offset 63:32\r |
| 824 | .long 0 # 0 for reserved\r |
| f3eb2131 |
825 | \r |
| 826 | # stack fault (INT 0ch)\r |
| 827 | .equ STACK_FAULT_SEL, .-IDT_BASE\r |
| b29a823d |
828 | .word 0 # offset 15:0\r |
| f3eb2131 |
829 | .long SYS_CODE64_SEL # selector 15:0\r |
| 830 | .byte 0 # 0 for interrupt gate\r |
| 831 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
832 | .word 0 # offset 31:16\r |
| 833 | .long 0 # offset 63:32\r |
| 834 | .long 0 # 0 for reserved\r |
| f3eb2131 |
835 | \r |
| 836 | # general protection (INT 0dh)\r |
| 837 | .equ GP_FAULT_SEL, .-IDT_BASE\r |
| b29a823d |
838 | .word 0 # offset 15:0\r |
| f3eb2131 |
839 | .long SYS_CODE64_SEL # selector 15:0\r |
| 840 | .byte 0 # 0 for interrupt gate\r |
| 841 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
842 | .word 0 # offset 31:16\r |
| 843 | .long 0 # offset 63:32\r |
| 844 | .long 0 # 0 for reserved\r |
| f3eb2131 |
845 | \r |
| 846 | # page fault (INT 0eh)\r |
| 847 | .equ PAGE_FAULT_SEL, .-IDT_BASE\r |
| b29a823d |
848 | .word 0 # offset 15:0\r |
| f3eb2131 |
849 | .long SYS_CODE64_SEL # selector 15:0\r |
| 850 | .byte 0 # 0 for interrupt gate\r |
| 851 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
852 | .word 0 # offset 31:16\r |
| 853 | .long 0 # offset 63:32\r |
| 854 | .long 0 # 0 for reserved\r |
| f3eb2131 |
855 | \r |
| 856 | # Intel reserved - do not use (INT 0fh)\r |
| 857 | .equ RSVD_INTR_SEL2, .-IDT_BASE\r |
| b29a823d |
858 | .word 0 # offset 15:0\r |
| f3eb2131 |
859 | .long SYS_CODE64_SEL # selector 15:0\r |
| 860 | .byte 0 # 0 for interrupt gate\r |
| 861 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
862 | .word 0 # offset 31:16\r |
| 863 | .long 0 # offset 63:32\r |
| 864 | .long 0 # 0 for reserved\r |
| f3eb2131 |
865 | \r |
| 866 | # floating point error (INT 10h)\r |
| 867 | .equ FLT_POINT_ERR_SEL, .-IDT_BASE\r |
| b29a823d |
868 | .word 0 # offset 15:0\r |
| f3eb2131 |
869 | .long SYS_CODE64_SEL # selector 15:0\r |
| 870 | .byte 0 # 0 for interrupt gate\r |
| 871 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
872 | .word 0 # offset 31:16\r |
| 873 | .long 0 # offset 63:32\r |
| 874 | .long 0 # 0 for reserved\r |
| f3eb2131 |
875 | \r |
| 876 | # alignment check (INT 11h)\r |
| 877 | .equ ALIGNMENT_CHECK_SEL, .-IDT_BASE\r |
| b29a823d |
878 | .word 0 # offset 15:0\r |
| f3eb2131 |
879 | .long SYS_CODE64_SEL # selector 15:0\r |
| 880 | .byte 0 # 0 for interrupt gate\r |
| 881 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
882 | .word 0 # offset 31:16\r |
| 883 | .long 0 # offset 63:32\r |
| 884 | .long 0 # 0 for reserved\r |
| f3eb2131 |
885 | \r |
| 886 | # machine check (INT 12h)\r |
| 887 | .equ MACHINE_CHECK_SEL, .-IDT_BASE\r |
| b29a823d |
888 | .word 0 # offset 15:0\r |
| f3eb2131 |
889 | .long SYS_CODE64_SEL # selector 15:0\r |
| 890 | .byte 0 # 0 for interrupt gate\r |
| 891 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
892 | .word 0 # offset 31:16\r |
| 893 | .long 0 # offset 63:32\r |
| 894 | .long 0 # 0 for reserved\r |
| f3eb2131 |
895 | \r |
| 896 | # SIMD floating-point exception (INT 13h)\r |
| 897 | .equ SIMD_EXCEPTION_SEL, .-IDT_BASE\r |
| b29a823d |
898 | .word 0 # offset 15:0\r |
| f3eb2131 |
899 | .long SYS_CODE64_SEL # selector 15:0\r |
| 900 | .byte 0 # 0 for interrupt gate\r |
| 901 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
902 | .word 0 # offset 31:16\r |
| 903 | .long 0 # offset 63:32\r |
| 904 | .long 0 # 0 for reserved\r |
| f3eb2131 |
905 | \r |
| 906 | # 85 unspecified descriptors, First 12 of them are reserved, the rest are avail\r |
| b29a823d |
907 | .fill 85 * 16, 1, 0 # db (85 * 16) dup(0)\r |
| f3eb2131 |
908 | \r |
| 909 | # IRQ 0 (System timer) - (INT 68h)\r |
| 910 | .equ IRQ0_SEL, .-IDT_BASE\r |
| b29a823d |
911 | .word 0 # offset 15:0\r |
| f3eb2131 |
912 | .long SYS_CODE64_SEL # selector 15:0\r |
| 913 | .byte 0 # 0 for interrupt gate\r |
| 914 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
915 | .word 0 # offset 31:16\r |
| 916 | .long 0 # offset 63:32\r |
| 917 | .long 0 # 0 for reserved\r |
| f3eb2131 |
918 | \r |
| 919 | # IRQ 1 (8042 Keyboard controller) - (INT 69h)\r |
| 920 | .equ IRQ1_SEL, .-IDT_BASE\r |
| b29a823d |
921 | .word 0 # offset 15:0\r |
| f3eb2131 |
922 | .long SYS_CODE64_SEL # selector 15:0\r |
| 923 | .byte 0 # 0 for interrupt gate\r |
| 924 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
925 | .word 0 # offset 31:16\r |
| 926 | .long 0 # offset 63:32\r |
| 927 | .long 0 # 0 for reserved\r |
| f3eb2131 |
928 | \r |
| 929 | # Reserved - IRQ 2 redirect (IRQ 2) - DO NOT USE!!! - (INT 6ah)\r |
| 930 | .equ IRQ2_SEL, .-IDT_BASE\r |
| b29a823d |
931 | .word 0 # offset 15:0\r |
| f3eb2131 |
932 | .long SYS_CODE64_SEL # selector 15:0\r |
| 933 | .byte 0 # 0 for interrupt gate\r |
| 934 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
935 | .word 0 # offset 31:16\r |
| 936 | .long 0 # offset 63:32\r |
| 937 | .long 0 # 0 for reserved\r |
| f3eb2131 |
938 | \r |
| 939 | # IRQ 3 (COM 2) - (INT 6bh)\r |
| 940 | .equ IRQ3_SEL, .-IDT_BASE\r |
| b29a823d |
941 | .word 0 # offset 15:0\r |
| f3eb2131 |
942 | .long SYS_CODE64_SEL # selector 15:0\r |
| 943 | .byte 0 # 0 for interrupt gate\r |
| 944 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
945 | .word 0 # offset 31:16\r |
| 946 | .long 0 # offset 63:32\r |
| 947 | .long 0 # 0 for reserved\r |
| f3eb2131 |
948 | \r |
| 949 | # IRQ 4 (COM 1) - (INT 6ch)\r |
| 950 | .equ IRQ4_SEL, .-IDT_BASE\r |
| b29a823d |
951 | .word 0 # offset 15:0\r |
| f3eb2131 |
952 | .long SYS_CODE64_SEL # selector 15:0\r |
| 953 | .byte 0 # 0 for interrupt gate\r |
| 954 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
955 | .word 0 # offset 31:16\r |
| 956 | .long 0 # offset 63:32\r |
| 957 | .long 0 # 0 for reserved\r |
| f3eb2131 |
958 | \r |
| 959 | # IRQ 5 (LPT 2) - (INT 6dh)\r |
| 960 | .equ IRQ5_SEL, .-IDT_BASE\r |
| b29a823d |
961 | .word 0 # offset 15:0\r |
| f3eb2131 |
962 | .long SYS_CODE64_SEL # selector 15:0\r |
| 963 | .byte 0 # 0 for interrupt gate\r |
| 964 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
965 | .word 0 # offset 31:16\r |
| 966 | .long 0 # offset 63:32\r |
| 967 | .long 0 # 0 for reserved\r |
| f3eb2131 |
968 | \r |
| 969 | # IRQ 6 (Floppy controller) - (INT 6eh)\r |
| 970 | .equ IRQ6_SEL, .-IDT_BASE\r |
| b29a823d |
971 | .word 0 # offset 15:0\r |
| f3eb2131 |
972 | .long SYS_CODE64_SEL # selector 15:0\r |
| 973 | .byte 0 # 0 for interrupt gate\r |
| 974 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
975 | .word 0 # offset 31:16\r |
| 976 | .long 0 # offset 63:32\r |
| 977 | .long 0 # 0 for reserved\r |
| f3eb2131 |
978 | \r |
| 979 | # IRQ 7 (LPT 1) - (INT 6fh)\r |
| 980 | .equ IRQ7_SEL, .-IDT_BASE\r |
| b29a823d |
981 | .word 0 # offset 15:0\r |
| f3eb2131 |
982 | .long SYS_CODE64_SEL # selector 15:0\r |
| 983 | .byte 0 # 0 for interrupt gate\r |
| 984 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
985 | .word 0 # offset 31:16\r |
| 986 | .long 0 # offset 63:32\r |
| 987 | .long 0 # 0 for reserved\r |
| f3eb2131 |
988 | \r |
| 989 | # IRQ 8 (RTC Alarm) - (INT 70h)\r |
| 990 | .equ IRQ8_SEL, .-IDT_BASE\r |
| b29a823d |
991 | .word 0 # offset 15:0\r |
| f3eb2131 |
992 | .long SYS_CODE64_SEL # selector 15:0\r |
| 993 | .byte 0 # 0 for interrupt gate\r |
| 994 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
995 | .word 0 # offset 31:16\r |
| 996 | .long 0 # offset 63:32\r |
| 997 | .long 0 # 0 for reserved\r |
| f3eb2131 |
998 | \r |
| 999 | # IRQ 9 - (INT 71h)\r |
| 1000 | .equ IRQ9_SEL, .-IDT_BASE\r |
| b29a823d |
1001 | .word 0 # offset 15:0\r |
| f3eb2131 |
1002 | .long SYS_CODE64_SEL # selector 15:0\r |
| 1003 | .byte 0 # 0 for interrupt gate\r |
| 1004 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
1005 | .word 0 # offset 31:16\r |
| 1006 | .long 0 # offset 63:32\r |
| 1007 | .long 0 # 0 for reserved\r |
| f3eb2131 |
1008 | \r |
| 1009 | # IRQ 10 - (INT 72h)\r |
| 1010 | .equ IRQ10_SEL, .-IDT_BASE\r |
| b29a823d |
1011 | .word 0 # offset 15:0\r |
| f3eb2131 |
1012 | .long SYS_CODE64_SEL # selector 15:0\r |
| 1013 | .byte 0 # 0 for interrupt gate\r |
| 1014 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
1015 | .word 0 # offset 31:16\r |
| 1016 | .long 0 # offset 63:32\r |
| 1017 | .long 0 # 0 for reserved\r |
| f3eb2131 |
1018 | \r |
| 1019 | # IRQ 11 - (INT 73h)\r |
| 1020 | .equ IRQ11_SEL, .-IDT_BASE\r |
| b29a823d |
1021 | .word 0 # offset 15:0\r |
| f3eb2131 |
1022 | .long SYS_CODE64_SEL # selector 15:0\r |
| 1023 | .byte 0 # 0 for interrupt gate\r |
| 1024 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
1025 | .word 0 # offset 31:16\r |
| 1026 | .long 0 # offset 63:32\r |
| 1027 | .long 0 # 0 for reserved\r |
| f3eb2131 |
1028 | \r |
| 1029 | # IRQ 12 (PS/2 mouse) - (INT 74h)\r |
| 1030 | .equ IRQ12_SEL, .-IDT_BASE\r |
| b29a823d |
1031 | .word 0 # offset 15:0\r |
| f3eb2131 |
1032 | .long SYS_CODE64_SEL # selector 15:0\r |
| 1033 | .byte 0 # 0 for interrupt gate\r |
| 1034 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
1035 | .word 0 # offset 31:16\r |
| 1036 | .long 0 # offset 63:32\r |
| 1037 | .long 0 # 0 for reserved\r |
| f3eb2131 |
1038 | \r |
| 1039 | # IRQ 13 (Floating point error) - (INT 75h)\r |
| 1040 | .equ IRQ13_SEL, .-IDT_BASE\r |
| b29a823d |
1041 | .word 0 # offset 15:0\r |
| f3eb2131 |
1042 | .long SYS_CODE64_SEL # selector 15:0\r |
| 1043 | .byte 0 # 0 for interrupt gate\r |
| 1044 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
1045 | .word 0 # offset 31:16\r |
| 1046 | .long 0 # offset 63:32\r |
| 1047 | .long 0 # 0 for reserved\r |
| f3eb2131 |
1048 | \r |
| 1049 | # IRQ 14 (Secondary IDE) - (INT 76h)\r |
| 1050 | .equ IRQ14_SEL, .-IDT_BASE\r |
| b29a823d |
1051 | .word 0 # offset 15:0\r |
| f3eb2131 |
1052 | .long SYS_CODE64_SEL # selector 15:0\r |
| 1053 | .byte 0 # 0 for interrupt gate\r |
| 1054 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
1055 | .word 0 # offset 31:16\r |
| 1056 | .long 0 # offset 63:32\r |
| 1057 | .long 0 # 0 for reserved\r |
| f3eb2131 |
1058 | \r |
| 1059 | # IRQ 15 (Primary IDE) - (INT 77h)\r |
| 1060 | .equ IRQ15_SEL, .-IDT_BASE\r |
| b29a823d |
1061 | .word 0 # offset 15:0\r |
| f3eb2131 |
1062 | .long SYS_CODE64_SEL # selector 15:0\r |
| 1063 | .byte 0 # 0 for interrupt gate\r |
| 1064 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
1065 | .word 0 # offset 31:16\r |
| 1066 | .long 0 # offset 63:32\r |
| 1067 | .long 0 # 0 for reserved\r |
| f3eb2131 |
1068 | \r |
| 1069 | IDT_END: \r |
| 1070 | \r |
| 9811c392 |
1071 | .p2align 1\r |
| f3eb2131 |
1072 | \r |
| 1073 | MemoryMapSize: .long 0\r |
| 1074 | MemoryMap: .long 0,0,0,0,0,0,0,0\r |
| 1075 | .long 0,0,0,0,0,0,0,0\r |
| 1076 | .long 0,0,0,0,0,0,0,0\r |
| 1077 | .long 0,0,0,0,0,0,0,0\r |
| 1078 | .long 0,0,0,0,0,0,0,0\r |
| 1079 | .long 0,0,0,0,0,0,0,0\r |
| 1080 | .long 0,0,0,0,0,0,0,0\r |
| 1081 | .long 0,0,0,0,0,0,0,0\r |
| 1082 | .long 0,0,0,0,0,0,0,0\r |
| 1083 | .long 0,0,0,0,0,0,0,0\r |
| 1084 | .long 0,0,0,0,0,0,0,0\r |
| 1085 | .long 0,0,0,0,0,0,0,0\r |
| 1086 | .long 0,0,0,0,0,0,0,0\r |
| 1087 | .long 0,0,0,0,0,0,0,0\r |
| 1088 | .long 0,0,0,0,0,0,0,0\r |
| 1089 | .long 0,0,0,0,0,0,0,0\r |
| 1090 | .long 0,0,0,0,0,0,0,0\r |
| 1091 | .long 0,0,0,0,0,0,0,0\r |
| 1092 | .long 0,0,0,0,0,0,0,0\r |
| 1093 | .long 0,0,0,0,0,0,0,0\r |
| 1094 | .long 0,0,0,0,0,0,0,0\r |
| 1095 | .long 0,0,0,0,0,0,0,0\r |
| 1096 | .long 0,0,0,0,0,0,0,0\r |
| 1097 | .long 0,0,0,0,0,0,0,0\r |
| 1098 | .long 0,0,0,0,0,0,0,0\r |
| 1099 | .long 0,0,0,0,0,0,0,0\r |
| 1100 | .long 0,0,0,0,0,0,0,0\r |
| 1101 | .long 0,0,0,0,0,0,0,0\r |
| 1102 | .long 0,0,0,0,0,0,0,0\r |
| 1103 | .long 0,0,0,0,0,0,0,0\r |
| 1104 | \r |
| f3eb2131 |
1105 | .long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0\r |
| 1106 | \r |
| 69b1c021 |
1107 | .org 0x0fe0\r |
| f3eb2131 |
1108 | MyStack: \r |
| 1109 | # below is the pieces of the IVT that is used to redirect INT 68h - 6fh\r |
| 1110 | # back to INT 08h - 0fh when in real mode... It is 'org'ed to a\r |
| 1111 | # known low address (20f00) so it can be set up by PlMapIrqToVect in\r |
| 1112 | # 8259.c\r |
| 1113 | \r |
| 1114 | int $8\r |
| 1115 | iret\r |
| 1116 | \r |
| 1117 | int $9\r |
| 1118 | iret\r |
| 1119 | \r |
| 1120 | int $10\r |
| 1121 | iret\r |
| 1122 | \r |
| 1123 | int $11\r |
| 1124 | iret\r |
| 1125 | \r |
| 1126 | int $12\r |
| 1127 | iret\r |
| 1128 | \r |
| 1129 | int $13\r |
| 1130 | iret\r |
| 1131 | \r |
| 1132 | int $14\r |
| 1133 | iret\r |
| 1134 | \r |
| 1135 | int $15\r |
| 1136 | iret\r |
| 1137 | \r |
| 1138 | \r |
| 69b1c021 |
1139 | .org 0x0ffe\r |
| f3eb2131 |
1140 | BlockSignature: \r |
| 1141 | .word 0xaa55\r |
| 1142 | \r |
projects / mirror_edk2.git / blame