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1 | #------------------------------------------------------------------------------\r |
| 2 | #*\r |
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3 | #* Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>\r |
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4 | #* This program and the accompanying materials \r |
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5 | #* are licensed and made available under the terms and conditions of the BSD License \r |
| 6 | #* which accompanies this distribution. The full text of the license may be found at \r |
| 7 | #* http://opensource.org/licenses/bsd-license.php \r |
| 8 | #* \r |
| 9 | #* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r |
| 10 | #* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r |
| 11 | #* \r |
| 12 | #* start64.asm\r |
| 13 | #* \r |
| 14 | #* Abstract:\r |
| 15 | #*\r |
| 16 | #------------------------------------------------------------------------------\r |
| 17 | \r |
| 18 | \r |
| 19 | .stack: \r |
| 20 | .486p: \r |
| 21 | .code16\r |
| 22 | \r |
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23 | .equ FAT_DIRECTORY_ENTRY_SIZE, 0x020\r |
| 24 | .equ FAT_DIRECTORY_ENTRY_SHIFT, 5\r |
| 25 | .equ BLOCK_SIZE, 0x0200\r |
| 26 | .equ BLOCK_MASK, 0x01ff\r |
| 27 | .equ BLOCK_SHIFT, 9\r |
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28 | \r |
| 29 | .org 0x0\r |
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30 | \r |
| 31 | .global _start\r |
| 32 | _start:\r |
| 33 | \r |
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34 | Ia32Jump: \r |
| 35 | jmp BootSectorEntryPoint # JMP inst - 3 bytes\r |
| 36 | nop\r |
| 37 | \r |
| 38 | OemId: .ascii "INTEL " # OemId - 8 bytes\r |
| 39 | \r |
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40 | SectorSize: .word 0 # Sector Size - 16 bits\r |
| 41 | SectorsPerCluster: .byte 0 # Sector Per Cluster - 8 bits\r |
| 42 | ReservedSectors: .word 0 # Reserved Sectors - 16 bits\r |
| 43 | NoFats: .byte 0 # Number of FATs - 8 bits\r |
| 44 | RootEntries: .word 0 # Root Entries - 16 bits\r |
| 45 | Sectors: .word 0 # Number of Sectors - 16 bits\r |
| 46 | Media: .byte 0 # Media - 8 bits - ignored\r |
| 47 | SectorsPerFat: .word 0 # Sectors Per FAT - 16 bits\r |
| 48 | SectorsPerTrack: .word 0 # Sectors Per Track - 16 bits - ignored\r |
| 49 | Heads: .word 0 # Heads - 16 bits - ignored\r |
| 50 | HiddenSectors: .long 0 # Hidden Sectors - 32 bits - ignored\r |
| 51 | LargeSectors: .long 0 # Large Sectors - 32 bits \r |
| 52 | PhysicalDrive: .byte 0 # PhysicalDriveNumber - 8 bits - ignored\r |
| 53 | CurrentHead: .byte 0 # Current Head - 8 bits\r |
| 54 | Signature: .byte 0 # Signature - 8 bits - ignored\r |
| 55 | VolId: .ascii " " # Volume Serial Number- 4 bytes\r |
| 56 | FatLabel: .ascii " " # Label - 11 bytes\r |
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57 | SystemId: .ascii "FAT12 " # SystemId - 8 bytes\r |
| 58 | \r |
| 59 | BootSectorEntryPoint: \r |
| 60 | # ASSUME ds:@code"\r |
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61 | # ASSUME ss:@code"\r |
| f3eb2131 |
62 | # ds = 1000, es = 2000 + x (size of first cluster >> 4)\r |
| 63 | # cx = Start Cluster of EfiLdr\r |
| 64 | # dx = Start Cluster of Efivar.bin\r |
| 65 | \r |
| 66 | # Re use the BPB data stored in Boot Sector\r |
| 67 | movw $0x7c00,%bp\r |
| 68 | \r |
| 69 | pushw %cx\r |
| 70 | # Read Efivar.bin\r |
| 71 | # 1000:dx = DirectoryEntry of Efivar.bin -> BS.com has filled already\r |
| 72 | movw $0x1900,%ax\r |
| 73 | movw %ax,%es\r |
| 74 | testw %dx,%dx\r |
| 75 | jnz CheckVarStoreSize\r |
| 76 | \r |
| 77 | movb $1,%al\r |
| 78 | NoVarStore: \r |
| 79 | pushw %es\r |
| 80 | # Set the 5th byte start @ 0:19000 to non-zero indicating we should init var store header in DxeIpl\r |
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81 | movb %al, %es:(4)\r |
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82 | jmp SaveVolumeId\r |
| 83 | \r |
| 84 | CheckVarStoreSize: \r |
| 85 | movw %dx,%di\r |
| 86 | cmpl $0x4000, %ds:2(%di)\r |
| 87 | movb $2,%al\r |
| 88 | jne NoVarStore\r |
| 89 | \r |
| 90 | LoadVarStore: \r |
| 91 | movb $0,%al\r |
| 92 | movb %al, %es:(4)\r |
| b29a823d |
93 | movw (%di), %cx\r |
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94 | # ES:DI = 1500:0\r |
| 95 | xorw %di,%di\r |
| 96 | pushw %es\r |
| 97 | movw $0x1500,%ax\r |
| 98 | movw %ax,%es\r |
| 99 | call ReadFile\r |
| 100 | SaveVolumeId: \r |
| 101 | popw %es\r |
| 102 | movw VolId(%bp), %ax\r |
| 103 | movw %ax, %es:(0) \r |
| 104 | movw VolId+2(%bp), %ax\r |
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105 | movw %ax, %es:(2)\r |
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106 | \r |
| 107 | # Read Efildr\r |
| 108 | popw %cx\r |
| 109 | # cx = Start Cluster of Efildr -> BS.com has filled already\r |
| 110 | # ES:DI = 2000:0, first cluster will be read again\r |
| 111 | xorw %di,%di # di = 0\r |
| 112 | movw $0x2000,%ax\r |
| 113 | movw %ax,%es\r |
| 114 | call ReadFile\r |
| 115 | movw %cs,%ax\r |
| 116 | movw %ax, %cs:JumpSegment\r |
| 117 | \r |
| 118 | CheckEm64T: \r |
| 119 | movl $0x80000001,%eax\r |
| 120 | # cpuid\r |
| 121 | .word 0xA20F\r |
| 122 | btl $29,%edx\r |
| 123 | jc CheckEm64TPass\r |
| 124 | pushw %cs\r |
| 125 | popw %ds\r |
| 126 | leaw Em64String,%si\r |
| 127 | movw $18,%cx\r |
| 128 | jmp PrintStringAndHalt\r |
| 129 | CheckEm64TPass: \r |
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130 | JumpFarInstruction: \r |
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131 | .byte 0xea\r |
| 69b1c021 |
132 | JumpOffset: \r |
| f3eb2131 |
133 | .word 0x200\r |
| 69b1c021 |
134 | JumpSegment: \r |
| f3eb2131 |
135 | .word 0x2000\r |
| 136 | \r |
| 137 | \r |
| 138 | \r |
| 139 | # ****************************************************************************\r |
| 140 | # ReadFile\r |
| 141 | #\r |
| 142 | # Arguments:\r |
| 143 | # CX = Start Cluster of File\r |
| 144 | # ES:DI = Buffer to store file content read from disk\r |
| 145 | #\r |
| 146 | # Return:\r |
| 147 | # (ES << 4 + DI) = end of file content Buffer\r |
| 148 | #\r |
| 149 | # ****************************************************************************\r |
| 150 | ReadFile: \r |
| 151 | # si = NumberOfClusters\r |
| 152 | # cx = ClusterNumber\r |
| 153 | # dx = CachedFatSectorNumber\r |
| 154 | # ds:0000 = CacheFatSectorBuffer\r |
| 155 | # es:di = Buffer to load file\r |
| 156 | # bx = NextClusterNumber\r |
| 157 | pusha\r |
| 158 | movw $1,%si # NumberOfClusters = 1\r |
| 159 | pushw %cx # Push Start Cluster onto stack\r |
| 160 | movw $0xfff,%dx # CachedFatSectorNumber = 0xfff\r |
| 161 | FatChainLoop: \r |
| 162 | movw %cx,%ax # ax = ClusterNumber \r |
| 163 | andw $0xff8,%ax # ax = ax & 0xff8\r |
| 164 | cmpw $0xff8,%ax # See if this is the last cluster\r |
| 165 | je FoundLastCluster # Jump if last cluster found\r |
| 166 | movw %cx,%ax # ax = ClusterNumber\r |
| 167 | shlw %ax # ax = ClusterNumber * 2\r |
| 168 | addw %cx,%ax # ax = ClusterNumber * 2 + ClusterNumber = ClusterNumber * 3\r |
| 169 | shrw %ax # FatOffset = ClusterNumber*3 / 2\r |
| 170 | pushw %si # Save si\r |
| 171 | movw %ax,%si # si = FatOffset\r |
| 172 | shrw $BLOCK_SHIFT, %ax # ax = FatOffset >> BLOCK_SHIFT\r |
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173 | addw ReservedSectors(%bp), %ax # ax = FatSectorNumber = ReservedSectors + (FatOffset >> BLOCK_OFFSET)\r |
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174 | andw $BLOCK_MASK, %si # si = FatOffset & BLOCK_MASK\r |
| 175 | cmpw %dx,%ax # Compare FatSectorNumber to CachedFatSectorNumber\r |
| 176 | je SkipFatRead\r |
| 177 | movw $2,%bx\r |
| 178 | pushw %es\r |
| 179 | pushw %ds\r |
| 180 | popw %es\r |
| 181 | call ReadBlocks # Read 2 blocks starting at AX storing at ES:DI\r |
| 182 | popw %es\r |
| 183 | movw %ax,%dx # CachedFatSectorNumber = FatSectorNumber\r |
| 184 | SkipFatRead: \r |
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185 | movw (%si), %bx # bx = NextClusterNumber\r |
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186 | movw %cx,%ax # ax = ClusterNumber\r |
| 187 | andw $1,%ax # See if this is an odd cluster number\r |
| 188 | je EvenFatEntry\r |
| 189 | shrw $4,%bx # NextClusterNumber = NextClusterNumber >> 4\r |
| 190 | EvenFatEntry: \r |
| 191 | andw $0xfff,%bx # Strip upper 4 bits of NextClusterNumber\r |
| 192 | popw %si # Restore si\r |
| 193 | decw %bx # bx = NextClusterNumber - 1\r |
| 194 | cmpw %cx,%bx # See if (NextClusterNumber-1)==ClusterNumber\r |
| 195 | jne ReadClusters\r |
| 196 | incw %bx # bx = NextClusterNumber\r |
| 197 | incw %si # NumberOfClusters++\r |
| 198 | movw %bx,%cx # ClusterNumber = NextClusterNumber\r |
| 199 | jmp FatChainLoop\r |
| 200 | ReadClusters: \r |
| 201 | incw %bx\r |
| 202 | popw %ax # ax = StartCluster\r |
| 203 | pushw %bx # StartCluster = NextClusterNumber\r |
| 204 | movw %bx,%cx # ClusterNumber = NextClusterNumber\r |
| 205 | subw $2,%ax # ax = StartCluster - 2\r |
| 206 | xorb %bh,%bh\r |
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207 | movb SectorsPerCluster(%bp), %bl # bx = SectorsPerCluster\r |
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208 | mulw %bx # ax = (StartCluster - 2) * SectorsPerCluster\r |
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209 | addw (%bp), %ax # ax = FirstClusterLBA + (StartCluster-2)*SectorsPerCluster\r |
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210 | pushw %ax # save start sector\r |
| 211 | movw %si,%ax # ax = NumberOfClusters\r |
| 212 | mulw %bx # ax = NumberOfClusters * SectorsPerCluster\r |
| 213 | movw %ax,%bx # bx = Number of Sectors\r |
| 214 | popw %ax # ax = Start Sector\r |
| 215 | call ReadBlocks\r |
| 216 | movw $1,%si # NumberOfClusters = 1\r |
| 217 | jmp FatChainLoop\r |
| 218 | FoundLastCluster: \r |
| 219 | popw %cx\r |
| 220 | popa\r |
| 221 | ret\r |
| 222 | \r |
| 223 | \r |
| 224 | # ****************************************************************************\r |
| 225 | # ReadBlocks - Reads a set of blocks from a block device\r |
| 226 | #\r |
| 227 | # AX = Start LBA\r |
| 228 | # BX = Number of Blocks to Read\r |
| 229 | # ES:DI = Buffer to store sectors read from disk\r |
| 230 | # ****************************************************************************\r |
| 231 | \r |
| 232 | # cx = Blocks\r |
| 233 | # bx = NumberOfBlocks\r |
| 234 | # si = StartLBA\r |
| 235 | \r |
| 236 | ReadBlocks: \r |
| 237 | pusha\r |
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238 | addl LBAOffsetForBootSector(%bp), %eax # Add LBAOffsetForBootSector to Start LBA\r |
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239 | addl HiddenSectors(%bp), %eax # Add HiddenSectors to Start LBA\r |
| 240 | movl %eax,%esi # esi = Start LBA\r |
| 241 | movw %bx,%cx # cx = Number of blocks to read\r |
| 242 | ReadCylinderLoop: \r |
| 243 | movw $0x7bfc,%bp # bp = 0x7bfc\r |
| 244 | movl %esi,%eax # eax = Start LBA\r |
| 245 | xorl %edx,%edx # edx = 0\r |
| 246 | movzwl (%bp), %ebx # bx = MaxSector\r |
| 247 | divl %ebx # ax = StartLBA / MaxSector\r |
| 248 | incw %dx # dx = (StartLBA % MaxSector) + 1\r |
| 249 | \r |
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250 | movw (%bp), %bx # bx = MaxSector\r |
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251 | subw %dx,%bx # bx = MaxSector - Sector\r |
| 252 | incw %bx # bx = MaxSector - Sector + 1\r |
| 253 | cmpw %bx,%cx # Compare (Blocks) to (MaxSector - Sector + 1)\r |
| 254 | jg LimitTransfer\r |
| 255 | movw %cx,%bx # bx = Blocks\r |
| 256 | LimitTransfer: \r |
| 257 | pushw %ax # save ax\r |
| 258 | movw %es,%ax # ax = es\r |
| 259 | shrw $(BLOCK_SHIFT-4), %ax # ax = Number of blocks into mem system\r |
| 260 | andw $0x7f,%ax # ax = Number of blocks into current seg\r |
| 261 | addw %bx,%ax # ax = End Block number of transfer\r |
| 262 | cmpw $0x80,%ax # See if it crosses a 64K boundry\r |
| 263 | jle NotCrossing64KBoundry # Branch if not crossing 64K boundry\r |
| 264 | subw $0x80,%ax # ax = Number of blocks past 64K boundry\r |
| 265 | subw %ax,%bx # Decrease transfer size by block overage\r |
| 266 | NotCrossing64KBoundry: \r |
| 267 | popw %ax # restore ax\r |
| 268 | \r |
| 269 | pushw %cx\r |
| 270 | movb %dl,%cl # cl = (StartLBA % MaxSector) + 1 = Sector\r |
| 271 | xorw %dx,%dx # dx = 0\r |
| 272 | divw 2(%bp) # ax = ax / (MaxHead + 1) = Cylinder \r |
| 273 | # dx = ax % (MaxHead + 1) = Head\r |
| 274 | \r |
| 275 | pushw %bx # Save number of blocks to transfer\r |
| 276 | movb %dl,%dh # dh = Head\r |
| 277 | movw $0x7c00,%bp # bp = 0x7c00\r |
| 278 | movb PhysicalDrive(%bp), %dl # dl = Drive Number\r |
| 279 | movb %al,%ch # ch = Cylinder\r |
| 280 | movb %bl,%al # al = Blocks\r |
| 281 | movb $2,%ah # ah = Function 2\r |
| 282 | movw %di,%bx # es:bx = Buffer address\r |
| 283 | int $0x13\r |
| 284 | jc DiskError\r |
| 285 | popw %bx\r |
| 286 | popw %cx\r |
| 287 | movzwl %bx,%ebx\r |
| 288 | addl %ebx,%esi # StartLBA = StartLBA + NumberOfBlocks\r |
| 289 | subw %bx,%cx # Blocks = Blocks - NumberOfBlocks\r |
| 290 | movw %es,%ax\r |
| 291 | shlw $(BLOCK_SHIFT-4), %bx\r |
| 292 | addw %bx,%ax\r |
| 293 | movw %ax,%es # es:di = es:di + NumberOfBlocks*BLOCK_SIZE\r |
| 294 | cmpw $0,%cx\r |
| 295 | jne ReadCylinderLoop\r |
| 296 | popa\r |
| 297 | ret\r |
| 298 | \r |
| 299 | DiskError: \r |
| 300 | pushw %cs\r |
| 301 | popw %ds\r |
| 302 | leaw ErrorString,%si\r |
| 303 | movw $7,%cx\r |
| 304 | jmp PrintStringAndHalt\r |
| 305 | \r |
| 306 | PrintStringAndHalt: \r |
| 307 | movw $0xb800,%ax\r |
| 308 | movw %ax,%es\r |
| 309 | movw $160,%di\r |
| 310 | rep \r |
| 311 | movsw \r |
| 312 | Halt: \r |
| 313 | jmp Halt\r |
| 314 | \r |
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315 | ErrorString: \r |
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316 | .byte 'S', 0x0c, 'E', 0x0c, 'r', 0x0c, 'r', 0x0c, 'o', 0x0c, 'r', 0x0c, '!',0x0c\r |
| 317 | \r |
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318 | .org 0x01fa\r |
| f3eb2131 |
319 | LBAOffsetForBootSector: \r |
| 320 | .long 0x0\r |
| 321 | \r |
| b29a823d |
322 | .org 0x01fe\r |
| f3eb2131 |
323 | .word 0xaa55\r |
| 324 | \r |
| 325 | #******************************************************************************\r |
| 326 | #******************************************************************************\r |
| 327 | #******************************************************************************\r |
| 328 | \r |
| ded312f1 |
329 | .equ DELAY_PORT, 0x0ed # Port to use for 1uS delay\r |
| 330 | .equ KBD_CONTROL_PORT, 0x060 # 8042 control port \r |
| 331 | .equ KBD_STATUS_PORT, 0x064 # 8042 status port \r |
| 332 | .equ WRITE_DATA_PORT_CMD, 0x0d1 # 8042 command to write the data port\r |
| f3eb2131 |
333 | .equ ENABLE_A20_CMD, 0x0df # 8042 command to enable A20\r |
| 334 | \r |
| b29a823d |
335 | .org 0x200\r |
| f3eb2131 |
336 | jmp start\r |
| 337 | Em64String: \r |
| 338 | .byte 'E', 0x0c, 'm', 0x0c, '6', 0x0c, '4', 0x0c, 'T', 0x0c, ' ', 0x0c, 'U', 0x0c, 'n', 0x0c, 's', 0x0c, 'u', 0x0c, 'p', 0x0c, 'p', 0x0c, 'o', 0x0c, 'r', 0x0c, 't', 0x0c, 'e', 0x0c, 'd', 0x0c, '!', 0x0c\r |
| 339 | \r |
| 340 | start: \r |
| 341 | movw %cs,%ax\r |
| 342 | movw %ax,%ds\r |
| 343 | movw %ax,%es\r |
| 344 | movw %ax,%ss\r |
| 345 | movw $MyStack, %sp\r |
| 346 | \r |
| 347 | # mov ax,0b800h\r |
| 348 | # mov es,ax\r |
| 349 | # mov byte ptr es:[160],'a'\r |
| 350 | # mov ax,cs\r |
| 351 | # mov es,ax\r |
| 352 | \r |
| 353 | movl $0,%ebx\r |
| 354 | leal MemoryMap, %edi\r |
| 355 | MemMapLoop: \r |
| 356 | movl $0xe820,%eax\r |
| 357 | movl $20,%ecx\r |
| 358 | movl $0x534d4150, %edx # SMAP\r |
| 359 | int $0x15\r |
| 360 | jc MemMapDone\r |
| 361 | addl $20,%edi\r |
| 362 | cmpl $0,%ebx\r |
| 363 | je MemMapDone\r |
| 364 | jmp MemMapLoop\r |
| 365 | MemMapDone: \r |
| 366 | leal MemoryMap, %eax\r |
| 367 | subl %eax,%edi # Get the address of the memory map\r |
| b29a823d |
368 | movl %edi, MemoryMapSize # Save the size of the memory map\r |
| f3eb2131 |
369 | \r |
| 370 | xorl %ebx,%ebx\r |
| 371 | movw %cs,%bx # BX=segment\r |
| 372 | shll $4,%ebx # BX="linear" address of segment base\r |
| ded312f1 |
373 | leal GDT_BASE(%ebx), %eax # EAX=PHYSICAL address of gdt\r |
| 374 | movl %eax, (gdtr + 2) # Put address of gdt into the gdtr\r |
| 375 | leal IDT_BASE(%ebx), %eax # EAX=PHYSICAL address of idt\r |
| 376 | movl %eax, (idtr + 2) # Put address of idt into the idtr\r |
| f3eb2131 |
377 | leal MemoryMapSize(%ebx), %edx # Physical base address of the memory map\r |
| 378 | \r |
| 379 | # mov ax,0b800h\r |
| 380 | # mov es,ax\r |
| 381 | # mov byte ptr es:[162],'b'\r |
| 382 | # mov ax,cs\r |
| 383 | # mov es,ax\r |
| 384 | \r |
| 385 | #\r |
| 386 | # Enable A20 Gate \r |
| 387 | #\r |
| 388 | \r |
| 389 | movw $0x2401,%ax # Enable A20 Gate\r |
| 390 | int $0x15\r |
| 391 | jnc A20GateEnabled # Jump if it suceeded\r |
| 392 | \r |
| 393 | #\r |
| 394 | # If INT 15 Function 2401 is not supported, then attempt to Enable A20 manually.\r |
| 395 | #\r |
| 396 | \r |
| 397 | call Empty8042InputBuffer # Empty the Input Buffer on the 8042 controller\r |
| 398 | jnz Timeout8042 # Jump if the 8042 timed out\r |
| 399 | outw %ax, $DELAY_PORT # Delay 1 uS\r |
| 400 | movb $WRITE_DATA_PORT_CMD, %al # 8042 cmd to write output port\r |
| 401 | outb %al, $KBD_STATUS_PORT # Send command to the 8042\r |
| 402 | call Empty8042InputBuffer # Empty the Input Buffer on the 8042 controller\r |
| 403 | jnz Timeout8042 # Jump if the 8042 timed out\r |
| 404 | movb $ENABLE_A20_CMD, %al # gate address bit 20 on\r |
| 405 | outb %al, $KBD_CONTROL_PORT # Send command to thre 8042\r |
| 406 | call Empty8042InputBuffer # Empty the Input Buffer on the 8042 controller\r |
| 407 | movw $25,%cx # Delay 25 uS for the command to complete on the 8042\r |
| 408 | Delay25uS: \r |
| 409 | outw %ax, $DELAY_PORT # Delay 1 uS\r |
| 410 | loop Delay25uS\r |
| 411 | Timeout8042: \r |
| 412 | \r |
| 413 | \r |
| 414 | A20GateEnabled: \r |
| 415 | \r |
| 416 | #\r |
| 417 | # DISABLE INTERRUPTS - Entering Protected Mode\r |
| 418 | #\r |
| 419 | \r |
| 420 | cli\r |
| 421 | \r |
| 422 | # mov ax,0b800h\r |
| 423 | # mov es,ax\r |
| 424 | # mov byte ptr es:[164],'c'\r |
| 425 | # mov ax,cs\r |
| 426 | # mov es,ax\r |
| 427 | \r |
| 428 | leal OffsetIn32BitProtectedMode, %eax\r |
| 429 | addl $0x20000+0x6,%eax\r |
| b29a823d |
430 | movl %eax, OffsetIn32BitProtectedMode \r |
| f3eb2131 |
431 | \r |
| 432 | leal OffsetInLongMode, %eax\r |
| 433 | addl $0x20000+0x6,%eax\r |
| 434 | movl %eax, OffsetInLongMode \r |
| 435 | \r |
| 436 | #\r |
| 437 | # load GDT\r |
| 438 | #\r |
| 439 | .byte 0x66\r |
| 440 | lgdt gdtr\r |
| 441 | \r |
| 442 | #\r |
| 443 | # Enable Protect Mode (set CR0.PE=1)\r |
| 444 | #\r |
| 445 | movl %cr0, %eax # Read CR0.\r |
| 446 | orl $0x1,%eax # Set PE=1\r |
| 447 | movl %eax, %cr0 # Write CR0.\r |
| 448 | .byte 0x66\r |
| 449 | .byte 0xea # jmp far 16:32\r |
| 450 | OffsetIn32BitProtectedMode: \r |
| 451 | .long 0x0000000 # offset $+8 (In32BitProtectedMode)\r |
| 452 | .word 0x10 # selector (flat CS)\r |
| 453 | In32BitProtectedMode: \r |
| 454 | \r |
| 455 | #\r |
| 456 | # Entering Long Mode\r |
| 457 | #\r |
| 458 | .byte 0x66\r |
| 459 | movw $8,%ax\r |
| 460 | movw %ax,%ds\r |
| 461 | movw %ax,%es\r |
| 462 | movw %ax,%ss\r |
| 463 | \r |
| 464 | #\r |
| 465 | # Enable the 64-bit page-translation-table entries by\r |
| 466 | # setting CR4.PAE=1 (this is _required_ before activating\r |
| 467 | # long mode). Paging is not enabled until after long mode\r |
| 468 | # is enabled.\r |
| 469 | #\r |
| 470 | .byte 0xf\r |
| 471 | .byte 0x20\r |
| 472 | .byte 0xe0\r |
| 473 | # mov eax, cr4\r |
| 474 | btsl $5,%eax\r |
| 475 | .byte 0xf\r |
| 476 | .byte 0x22\r |
| 477 | .byte 0xe0\r |
| 478 | # mov cr4, eax\r |
| 479 | \r |
| 480 | #\r |
| 481 | # This is the Trapolean Page Tables that are guarenteed\r |
| 482 | # under 4GB.\r |
| 483 | #\r |
| 484 | # Address Map:\r |
| 485 | # 10000 ~ 12000 - efildr (loaded)\r |
| 486 | # 20000 ~ 21000 - start64.com\r |
| 487 | # 21000 ~ 22000 - efi64.com\r |
| 488 | # 22000 ~ 90000 - efildr\r |
| 489 | # 90000 ~ 96000 - 4G pagetable (will be reload later)\r |
| 490 | #\r |
| 491 | .byte 0xb8\r |
| 492 | .long 0x90000\r |
| 493 | # mov eax, 90000h\r |
| 494 | movl %eax, %cr3\r |
| 495 | \r |
| 496 | #\r |
| 497 | # Enable long mode (set EFER.LME=1).\r |
| 498 | #\r |
| 499 | .byte 0xb9\r |
| 500 | .long 0xc0000080\r |
| 501 | # mov ecx, 0c0000080h ; EFER MSR number.\r |
| 502 | .byte 0xf\r |
| 503 | .byte 0x32\r |
| 504 | # rdmsr ; Read EFER.\r |
| 505 | .byte 0xf\r |
| 506 | .byte 0xba\r |
| 507 | .byte 0xe8\r |
| 508 | .byte 0x8\r |
| 509 | # bts eax, 8 ; Set LME=1.\r |
| 510 | .byte 0xf\r |
| 511 | .byte 0x30\r |
| 512 | # wrmsr ; Write EFER.\r |
| 513 | \r |
| 514 | #\r |
| 515 | # Enable paging to activate long mode (set CR0.PG=1)\r |
| 516 | #\r |
| 69b1c021 |
517 | movl %cr0, %eax # Read CR0.\r |
| f3eb2131 |
518 | .byte 0xf\r |
| 519 | .byte 0xba\r |
| 520 | .byte 0xe8\r |
| 521 | .byte 0x1f\r |
| 522 | # bts eax, 31 ; Set PG=1.\r |
| 523 | movl %eax, %cr0 # Write CR0.\r |
| 524 | jmp GoToLongMode\r |
| 525 | GoToLongMode: \r |
| 526 | \r |
| 527 | .byte 0x67\r |
| 528 | .byte 0xea # Far Jump $+9:Selector to reload CS\r |
| 529 | OffsetInLongMode: \r |
| 530 | .long 00000000 # $+9 Offset is ensuing instruction boundary\r |
| 531 | .word 0x38 # Selector is our code selector, 38h\r |
| 532 | \r |
| 533 | InLongMode: \r |
| 534 | .byte 0x66\r |
| 535 | movw $0x30,%ax\r |
| 536 | movw %ax,%ds\r |
| 537 | \r |
| 538 | .byte 0x66\r |
| 539 | movw $0x18,%ax\r |
| 540 | movw %ax,%es\r |
| 541 | movw %ax,%ss\r |
| 542 | movw %ax,%ds\r |
| 543 | \r |
| 544 | .byte 0xbd\r |
| 545 | .long 0x400000\r |
| 546 | # mov ebp,000400000h ; Destination of EFILDR32\r |
| 547 | .byte 0xbb\r |
| 548 | .long 0x70000\r |
| 549 | # mov ebx,000070000h ; Length of copy\r |
| 550 | \r |
| 551 | #\r |
| 552 | # load idt later\r |
| 553 | #\r |
| 554 | .byte 0x48\r |
| 555 | .byte 0x33\r |
| 556 | .byte 0xc0\r |
| 557 | # xor rax, rax\r |
| 558 | .byte 0x66\r |
| 559 | movw $idtr, %ax\r |
| 560 | .byte 0x48\r |
| 561 | .byte 0x5\r |
| 562 | .long 0x20000\r |
| 563 | # add rax, 20000h\r |
| 564 | \r |
| 565 | .byte 0xf\r |
| 566 | .byte 0x1\r |
| 567 | .byte 0x18\r |
| 568 | # lidt fword ptr [rax]\r |
| 569 | \r |
| 570 | .byte 0x48\r |
| 571 | .byte 0xc7\r |
| 572 | .byte 0xc0\r |
| 573 | .long 0x21000\r |
| 574 | # mov rax, 21000h\r |
| 575 | .byte 0x50\r |
| 576 | # push rax\r |
| 577 | \r |
| 578 | # ret\r |
| 579 | .byte 0xc3\r |
| 580 | \r |
| 581 | Empty8042InputBuffer: \r |
| 582 | movw $0,%cx\r |
| 583 | Empty8042Loop: \r |
| 584 | outw %ax, $DELAY_PORT # Delay 1us\r |
| 585 | inb $KBD_STATUS_PORT, %al # Read the 8042 Status Port\r |
| 586 | andb $0x2,%al # Check the Input Buffer Full Flag\r |
| 587 | loopnz Empty8042Loop # Loop until the input buffer is empty or a timout of 65536 uS\r |
| 588 | ret\r |
| 589 | \r |
| 590 | ##############################################################################\r |
| 591 | # data\r |
| 592 | ##############################################################################\r |
| 593 | \r |
| 9811c392 |
594 | .p2align 1\r |
| f3eb2131 |
595 | \r |
| b29a823d |
596 | gdtr: .long GDT_END - GDT_BASE - 1 # GDT limit \r |
| f3eb2131 |
597 | .long 0 # (GDT base gets set above)\r |
| 598 | ##############################################################################\r |
| 599 | # global descriptor table (GDT)\r |
| 600 | ##############################################################################\r |
| 601 | \r |
| 9811c392 |
602 | .p2align 1\r |
| f3eb2131 |
603 | \r |
| 604 | GDT_BASE: \r |
| 605 | # null descriptor\r |
| 606 | .equ NULL_SEL, .-GDT_BASE # Selector [0x0]\r |
| 607 | .word 0 # limit 15:0\r |
| 608 | .word 0 # base 15:0\r |
| 609 | .byte 0 # base 23:16\r |
| 610 | .byte 0 # type\r |
| 611 | .byte 0 # limit 19:16, flags\r |
| 612 | .byte 0 # base 31:24\r |
| 613 | \r |
| 614 | # linear data segment descriptor\r |
| 615 | .equ LINEAR_SEL, .-GDT_BASE # Selector [0x8]\r |
| 616 | .word 0xFFFF # limit 0xFFFFF\r |
| 617 | .word 0 # base 0\r |
| 618 | .byte 0\r |
| 619 | .byte 0x92 # present, ring 0, data, expand-up, writable\r |
| 620 | .byte 0xCF # page-granular, 32-bit\r |
| 621 | .byte 0\r |
| 622 | \r |
| 623 | # linear code segment descriptor\r |
| 624 | .equ LINEAR_CODE_SEL, .-GDT_BASE # Selector [0x10]\r |
| 625 | .word 0xFFFF # limit 0xFFFFF\r |
| 626 | .word 0 # base 0\r |
| 627 | .byte 0\r |
| 628 | .byte 0x9A # present, ring 0, data, expand-up, writable\r |
| 629 | .byte 0xCF # page-granular, 32-bit\r |
| 630 | .byte 0\r |
| 631 | \r |
| 632 | # system data segment descriptor\r |
| 633 | .equ SYS_DATA_SEL, .-GDT_BASE # Selector [0x18]\r |
| 634 | .word 0xFFFF # limit 0xFFFFF\r |
| 635 | .word 0 # base 0\r |
| 636 | .byte 0\r |
| 637 | .byte 0x92 # present, ring 0, data, expand-up, writable\r |
| 638 | .byte 0xCF # page-granular, 32-bit\r |
| 639 | .byte 0\r |
| 640 | \r |
| 641 | # system code segment descriptor\r |
| 642 | .equ SYS_CODE_SEL, .-GDT_BASE # Selector [0x20]\r |
| 643 | .word 0xFFFF # limit 0xFFFFF\r |
| 644 | .word 0 # base 0\r |
| 645 | .byte 0\r |
| 646 | .byte 0x9A # present, ring 0, data, expand-up, writable\r |
| 647 | .byte 0xCF # page-granular, 32-bit\r |
| 648 | .byte 0\r |
| 649 | \r |
| 650 | # spare segment descriptor\r |
| 651 | .equ SPARE3_SEL, .-GDT_BASE # Selector [0x28]\r |
| 652 | .word 0 # limit 0xFFFFF\r |
| 653 | .word 0 # base 0\r |
| 654 | .byte 0\r |
| 655 | .byte 0 # present, ring 0, data, expand-up, writable\r |
| 656 | .byte 0 # page-granular, 32-bit\r |
| 657 | .byte 0\r |
| 658 | \r |
| 659 | #\r |
| 660 | # system data segment descriptor\r |
| 661 | #\r |
| 662 | .equ SYS_DATA64_SEL, .-GDT_BASE # Selector [0x30]\r |
| 663 | .word 0xFFFF # limit 0xFFFFF\r |
| 664 | .word 0 # base 0\r |
| 665 | .byte 0\r |
| 666 | .byte 0x92 # P | DPL [1..2] | 1 | 1 | C | R | A\r |
| 667 | .byte 0xCF # G | D | L | AVL | Segment [19..16]\r |
| 668 | .byte 0\r |
| 669 | \r |
| 670 | #\r |
| 671 | # system code segment descriptor\r |
| 672 | #\r |
| 673 | .equ SYS_CODE64_SEL, .-GDT_BASE # Selector [0x38]\r |
| 674 | .word 0xFFFF # limit 0xFFFFF\r |
| 675 | .word 0 # base 0\r |
| 676 | .byte 0\r |
| 677 | .byte 0x9A # P | DPL [1..2] | 1 | 1 | C | R | A\r |
| 678 | .byte 0xAF # G | D | L | AVL | Segment [19..16]\r |
| 679 | .byte 0\r |
| 680 | \r |
| 681 | # spare segment descriptor\r |
| 682 | .equ SPARE4_SEL, .-GDT_BASE # Selector [0x40]\r |
| 683 | .word 0 # limit 0xFFFFF\r |
| 684 | .word 0 # base 0\r |
| 685 | .byte 0\r |
| 686 | .byte 0 # present, ring 0, data, expand-up, writable\r |
| 687 | .byte 0 # page-granular, 32-bit\r |
| 688 | .byte 0\r |
| 689 | \r |
| 690 | GDT_END: \r |
| 691 | \r |
| 9811c392 |
692 | .p2align 1\r |
| f3eb2131 |
693 | \r |
| 694 | \r |
| 695 | \r |
| 696 | idtr: .long IDT_END - IDT_BASE - 1 # IDT limit\r |
| 697 | .quad 0 # (IDT base gets set above)\r |
| 698 | \r |
| 699 | ##############################################################################\r |
| 700 | # interrupt descriptor table (IDT)\r |
| 701 | #\r |
| 702 | # Note: The hardware IRQ's specified in this table are the normal PC/AT IRQ\r |
| 703 | # mappings. This implementation only uses the system timer and all other\r |
| 704 | # IRQs will remain masked. The descriptors for vectors 33+ are provided\r |
| 705 | # for convenience.\r |
| 706 | ##############################################################################\r |
| 707 | \r |
| 708 | #idt_tag db "IDT",0 \r |
| 9811c392 |
709 | .p2align 1\r |
| f3eb2131 |
710 | \r |
| 711 | \r |
| 712 | IDT_BASE: \r |
| 713 | # divide by zero (INT 0)\r |
| 714 | .equ DIV_ZERO_SEL, .-IDT_BASE\r |
| b29a823d |
715 | .word 0 # offset 15:0\r |
| f3eb2131 |
716 | .long SYS_CODE64_SEL # selector 15:0\r |
| 717 | .byte 0 # 0 for interrupt gate\r |
| 718 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
719 | .word 0 # offset 31:16\r |
| 720 | .long 0 # offset 63:32\r |
| 721 | .long 0 # 0 for reserved\r |
| f3eb2131 |
722 | \r |
| 723 | # debug exception (INT 1)\r |
| 724 | .equ DEBUG_EXCEPT_SEL, .-IDT_BASE\r |
| b29a823d |
725 | .word 0 # offset 15:0\r |
| f3eb2131 |
726 | .long SYS_CODE64_SEL # selector 15:0\r |
| 727 | .byte 0 # 0 for interrupt gate\r |
| 728 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
729 | .word 0 # offset 31:16\r |
| 730 | .long 0 # offset 63:32\r |
| 731 | .long 0 # 0 for reserved\r |
| f3eb2131 |
732 | \r |
| 733 | # NMI (INT 2)\r |
| 734 | .equ NMI_SEL, .-IDT_BASE\r |
| b29a823d |
735 | .word 0 # offset 15:0\r |
| f3eb2131 |
736 | .long SYS_CODE64_SEL # selector 15:0\r |
| 737 | .byte 0 # 0 for interrupt gate\r |
| 738 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
739 | .word 0 # offset 31:16\r |
| 740 | .long 0 # offset 63:32\r |
| 741 | .long 0 # 0 for reserved\r |
| f3eb2131 |
742 | \r |
| 743 | # soft breakpoint (INT 3)\r |
| 744 | .equ BREAKPOINT_SEL, .-IDT_BASE\r |
| b29a823d |
745 | .word 0 # offset 15:0\r |
| f3eb2131 |
746 | .long SYS_CODE64_SEL # selector 15:0\r |
| 747 | .byte 0 # 0 for interrupt gate\r |
| 748 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
749 | .word 0 # offset 31:16\r |
| 750 | .long 0 # offset 63:32\r |
| 751 | .long 0 # 0 for reserved\r |
| f3eb2131 |
752 | \r |
| 753 | # overflow (INT 4)\r |
| 754 | .equ OVERFLOW_SEL, .-IDT_BASE\r |
| b29a823d |
755 | .word 0 # offset 15:0\r |
| f3eb2131 |
756 | .long SYS_CODE64_SEL # selector 15:0\r |
| 757 | .byte 0 # 0 for interrupt gate\r |
| 758 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
759 | .word 0 # offset 31:16\r |
| 760 | .long 0 # offset 63:32\r |
| 761 | .long 0 # 0 for reserved\r |
| f3eb2131 |
762 | \r |
| 763 | # bounds check (INT 5)\r |
| 764 | .equ BOUNDS_CHECK_SEL, .-IDT_BASE\r |
| b29a823d |
765 | .word 0 # offset 15:0\r |
| f3eb2131 |
766 | .long SYS_CODE64_SEL # selector 15:0\r |
| 767 | .byte 0 # 0 for interrupt gate\r |
| 768 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
769 | .word 0 # offset 31:16\r |
| 770 | .long 0 # offset 63:32\r |
| 771 | .long 0 # 0 for reserved\r |
| f3eb2131 |
772 | \r |
| 773 | # invalid opcode (INT 6)\r |
| 774 | .equ INVALID_OPCODE_SEL, .-IDT_BASE\r |
| b29a823d |
775 | .word 0 # offset 15:0\r |
| f3eb2131 |
776 | .long SYS_CODE64_SEL # selector 15:0\r |
| 777 | .byte 0 # 0 for interrupt gate\r |
| 778 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
779 | .word 0 # offset 31:16\r |
| 780 | .long 0 # offset 63:32\r |
| 781 | .long 0 # 0 for reserved\r |
| f3eb2131 |
782 | \r |
| 783 | # device not available (INT 7)\r |
| 784 | .equ DEV_NOT_AVAIL_SEL, .-IDT_BASE\r |
| b29a823d |
785 | .word 0 # offset 15:0\r |
| f3eb2131 |
786 | .long SYS_CODE64_SEL # selector 15:0\r |
| 787 | .byte 0 # 0 for interrupt gate\r |
| 788 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
789 | .word 0 # offset 31:16\r |
| 790 | .long 0 # offset 63:32\r |
| 791 | .long 0 # 0 for reserved\r |
| f3eb2131 |
792 | \r |
| 793 | # double fault (INT 8)\r |
| 794 | .equ DOUBLE_FAULT_SEL, .-IDT_BASE\r |
| b29a823d |
795 | .word 0 # offset 15:0\r |
| f3eb2131 |
796 | .long SYS_CODE64_SEL # selector 15:0\r |
| 797 | .byte 0 # 0 for interrupt gate\r |
| 798 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
799 | .word 0 # offset 31:16\r |
| 800 | .long 0 # offset 63:32\r |
| 801 | .long 0 # 0 for reserved\r |
| f3eb2131 |
802 | \r |
| 803 | # Coprocessor segment overrun - reserved (INT 9)\r |
| 804 | .equ RSVD_INTR_SEL1, .-IDT_BASE\r |
| b29a823d |
805 | .word 0 # offset 15:0\r |
| f3eb2131 |
806 | .long SYS_CODE64_SEL # selector 15:0\r |
| 807 | .byte 0 # 0 for interrupt gate\r |
| 808 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
809 | .word 0 # offset 31:16\r |
| 810 | .long 0 # offset 63:32\r |
| 811 | .long 0 # 0 for reserved\r |
| f3eb2131 |
812 | \r |
| 813 | # invalid TSS (INT 0ah)\r |
| 814 | .equ INVALID_TSS_SEL, .-IDT_BASE\r |
| b29a823d |
815 | .word 0 # offset 15:0\r |
| f3eb2131 |
816 | .long SYS_CODE64_SEL # selector 15:0\r |
| 817 | .byte 0 # 0 for interrupt gate\r |
| 818 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
819 | .word 0 # offset 31:16\r |
| 820 | .long 0 # offset 63:32\r |
| 821 | .long 0 # 0 for reserved\r |
| f3eb2131 |
822 | \r |
| 823 | # segment not present (INT 0bh)\r |
| 824 | .equ SEG_NOT_PRESENT_SEL, .-IDT_BASE\r |
| b29a823d |
825 | .word 0 # offset 15:0\r |
| f3eb2131 |
826 | .long SYS_CODE64_SEL # selector 15:0\r |
| 827 | .byte 0 # 0 for interrupt gate\r |
| 828 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
829 | .word 0 # offset 31:16\r |
| 830 | .long 0 # offset 63:32\r |
| 831 | .long 0 # 0 for reserved\r |
| f3eb2131 |
832 | \r |
| 833 | # stack fault (INT 0ch)\r |
| 834 | .equ STACK_FAULT_SEL, .-IDT_BASE\r |
| b29a823d |
835 | .word 0 # offset 15:0\r |
| f3eb2131 |
836 | .long SYS_CODE64_SEL # selector 15:0\r |
| 837 | .byte 0 # 0 for interrupt gate\r |
| 838 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
839 | .word 0 # offset 31:16\r |
| 840 | .long 0 # offset 63:32\r |
| 841 | .long 0 # 0 for reserved\r |
| f3eb2131 |
842 | \r |
| 843 | # general protection (INT 0dh)\r |
| 844 | .equ GP_FAULT_SEL, .-IDT_BASE\r |
| b29a823d |
845 | .word 0 # offset 15:0\r |
| f3eb2131 |
846 | .long SYS_CODE64_SEL # selector 15:0\r |
| 847 | .byte 0 # 0 for interrupt gate\r |
| 848 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
849 | .word 0 # offset 31:16\r |
| 850 | .long 0 # offset 63:32\r |
| 851 | .long 0 # 0 for reserved\r |
| f3eb2131 |
852 | \r |
| 853 | # page fault (INT 0eh)\r |
| 854 | .equ PAGE_FAULT_SEL, .-IDT_BASE\r |
| b29a823d |
855 | .word 0 # offset 15:0\r |
| f3eb2131 |
856 | .long SYS_CODE64_SEL # selector 15:0\r |
| 857 | .byte 0 # 0 for interrupt gate\r |
| 858 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
859 | .word 0 # offset 31:16\r |
| 860 | .long 0 # offset 63:32\r |
| 861 | .long 0 # 0 for reserved\r |
| f3eb2131 |
862 | \r |
| 863 | # Intel reserved - do not use (INT 0fh)\r |
| 864 | .equ RSVD_INTR_SEL2, .-IDT_BASE\r |
| b29a823d |
865 | .word 0 # offset 15:0\r |
| f3eb2131 |
866 | .long SYS_CODE64_SEL # selector 15:0\r |
| 867 | .byte 0 # 0 for interrupt gate\r |
| 868 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
869 | .word 0 # offset 31:16\r |
| 870 | .long 0 # offset 63:32\r |
| 871 | .long 0 # 0 for reserved\r |
| f3eb2131 |
872 | \r |
| 873 | # floating point error (INT 10h)\r |
| 874 | .equ FLT_POINT_ERR_SEL, .-IDT_BASE\r |
| b29a823d |
875 | .word 0 # offset 15:0\r |
| f3eb2131 |
876 | .long SYS_CODE64_SEL # selector 15:0\r |
| 877 | .byte 0 # 0 for interrupt gate\r |
| 878 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
879 | .word 0 # offset 31:16\r |
| 880 | .long 0 # offset 63:32\r |
| 881 | .long 0 # 0 for reserved\r |
| f3eb2131 |
882 | \r |
| 883 | # alignment check (INT 11h)\r |
| 884 | .equ ALIGNMENT_CHECK_SEL, .-IDT_BASE\r |
| b29a823d |
885 | .word 0 # offset 15:0\r |
| f3eb2131 |
886 | .long SYS_CODE64_SEL # selector 15:0\r |
| 887 | .byte 0 # 0 for interrupt gate\r |
| 888 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
889 | .word 0 # offset 31:16\r |
| 890 | .long 0 # offset 63:32\r |
| 891 | .long 0 # 0 for reserved\r |
| f3eb2131 |
892 | \r |
| 893 | # machine check (INT 12h)\r |
| 894 | .equ MACHINE_CHECK_SEL, .-IDT_BASE\r |
| b29a823d |
895 | .word 0 # offset 15:0\r |
| f3eb2131 |
896 | .long SYS_CODE64_SEL # selector 15:0\r |
| 897 | .byte 0 # 0 for interrupt gate\r |
| 898 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
899 | .word 0 # offset 31:16\r |
| 900 | .long 0 # offset 63:32\r |
| 901 | .long 0 # 0 for reserved\r |
| f3eb2131 |
902 | \r |
| 903 | # SIMD floating-point exception (INT 13h)\r |
| 904 | .equ SIMD_EXCEPTION_SEL, .-IDT_BASE\r |
| b29a823d |
905 | .word 0 # offset 15:0\r |
| f3eb2131 |
906 | .long SYS_CODE64_SEL # selector 15:0\r |
| 907 | .byte 0 # 0 for interrupt gate\r |
| 908 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
909 | .word 0 # offset 31:16\r |
| 910 | .long 0 # offset 63:32\r |
| 911 | .long 0 # 0 for reserved\r |
| f3eb2131 |
912 | \r |
| 913 | # 85 unspecified descriptors, First 12 of them are reserved, the rest are avail\r |
| b29a823d |
914 | .fill 85 * 16, 1, 0 # db (85 * 16) dup(0)\r |
| f3eb2131 |
915 | \r |
| 916 | # IRQ 0 (System timer) - (INT 68h)\r |
| 917 | .equ IRQ0_SEL, .-IDT_BASE\r |
| b29a823d |
918 | .word 0 # offset 15:0\r |
| f3eb2131 |
919 | .long SYS_CODE64_SEL # selector 15:0\r |
| 920 | .byte 0 # 0 for interrupt gate\r |
| 921 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
922 | .word 0 # offset 31:16\r |
| 923 | .long 0 # offset 63:32\r |
| 924 | .long 0 # 0 for reserved\r |
| f3eb2131 |
925 | \r |
| 926 | # IRQ 1 (8042 Keyboard controller) - (INT 69h)\r |
| 927 | .equ IRQ1_SEL, .-IDT_BASE\r |
| b29a823d |
928 | .word 0 # offset 15:0\r |
| f3eb2131 |
929 | .long SYS_CODE64_SEL # selector 15:0\r |
| 930 | .byte 0 # 0 for interrupt gate\r |
| 931 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
932 | .word 0 # offset 31:16\r |
| 933 | .long 0 # offset 63:32\r |
| 934 | .long 0 # 0 for reserved\r |
| f3eb2131 |
935 | \r |
| 936 | # Reserved - IRQ 2 redirect (IRQ 2) - DO NOT USE!!! - (INT 6ah)\r |
| 937 | .equ IRQ2_SEL, .-IDT_BASE\r |
| b29a823d |
938 | .word 0 # offset 15:0\r |
| f3eb2131 |
939 | .long SYS_CODE64_SEL # selector 15:0\r |
| 940 | .byte 0 # 0 for interrupt gate\r |
| 941 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
942 | .word 0 # offset 31:16\r |
| 943 | .long 0 # offset 63:32\r |
| 944 | .long 0 # 0 for reserved\r |
| f3eb2131 |
945 | \r |
| 946 | # IRQ 3 (COM 2) - (INT 6bh)\r |
| 947 | .equ IRQ3_SEL, .-IDT_BASE\r |
| b29a823d |
948 | .word 0 # offset 15:0\r |
| f3eb2131 |
949 | .long SYS_CODE64_SEL # selector 15:0\r |
| 950 | .byte 0 # 0 for interrupt gate\r |
| 951 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
952 | .word 0 # offset 31:16\r |
| 953 | .long 0 # offset 63:32\r |
| 954 | .long 0 # 0 for reserved\r |
| f3eb2131 |
955 | \r |
| 956 | # IRQ 4 (COM 1) - (INT 6ch)\r |
| 957 | .equ IRQ4_SEL, .-IDT_BASE\r |
| b29a823d |
958 | .word 0 # offset 15:0\r |
| f3eb2131 |
959 | .long SYS_CODE64_SEL # selector 15:0\r |
| 960 | .byte 0 # 0 for interrupt gate\r |
| 961 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
962 | .word 0 # offset 31:16\r |
| 963 | .long 0 # offset 63:32\r |
| 964 | .long 0 # 0 for reserved\r |
| f3eb2131 |
965 | \r |
| 966 | # IRQ 5 (LPT 2) - (INT 6dh)\r |
| 967 | .equ IRQ5_SEL, .-IDT_BASE\r |
| b29a823d |
968 | .word 0 # offset 15:0\r |
| f3eb2131 |
969 | .long SYS_CODE64_SEL # selector 15:0\r |
| 970 | .byte 0 # 0 for interrupt gate\r |
| 971 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
972 | .word 0 # offset 31:16\r |
| 973 | .long 0 # offset 63:32\r |
| 974 | .long 0 # 0 for reserved\r |
| f3eb2131 |
975 | \r |
| 976 | # IRQ 6 (Floppy controller) - (INT 6eh)\r |
| 977 | .equ IRQ6_SEL, .-IDT_BASE\r |
| b29a823d |
978 | .word 0 # offset 15:0\r |
| f3eb2131 |
979 | .long SYS_CODE64_SEL # selector 15:0\r |
| 980 | .byte 0 # 0 for interrupt gate\r |
| 981 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
982 | .word 0 # offset 31:16\r |
| 983 | .long 0 # offset 63:32\r |
| 984 | .long 0 # 0 for reserved\r |
| f3eb2131 |
985 | \r |
| 986 | # IRQ 7 (LPT 1) - (INT 6fh)\r |
| 987 | .equ IRQ7_SEL, .-IDT_BASE\r |
| b29a823d |
988 | .word 0 # offset 15:0\r |
| f3eb2131 |
989 | .long SYS_CODE64_SEL # selector 15:0\r |
| 990 | .byte 0 # 0 for interrupt gate\r |
| 991 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
992 | .word 0 # offset 31:16\r |
| 993 | .long 0 # offset 63:32\r |
| 994 | .long 0 # 0 for reserved\r |
| f3eb2131 |
995 | \r |
| 996 | # IRQ 8 (RTC Alarm) - (INT 70h)\r |
| 997 | .equ IRQ8_SEL, .-IDT_BASE\r |
| b29a823d |
998 | .word 0 # offset 15:0\r |
| f3eb2131 |
999 | .long SYS_CODE64_SEL # selector 15:0\r |
| 1000 | .byte 0 # 0 for interrupt gate\r |
| 1001 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
1002 | .word 0 # offset 31:16\r |
| 1003 | .long 0 # offset 63:32\r |
| 1004 | .long 0 # 0 for reserved\r |
| f3eb2131 |
1005 | \r |
| 1006 | # IRQ 9 - (INT 71h)\r |
| 1007 | .equ IRQ9_SEL, .-IDT_BASE\r |
| b29a823d |
1008 | .word 0 # offset 15:0\r |
| f3eb2131 |
1009 | .long SYS_CODE64_SEL # selector 15:0\r |
| 1010 | .byte 0 # 0 for interrupt gate\r |
| 1011 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
1012 | .word 0 # offset 31:16\r |
| 1013 | .long 0 # offset 63:32\r |
| 1014 | .long 0 # 0 for reserved\r |
| f3eb2131 |
1015 | \r |
| 1016 | # IRQ 10 - (INT 72h)\r |
| 1017 | .equ IRQ10_SEL, .-IDT_BASE\r |
| b29a823d |
1018 | .word 0 # offset 15:0\r |
| f3eb2131 |
1019 | .long SYS_CODE64_SEL # selector 15:0\r |
| 1020 | .byte 0 # 0 for interrupt gate\r |
| 1021 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
1022 | .word 0 # offset 31:16\r |
| 1023 | .long 0 # offset 63:32\r |
| 1024 | .long 0 # 0 for reserved\r |
| f3eb2131 |
1025 | \r |
| 1026 | # IRQ 11 - (INT 73h)\r |
| 1027 | .equ IRQ11_SEL, .-IDT_BASE\r |
| b29a823d |
1028 | .word 0 # offset 15:0\r |
| f3eb2131 |
1029 | .long SYS_CODE64_SEL # selector 15:0\r |
| 1030 | .byte 0 # 0 for interrupt gate\r |
| 1031 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
1032 | .word 0 # offset 31:16\r |
| 1033 | .long 0 # offset 63:32\r |
| 1034 | .long 0 # 0 for reserved\r |
| f3eb2131 |
1035 | \r |
| 1036 | # IRQ 12 (PS/2 mouse) - (INT 74h)\r |
| 1037 | .equ IRQ12_SEL, .-IDT_BASE\r |
| b29a823d |
1038 | .word 0 # offset 15:0\r |
| f3eb2131 |
1039 | .long SYS_CODE64_SEL # selector 15:0\r |
| 1040 | .byte 0 # 0 for interrupt gate\r |
| 1041 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
1042 | .word 0 # offset 31:16\r |
| 1043 | .long 0 # offset 63:32\r |
| 1044 | .long 0 # 0 for reserved\r |
| f3eb2131 |
1045 | \r |
| 1046 | # IRQ 13 (Floating point error) - (INT 75h)\r |
| 1047 | .equ IRQ13_SEL, .-IDT_BASE\r |
| b29a823d |
1048 | .word 0 # offset 15:0\r |
| f3eb2131 |
1049 | .long SYS_CODE64_SEL # selector 15:0\r |
| 1050 | .byte 0 # 0 for interrupt gate\r |
| 1051 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
1052 | .word 0 # offset 31:16\r |
| 1053 | .long 0 # offset 63:32\r |
| 1054 | .long 0 # 0 for reserved\r |
| f3eb2131 |
1055 | \r |
| 1056 | # IRQ 14 (Secondary IDE) - (INT 76h)\r |
| 1057 | .equ IRQ14_SEL, .-IDT_BASE\r |
| b29a823d |
1058 | .word 0 # offset 15:0\r |
| f3eb2131 |
1059 | .long SYS_CODE64_SEL # selector 15:0\r |
| 1060 | .byte 0 # 0 for interrupt gate\r |
| 1061 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
1062 | .word 0 # offset 31:16\r |
| 1063 | .long 0 # offset 63:32\r |
| 1064 | .long 0 # 0 for reserved\r |
| f3eb2131 |
1065 | \r |
| 1066 | # IRQ 15 (Primary IDE) - (INT 77h)\r |
| 1067 | .equ IRQ15_SEL, .-IDT_BASE\r |
| b29a823d |
1068 | .word 0 # offset 15:0\r |
| f3eb2131 |
1069 | .long SYS_CODE64_SEL # selector 15:0\r |
| 1070 | .byte 0 # 0 for interrupt gate\r |
| 1071 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| b29a823d |
1072 | .word 0 # offset 31:16\r |
| 1073 | .long 0 # offset 63:32\r |
| 1074 | .long 0 # 0 for reserved\r |
| f3eb2131 |
1075 | \r |
| 1076 | IDT_END: \r |
| 1077 | \r |
| 9811c392 |
1078 | .p2align 1\r |
| f3eb2131 |
1079 | \r |
| 1080 | MemoryMapSize: .long 0\r |
| 1081 | MemoryMap: .long 0,0,0,0,0,0,0,0\r |
| 1082 | .long 0,0,0,0,0,0,0,0\r |
| 1083 | .long 0,0,0,0,0,0,0,0\r |
| 1084 | .long 0,0,0,0,0,0,0,0\r |
| 1085 | .long 0,0,0,0,0,0,0,0\r |
| 1086 | .long 0,0,0,0,0,0,0,0\r |
| 1087 | .long 0,0,0,0,0,0,0,0\r |
| 1088 | .long 0,0,0,0,0,0,0,0\r |
| 1089 | .long 0,0,0,0,0,0,0,0\r |
| 1090 | .long 0,0,0,0,0,0,0,0\r |
| 1091 | .long 0,0,0,0,0,0,0,0\r |
| 1092 | .long 0,0,0,0,0,0,0,0\r |
| 1093 | .long 0,0,0,0,0,0,0,0\r |
| 1094 | .long 0,0,0,0,0,0,0,0\r |
| 1095 | .long 0,0,0,0,0,0,0,0\r |
| 1096 | .long 0,0,0,0,0,0,0,0\r |
| 1097 | .long 0,0,0,0,0,0,0,0\r |
| 1098 | .long 0,0,0,0,0,0,0,0\r |
| 1099 | .long 0,0,0,0,0,0,0,0\r |
| 1100 | .long 0,0,0,0,0,0,0,0\r |
| 1101 | .long 0,0,0,0,0,0,0,0\r |
| 1102 | .long 0,0,0,0,0,0,0,0\r |
| 1103 | .long 0,0,0,0,0,0,0,0\r |
| 1104 | .long 0,0,0,0,0,0,0,0\r |
| 1105 | .long 0,0,0,0,0,0,0,0\r |
| 1106 | .long 0,0,0,0,0,0,0,0\r |
| 1107 | .long 0,0,0,0,0,0,0,0\r |
| 1108 | .long 0,0,0,0,0,0,0,0\r |
| 1109 | .long 0,0,0,0,0,0,0,0\r |
| 1110 | .long 0,0,0,0,0,0,0,0\r |
| 1111 | \r |
| f3eb2131 |
1112 | .long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0\r |
| 1113 | \r |
| b29a823d |
1114 | .org 0x0fe0\r |
| f3eb2131 |
1115 | MyStack: \r |
| 1116 | # below is the pieces of the IVT that is used to redirect INT 68h - 6fh\r |
| 1117 | # back to INT 08h - 0fh when in real mode... It is 'org'ed to a\r |
| 1118 | # known low address (20f00) so it can be set up by PlMapIrqToVect in\r |
| 1119 | # 8259.c\r |
| 1120 | \r |
| 1121 | int $8\r |
| 1122 | iret\r |
| 1123 | \r |
| 1124 | int $9\r |
| 1125 | iret\r |
| 1126 | \r |
| 1127 | int $10\r |
| 1128 | iret\r |
| 1129 | \r |
| 1130 | int $11\r |
| 1131 | iret\r |
| 1132 | \r |
| 1133 | int $12\r |
| 1134 | iret\r |
| 1135 | \r |
| 1136 | int $13\r |
| 1137 | iret\r |
| 1138 | \r |
| 1139 | int $14\r |
| 1140 | iret\r |
| 1141 | \r |
| 1142 | int $15\r |
| 1143 | iret\r |
| 1144 | \r |
| 1145 | \r |
| b29a823d |
1146 | .org 0x0ffe\r |
| f3eb2131 |
1147 | BlockSignature: \r |
| 1148 | .word 0xaa55\r |
| 1149 | \r |
projects / mirror_edk2.git / blame