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The asm file for Ia32 has been translated from MASM to GAS.
[mirror_edk2.git] / DuetPkg / CpuDxe / Ia32 / CpuInterrupt.S
CommitLineData
6794a1b9 1/** @file\r
2 *\r
3 * Copyright 2006, Intel Corporation \r
4 * All rights reserved. This program and the accompanying materials \r
5 * are licensed and made available under the terms and conditions of the BSD License \r
6 * which accompanies this distribution. The full text of the license may be found at \r
7 * http://opensource.org/licenses/bsd-license.php \r
8 * \r
9 * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
10 * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
11 * \r
12 * CpuInterrupt.S\r
13 * \r
14 * Abstract:\r
15 *\r
16 **/\r
17\r
18.globl ASM_PFX(SystemTimerHandler)\r
19.globl ASM_PFX(SystemExceptionHandler)\r
20.globl ASM_PFX(mExceptionCodeSize)\r
21.globl ASM_PFX(InitDescriptor)\r
22.globl ASM_PFX(InstallInterruptHandler)\r
23\r
24ASM_PFX(mExceptionCodeSize): .long 9\r
25\r
26/**\r
27 * VOID\r
28 * InitDescriptor (\r
29 * VOID\r
30 * )\r
31 **/\r
32ASM_PFX(InitDescriptor):\r
33 lgdt gdtr\r
34 lidt idtr\r
35 ret\r
36\r
37/**\r
38 * VOID\r
39 * InstallInterruptHandler (\r
40 * UINTN Vector,\r
41 * VOID (*Handler)(VOID)\r
42 * )\r
43 **/\r
44ASM_PFX(InstallInterruptHandler):\r
45 movl %esp, %ebp\r
46 pushl %edi\r
47 pushfl # save eflags\r
48 cli # turn off interrupts\r
49 subl $6, %esp # open some space on the stack\r
50 movl %esp, %edi\r
51 sidt %es:(%edi) # get fword address of IDT\r
52 movl %es:2(%edi), %edi # move offset of IDT into EDI\r
53 addl $6, %esp # correct stack\r
54 mov 4(%ebp), %eax # Get vector number\r
55 shll $3, %eax # multiply by 8 to get offset\r
56 addl %eax, %edi # add to IDT base to get entry\r
57 movl 8(%ebp), %eax # load new address into IDT entry\r
58 movw %ax, %es:(%edi) # write bits 15..0 of offset\r
59 shrl $16, %eax # use ax to copy 31..16 to descriptors\r
60 movw %ax, %es:6(%edi) # write bits 31..16 of offset\r
61 popfl # restore flags (possible enabling interrupts)\r
62 pop %edi\r
63 ret\r
64\r
65.macro JmpCommonIdtEntry errno, vector\r
66 /* jmp commonIdtEntry - this must be hand coded to keep the assembler from\r
67 * using a 8 bit reletive jump when the entries are\r
68 * within 255 bytes of the common entry. This must\r
69 * be done to maintain the consistency of the size\r
70 * of entry points...\r
71 */\r
72 pushl \errno\r
73 pushl \vector\r
74 #.byte 0e9h # jmp 16 bit reletive \r
75 #.long commonIdtEntry - $ - $4 # offset to jump to\r
76 jmpl *commonIdtEntry\r
77.endm\r
78\r
79.align 0x02\r
80ASM_PFX(SystemExceptionHandler):\r
81INT0:\r
82 JmpCommonIdtEntry errno=0,vector=0\r
83INT1:\r
84 JmpCommonIdtEntry errno=0,vector=1\r
85INT2:\r
86 JmpCommonIdtEntry errno=0,vector=2\r
87INT3:\r
88 JmpCommonIdtEntry errno=0,vector=3\r
89INT4:\r
90 JmpCommonIdtEntry errno=0,vector=4\r
91INT5:\r
92 JmpCommonIdtEntry errno=0,vector=5\r
93INT6:\r
94 JmpCommonIdtEntry errno=0,vector=6\r
95INT7:\r
96 JmpCommonIdtEntry errno=0,vector=7\r
97INT8:\r
98# Double fault causes an error code to be pushed so no phony pushl necessary\r
99 nop\r
100 nop\r
101 pushl $8\r
102 jmpl *commonIdtEntry\r
103INT9:\r
104 JmpCommonIdtEntry errno=0,vector=9\r
105INT10:\r
106# Invalid TSS causes an error code to be pushed so no phony pushl necessary\r
107 nop\r
108 nop\r
109 pushl $10\r
110 jmpl *commonIdtEntry\r
111INT11:\r
112# Segment Not Present causes an error code to be pushed so no phony pushl necessary\r
113 nop\r
114 nop\r
115 pushl $11\r
116 jmpl *commonIdtEntry \r
117INT12:\r
118# Stack fault causes an error code to be pushed so no phony pushl necessary\r
119 nop\r
120 nop\r
121 pushl $12\r
122 jmpl *commonIdtEntry\r
123INT13:\r
124# GP fault causes an error code to be pushed so no phony pushl necessary\r
125 nop\r
126 nop\r
127 pushl $13\r
128 jmpl *commonIdtEntry\r
129INT14:\r
130# Page fault causes an error code to be pushed so no phony pushl necessary\r
131 nop\r
132 nop\r
133 pushl $14\r
134 jmpl *commonIdtEntry\r
135INT15:\r
136 JmpCommonIdtEntry errno=0,vector=15\r
137INT16:\r
138 JmpCommonIdtEntry errno=0,vector=16\r
139INT17:\r
140# Alignment check causes an error code to be pushed so no phony pushl necessary\r
141 nop\r
142 nop\r
143 pushl $17\r
144 jmpl *commonIdtEntry\r
145INT18:\r
146 JmpCommonIdtEntry errno=0,vector=18\r
147INT19:\r
148 JmpCommonIdtEntry errno=0,vector=19\r
149INTUnknown:\r
150 JmpCommonIdtEntry errno=0,vector=20\r
151 JmpCommonIdtEntry errno=0,vector=21\r
152 JmpCommonIdtEntry errno=0,vector=22\r
153 JmpCommonIdtEntry errno=0,vector=23\r
154 JmpCommonIdtEntry errno=0,vector=24\r
155 JmpCommonIdtEntry errno=0,vector=25\r
156 JmpCommonIdtEntry errno=0,vector=26\r
157 JmpCommonIdtEntry errno=0,vector=27\r
158 JmpCommonIdtEntry errno=0,vector=28\r
159 JmpCommonIdtEntry errno=0,vector=29\r
160 JmpCommonIdtEntry errno=0,vector=30\r
161 JmpCommonIdtEntry errno=0,vector=31\r
162\r
163ASM_PFX(SystemTimerHandler):\r
164 JmpCommonIdtEntry errno=0,vector=ASM_PFX(mTimerVector)\r
165\r
166commonIdtEntry:\r
167# +---------------------+\r
168# + EFlags +\r
169# +---------------------+\r
170# + CS +\r
171# +---------------------+\r
172# + EIP +\r
173# +---------------------+\r
174# + Error Code +\r
175# +---------------------+\r
176# + Vector Number +\r
177# +---------------------+\r
178# + EBP +\r
179# +---------------------+ <-- EBP\r
180\r
181 cli\r
182 pushl %ebp\r
183 movl %esp, %ebp\r
184\r
185 #\r
186 # Align stack to make sure that EFI_FX_SAVE_STATE_IA32 of EFI_SYSTEM_CONTEXT_IA32\r
187 # is 16-byte aligned\r
188 #\r
189 andl $0xfffffff0, %esp\r
190 subl $12, %esp\r
191\r
192## UINT32 Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax#\r
193 pushl %eax\r
194 pushl %ecx\r
195 pushl %edx\r
196 pushl %ebx\r
197 leal 24(%ebp), %ecx\r
198 pushl %ecx # ESP\r
199 pushl (%ebp) # EBP\r
200 pushl %esi\r
201 pushl %edi\r
202\r
203## UINT32 Gs, Fs, Es, Ds, Cs, Ss#\r
204 movl %ss, %eax\r
205 pushl %eax\r
206 movzwl 16(%ebp), %eax\r
207 pushl %eax\r
208 movl %ds, %eax\r
209 pushl %eax\r
210 movl %es, %eax\r
211 pushl %eax\r
212 movl %fs, %eax\r
213 pushl %eax\r
214 movl %gs, %eax\r
215 pushl %eax\r
216\r
217## UINT32 Eip#\r
218 pushl 12(%ebp)\r
219\r
220## UINT32 Gdtr[2], Idtr[2]#\r
221 subl $8, %esp\r
222 sidt (%esp)\r
223 subl $8, %esp\r
224 sgdt (%esp)\r
225\r
226## UINT32 Ldtr, Tr#\r
227 xorl %eax, %eax\r
228 strw %ax\r
229 pushl %eax\r
230 sldt %ax\r
231 pushl %eax\r
232\r
233## UINT32 EFlags#\r
234 pushl 5*4(%ebp)\r
235\r
236## UINT32 Cr0, Cr1, Cr2, Cr3, Cr4#\r
237 movl %cr4, %eax\r
238 orl $0x208, %eax\r
239 movl %eax, %cr4\r
240 pushl %eax\r
241 movl %cr3, %eax\r
242 pushl %eax\r
243 movl %cr2, %eax\r
244 pushl %eax\r
245 xorl %eax, %eax\r
246 pushl %eax\r
247 movl %cr0, %eax\r
248 pushl %eax\r
249\r
250## UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7#\r
251 movl %dr7, %eax\r
252 pushl %eax\r
253## clear Dr7 while executing debugger itself\r
254 xorl %eax, %eax\r
255 movl %eax, %dr7\r
256\r
257 movl %dr6, %eax\r
258 pushl %eax\r
259## insure all status bits in dr6 are clear...\r
260 xorl %eax, %eax\r
261 movl %eax, %dr6\r
262\r
263 movl %dr3, %eax\r
264 pushl %eax\r
265 movl %dr2, %eax\r
266 pushl %eax\r
267 movl %dr1, %eax\r
268 pushl %eax\r
269 movl %dr0, %eax\r
270 pushl %eax\r
271\r
272## FX_SAVE_STATE_IA32 FxSaveState#\r
273 subl $512, %esp\r
274 movl %esp, %edi\r
275 #.byte 0f, 0ae, 00000111y #fxsave [edi]\r
276 fxsave (%edi)\r
277 \r
278## UINT32 ExceptionData#\r
279 pushl 2*4(%ebp)\r
280\r
281## Prepare parameter and call\r
282 movl %esp, %edx\r
283 pushl %edx\r
284 movl 1*4(%ebp), %eax\r
285 pushl %eax\r
286 cmpl $32, %eax\r
287 jb CallException\r
288 call ASM_PFX(TimerHandler)\r
289 jmp ExceptionDone\r
290CallException:\r
291 call ASM_PFX(ExceptionHandler)\r
292ExceptionDone:\r
293 addl $8, %esp\r
294\r
295 cli\r
296## UINT32 ExceptionData#\r
297 addl $4, %esp\r
298\r
299## FX_SAVE_STATE_IA32 FxSaveState#\r
300 movl %esp, %esi\r
301 #db 0fh, 0aeh, 00001110y # fxrstor [esi]\r
302 fxrstor (%esi)\r
303 addl $512, %esp\r
304\r
305## UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7#\r
306 popl %eax\r
307 movl %eax, %dr0\r
308 popl %eax\r
309 movl %eax, %dr1\r
310 popl %eax\r
311 movl %eax, %dr2\r
312 popl %eax\r
313 movl %eax, %dr3\r
314## skip restore of dr6. We cleared dr6 during the context save.\r
315 addl $4, %esp\r
316 popl %eax\r
317 movl %eax, %dr7\r
318\r
319## UINT32 Cr0, Cr1, Cr2, Cr3, Cr4#\r
320 popl %eax\r
321 movl %eax, %cr0\r
322 addl $4, %esp # not for Cr1\r
323 popl %eax\r
324 movl %eax, %cr2\r
325 popl %eax\r
326 movl %eax, %cr3\r
327 popl %eax\r
328 movl %eax, %cr4\r
329\r
330## UINT32 EFlags#\r
331 popl 5*4(%ebp)\r
332\r
333## UINT32 Ldtr, Tr#\r
334## UINT32 Gdtr[2], Idtr[2]#\r
335## Best not let anyone mess with these particular registers...\r
336 addl $24, %esp\r
337\r
338## UINT32 Eip#\r
339 popl 3*4(%ebp)\r
340\r
341## UINT32 Gs, Fs, Es, Ds, Cs, Ss#\r
342## NOTE - modified segment registers could hang the debugger... We\r
343## could attempt to insulate ourselves against this possibility,\r
344## but that poses risks as well.\r
345##\r
346 popl %gs\r
347 popl %fs\r
348 popl %es\r
349 popl %ds\r
350 popl 4*4(%ebp)\r
351 popl %ss\r
352\r
353## UINT32 Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax#\r
354 popl %edi\r
355 popl %esi\r
356 addl $4, %esp # not for ebp\r
357 addl $4, %esp # not for esp\r
358 popl %ebx\r
359 popl %edx\r
360 popl %ecx\r
361 popl %eax\r
362\r
363 movl %ebp, %esp\r
364 popl %ebp\r
365 addl $8, %esp\r
366 iretl\r
367\r
368\r
369##############################################################################\r
370# data\r
371##############################################################################\r
372\r
373.align 2, 0x0\r
374gdtr:\r
375 .word 8*8 - 1\r
376 .long GDT_BASE\r
377 \r
378##############################################################################\r
379# global descriptor table (GDT)\r
380##############################################################################\r
381\r
382\r
383.align 2, 0x90\r
384GDT_BASE:\r
385 .quad 0x0 // null descriptor\r
386 .quad 0x00cf92000000ffff // linear data segment descriptor\r
387 .quad 0x00cf9a000000ffff // linear code segment descriptor\r
388 .quad 0x00cf92000000ffff // system data segment descriptor\r
389 .quad 0x00cf9a000000ffff // system code segment descriptor\r
390 .quad 0x0 // spare segment descriptor\r
391 .quad 0x0\r
392 .quad 0x0\r
393\r
394.align 0x02\r
395\r
396idtr:\r
397 .word IDT_END - IDT_BASE - 1 # IDT limit\r
398 .long IDT_BASE\r
399 \r
400##############################################################################\r
401# interrupt descriptor table (IDT)\r
402#\r
403# Note: The hardware IRQ's specified in this table are the normal PC/AT IRQ\r
404# mappings. This implementation only uses the system timer and all other\r
405# IRQs will remain masked. The descriptors for vectors 33+ are provided\r
406# for convenience.\r
407##############################################################################\r
408\r
409.align 0x02\r
410\r
411IDT_BASE:\r
412 .skip 256 * 16\r
413\r
414/**\r
415# divide by zero (INT 0)\r
416DIV_ZERO_SEL equ $-IDT_BASE\r
417 dw 0 # offset 15:0\r
418 dw SYS_CODE_SEL # selector 15:0\r
419 db 0 # 0 for interrupt gate\r
420 db 0eh OR 80h # type = 386 interrupt gate, present\r
421 dw 0 # offset 31:16\r
422\r
423# debug exception (INT 1)\r
424DEBUG_EXCEPT_SEL equ $-IDT_BASE\r
425 dw 0 # offset 15:0\r
426 dw SYS_CODE_SEL # selector 15:0\r
427 db 0 # 0 for interrupt gate\r
428 db 0eh OR 80h # type = 386 interrupt gate, present\r
429 dw 0 # offset 31:16\r
430\r
431# NMI (INT 2)\r
432NMI_SEL equ $-IDT_BASE\r
433 dw 0 # offset 15:0\r
434 dw SYS_CODE_SEL # selector 15:0\r
435 db 0 # 0 for interrupt gate\r
436 db 0eh OR 80h # type = 386 interrupt gate, present\r
437 dw 0 # offset 31:16\r
438\r
439# soft breakpoint (INT 3)\r
440BREAKPOINT_SEL equ $-IDT_BASE\r
441 dw 0 # offset 15:0\r
442 dw SYS_CODE_SEL # selector 15:0\r
443 db 0 # 0 for interrupt gate\r
444 db 0eh OR 80h # type = 386 interrupt gate, present\r
445 dw 0 # offset 31:16\r
446\r
447# overflow (INT 4)\r
448OVERFLOW_SEL equ $-IDT_BASE\r
449 dw 0 # offset 15:0\r
450 dw SYS_CODE_SEL # selector 15:0\r
451 db 0 # 0 for interrupt gate\r
452 db 0eh OR 80h # type = 386 interrupt gate, present\r
453 dw 0 # offset 31:16\r
454\r
455# bounds check (INT 5)\r
456BOUNDS_CHECK_SEL equ $-IDT_BASE\r
457 dw 0 # offset 15:0\r
458 dw SYS_CODE_SEL # selector 15:0\r
459 db 0 # 0 for interrupt gate\r
460 db 0eh OR 80h # type = 386 interrupt gate, present\r
461 dw 0 # offset 31:16\r
462\r
463# invalid opcode (INT 6)\r
464INVALID_OPCODE_SEL equ $-IDT_BASE\r
465 dw 0 # offset 15:0\r
466 dw SYS_CODE_SEL # selector 15:0\r
467 db 0 # 0 for interrupt gate\r
468 db 0eh OR 80h # type = 386 interrupt gate, present\r
469 dw 0 # offset 31:16\r
470\r
471# device not available (INT 7)\r
472DEV_NOT_AVAIL_SEL equ $-IDT_BASE\r
473 dw 0 # offset 15:0\r
474 dw SYS_CODE_SEL # selector 15:0\r
475 db 0 # 0 for interrupt gate\r
476 db 0eh OR 80h # type = 386 interrupt gate, present\r
477 dw 0 # offset 31:16\r
478\r
479# double fault (INT 8)\r
480DOUBLE_FAULT_SEL equ $-IDT_BASE\r
481 dw 0 # offset 15:0\r
482 dw SYS_CODE_SEL # selector 15:0\r
483 db 0 # 0 for interrupt gate\r
484 db 0eh OR 80h # type = 386 interrupt gate, present\r
485 dw 0 # offset 31:16\r
486\r
487# Coprocessor segment overrun - reserved (INT 9)\r
488RSVD_INTR_SEL1 equ $-IDT_BASE\r
489 dw 0 # offset 15:0\r
490 dw SYS_CODE_SEL # selector 15:0\r
491 db 0 # 0 for interrupt gate\r
492 db 0eh OR 80h # type = 386 interrupt gate, present\r
493 dw 0 # offset 31:16\r
494\r
495# invalid TSS (INT 0ah)\r
496INVALID_TSS_SEL equ $-IDT_BASE\r
497 dw 0 # offset 15:0\r
498 dw SYS_CODE_SEL # selector 15:0\r
499 db 0 # 0 for interrupt gate\r
500 db 0eh OR 80h # type = 386 interrupt gate, present\r
501 dw 0 # offset 31:16\r
502\r
503# segment not present (INT 0bh)\r
504SEG_NOT_PRESENT_SEL equ $-IDT_BASE\r
505 dw 0 # offset 15:0\r
506 dw SYS_CODE_SEL # selector 15:0\r
507 db 0 # 0 for interrupt gate\r
508 db 0eh OR 80h # type = 386 interrupt gate, present\r
509 dw 0 # offset 31:16\r
510\r
511# stack fault (INT 0ch)\r
512STACK_FAULT_SEL equ $-IDT_BASE\r
513 dw 0 # offset 15:0\r
514 dw SYS_CODE_SEL # selector 15:0\r
515 db 0 # 0 for interrupt gate\r
516 db 0eh OR 80h # type = 386 interrupt gate, present\r
517 dw 0 # offset 31:16\r
518\r
519# general protection (INT 0dh)\r
520GP_FAULT_SEL equ $-IDT_BASE\r
521 dw 0 # offset 15:0\r
522 dw SYS_CODE_SEL # selector 15:0\r
523 db 0 # 0 for interrupt gate\r
524 db 0eh OR 80h # type = 386 interrupt gate, present\r
525 dw 0 # offset 31:16\r
526\r
527# page fault (INT 0eh)\r
528PAGE_FAULT_SEL equ $-IDT_BASE\r
529 dw 0 # offset 15:0\r
530 dw SYS_CODE_SEL # selector 15:0\r
531 db 0 # 0 for interrupt gate\r
532 db 0eh OR 80h # type = 386 interrupt gate, present\r
533 dw 0 # offset 31:16\r
534\r
535# Intel reserved - do not use (INT 0fh)\r
536RSVD_INTR_SEL2 equ $-IDT_BASE\r
537 dw 0 # offset 15:0\r
538 dw SYS_CODE_SEL # selector 15:0\r
539 db 0 # 0 for interrupt gate\r
540 db 0eh OR 80h # type = 386 interrupt gate, present\r
541 dw 0 # offset 31:16\r
542\r
543# floating point error (INT 10h)\r
544FLT_POINT_ERR_SEL equ $-IDT_BASE\r
545 dw 0 # offset 15:0\r
546 dw SYS_CODE_SEL # selector 15:0\r
547 db 0 # 0 for interrupt gate\r
548 db 0eh OR 80h # type = 386 interrupt gate, present\r
549 dw 0 # offset 31:16\r
550\r
551# alignment check (INT 11h)\r
552ALIGNMENT_CHECK_SEL equ $-IDT_BASE\r
553 dw 0 # offset 15:0\r
554 dw SYS_CODE_SEL # selector 15:0\r
555 db 0 # 0 for interrupt gate\r
556 db 0eh OR 80h # (10001110)type = 386 interrupt gate, present\r
557 dw 0 # offset 31:16\r
558\r
559# machine check (INT 12h)\r
560MACHINE_CHECK_SEL equ $-IDT_BASE\r
561 dw 0 # offset 15:0\r
562 dw SYS_CODE_SEL # selector 15:0\r
563 db 0 # 0 for interrupt gate\r
564 db 0eh OR 80h # (10001110)type = 386 interrupt gate, present\r
565 dw 0 # offset 31:16\r
566\r
567# SIMD floating-point exception (INT 13h)\r
568SIMD_EXCEPTION_SEL equ $-IDT_BASE\r
569 dw 0 # offset 15:0\r
570 dw SYS_CODE_SEL # selector 15:0\r
571 db 0 # 0 for interrupt gate\r
572 db 0eh OR 80h # (10001110)type = 386 interrupt gate, present\r
573 dw 0 # offset 31:16\r
574\r
575REPEAT (32 - 20)\r
576 dw 0 # offset 15:0\r
577 dw SYS_CODE_SEL # selector 15:0\r
578 db 0 # 0 for interrupt gate\r
579 db 0eh OR 80h # (10001110)type = 386 interrupt gate, present\r
580 dw 0 # offset 31:16\r
581ENDM\r
582\r
583# 72 unspecified descriptors\r
584 db (72 * 8) dup(0)\r
585 \r
586# IRQ 0 (System timer) - (INT 68h)\r
587IRQ0_SEL equ $-IDT_BASE\r
588 dw 0 # offset 15:0\r
589 dw SYS_CODE_SEL # selector 15:0\r
590 db 0 # 0 for interrupt gate\r
591 db 0eh OR 80h # (10001110)type = 386 interrupt gate, present\r
592 dw 0 # offset 31:16\r
593\r
594# IRQ 1 (8042 Keyboard controller) - (INT 69h)\r
595IRQ1_SEL equ $-IDT_BASE\r
596 dw 0 # offset 15:0\r
597 dw SYS_CODE_SEL # selector 15:0\r
598 db 0 # 0 for interrupt gate\r
599 db 0eh OR 80h # (10001110)type = 386 interrupt gate, present\r
600 dw 0 # offset 31:16\r
601\r
602# Reserved - IRQ 2 redirect (IRQ 2) - DO NOT USE!!! - (INT 6ah)\r
603IRQ2_SEL equ $-IDT_BASE\r
604 dw 0 # offset 15:0\r
605 dw SYS_CODE_SEL # selector 15:0\r
606 db 0 # 0 for interrupt gate\r
607 db 0eh OR 80h # (10001110)type = 386 interrupt gate, present\r
608 dw 0 # offset 31:16\r
609\r
610# IRQ 3 (COM 2) - (INT 6bh)\r
611IRQ3_SEL equ $-IDT_BASE\r
612 dw 0 # offset 15:0\r
613 dw SYS_CODE_SEL # selector 15:0\r
614 db 0 # 0 for interrupt gate\r
615 db 0eh OR 80h # (10001110)type = 386 interrupt gate, present\r
616 dw 0 # offset 31:16\r
617\r
618# IRQ 4 (COM 1) - (INT 6ch)\r
619IRQ4_SEL equ $-IDT_BASE\r
620 dw 0 # offset 15:0\r
621 dw SYS_CODE_SEL # selector 15:0\r
622 db 0 # 0 for interrupt gate\r
623 db 0eh OR 80h # (10001110)type = 386 interrupt gate, present\r
624 dw 0 # offset 31:16\r
625\r
626# IRQ 5 (LPT 2) - (INT 6dh)\r
627IRQ5_SEL equ $-IDT_BASE\r
628 dw 0 # offset 15:0\r
629 dw SYS_CODE_SEL # selector 15:0\r
630 db 0 # 0 for interrupt gate\r
631 db 0eh OR 80h # (10001110)type = 386 interrupt gate, present\r
632 dw 0 # offset 31:16\r
633\r
634# IRQ 6 (Floppy controller) - (INT 6eh)\r
635IRQ6_SEL equ $-IDT_BASE\r
636 dw 0 # offset 15:0\r
637 dw SYS_CODE_SEL # selector 15:0\r
638 db 0 # 0 for interrupt gate\r
639 db 0eh OR 80h # (10001110)type = 386 interrupt gate, present\r
640 dw 0 # offset 31:16\r
641\r
642# IRQ 7 (LPT 1) - (INT 6fh)\r
643IRQ7_SEL equ $-IDT_BASE\r
644 dw 0 # offset 15:0\r
645 dw SYS_CODE_SEL # selector 15:0\r
646 db 0 # 0 for interrupt gate\r
647 db 0eh OR 80h # (10001110)type = 386 interrupt gate, present\r
648 dw 0 # offset 31:16\r
649\r
650# IRQ 8 (RTC Alarm) - (INT 70h)\r
651IRQ8_SEL equ $-IDT_BASE\r
652 dw 0 # offset 15:0\r
653 dw SYS_CODE_SEL # selector 15:0\r
654 db 0 # 0 for interrupt gate\r
655 db 0eh OR 80h # (10001110)type = 386 interrupt gate, present\r
656 dw 0 # offset 31:16\r
657\r
658# IRQ 9 - (INT 71h)\r
659IRQ9_SEL equ $-IDT_BASE\r
660 dw 0 # offset 15:0\r
661 dw SYS_CODE_SEL # selector 15:0\r
662 db 0 # 0 for interrupt gate\r
663 db 0eh OR 80h # (10001110)type = 386 interrupt gate, present\r
664 dw 0 # offset 31:16\r
665\r
666# IRQ 10 - (INT 72h)\r
667IRQ10_SEL equ $-IDT_BASE\r
668 dw 0 # offset 15:0\r
669 dw SYS_CODE_SEL # selector 15:0\r
670 db 0 # 0 for interrupt gate\r
671 db 0eh OR 80h # (10001110)type = 386 interrupt gate, present\r
672 dw 0 # offset 31:16\r
673\r
674# IRQ 11 - (INT 73h)\r
675IRQ11_SEL equ $-IDT_BASE\r
676 dw 0 # offset 15:0\r
677 dw SYS_CODE_SEL # selector 15:0\r
678 db 0 # 0 for interrupt gate\r
679 db 0eh OR 80h # (10001110)type = 386 interrupt gate, present\r
680 dw 0 # offset 31:16\r
681\r
682# IRQ 12 (PS/2 mouse) - (INT 74h)\r
683IRQ12_SEL equ $-IDT_BASE\r
684 dw 0 # offset 15:0\r
685 dw SYS_CODE_SEL # selector 15:0\r
686 db 0 # 0 for interrupt gate\r
687 db 0eh OR 80h # (10001110)type = 386 interrupt gate, present\r
688 dw 0 # offset 31:16\r
689\r
690# IRQ 13 (Floating point error) - (INT 75h)\r
691IRQ13_SEL equ $-IDT_BASE\r
692 dw 0 # offset 15:0\r
693 dw SYS_CODE_SEL # selector 15:0\r
694 db 0 # 0 for interrupt gate\r
695 db 0eh OR 80h # (10001110)type = 386 interrupt gate, present\r
696 dw 0 # offset 31:16\r
697\r
698# IRQ 14 (Secondary IDE) - (INT 76h)\r
699IRQ14_SEL equ $-IDT_BASE\r
700 dw 0 # offset 15:0\r
701 dw SYS_CODE_SEL # selector 15:0\r
702 db 0 # 0 for interrupt gate\r
703 db 0eh OR 80h # (10001110)type = 386 interrupt gate, present\r
704 dw 0 # offset 31:16\r
705\r
706# IRQ 15 (Primary IDE) - (INT 77h)\r
707IRQ15_SEL equ $-IDT_BASE\r
708 dw 0 # offset 15:0\r
709 dw SYS_CODE_SEL # selector 15:0\r
710 db 0 # 0 for interrupt gate\r
711 db 0eh OR 80h # (10001110)type = 386 interrupt gate, present\r
712 dw 0 # offset 31:16\r
713\r
714 db (1 * 8) dup(0)\r
715\r
716**/\r
717IDT_END:\r
EFI Development Kit II mirror for PVE