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ede15247 1/** @file\r
e3e7f36a 2 The header file provides interface definitions exposed by CSM (Compatible Support Module).\r
3 \r
4 The CSM provides compatibility support between the Framework and traditional, legacy BIOS code \r
5 and allows booting a traditional OS or booting an EFI OS off a device that requires a traditional \r
6 option ROM (OpROM). \r
ede15247 7\r
e3e7f36a 8 These definitions are from Compatibility Support Module Spec Version 0.97.\r
ede15247 9 \r
10 Copyright (c) 2007-2009, Intel Corporation\r
11 All rights reserved. This program and the accompanying materials\r
12 are licensed and made available under the terms and conditions of the BSD License\r
13 which accompanies this distribution. The full text of the license may be found at\r
14 http://opensource.org/licenses/bsd-license.php\r
15\r
16 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
17 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
18\r
19 @par Revision Reference:\r
20 These definitions are from Compatibility Support Module Spec\r
21 Version 0.97.\r
22\r
23**/\r
24\r
25#ifndef _FRAMEWORK_LEGACY_16_H_\r
26#define _FRAMEWORK_LEGACY_16_H_\r
27\r
28#pragma pack(1)\r
29\r
30typedef UINT8 SERIAL_MODE;\r
31typedef UINT8 PARALLEL_MODE;\r
32\r
33#define EFI_COMPATIBILITY16_TABLE_SIGNATURE SIGNATURE_32 ('I', 'F', 'E', '$')\r
34\r
35///\r
e3e7f36a 36/// There is a table located within the traditional BIOS in either the 0xF000:xxxx or 0xE000:xxxx\r
37/// physical address range. It is located on a 16-byte boundary and provides the physical address of the\r
38/// entry point for the Compatibility16 functions. These functions provide the platform-specific\r
39/// information that is required by the generic EfiCompatibility code. The functions are invoked via\r
40/// thunking by using EFI_LEGACY_BIOS_PROTOCOL.FarCall86() with the 32-bit physical\r
41/// entry point.\r
ede15247 42///\r
43typedef struct {\r
e3e7f36a 44 ///\r
45 /// The string "$EFI" denotes the start of the EfiCompatibility table. Byte 0 is "I," byte\r
46 /// 1 is "F," byte 2 is "E," and byte 3 is "$" and is normally accessed as a DWORD or UINT32.\r
ede15247 47 ///\r
48 UINT32 Signature;\r
e3e7f36a 49 \r
50 ///\r
51 /// The value required such that byte checksum of TableLength equals zero.\r
ede15247 52 ///\r
53 UINT8 TableChecksum;\r
e3e7f36a 54 \r
55 ///\r
56 /// The length of this table.\r
ede15247 57 ///\r
58 UINT8 TableLength;\r
e3e7f36a 59 \r
60 ///\r
61 /// The major EFI revision for which this table was generated.\r
ede15247 62 /// \r
63 UINT8 EfiMajorRevision;\r
e3e7f36a 64 \r
65 ///\r
66 /// The minor EFI revision for which this table was generated.\r
ede15247 67 ///\r
68 UINT8 EfiMinorRevision;\r
e3e7f36a 69 \r
70 ///\r
71 /// The major revision of this table.\r
ede15247 72 ///\r
73 UINT8 TableMajorRevision;\r
e3e7f36a 74 \r
75 ///\r
76 /// The minor revision of this table.\r
ede15247 77 ///\r
78 UINT8 TableMinorRevision;\r
e3e7f36a 79 \r
80 ///\r
81 /// Reserved for future usage.\r
ede15247 82 ///\r
83 UINT16 Reserved;\r
e3e7f36a 84 \r
85 ///\r
86 /// The segment of the entry point within the traditional BIOS for Compatibility16 functions.\r
ede15247 87 ///\r
88 UINT16 Compatibility16CallSegment;\r
e3e7f36a 89 \r
90 ///\r
91 /// The offset of the entry point within the traditional BIOS for Compatibility16 functions.\r
ede15247 92 ///\r
93 UINT16 Compatibility16CallOffset;\r
e3e7f36a 94 \r
95 ///\r
96 /// The segment of the entry point within the traditional BIOS for EfiCompatibility to invoke the PnP installation check.\r
ede15247 97 ///\r
98 UINT16 PnPInstallationCheckSegment;\r
e3e7f36a 99 \r
100 ///\r
101 /// The Offset of the entry point within the traditional BIOS for EfiCompatibility to invoke the PnP installation check.\r
ede15247 102 ///\r
103 UINT16 PnPInstallationCheckOffset;\r
e3e7f36a 104 \r
105 ///\r
106 /// EFI system resources table. Type EFI_SYSTEM_TABLE is defined in the IntelPlatform Innovation Framework for EFI \r
107 /// Driver Execution Environment Core Interface Specification (DXE CIS).\r
ede15247 108 ///\r
e3e7f36a 109 UINT32 EfiSystemTable; \r
110 \r
111 ///\r
112 /// The address of an OEM-provided identifier string. The string is null terminated.\r
ede15247 113 ///\r
114 UINT32 OemIdStringPointer;\r
e3e7f36a 115 \r
116 ///\r
117 /// The 32-bit physical address where ACPI RSD PTR is stored within the traditional\r
118 /// BIOS. The remained of the ACPI tables are located at their EFI addresses. The size\r
119 /// reserved is the maximum for ACPI 2.0. The EfiCompatibility will fill in the ACPI\r
120 /// RSD PTR with either the ACPI 1.0b or 2.0 values.\r
ede15247 121 ///\r
122 UINT32 AcpiRsdPtrPointer;\r
e3e7f36a 123 \r
124 ///\r
125 /// The OEM revision number. Usage is undefined but provided for OEM module usage.\r
ede15247 126 ///\r
127 UINT16 OemRevision;\r
e3e7f36a 128 \r
129 ///\r
130 /// The 32-bit physical address where INT15 E820 data is stored within the traditional\r
131 /// BIOS. The EfiCompatibility code will fill in the E820Pointer value and copy the\r
132 /// data to the indicated area.\r
ede15247 133 ///\r
134 UINT32 E820Pointer;\r
e3e7f36a 135 \r
136 ///\r
137 /// The length of the E820 data and is filled in by the EfiCompatibility code.\r
ede15247 138 ///\r
139 UINT32 E820Length;\r
e3e7f36a 140 \r
141 ///\r
142 /// The 32-bit physical address where the $PIR table is stored in the traditional BIOS.\r
143 /// The EfiCompatibility code will fill in the IrqRoutingTablePointer value and\r
144 /// copy the data to the indicated area.\r
ede15247 145 ///\r
146 UINT32 IrqRoutingTablePointer;\r
e3e7f36a 147 \r
148 ///\r
149 /// The length of the $PIR table and is filled in by the EfiCompatibility code.\r
ede15247 150 ///\r
151 UINT32 IrqRoutingTableLength;\r
e3e7f36a 152 \r
153 ///\r
154 /// The 32-bit physical address where the MP table is stored in the traditional BIOS.\r
155 /// The EfiCompatibility code will fill in the MpTablePtr value and copy the data to the indicated area.\r
ede15247 156 ///\r
157 UINT32 MpTablePtr;\r
e3e7f36a 158 \r
159 ///\r
160 /// The length of the MP table and is filled in by the EfiCompatibility code.\r
ede15247 161 ///\r
162 UINT32 MpTableLength;\r
e3e7f36a 163 \r
164 ///\r
8d303ef3 165 /// The segment of the OEM-specific INT table/code.\r
ede15247 166 /// \r
167 UINT16 OemIntSegment;\r
e3e7f36a 168 \r
169 ///\r
8d303ef3 170 /// The offset of the OEM-specific INT table/code.\r
ede15247 171 ///\r
172 UINT16 OemIntOffset;\r
e3e7f36a 173 \r
174 ///\r
175 /// The segment of the OEM-specific 32-bit table/code.\r
ede15247 176 ///\r
177 UINT16 Oem32Segment;\r
e3e7f36a 178 \r
179 ///\r
180 /// The offset of the OEM-specific 32-bit table/code.\r
ede15247 181 ///\r
182 UINT16 Oem32Offset;\r
8d303ef3 183 \r
184 ///\r
185 /// The segment of the OEM-specific 16-bit table/code.\r
ede15247 186 ///\r
187 UINT16 Oem16Segment;\r
8d303ef3 188 \r
189 ///\r
190 /// The offset of the OEM-specific 16-bit table/code.\r
ede15247 191 ///\r
192 UINT16 Oem16Offset;\r
8d303ef3 193 \r
194 ///\r
195 /// The segment of the TPM binary passed to 16-bit CSM.\r
ede15247 196 ///\r
197 UINT16 TpmSegment;\r
8d303ef3 198 \r
199 ///\r
200 /// The offset of the TPM binary passed to 16-bit CSM.\r
ede15247 201 ///\r
202 UINT16 TpmOffset;\r
e3e7f36a 203 \r
204 ///\r
205 /// A pointer to a string identifying the independent BIOS vendor.\r
ede15247 206 ///\r
207 UINT32 IbvPointer;\r
8d303ef3 208 \r
209 ///\r
210 /// This field is NULL for all systems not supporting PCI Express. This field is the base\r
211 /// value of the start of the PCI Express memory-mapped configuration registers and\r
212 /// must be filled in prior to EfiCompatibility code issuing the Compatibility16 function\r
213 /// Compatibility16InitializeYourself().\r
214 /// Compatibility16InitializeYourself() is defined in Compatability16\r
215 /// Functions.\r
ede15247 216 ///\r
217 UINT32 PciExpressBase;\r
8d303ef3 218 \r
219 ///\r
220 /// Maximum PCI bus number assigned.\r
ede15247 221 ///\r
222 UINT8 LastPciBus;\r
223} EFI_COMPATIBILITY16_TABLE;\r
224\r
225///\r
e3e7f36a 226/// Functions provided by the CSM binary which communicate between the EfiCompatibility \r
64419615 227/// and Compatability16 code.\r
228///\r
229/// Inconsistent with specification here: \r
230/// The member's name started with "Compatibility16" [defined in Intel Framework Compatibility Support Module Specification / 0.97 version] \r
231/// has been changed to "Legacy16" since keeping backward compatible.\r
232///\r
ede15247 233typedef enum {\r
e3e7f36a 234 ///\r
235 /// Causes the Compatibility16 code to do any internal initialization required.\r
236 /// Input:\r
237 /// AX = Compatibility16InitializeYourself\r
238 /// ES:BX = Pointer to EFI_TO_COMPATIBILITY16_INIT_TABLE\r
239 /// Return:\r
240 /// AX = Return Status codes\r
64419615 241 ///\r
ede15247 242 Legacy16InitializeYourself = 0x0000,\r
e3e7f36a 243 \r
244 ///\r
245 /// Causes the Compatibility16 BIOS to perform any drive number translations to match the boot sequence.\r
246 /// Input:\r
247 /// AX = Compatibility16UpdateBbs\r
248 /// ES:BX = Pointer to EFI_TO_COMPATIBILITY16_BOOT_TABLE\r
249 /// Return:\r
250 /// AX = Returned status codes\r
ede15247 251 ///\r
252 Legacy16UpdateBbs = 0x0001,\r
e3e7f36a 253 \r
254 ///\r
255 /// Allows the Compatibility16 code to perform any final actions before booting. The Compatibility16\r
256 /// code is read/write.\r
257 /// Input:\r
258 /// AX = Compatibility16PrepareToBoot\r
259 /// ES:BX = Pointer to EFI_TO_COMPATIBILITY16_BOOT_TABLE structure \r
260 /// Return:\r
261 /// AX = Returned status codes\r
ede15247 262 ///\r
263 Legacy16PrepareToBoot = 0x0002,\r
e3e7f36a 264 \r
265 ///\r
266 /// Causes the Compatibility16 BIOS to boot. The Compatibility16 code is Read/Only.\r
267 /// Input:\r
268 /// AX = Compatibility16Boot\r
269 /// Output:\r
270 /// AX = Returned status codes\r
ede15247 271 ///\r
272 Legacy16Boot = 0x0003,\r
e3e7f36a 273 \r
274 ///\r
275 /// Allows the Compatibility16 code to get the last device from which a boot was attempted. This is\r
276 /// stored in CMOS and is the priority number of the last attempted boot device.\r
277 /// Input:\r
278 /// AX = Compatibility16RetrieveLastBootDevice\r
279 /// Output:\r
280 /// AX = Returned status codes\r
281 /// BX = Priority number of the boot device.\r
ede15247 282 ///\r
283 Legacy16RetrieveLastBootDevice = 0x0004,\r
e3e7f36a 284 \r
285 ///\r
286 /// Allows the Compatibility16 code rehook INT13, INT18, and/or INT19 after dispatching a legacy OpROM.\r
287 /// Input:\r
288 /// AX = Compatibility16DispatchOprom\r
289 /// ES:BX = Pointer to EFI_DISPATCH_OPROM_TABLE\r
290 /// Output:\r
291 /// AX = Returned status codes\r
292 /// BX = Number of non-BBS-compliant devices found. Equals 0 if BBS compliant.\r
ede15247 293 ///\r
294 Legacy16DispatchOprom = 0x0005,\r
e3e7f36a 295 \r
296 ///\r
297 /// Finds a free area in the 0xFxxxx or 0xExxxx region of the specified length and returns the address\r
298 /// of that region.\r
299 /// Input:\r
300 /// AX = Compatibility16GetTableAddress\r
301 /// BX = Allocation region\r
302 /// 00 = Allocate from either 0xE0000 or 0xF0000 64 KB blocks.\r
303 /// Bit 0 = 1 Allocate from 0xF0000 64 KB block\r
304 /// Bit 1 = 1 Allocate from 0xE0000 64 KB block\r
305 /// CX = Requested length in bytes.\r
306 /// DX = Required address alignment. Bit mapped. First non-zero bit from the right is the alignment.\r
307 /// Output:\r
308 /// AX = Returned status codes\r
309 /// DS:BX = Address of the region\r
ede15247 310 ///\r
311 Legacy16GetTableAddress = 0x0006,\r
e3e7f36a 312 \r
313 ///\r
314 /// Enables the EfiCompatibility module to do any nonstandard processing of keyboard LEDs or state.\r
315 /// Input:\r
316 /// AX = Compatibility16SetKeyboardLeds\r
317 /// CL = LED status.\r
e02a0e92 318 /// Bit 0 Scroll Lock 0 = Off\r
319 /// Bit 1 NumLock\r
320 /// Bit 2 Caps Lock\r
e3e7f36a 321 /// Output:\r
322 /// AX = Returned status codes\r
ede15247 323 ///\r
324 Legacy16SetKeyboardLeds = 0x0007,\r
e3e7f36a 325 \r
326 ///\r
327 /// Enables the EfiCompatibility module to install an interrupt handler for PCI mass media devices that\r
328 /// do not have an OpROM associated with them. An example is SATA.\r
329 /// Input:\r
330 /// AX = Compatibility16InstallPciHandler\r
331 /// ES:BX = Pointer to EFI_LEGACY_INSTALL_PCI_HANDLER structure\r
332 /// Output:\r
333 /// AX = Returned status codes\r
ede15247 334 ///\r
335 Legacy16InstallPciHandler = 0x0008\r
336} EFI_COMPATIBILITY_FUNCTIONS;\r
337\r
338\r
339///\r
340/// EFI_DISPATCH_OPROM_TABLE\r
341///\r
342typedef struct {\r
343 UINT16 PnPInstallationCheckSegment; ///< Pointer to the PnpInstallationCheck data structure.\r
344 UINT16 PnPInstallationCheckOffset; ///< Pointer to the PnpInstallationCheck data structure.\r
345 UINT16 OpromSegment; ///< The segment where the OpROM was placed. Offset is assumed to be 3.\r
346 UINT8 PciBus; ///< The PCI bus.\r
347 UINT8 PciDeviceFunction; ///< The PCI device * 0x08 | PCI function.\r
348 UINT8 NumberBbsEntries; ///< The number of valid BBS table entries upon entry and exit. The IBV code may\r
349 ///< increase this number, if BBS-compliant devices also hook INTs in order to force the\r
350 ///< OpROM BIOS Setup to be executed.\r
351 VOID *BbsTablePointer; ///< Pointer to the BBS table.\r
352 UINT16 RuntimeSegment; ///< The segment where the OpROM can be relocated to. If this value is 0x0000, this\r
64419615 353 ///< means that the relocation of this run time code is not supported.\r
354 ///< Inconsistent with specification here: \r
355 ///< The member's name "OpromDestinationSegment" [defined in Intel Framework Compatibility Support Module Specification / 0.97 version] \r
356 ///< has been changed to "RuntimeSegment" since keeping backward compatible.\r
ede15247 357\r
358} EFI_DISPATCH_OPROM_TABLE;\r
359\r
360///\r
361/// EFI_TO_COMPATIBILITY16_INIT_TABLE\r
362///\r
363typedef struct {\r
e3e7f36a 364 ///\r
365 /// Starting address of memory under 1 MB. The ending address is assumed to be 640 KB or 0x9FFFF.\r
ede15247 366 ///\r
367 UINT32 BiosLessThan1MB;\r
e3e7f36a 368 \r
369 ///\r
370 /// Starting address of the high memory block.\r
ede15247 371 ///\r
372 UINT32 HiPmmMemory;\r
e3e7f36a 373 \r
374 ///\r
375 /// Length of high memory block.\r
ede15247 376 ///\r
377 UINT32 HiPmmMemorySizeInBytes;\r
e3e7f36a 378 \r
379 ///\r
380 /// The segment of the reverse thunk call code.\r
ede15247 381 ///\r
382 UINT16 ReverseThunkCallSegment;\r
e3e7f36a 383 \r
384 ///\r
385 /// The offset of the reverse thunk call code.\r
ede15247 386 ///\r
387 UINT16 ReverseThunkCallOffset;\r
e3e7f36a 388 \r
389 ///\r
390 /// The number of E820 entries copied to the Compatibility16 BIOS.\r
ede15247 391 ///\r
392 UINT32 NumberE820Entries;\r
e3e7f36a 393 \r
394 ///\r
395 /// The amount of usable memory above 1 MB, e.g., E820 type 1 memory.\r
ede15247 396 ///\r
397 UINT32 OsMemoryAbove1Mb;\r
e3e7f36a 398 \r
399 ///\r
400 /// The start of thunk code in main memory. Memory cannot be used by BIOS or PMM.\r
ede15247 401 ///\r
402 UINT32 ThunkStart;\r
e3e7f36a 403 \r
404 ///\r
405 /// The size of the thunk code.\r
ede15247 406 ///\r
407 UINT32 ThunkSizeInBytes;\r
8d303ef3 408 \r
409 ///\r
410 /// Starting address of memory under 1 MB.\r
ede15247 411 ///\r
412 UINT32 LowPmmMemory;\r
8d303ef3 413 \r
414 ///\r
415 /// Length of low Memory block.\r
ede15247 416 ///\r
417 UINT32 LowPmmMemorySizeInBytes;\r
418} EFI_TO_COMPATIBILITY16_INIT_TABLE;\r
419\r
420///\r
421/// DEVICE_PRODUCER_SERIAL\r
422///\r
423typedef struct {\r
424 UINT16 Address; ///< I/O address assigned to the serial port\r
425 UINT8 Irq; ///< IRQ assigned to the serial port.\r
426 SERIAL_MODE Mode; ///< Mode of serial port. Values are defined below.\r
427} DEVICE_PRODUCER_SERIAL;\r
428\r
429///\r
430/// DEVICE_PRODUCER_SERIAL's modes\r
431///@{\r
432#define DEVICE_SERIAL_MODE_NORMAL 0x00\r
433#define DEVICE_SERIAL_MODE_IRDA 0x01\r
434#define DEVICE_SERIAL_MODE_ASK_IR 0x02\r
435#define DEVICE_SERIAL_MODE_DUPLEX_HALF 0x00\r
436#define DEVICE_SERIAL_MODE_DUPLEX_FULL 0x10\r
437///@)\r
438\r
439///\r
440/// DEVICE_PRODUCER_PARALLEL\r
441///\r
442typedef struct {\r
443 UINT16 Address; ///< I/O address assigned to the parallel port\r
444 UINT8 Irq; ///< IRQ assigned to the parallel port.\r
445 UINT8 Dma; ///< DMA assigned to the parallel port.\r
446 PARALLEL_MODE Mode; ///< Mode of the parallel port. Values are defined below.\r
447} DEVICE_PRODUCER_PARALLEL;\r
448\r
449///\r
450/// DEVICE_PRODUCER_PARALLEL's modes\r
451///@{\r
452#define DEVICE_PARALLEL_MODE_MODE_OUTPUT_ONLY 0x00\r
453#define DEVICE_PARALLEL_MODE_MODE_BIDIRECTIONAL 0x01\r
454#define DEVICE_PARALLEL_MODE_MODE_EPP 0x02\r
455#define DEVICE_PARALLEL_MODE_MODE_ECP 0x03\r
456///@}\r
457\r
458///\r
459/// DEVICE_PRODUCER_FLOPPY\r
460///\r
461typedef struct {\r
462 UINT16 Address; ///< I/O address assigned to the floppy\r
463 UINT8 Irq; ///< IRQ assigned to the floppy.\r
464 UINT8 Dma; ///< DMA assigned to the floppy.\r
465 UINT8 NumberOfFloppy; ///< Number of floppies in the system.\r
466} DEVICE_PRODUCER_FLOPPY;\r
467\r
468///\r
469/// LEGACY_DEVICE_FLAGS\r
470///\r
471typedef struct {\r
472 UINT32 A20Kybd : 1; ///< A20 controller by keyboard controller.\r
473 UINT32 A20Port90 : 1; ///< A20 controlled by port 0x92.\r
474 UINT32 Reserved : 30; ///< Reserved for future usage.\r
475} LEGACY_DEVICE_FLAGS;\r
476\r
477///\r
478/// DEVICE_PRODUCER_DATA_HEADER\r
479///\r
480typedef struct {\r
481 DEVICE_PRODUCER_SERIAL Serial[4]; ///< Data for serial port x. Type DEVICE_PRODUCER_SERIAL is defined below.\r
482 DEVICE_PRODUCER_PARALLEL Parallel[3]; ///< Data for parallel port x. Type DEVICE_PRODUCER_PARALLEL is defined below.\r
483 DEVICE_PRODUCER_FLOPPY Floppy; ///< Data for floppy. Type DEVICE_PRODUCER_FLOPPY is defined below.\r
484 UINT8 MousePresent; ///< Flag to indicate if mouse is present.\r
485 LEGACY_DEVICE_FLAGS Flags; ///< Miscellaneous Boolean state information passed to CSM.\r
486} DEVICE_PRODUCER_DATA_HEADER;\r
487\r
488///\r
489/// ATAPI_IDENTIFY\r
490///\r
491typedef struct {\r
492 UINT16 Raw[256]; ///< Raw data from the IDE IdentifyDrive command.\r
493} ATAPI_IDENTIFY;\r
494\r
495///\r
496/// HDD_INFO\r
497///\r
498typedef struct {\r
e3e7f36a 499 ///\r
500 /// Status of IDE device. Values are defined below. There is one HDD_INFO structure\r
501 /// per IDE controller. The IdentifyDrive is per drive. Index 0 is master and index\r
502 /// 1 is slave.\r
ede15247 503 ///\r
e3e7f36a 504 UINT16 Status; \r
505 \r
506 ///\r
507 /// PCI bus of IDE controller.\r
ede15247 508 ///\r
509 UINT32 Bus;\r
e3e7f36a 510 \r
511 ///\r
512 /// PCI device of IDE controller.\r
ede15247 513 ///\r
514 UINT32 Device;\r
e3e7f36a 515 \r
516 ///\r
517 /// PCI function of IDE controller.\r
ede15247 518 ///\r
519 UINT32 Function;\r
e3e7f36a 520 \r
521 ///\r
522 /// Command ports base address.\r
ede15247 523 ///\r
524 UINT16 CommandBaseAddress;\r
e3e7f36a 525 \r
526 ///\r
527 /// Control ports base address.\r
ede15247 528 ///\r
529 UINT16 ControlBaseAddress;\r
e3e7f36a 530 \r
531 ///\r
532 /// Bus master address\r
ede15247 533 ///\r
534 UINT16 BusMasterAddress;\r
535 \r
536 UINT8 HddIrq;\r
e3e7f36a 537 \r
538 ///\r
539 /// Data that identifies the drive data, one per possible attached drive\r
ede15247 540 ///\r
541 ATAPI_IDENTIFY IdentifyDrive[2];\r
542} HDD_INFO;\r
543\r
544///\r
545/// HDD_INFO status bits\r
546///\r
547#define HDD_PRIMARY 0x01\r
548#define HDD_SECONDARY 0x02\r
549#define HDD_MASTER_ATAPI_CDROM 0x04\r
550#define HDD_SLAVE_ATAPI_CDROM 0x08\r
551#define HDD_MASTER_IDE 0x20\r
552#define HDD_SLAVE_IDE 0x40\r
553#define HDD_MASTER_ATAPI_ZIPDISK 0x10\r
554#define HDD_SLAVE_ATAPI_ZIPDISK 0x80\r
555\r
556///\r
557/// BBS_STATUS_FLAGS\r
558///\r
559typedef struct {\r
560 UINT16 OldPosition : 4; ///< Prior priority.\r
561 UINT16 Reserved1 : 4; ///< Reserved for future use.\r
562 UINT16 Enabled : 1; ///< If 0, ignore this entry.\r
e3e7f36a 563 UINT16 Failed : 1; ///< 0 = Not known if boot failure occurred.\r
564 ///< 1 = Boot attempted failed.\r
565 \r
566 ///\r
567 /// State of media present.\r
568 /// 00 = No bootable media is present in the device.\r
569 /// 01 = Unknown if a bootable media present.\r
570 /// 10 = Media is present and appears bootable.\r
571 /// 11 = Reserved.\r
ede15247 572 ///\r
573 UINT16 MediaPresent : 2;\r
574 UINT16 Reserved2 : 4; ///< Reserved for future use.\r
575} BBS_STATUS_FLAGS;\r
576\r
577///\r
578/// BBS_TABLE, device type values & boot priority values\r
579///\r
580typedef struct {\r
e3e7f36a 581 ///\r
582 /// The boot priority for this boot device. Values are defined below.\r
ede15247 583 ///\r
584 UINT16 BootPriority;\r
e3e7f36a 585 \r
586 ///\r
587 /// The PCI bus for this boot device.\r
ede15247 588 ///\r
589 UINT32 Bus;\r
e3e7f36a 590 \r
591 ///\r
592 /// The PCI device for this boot device.\r
ede15247 593 ///\r
594 UINT32 Device;\r
e3e7f36a 595 \r
596 ///\r
597 /// The PCI function for the boot device.\r
ede15247 598 ///\r
599 UINT32 Function;\r
e3e7f36a 600 \r
601 ///\r
602 /// The PCI class for this boot device.\r
ede15247 603 ///\r
604 UINT8 Class;\r
e3e7f36a 605 \r
606 ///\r
607 /// The PCI Subclass for this boot device.\r
ede15247 608 ///\r
609 UINT8 SubClass;\r
e3e7f36a 610 \r
611 ///\r
612 /// Segment:offset address of an ASCIIZ description string describing the manufacturer.\r
ede15247 613 ///\r
614 UINT16 MfgStringOffset;\r
e3e7f36a 615 \r
616 ///\r
617 /// Segment:offset address of an ASCIIZ description string describing the manufacturer.\r
ede15247 618 /// \r
619 UINT16 MfgStringSegment;\r
e3e7f36a 620 \r
621 ///\r
622 /// BBS device type. BBS device types are defined below.\r
ede15247 623 ///\r
624 UINT16 DeviceType;\r
e3e7f36a 625 \r
626 ///\r
627 /// Status of this boot device. Type BBS_STATUS_FLAGS is defined below.\r
ede15247 628 ///\r
629 BBS_STATUS_FLAGS StatusFlags;\r
e3e7f36a 630 \r
631 ///\r
632 /// Segment:Offset address of boot loader for IPL devices or install INT13 handler for\r
633 /// BCV devices.\r
ede15247 634 ///\r
635 UINT16 BootHandlerOffset;\r
e3e7f36a 636 \r
637 ///\r
638 /// Segment:Offset address of boot loader for IPL devices or install INT13 handler for\r
639 /// BCV devices.\r
ede15247 640 /// \r
641 UINT16 BootHandlerSegment;\r
e3e7f36a 642 \r
643 ///\r
644 /// Segment:offset address of an ASCIIZ description string describing this device.\r
ede15247 645 ///\r
646 UINT16 DescStringOffset;\r
e3e7f36a 647\r
648 ///\r
649 /// Segment:offset address of an ASCIIZ description string describing this device.\r
650 ///\r
ede15247 651 UINT16 DescStringSegment;\r
e3e7f36a 652 \r
653 ///\r
654 /// Reserved.\r
ede15247 655 ///\r
656 UINT32 InitPerReserved;\r
e3e7f36a 657 \r
658 ///\r
659 /// The use of these fields is IBV dependent. They can be used to flag that an OpROM\r
660 /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI\r
661 /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup\r
ede15247 662 ///\r
663 UINT32 AdditionalIrq13Handler;\r
e3e7f36a 664 \r
665 ///\r
666 /// The use of these fields is IBV dependent. They can be used to flag that an OpROM\r
667 /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI\r
668 /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup\r
ede15247 669 /// \r
670 UINT32 AdditionalIrq18Handler;\r
e3e7f36a 671 \r
672 ///\r
673 /// The use of these fields is IBV dependent. They can be used to flag that an OpROM\r
674 /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI\r
675 /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup\r
ede15247 676 /// \r
677 UINT32 AdditionalIrq19Handler;\r
e3e7f36a 678 \r
679 ///\r
680 /// The use of these fields is IBV dependent. They can be used to flag that an OpROM\r
681 /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI\r
682 /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup\r
ede15247 683 /// \r
684 UINT32 AdditionalIrq40Handler;\r
685 UINT8 AssignedDriveNumber;\r
686 UINT32 AdditionalIrq41Handler;\r
687 UINT32 AdditionalIrq46Handler;\r
688 UINT32 IBV1;\r
689 UINT32 IBV2;\r
690} BBS_TABLE;\r
691\r
692///\r
693/// BBS device type values\r
694///@{\r
695#define BBS_FLOPPY 0x01\r
696#define BBS_HARDDISK 0x02\r
697#define BBS_CDROM 0x03\r
698#define BBS_PCMCIA 0x04\r
699#define BBS_USB 0x05\r
700#define BBS_EMBED_NETWORK 0x06\r
701#define BBS_BEV_DEVICE 0x80\r
702#define BBS_UNKNOWN 0xff\r
703///@}\r
704\r
705///\r
706/// BBS boot priority values\r
707///@{\r
708#define BBS_DO_NOT_BOOT_FROM 0xFFFC\r
709#define BBS_LOWEST_PRIORITY 0xFFFD\r
710#define BBS_UNPRIORITIZED_ENTRY 0xFFFE\r
711#define BBS_IGNORE_ENTRY 0xFFFF\r
712///@}\r
713\r
714///\r
715/// SMM_ATTRIBUTES\r
716///\r
717typedef struct {\r
e3e7f36a 718 ///\r
719 /// Access mechanism used to generate the soft SMI. Defined types are below. The other\r
720 /// values are reserved for future usage.\r
ede15247 721 ///\r
722 UINT16 Type : 3;\r
e3e7f36a 723 \r
724 ///\r
725 /// Size of "port" in bits. Defined values are below.\r
ede15247 726 ///\r
727 UINT16 PortGranularity : 3;\r
e3e7f36a 728 \r
729 ///\r
730 /// Size of data in bits. Defined values are below.\r
ede15247 731 ///\r
732 UINT16 DataGranularity : 3;\r
e3e7f36a 733 \r
734 ///\r
735 /// Reserved for future use.\r
ede15247 736 ///\r
737 UINT16 Reserved : 7;\r
738} SMM_ATTRIBUTES;\r
739\r
740///\r
741/// SMM_ATTRIBUTES type values\r
742///@{\r
743#define STANDARD_IO 0x00\r
744#define STANDARD_MEMORY 0x01\r
745///@}\r
746\r
747///\r
748/// SMM_ATTRIBUTES port size constants\r
749///@{\r
750#define PORT_SIZE_8 0x00\r
751#define PORT_SIZE_16 0x01\r
752#define PORT_SIZE_32 0x02\r
753#define PORT_SIZE_64 0x03\r
754///@}\r
755\r
756///\r
757/// SMM_ATTRIBUTES data size constants\r
758///@{\r
759#define DATA_SIZE_8 0x00\r
760#define DATA_SIZE_16 0x01\r
761#define DATA_SIZE_32 0x02\r
762#define DATA_SIZE_64 0x03\r
763///@}\r
764\r
765///\r
766/// SMM_FUNCTION & relating constants\r
767///\r
768typedef struct {\r
769 UINT16 Function : 15;\r
770 UINT16 Owner : 1;\r
771} SMM_FUNCTION;\r
772\r
773///\r
774/// SMM_FUNCTION Function constants\r
775///@{\r
776#define INT15_D042 0x0000\r
777#define GET_USB_BOOT_INFO 0x0001\r
778#define DMI_PNP_50_57 0x0002\r
779///@}\r
780\r
781///\r
782/// SMM_FUNCTION Owner constants\r
783///@{\r
784#define STANDARD_OWNER 0x0\r
785#define OEM_OWNER 0x1\r
786///@}\r
787\r
788/**\r
789 * SMM_ENTRY\r
790 *\r
791 * This structure assumes both port and data sizes are 1. SmmAttribute must be\r
792 * properly to reflect that assumption.\r
793**/\r
794typedef struct {\r
e3e7f36a 795 ///\r
796 /// Describes the access mechanism, SmmPort, and SmmData sizes. Type\r
797 /// SMM_ATTRIBUTES is defined below.\r
ede15247 798 ///\r
799 SMM_ATTRIBUTES SmmAttributes;\r
e3e7f36a 800 \r
801 ///\r
802 /// Function Soft SMI is to perform. Type SMM_FUNCTION is defined below.\r
ede15247 803 ///\r
804 SMM_FUNCTION SmmFunction;\r
e3e7f36a 805 \r
806 ///\r
807 /// SmmPort size depends upon SmmAttributes and ranges from2 bytes to 16 bytes\r
ede15247 808 ///\r
809 UINT8 SmmPort;\r
e3e7f36a 810 \r
811 ///\r
812 /// SmmData size depends upon SmmAttributes and ranges from2 bytes to 16 bytes\r
ede15247 813 ///\r
814 UINT8 SmmData;\r
815} SMM_ENTRY;\r
816\r
817///\r
818/// SMM_TABLE\r
819///\r
820typedef struct {\r
821 UINT16 NumSmmEntries; ///< Number of entries represented by SmmEntry.\r
822 SMM_ENTRY SmmEntry; ///< One entry per function. Type SMM_ENTRY is defined below.\r
823} SMM_TABLE;\r
824\r
825///\r
826/// UDC_ATTRIBUTES\r
827///\r
828typedef struct {\r
e3e7f36a 829 ///\r
830 /// This bit set indicates that the ServiceAreaData is valid.\r
ede15247 831 ///\r
832 UINT8 DirectoryServiceValidity : 1;\r
e3e7f36a 833 \r
834 ///\r
835 /// This bit set indicates to use the Reserve Area Boot Code Address (RACBA) only if\r
836 /// DirectoryServiceValidity is 0.\r
ede15247 837 ///\r
838 UINT8 RabcaUsedFlag : 1;\r
e3e7f36a 839 \r
840 ///\r
841 /// This bit set indicates to execute hard disk diagnostics.\r
ede15247 842 ///\r
843 UINT8 ExecuteHddDiagnosticsFlag : 1;\r
e3e7f36a 844 \r
845 ///\r
846 /// Reserved for future use. Set to 0.\r
ede15247 847 ///\r
848 UINT8 Reserved : 5;\r
849} UDC_ATTRIBUTES;\r
850\r
851///\r
852/// UD_TABLE\r
853///\r
854typedef struct {\r
e3e7f36a 855 ///\r
856 /// This field contains the bit-mapped attributes of the PARTIES information. Type\r
857 /// UDC_ATTRIBUTES is defined below.\r
ede15247 858 ///\r
859 UDC_ATTRIBUTES Attributes;\r
e3e7f36a 860 \r
861 ///\r
862 /// This field contains the zero-based device on which the selected\r
863 /// ServiceDataArea is present. It is 0 for master and 1 for the slave device. \r
ede15247 864 ///\r
865 UINT8 DeviceNumber;\r
e3e7f36a 866 \r
867 ///\r
868 /// This field contains the zero-based index into the BbsTable for the parent device.\r
869 /// This index allows the user to reference the parent device information such as PCI\r
870 /// bus, device function.\r
ede15247 871 ///\r
872 UINT8 BbsTableEntryNumberForParentDevice;\r
e3e7f36a 873 \r
874 ///\r
875 /// This field contains the zero-based index into the BbsTable for the boot entry.\r
ede15247 876 ///\r
877 UINT8 BbsTableEntryNumberForBoot;\r
e3e7f36a 878 \r
879 ///\r
880 /// This field contains the zero-based index into the BbsTable for the HDD diagnostics entry.\r
ede15247 881 ///\r
882 UINT8 BbsTableEntryNumberForHddDiag;\r
e3e7f36a 883 \r
884 ///\r
885 /// The raw Beer data.\r
ede15247 886 ///\r
887 UINT8 BeerData[128];\r
e3e7f36a 888 \r
889 ///\r
890 /// The raw data of selected service area.\r
ede15247 891 ///\r
892 UINT8 ServiceAreaData[64];\r
893} UD_TABLE;\r
894\r
895#define EFI_TO_LEGACY_MAJOR_VERSION 0x02\r
896#define EFI_TO_LEGACY_MINOR_VERSION 0x00\r
897#define MAX_IDE_CONTROLLER 8\r
898\r
899///\r
900/// EFI_TO_COMPATIBILITY16_BOOT_TABLE\r
901///\r
902typedef struct {\r
903 UINT16 MajorVersion; ///< The EfiCompatibility major version number.\r
904 UINT16 MinorVersion; ///< The EfiCompatibility minor version number.\r
905 UINT32 AcpiTable; ///< Location of the RSDT ACPI table. < 4G range\r
906 UINT32 SmbiosTable; ///< Location of the SMBIOS table in EFI memory. < 4G range\r
907 UINT32 SmbiosTableLength;\r
908 //\r
909 // Legacy SIO state\r
910 //\r
911 DEVICE_PRODUCER_DATA_HEADER SioData; ///< Standard traditional device information.\r
912 UINT16 DevicePathType; ///< The default boot type.\r
913 UINT16 PciIrqMask; ///< Mask of which IRQs have been assigned to PCI.\r
e3e7f36a 914 UINT32 NumberE820Entries; ///< Number of E820 entries. The number can change from the\r
ede15247 915 ///< Compatibility16InitializeYourself() function.\r
916 //\r
917 // Controller & Drive Identify[2] per controller information\r
918 //\r
919 HDD_INFO HddInfo[MAX_IDE_CONTROLLER]; ///< Hard disk drive information, including raw Identify Drive data.\r
920 UINT32 NumberBbsEntries; ///< Number of entries in the BBS table\r
921 UINT32 BbsTable; ///< Pointer to the BBS table. Type BBS_TABLE is defined below.\r
922 UINT32 SmmTable; ///< Pointer to the SMM table. Type SMM_TABLE is defined below.\r
e3e7f36a 923 UINT32 OsMemoryAbove1Mb; ///< The amount of usable memory above 1 MB, i.e. E820 type 1 memory. This value can\r
924 ///< differ from the value in EFI_TO_COMPATIBILITY16_INIT_TABLE as more\r
ede15247 925 ///< memory may have been discovered.\r
e3e7f36a 926 UINT32 UnconventionalDeviceTable; ///< Information to boot off an unconventional device like a PARTIES partition. Type\r
ede15247 927 ///< UD_TABLE is defined below.\r
928} EFI_TO_COMPATIBILITY16_BOOT_TABLE;\r
929\r
930///\r
931/// EFI_LEGACY_INSTALL_PCI_HANDLER\r
932///\r
933typedef struct {\r
934 UINT8 PciBus; ///< The PCI bus of the device.\r
935 UINT8 PciDeviceFun; ///< The PCI device in bits 7:3 and function in bits 2:0.\r
936 UINT8 PciSegment; ///< The PCI segment of the device.\r
937 UINT8 PciClass; ///< The PCI class code of the device.\r
938 UINT8 PciSubclass; ///< The PCI subclass code of the device.\r
939 UINT8 PciInterface; ///< The PCI interface code of the device.\r
940 //\r
941 // Primary section\r
942 //\r
943 UINT8 PrimaryIrq; ///< The primary device IRQ.\r
944 UINT8 PrimaryReserved; ///< Reserved.\r
945 UINT16 PrimaryControl; ///< The primary device control I/O base.\r
946 UINT16 PrimaryBase; ///< The primary device I/O base.\r
947 UINT16 PrimaryBusMaster; ///< The primary device bus master I/O base.\r
948 //\r
949 // Secondary Section\r
950 //\r
951 UINT8 SecondaryIrq; ///< The secondary device IRQ.\r
952 UINT8 SecondaryReserved; ///< Reserved.\r
953 UINT16 SecondaryControl; ///< The secondary device control I/O base.\r
954 UINT16 SecondaryBase; ///< The secondary device I/O base.\r
955 UINT16 SecondaryBusMaster; ///< The secondary device bus master I/O base.\r
956} EFI_LEGACY_INSTALL_PCI_HANDLER;\r
957\r
958//\r
959// Restore default pack value\r
960//\r
961#pragma pack()\r
962\r
963#endif /* _FRAMEWORK_LEGACY_16_H_ */\r
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