-/** @file
+/** @file\r
The header file provides interface definitions exposed by CSM (Compatible Support Module).\r
\r
The CSM provides compatibility support between the Framework and traditional, legacy BIOS code \r
and allows booting a traditional OS or booting an EFI OS off a device that requires a traditional \r
option ROM (OpROM). \r
-
+\r
These definitions are from Compatibility Support Module Spec Version 0.97.\r
-
- Copyright (c) 2007-2009, Intel Corporation
- All rights reserved. This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
- @par Revision Reference:
- These definitions are from Compatibility Support Module Spec
- Version 0.97.
-
-**/
-
-#ifndef _FRAMEWORK_LEGACY_16_H_
-#define _FRAMEWORK_LEGACY_16_H_
-
-#pragma pack(1)
-
-typedef UINT8 SERIAL_MODE;
-typedef UINT8 PARALLEL_MODE;
-
-#define EFI_COMPATIBILITY16_TABLE_SIGNATURE SIGNATURE_32 ('I', 'F', 'E', '$')
-
-///
+ \r
+ Copyright (c) 2007-2009, Intel Corporation\r
+ All rights reserved. This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+ @par Revision Reference:\r
+ These definitions are from Compatibility Support Module Spec\r
+ Version 0.97.\r
+\r
+**/\r
+\r
+#ifndef _FRAMEWORK_LEGACY_16_H_\r
+#define _FRAMEWORK_LEGACY_16_H_\r
+\r
+#pragma pack(1)\r
+\r
+typedef UINT8 SERIAL_MODE;\r
+typedef UINT8 PARALLEL_MODE;\r
+\r
+#define EFI_COMPATIBILITY16_TABLE_SIGNATURE SIGNATURE_32 ('I', 'F', 'E', '$')\r
+\r
+///\r
/// There is a table located within the traditional BIOS in either the 0xF000:xxxx or 0xE000:xxxx\r
/// physical address range. It is located on a 16-byte boundary and provides the physical address of the\r
/// entry point for the Compatibility16 functions. These functions provide the platform-specific\r
/// information that is required by the generic EfiCompatibility code. The functions are invoked via\r
/// thunking by using EFI_LEGACY_BIOS_PROTOCOL.FarCall86() with the 32-bit physical\r
/// entry point.\r
-///
-typedef struct {
+///\r
+typedef struct {\r
///\r
/// The string "$EFI" denotes the start of the EfiCompatibility table. Byte 0 is "I," byte\r
/// 1 is "F," byte 2 is "E," and byte 3 is "$" and is normally accessed as a DWORD or UINT32.\r
- ///
- UINT32 Signature;
+ ///\r
+ UINT32 Signature;\r
\r
///\r
/// The value required such that byte checksum of TableLength equals zero.\r
- ///
- UINT8 TableChecksum;
+ ///\r
+ UINT8 TableChecksum;\r
\r
///\r
/// The length of this table.\r
- ///
- UINT8 TableLength;
+ ///\r
+ UINT8 TableLength;\r
\r
///\r
/// The major EFI revision for which this table was generated.\r
- ///
- UINT8 EfiMajorRevision;
+ /// \r
+ UINT8 EfiMajorRevision;\r
\r
///\r
/// The minor EFI revision for which this table was generated.\r
- ///
- UINT8 EfiMinorRevision;
+ ///\r
+ UINT8 EfiMinorRevision;\r
\r
///\r
/// The major revision of this table.\r
- ///
- UINT8 TableMajorRevision;
+ ///\r
+ UINT8 TableMajorRevision;\r
\r
///\r
/// The minor revision of this table.\r
- ///
- UINT8 TableMinorRevision;
+ ///\r
+ UINT8 TableMinorRevision;\r
\r
///\r
/// Reserved for future usage.\r
- ///
- UINT16 Reserved;
+ ///\r
+ UINT16 Reserved;\r
\r
///\r
/// The segment of the entry point within the traditional BIOS for Compatibility16 functions.\r
- ///
- UINT16 Compatibility16CallSegment;
+ ///\r
+ UINT16 Compatibility16CallSegment;\r
\r
///\r
/// The offset of the entry point within the traditional BIOS for Compatibility16 functions.\r
- ///
- UINT16 Compatibility16CallOffset;
+ ///\r
+ UINT16 Compatibility16CallOffset;\r
\r
///\r
/// The segment of the entry point within the traditional BIOS for EfiCompatibility to invoke the PnP installation check.\r
- ///
- UINT16 PnPInstallationCheckSegment;
+ ///\r
+ UINT16 PnPInstallationCheckSegment;\r
\r
///\r
/// The Offset of the entry point within the traditional BIOS for EfiCompatibility to invoke the PnP installation check.\r
- ///
- UINT16 PnPInstallationCheckOffset;
+ ///\r
+ UINT16 PnPInstallationCheckOffset;\r
\r
///\r
/// EFI system resources table. Type EFI_SYSTEM_TABLE is defined in the IntelPlatform Innovation Framework for EFI \r
/// Driver Execution Environment Core Interface Specification (DXE CIS).\r
- ///
+ ///\r
UINT32 EfiSystemTable; \r
\r
///\r
/// The address of an OEM-provided identifier string. The string is null terminated.\r
- ///
- UINT32 OemIdStringPointer;
+ ///\r
+ UINT32 OemIdStringPointer;\r
\r
///\r
/// The 32-bit physical address where ACPI RSD PTR is stored within the traditional\r
/// BIOS. The remained of the ACPI tables are located at their EFI addresses. The size\r
/// reserved is the maximum for ACPI 2.0. The EfiCompatibility will fill in the ACPI\r
/// RSD PTR with either the ACPI 1.0b or 2.0 values.\r
- ///
- UINT32 AcpiRsdPtrPointer;
+ ///\r
+ UINT32 AcpiRsdPtrPointer;\r
\r
///\r
/// The OEM revision number. Usage is undefined but provided for OEM module usage.\r
- ///
- UINT16 OemRevision;
+ ///\r
+ UINT16 OemRevision;\r
\r
///\r
/// The 32-bit physical address where INT15 E820 data is stored within the traditional\r
/// BIOS. The EfiCompatibility code will fill in the E820Pointer value and copy the\r
/// data to the indicated area.\r
- ///
- UINT32 E820Pointer;
+ ///\r
+ UINT32 E820Pointer;\r
\r
///\r
/// The length of the E820 data and is filled in by the EfiCompatibility code.\r
- ///
- UINT32 E820Length;
+ ///\r
+ UINT32 E820Length;\r
\r
///\r
/// The 32-bit physical address where the $PIR table is stored in the traditional BIOS.\r
/// The EfiCompatibility code will fill in the IrqRoutingTablePointer value and\r
/// copy the data to the indicated area.\r
- ///
- UINT32 IrqRoutingTablePointer;
+ ///\r
+ UINT32 IrqRoutingTablePointer;\r
\r
///\r
/// The length of the $PIR table and is filled in by the EfiCompatibility code.\r
- ///
- UINT32 IrqRoutingTableLength;
+ ///\r
+ UINT32 IrqRoutingTableLength;\r
\r
///\r
/// The 32-bit physical address where the MP table is stored in the traditional BIOS.\r
/// The EfiCompatibility code will fill in the MpTablePtr value and copy the data to the indicated area.\r
- ///
- UINT32 MpTablePtr;
+ ///\r
+ UINT32 MpTablePtr;\r
\r
///\r
/// The length of the MP table and is filled in by the EfiCompatibility code.\r
- ///
- UINT32 MpTableLength;
+ ///\r
+ UINT32 MpTableLength;\r
\r
///\r
/// The segment of the OEM-specific INT table/code.\r
- ///
- UINT16 OemIntSegment;
+ /// \r
+ UINT16 OemIntSegment;\r
\r
///\r
/// The offset of the OEM-specific INT table/code.\r
- ///
- UINT16 OemIntOffset;
+ ///\r
+ UINT16 OemIntOffset;\r
\r
///\r
/// The segment of the OEM-specific 32-bit table/code.\r
- ///
- UINT16 Oem32Segment;
+ ///\r
+ UINT16 Oem32Segment;\r
\r
///\r
/// The offset of the OEM-specific 32-bit table/code.\r
- ///
- UINT16 Oem32Offset;
+ ///\r
+ UINT16 Oem32Offset;\r
\r
///\r
/// The segment of the OEM-specific 16-bit table/code.\r
- ///
- UINT16 Oem16Segment;
+ ///\r
+ UINT16 Oem16Segment;\r
\r
///\r
/// The offset of the OEM-specific 16-bit table/code.\r
- ///
- UINT16 Oem16Offset;
+ ///\r
+ UINT16 Oem16Offset;\r
\r
///\r
/// The segment of the TPM binary passed to 16-bit CSM.\r
- ///
- UINT16 TpmSegment;
+ ///\r
+ UINT16 TpmSegment;\r
\r
///\r
/// The offset of the TPM binary passed to 16-bit CSM.\r
- ///
- UINT16 TpmOffset;
+ ///\r
+ UINT16 TpmOffset;\r
\r
///\r
/// A pointer to a string identifying the independent BIOS vendor.\r
- ///
- UINT32 IbvPointer;
+ ///\r
+ UINT32 IbvPointer;\r
\r
///\r
/// This field is NULL for all systems not supporting PCI Express. This field is the base\r
/// Compatibility16InitializeYourself().\r
/// Compatibility16InitializeYourself() is defined in Compatability16\r
/// Functions.\r
- ///
- UINT32 PciExpressBase;
+ ///\r
+ UINT32 PciExpressBase;\r
\r
///\r
/// Maximum PCI bus number assigned.\r
- ///
- UINT8 LastPciBus;
-} EFI_COMPATIBILITY16_TABLE;
-
-///
+ ///\r
+ UINT8 LastPciBus;\r
+} EFI_COMPATIBILITY16_TABLE;\r
+\r
+///\r
/// Functions provided by the CSM binary which communicate between the EfiCompatibility \r
/// and Compatability16 code.\r
///\r
/// The member's name started with "Compatibility16" [defined in Intel Framework Compatibility Support Module Specification / 0.97 version] \r
/// has been changed to "Legacy16" since keeping backward compatible.\r
///\r
-typedef enum {
+typedef enum {\r
///\r
/// Causes the Compatibility16 code to do any internal initialization required.\r
/// Input:\r
/// Return:\r
/// AX = Return Status codes\r
///\r
- Legacy16InitializeYourself = 0x0000,
+ Legacy16InitializeYourself = 0x0000,\r
\r
///\r
/// Causes the Compatibility16 BIOS to perform any drive number translations to match the boot sequence.\r
/// ES:BX = Pointer to EFI_TO_COMPATIBILITY16_BOOT_TABLE\r
/// Return:\r
/// AX = Returned status codes\r
- ///
- Legacy16UpdateBbs = 0x0001,
+ ///\r
+ Legacy16UpdateBbs = 0x0001,\r
\r
///\r
/// Allows the Compatibility16 code to perform any final actions before booting. The Compatibility16\r
/// ES:BX = Pointer to EFI_TO_COMPATIBILITY16_BOOT_TABLE structure \r
/// Return:\r
/// AX = Returned status codes\r
- ///
- Legacy16PrepareToBoot = 0x0002,
+ ///\r
+ Legacy16PrepareToBoot = 0x0002,\r
\r
///\r
/// Causes the Compatibility16 BIOS to boot. The Compatibility16 code is Read/Only.\r
/// AX = Compatibility16Boot\r
/// Output:\r
/// AX = Returned status codes\r
- ///
- Legacy16Boot = 0x0003,
+ ///\r
+ Legacy16Boot = 0x0003,\r
\r
///\r
/// Allows the Compatibility16 code to get the last device from which a boot was attempted. This is\r
/// Output:\r
/// AX = Returned status codes\r
/// BX = Priority number of the boot device.\r
- ///
- Legacy16RetrieveLastBootDevice = 0x0004,
+ ///\r
+ Legacy16RetrieveLastBootDevice = 0x0004,\r
\r
///\r
/// Allows the Compatibility16 code rehook INT13, INT18, and/or INT19 after dispatching a legacy OpROM.\r
/// Output:\r
/// AX = Returned status codes\r
/// BX = Number of non-BBS-compliant devices found. Equals 0 if BBS compliant.\r
- ///
- Legacy16DispatchOprom = 0x0005,
+ ///\r
+ Legacy16DispatchOprom = 0x0005,\r
\r
///\r
/// Finds a free area in the 0xFxxxx or 0xExxxx region of the specified length and returns the address\r
/// Output:\r
/// AX = Returned status codes\r
/// DS:BX = Address of the region\r
- ///
- Legacy16GetTableAddress = 0x0006,
+ ///\r
+ Legacy16GetTableAddress = 0x0006,\r
\r
///\r
/// Enables the EfiCompatibility module to do any nonstandard processing of keyboard LEDs or state.\r
/// Bit 2 Caps Lock\r
/// Output:\r
/// AX = Returned status codes\r
- ///
- Legacy16SetKeyboardLeds = 0x0007,
+ ///\r
+ Legacy16SetKeyboardLeds = 0x0007,\r
\r
///\r
/// Enables the EfiCompatibility module to install an interrupt handler for PCI mass media devices that\r
/// ES:BX = Pointer to EFI_LEGACY_INSTALL_PCI_HANDLER structure\r
/// Output:\r
/// AX = Returned status codes\r
- ///
- Legacy16InstallPciHandler = 0x0008
-} EFI_COMPATIBILITY_FUNCTIONS;
-
-
-///
-/// EFI_DISPATCH_OPROM_TABLE
-///
-typedef struct {
- UINT16 PnPInstallationCheckSegment; ///< Pointer to the PnpInstallationCheck data structure.
- UINT16 PnPInstallationCheckOffset; ///< Pointer to the PnpInstallationCheck data structure.
- UINT16 OpromSegment; ///< The segment where the OpROM was placed. Offset is assumed to be 3.
- UINT8 PciBus; ///< The PCI bus.
- UINT8 PciDeviceFunction; ///< The PCI device * 0x08 | PCI function.
- UINT8 NumberBbsEntries; ///< The number of valid BBS table entries upon entry and exit. The IBV code may
- ///< increase this number, if BBS-compliant devices also hook INTs in order to force the
- ///< OpROM BIOS Setup to be executed.
- VOID *BbsTablePointer; ///< Pointer to the BBS table.
- UINT16 RuntimeSegment; ///< The segment where the OpROM can be relocated to. If this value is 0x0000, this
+ ///\r
+ Legacy16InstallPciHandler = 0x0008\r
+} EFI_COMPATIBILITY_FUNCTIONS;\r
+\r
+\r
+///\r
+/// EFI_DISPATCH_OPROM_TABLE\r
+///\r
+typedef struct {\r
+ UINT16 PnPInstallationCheckSegment; ///< Pointer to the PnpInstallationCheck data structure.\r
+ UINT16 PnPInstallationCheckOffset; ///< Pointer to the PnpInstallationCheck data structure.\r
+ UINT16 OpromSegment; ///< The segment where the OpROM was placed. Offset is assumed to be 3.\r
+ UINT8 PciBus; ///< The PCI bus.\r
+ UINT8 PciDeviceFunction; ///< The PCI device * 0x08 | PCI function.\r
+ UINT8 NumberBbsEntries; ///< The number of valid BBS table entries upon entry and exit. The IBV code may\r
+ ///< increase this number, if BBS-compliant devices also hook INTs in order to force the\r
+ ///< OpROM BIOS Setup to be executed.\r
+ VOID *BbsTablePointer; ///< Pointer to the BBS table.\r
+ UINT16 RuntimeSegment; ///< The segment where the OpROM can be relocated to. If this value is 0x0000, this\r
///< means that the relocation of this run time code is not supported.\r
///< Inconsistent with specification here: \r
///< The member's name "OpromDestinationSegment" [defined in Intel Framework Compatibility Support Module Specification / 0.97 version] \r
///< has been changed to "RuntimeSegment" since keeping backward compatible.\r
-
-} EFI_DISPATCH_OPROM_TABLE;
-
-///
-/// EFI_TO_COMPATIBILITY16_INIT_TABLE
-///
-typedef struct {
+\r
+} EFI_DISPATCH_OPROM_TABLE;\r
+\r
+///\r
+/// EFI_TO_COMPATIBILITY16_INIT_TABLE\r
+///\r
+typedef struct {\r
///\r
/// Starting address of memory under 1 MB. The ending address is assumed to be 640 KB or 0x9FFFF.\r
- ///
- UINT32 BiosLessThan1MB;
+ ///\r
+ UINT32 BiosLessThan1MB;\r
\r
///\r
/// Starting address of the high memory block.\r
- ///
- UINT32 HiPmmMemory;
+ ///\r
+ UINT32 HiPmmMemory;\r
\r
///\r
/// Length of high memory block.\r
- ///
- UINT32 HiPmmMemorySizeInBytes;
+ ///\r
+ UINT32 HiPmmMemorySizeInBytes;\r
\r
///\r
/// The segment of the reverse thunk call code.\r
- ///
- UINT16 ReverseThunkCallSegment;
+ ///\r
+ UINT16 ReverseThunkCallSegment;\r
\r
///\r
/// The offset of the reverse thunk call code.\r
- ///
- UINT16 ReverseThunkCallOffset;
+ ///\r
+ UINT16 ReverseThunkCallOffset;\r
\r
///\r
/// The number of E820 entries copied to the Compatibility16 BIOS.\r
- ///
- UINT32 NumberE820Entries;
+ ///\r
+ UINT32 NumberE820Entries;\r
\r
///\r
/// The amount of usable memory above 1 MB, e.g., E820 type 1 memory.\r
- ///
- UINT32 OsMemoryAbove1Mb;
+ ///\r
+ UINT32 OsMemoryAbove1Mb;\r
\r
///\r
/// The start of thunk code in main memory. Memory cannot be used by BIOS or PMM.\r
- ///
- UINT32 ThunkStart;
+ ///\r
+ UINT32 ThunkStart;\r
\r
///\r
/// The size of the thunk code.\r
- ///
- UINT32 ThunkSizeInBytes;
+ ///\r
+ UINT32 ThunkSizeInBytes;\r
\r
///\r
/// Starting address of memory under 1 MB.\r
- ///
- UINT32 LowPmmMemory;
+ ///\r
+ UINT32 LowPmmMemory;\r
\r
///\r
/// Length of low Memory block.\r
- ///
- UINT32 LowPmmMemorySizeInBytes;
-} EFI_TO_COMPATIBILITY16_INIT_TABLE;
-
-///
-/// DEVICE_PRODUCER_SERIAL
-///
-typedef struct {
- UINT16 Address; ///< I/O address assigned to the serial port
- UINT8 Irq; ///< IRQ assigned to the serial port.
- SERIAL_MODE Mode; ///< Mode of serial port. Values are defined below.
-} DEVICE_PRODUCER_SERIAL;
-
-///
-/// DEVICE_PRODUCER_SERIAL's modes
-///@{
-#define DEVICE_SERIAL_MODE_NORMAL 0x00
-#define DEVICE_SERIAL_MODE_IRDA 0x01
-#define DEVICE_SERIAL_MODE_ASK_IR 0x02
-#define DEVICE_SERIAL_MODE_DUPLEX_HALF 0x00
-#define DEVICE_SERIAL_MODE_DUPLEX_FULL 0x10
-///@)
-
-///
-/// DEVICE_PRODUCER_PARALLEL
-///
-typedef struct {
- UINT16 Address; ///< I/O address assigned to the parallel port
- UINT8 Irq; ///< IRQ assigned to the parallel port.
- UINT8 Dma; ///< DMA assigned to the parallel port.
- PARALLEL_MODE Mode; ///< Mode of the parallel port. Values are defined below.
-} DEVICE_PRODUCER_PARALLEL;
-
-///
-/// DEVICE_PRODUCER_PARALLEL's modes
-///@{
-#define DEVICE_PARALLEL_MODE_MODE_OUTPUT_ONLY 0x00
-#define DEVICE_PARALLEL_MODE_MODE_BIDIRECTIONAL 0x01
-#define DEVICE_PARALLEL_MODE_MODE_EPP 0x02
-#define DEVICE_PARALLEL_MODE_MODE_ECP 0x03
-///@}
-
-///
-/// DEVICE_PRODUCER_FLOPPY
-///
-typedef struct {
- UINT16 Address; ///< I/O address assigned to the floppy
- UINT8 Irq; ///< IRQ assigned to the floppy.
- UINT8 Dma; ///< DMA assigned to the floppy.
- UINT8 NumberOfFloppy; ///< Number of floppies in the system.
-} DEVICE_PRODUCER_FLOPPY;
-
-///
-/// LEGACY_DEVICE_FLAGS
-///
-typedef struct {
- UINT32 A20Kybd : 1; ///< A20 controller by keyboard controller.
- UINT32 A20Port90 : 1; ///< A20 controlled by port 0x92.
- UINT32 Reserved : 30; ///< Reserved for future usage.
-} LEGACY_DEVICE_FLAGS;
-
-///
-/// DEVICE_PRODUCER_DATA_HEADER
-///
-typedef struct {
- DEVICE_PRODUCER_SERIAL Serial[4]; ///< Data for serial port x. Type DEVICE_PRODUCER_SERIAL is defined below.
- DEVICE_PRODUCER_PARALLEL Parallel[3]; ///< Data for parallel port x. Type DEVICE_PRODUCER_PARALLEL is defined below.
- DEVICE_PRODUCER_FLOPPY Floppy; ///< Data for floppy. Type DEVICE_PRODUCER_FLOPPY is defined below.
- UINT8 MousePresent; ///< Flag to indicate if mouse is present.
- LEGACY_DEVICE_FLAGS Flags; ///< Miscellaneous Boolean state information passed to CSM.
-} DEVICE_PRODUCER_DATA_HEADER;
-
-///
-/// ATAPI_IDENTIFY
-///
-typedef struct {
- UINT16 Raw[256]; ///< Raw data from the IDE IdentifyDrive command.
-} ATAPI_IDENTIFY;
-
-///
-/// HDD_INFO
-///
-typedef struct {
+ ///\r
+ UINT32 LowPmmMemorySizeInBytes;\r
+} EFI_TO_COMPATIBILITY16_INIT_TABLE;\r
+\r
+///\r
+/// DEVICE_PRODUCER_SERIAL\r
+///\r
+typedef struct {\r
+ UINT16 Address; ///< I/O address assigned to the serial port\r
+ UINT8 Irq; ///< IRQ assigned to the serial port.\r
+ SERIAL_MODE Mode; ///< Mode of serial port. Values are defined below.\r
+} DEVICE_PRODUCER_SERIAL;\r
+\r
+///\r
+/// DEVICE_PRODUCER_SERIAL's modes\r
+///@{\r
+#define DEVICE_SERIAL_MODE_NORMAL 0x00\r
+#define DEVICE_SERIAL_MODE_IRDA 0x01\r
+#define DEVICE_SERIAL_MODE_ASK_IR 0x02\r
+#define DEVICE_SERIAL_MODE_DUPLEX_HALF 0x00\r
+#define DEVICE_SERIAL_MODE_DUPLEX_FULL 0x10\r
+///@)\r
+\r
+///\r
+/// DEVICE_PRODUCER_PARALLEL\r
+///\r
+typedef struct {\r
+ UINT16 Address; ///< I/O address assigned to the parallel port\r
+ UINT8 Irq; ///< IRQ assigned to the parallel port.\r
+ UINT8 Dma; ///< DMA assigned to the parallel port.\r
+ PARALLEL_MODE Mode; ///< Mode of the parallel port. Values are defined below.\r
+} DEVICE_PRODUCER_PARALLEL;\r
+\r
+///\r
+/// DEVICE_PRODUCER_PARALLEL's modes\r
+///@{\r
+#define DEVICE_PARALLEL_MODE_MODE_OUTPUT_ONLY 0x00\r
+#define DEVICE_PARALLEL_MODE_MODE_BIDIRECTIONAL 0x01\r
+#define DEVICE_PARALLEL_MODE_MODE_EPP 0x02\r
+#define DEVICE_PARALLEL_MODE_MODE_ECP 0x03\r
+///@}\r
+\r
+///\r
+/// DEVICE_PRODUCER_FLOPPY\r
+///\r
+typedef struct {\r
+ UINT16 Address; ///< I/O address assigned to the floppy\r
+ UINT8 Irq; ///< IRQ assigned to the floppy.\r
+ UINT8 Dma; ///< DMA assigned to the floppy.\r
+ UINT8 NumberOfFloppy; ///< Number of floppies in the system.\r
+} DEVICE_PRODUCER_FLOPPY;\r
+\r
+///\r
+/// LEGACY_DEVICE_FLAGS\r
+///\r
+typedef struct {\r
+ UINT32 A20Kybd : 1; ///< A20 controller by keyboard controller.\r
+ UINT32 A20Port90 : 1; ///< A20 controlled by port 0x92.\r
+ UINT32 Reserved : 30; ///< Reserved for future usage.\r
+} LEGACY_DEVICE_FLAGS;\r
+\r
+///\r
+/// DEVICE_PRODUCER_DATA_HEADER\r
+///\r
+typedef struct {\r
+ DEVICE_PRODUCER_SERIAL Serial[4]; ///< Data for serial port x. Type DEVICE_PRODUCER_SERIAL is defined below.\r
+ DEVICE_PRODUCER_PARALLEL Parallel[3]; ///< Data for parallel port x. Type DEVICE_PRODUCER_PARALLEL is defined below.\r
+ DEVICE_PRODUCER_FLOPPY Floppy; ///< Data for floppy. Type DEVICE_PRODUCER_FLOPPY is defined below.\r
+ UINT8 MousePresent; ///< Flag to indicate if mouse is present.\r
+ LEGACY_DEVICE_FLAGS Flags; ///< Miscellaneous Boolean state information passed to CSM.\r
+} DEVICE_PRODUCER_DATA_HEADER;\r
+\r
+///\r
+/// ATAPI_IDENTIFY\r
+///\r
+typedef struct {\r
+ UINT16 Raw[256]; ///< Raw data from the IDE IdentifyDrive command.\r
+} ATAPI_IDENTIFY;\r
+\r
+///\r
+/// HDD_INFO\r
+///\r
+typedef struct {\r
///\r
/// Status of IDE device. Values are defined below. There is one HDD_INFO structure\r
/// per IDE controller. The IdentifyDrive is per drive. Index 0 is master and index\r
/// 1 is slave.\r
- ///
+ ///\r
UINT16 Status; \r
\r
///\r
/// PCI bus of IDE controller.\r
- ///
- UINT32 Bus;
+ ///\r
+ UINT32 Bus;\r
\r
///\r
/// PCI device of IDE controller.\r
- ///
- UINT32 Device;
+ ///\r
+ UINT32 Device;\r
\r
///\r
/// PCI function of IDE controller.\r
- ///
- UINT32 Function;
+ ///\r
+ UINT32 Function;\r
\r
///\r
/// Command ports base address.\r
- ///
- UINT16 CommandBaseAddress;
+ ///\r
+ UINT16 CommandBaseAddress;\r
\r
///\r
/// Control ports base address.\r
- ///
- UINT16 ControlBaseAddress;
+ ///\r
+ UINT16 ControlBaseAddress;\r
\r
///\r
/// Bus master address\r
- ///
- UINT16 BusMasterAddress;
-
- UINT8 HddIrq;
+ ///\r
+ UINT16 BusMasterAddress;\r
+ \r
+ UINT8 HddIrq;\r
\r
///\r
/// Data that identifies the drive data, one per possible attached drive\r
- ///
- ATAPI_IDENTIFY IdentifyDrive[2];
-} HDD_INFO;
-
-///
-/// HDD_INFO status bits
-///
-#define HDD_PRIMARY 0x01
-#define HDD_SECONDARY 0x02
-#define HDD_MASTER_ATAPI_CDROM 0x04
-#define HDD_SLAVE_ATAPI_CDROM 0x08
-#define HDD_MASTER_IDE 0x20
-#define HDD_SLAVE_IDE 0x40
-#define HDD_MASTER_ATAPI_ZIPDISK 0x10
-#define HDD_SLAVE_ATAPI_ZIPDISK 0x80
-
-///
-/// BBS_STATUS_FLAGS
-///
-typedef struct {
- UINT16 OldPosition : 4; ///< Prior priority.
- UINT16 Reserved1 : 4; ///< Reserved for future use.
- UINT16 Enabled : 1; ///< If 0, ignore this entry.
+ ///\r
+ ATAPI_IDENTIFY IdentifyDrive[2];\r
+} HDD_INFO;\r
+\r
+///\r
+/// HDD_INFO status bits\r
+///\r
+#define HDD_PRIMARY 0x01\r
+#define HDD_SECONDARY 0x02\r
+#define HDD_MASTER_ATAPI_CDROM 0x04\r
+#define HDD_SLAVE_ATAPI_CDROM 0x08\r
+#define HDD_MASTER_IDE 0x20\r
+#define HDD_SLAVE_IDE 0x40\r
+#define HDD_MASTER_ATAPI_ZIPDISK 0x10\r
+#define HDD_SLAVE_ATAPI_ZIPDISK 0x80\r
+\r
+///\r
+/// BBS_STATUS_FLAGS\r
+///\r
+typedef struct {\r
+ UINT16 OldPosition : 4; ///< Prior priority.\r
+ UINT16 Reserved1 : 4; ///< Reserved for future use.\r
+ UINT16 Enabled : 1; ///< If 0, ignore this entry.\r
UINT16 Failed : 1; ///< 0 = Not known if boot failure occurred.\r
///< 1 = Boot attempted failed.\r
\r
/// 01 = Unknown if a bootable media present.\r
/// 10 = Media is present and appears bootable.\r
/// 11 = Reserved.\r
- ///
- UINT16 MediaPresent : 2;
- UINT16 Reserved2 : 4; ///< Reserved for future use.
-} BBS_STATUS_FLAGS;
-
-///
-/// BBS_TABLE, device type values & boot priority values
-///
-typedef struct {
+ ///\r
+ UINT16 MediaPresent : 2;\r
+ UINT16 Reserved2 : 4; ///< Reserved for future use.\r
+} BBS_STATUS_FLAGS;\r
+\r
+///\r
+/// BBS_TABLE, device type values & boot priority values\r
+///\r
+typedef struct {\r
///\r
/// The boot priority for this boot device. Values are defined below.\r
- ///
- UINT16 BootPriority;
+ ///\r
+ UINT16 BootPriority;\r
\r
///\r
/// The PCI bus for this boot device.\r
- ///
- UINT32 Bus;
+ ///\r
+ UINT32 Bus;\r
\r
///\r
/// The PCI device for this boot device.\r
- ///
- UINT32 Device;
+ ///\r
+ UINT32 Device;\r
\r
///\r
/// The PCI function for the boot device.\r
- ///
- UINT32 Function;
+ ///\r
+ UINT32 Function;\r
\r
///\r
/// The PCI class for this boot device.\r
- ///
- UINT8 Class;
+ ///\r
+ UINT8 Class;\r
\r
///\r
/// The PCI Subclass for this boot device.\r
- ///
- UINT8 SubClass;
+ ///\r
+ UINT8 SubClass;\r
\r
///\r
/// Segment:offset address of an ASCIIZ description string describing the manufacturer.\r
- ///
- UINT16 MfgStringOffset;
+ ///\r
+ UINT16 MfgStringOffset;\r
\r
///\r
/// Segment:offset address of an ASCIIZ description string describing the manufacturer.\r
- ///
- UINT16 MfgStringSegment;
+ /// \r
+ UINT16 MfgStringSegment;\r
\r
///\r
/// BBS device type. BBS device types are defined below.\r
- ///
- UINT16 DeviceType;
+ ///\r
+ UINT16 DeviceType;\r
\r
///\r
/// Status of this boot device. Type BBS_STATUS_FLAGS is defined below.\r
- ///
- BBS_STATUS_FLAGS StatusFlags;
+ ///\r
+ BBS_STATUS_FLAGS StatusFlags;\r
\r
///\r
/// Segment:Offset address of boot loader for IPL devices or install INT13 handler for\r
/// BCV devices.\r
- ///
- UINT16 BootHandlerOffset;
+ ///\r
+ UINT16 BootHandlerOffset;\r
\r
///\r
/// Segment:Offset address of boot loader for IPL devices or install INT13 handler for\r
/// BCV devices.\r
- ///
- UINT16 BootHandlerSegment;
+ /// \r
+ UINT16 BootHandlerSegment;\r
\r
///\r
/// Segment:offset address of an ASCIIZ description string describing this device.\r
- ///
- UINT16 DescStringOffset;
+ ///\r
+ UINT16 DescStringOffset;\r
\r
///\r
/// Segment:offset address of an ASCIIZ description string describing this device.\r
///\r
- UINT16 DescStringSegment;
+ UINT16 DescStringSegment;\r
\r
///\r
/// Reserved.\r
- ///
- UINT32 InitPerReserved;
+ ///\r
+ UINT32 InitPerReserved;\r
\r
///\r
/// The use of these fields is IBV dependent. They can be used to flag that an OpROM\r
/// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI\r
/// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup\r
- ///
- UINT32 AdditionalIrq13Handler;
+ ///\r
+ UINT32 AdditionalIrq13Handler;\r
\r
///\r
/// The use of these fields is IBV dependent. They can be used to flag that an OpROM\r
/// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI\r
/// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup\r
- ///
- UINT32 AdditionalIrq18Handler;
+ /// \r
+ UINT32 AdditionalIrq18Handler;\r
\r
///\r
/// The use of these fields is IBV dependent. They can be used to flag that an OpROM\r
/// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI\r
/// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup\r
- ///
- UINT32 AdditionalIrq19Handler;
+ /// \r
+ UINT32 AdditionalIrq19Handler;\r
\r
///\r
/// The use of these fields is IBV dependent. They can be used to flag that an OpROM\r
/// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI\r
/// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup\r
- ///
- UINT32 AdditionalIrq40Handler;
- UINT8 AssignedDriveNumber;
- UINT32 AdditionalIrq41Handler;
- UINT32 AdditionalIrq46Handler;
- UINT32 IBV1;
- UINT32 IBV2;
-} BBS_TABLE;
-
-///
-/// BBS device type values
-///@{
-#define BBS_FLOPPY 0x01
-#define BBS_HARDDISK 0x02
-#define BBS_CDROM 0x03
-#define BBS_PCMCIA 0x04
-#define BBS_USB 0x05
-#define BBS_EMBED_NETWORK 0x06
-#define BBS_BEV_DEVICE 0x80
-#define BBS_UNKNOWN 0xff
-///@}
-
-///
-/// BBS boot priority values
-///@{
-#define BBS_DO_NOT_BOOT_FROM 0xFFFC
-#define BBS_LOWEST_PRIORITY 0xFFFD
-#define BBS_UNPRIORITIZED_ENTRY 0xFFFE
-#define BBS_IGNORE_ENTRY 0xFFFF
-///@}
-
-///
-/// SMM_ATTRIBUTES
-///
-typedef struct {
+ /// \r
+ UINT32 AdditionalIrq40Handler;\r
+ UINT8 AssignedDriveNumber;\r
+ UINT32 AdditionalIrq41Handler;\r
+ UINT32 AdditionalIrq46Handler;\r
+ UINT32 IBV1;\r
+ UINT32 IBV2;\r
+} BBS_TABLE;\r
+\r
+///\r
+/// BBS device type values\r
+///@{\r
+#define BBS_FLOPPY 0x01\r
+#define BBS_HARDDISK 0x02\r
+#define BBS_CDROM 0x03\r
+#define BBS_PCMCIA 0x04\r
+#define BBS_USB 0x05\r
+#define BBS_EMBED_NETWORK 0x06\r
+#define BBS_BEV_DEVICE 0x80\r
+#define BBS_UNKNOWN 0xff\r
+///@}\r
+\r
+///\r
+/// BBS boot priority values\r
+///@{\r
+#define BBS_DO_NOT_BOOT_FROM 0xFFFC\r
+#define BBS_LOWEST_PRIORITY 0xFFFD\r
+#define BBS_UNPRIORITIZED_ENTRY 0xFFFE\r
+#define BBS_IGNORE_ENTRY 0xFFFF\r
+///@}\r
+\r
+///\r
+/// SMM_ATTRIBUTES\r
+///\r
+typedef struct {\r
///\r
/// Access mechanism used to generate the soft SMI. Defined types are below. The other\r
/// values are reserved for future usage.\r
- ///
- UINT16 Type : 3;
+ ///\r
+ UINT16 Type : 3;\r
\r
///\r
/// Size of "port" in bits. Defined values are below.\r
- ///
- UINT16 PortGranularity : 3;
+ ///\r
+ UINT16 PortGranularity : 3;\r
\r
///\r
/// Size of data in bits. Defined values are below.\r
- ///
- UINT16 DataGranularity : 3;
+ ///\r
+ UINT16 DataGranularity : 3;\r
\r
///\r
/// Reserved for future use.\r
- ///
- UINT16 Reserved : 7;
-} SMM_ATTRIBUTES;
-
-///
-/// SMM_ATTRIBUTES type values
-///@{
-#define STANDARD_IO 0x00
-#define STANDARD_MEMORY 0x01
-///@}
-
-///
-/// SMM_ATTRIBUTES port size constants
-///@{
-#define PORT_SIZE_8 0x00
-#define PORT_SIZE_16 0x01
-#define PORT_SIZE_32 0x02
-#define PORT_SIZE_64 0x03
-///@}
-
-///
-/// SMM_ATTRIBUTES data size constants
-///@{
-#define DATA_SIZE_8 0x00
-#define DATA_SIZE_16 0x01
-#define DATA_SIZE_32 0x02
-#define DATA_SIZE_64 0x03
-///@}
-
-///
-/// SMM_FUNCTION & relating constants
-///
-typedef struct {
- UINT16 Function : 15;
- UINT16 Owner : 1;
-} SMM_FUNCTION;
-
-///
-/// SMM_FUNCTION Function constants
-///@{
-#define INT15_D042 0x0000
-#define GET_USB_BOOT_INFO 0x0001
-#define DMI_PNP_50_57 0x0002
-///@}
-
-///
-/// SMM_FUNCTION Owner constants
-///@{
-#define STANDARD_OWNER 0x0
-#define OEM_OWNER 0x1
-///@}
-
-/**
- * SMM_ENTRY
- *
- * This structure assumes both port and data sizes are 1. SmmAttribute must be
- * properly to reflect that assumption.
-**/
-typedef struct {
+ ///\r
+ UINT16 Reserved : 7;\r
+} SMM_ATTRIBUTES;\r
+\r
+///\r
+/// SMM_ATTRIBUTES type values\r
+///@{\r
+#define STANDARD_IO 0x00\r
+#define STANDARD_MEMORY 0x01\r
+///@}\r
+\r
+///\r
+/// SMM_ATTRIBUTES port size constants\r
+///@{\r
+#define PORT_SIZE_8 0x00\r
+#define PORT_SIZE_16 0x01\r
+#define PORT_SIZE_32 0x02\r
+#define PORT_SIZE_64 0x03\r
+///@}\r
+\r
+///\r
+/// SMM_ATTRIBUTES data size constants\r
+///@{\r
+#define DATA_SIZE_8 0x00\r
+#define DATA_SIZE_16 0x01\r
+#define DATA_SIZE_32 0x02\r
+#define DATA_SIZE_64 0x03\r
+///@}\r
+\r
+///\r
+/// SMM_FUNCTION & relating constants\r
+///\r
+typedef struct {\r
+ UINT16 Function : 15;\r
+ UINT16 Owner : 1;\r
+} SMM_FUNCTION;\r
+\r
+///\r
+/// SMM_FUNCTION Function constants\r
+///@{\r
+#define INT15_D042 0x0000\r
+#define GET_USB_BOOT_INFO 0x0001\r
+#define DMI_PNP_50_57 0x0002\r
+///@}\r
+\r
+///\r
+/// SMM_FUNCTION Owner constants\r
+///@{\r
+#define STANDARD_OWNER 0x0\r
+#define OEM_OWNER 0x1\r
+///@}\r
+\r
+/**\r
+ * SMM_ENTRY\r
+ *\r
+ * This structure assumes both port and data sizes are 1. SmmAttribute must be\r
+ * properly to reflect that assumption.\r
+**/\r
+typedef struct {\r
///\r
/// Describes the access mechanism, SmmPort, and SmmData sizes. Type\r
/// SMM_ATTRIBUTES is defined below.\r
- ///
- SMM_ATTRIBUTES SmmAttributes;
+ ///\r
+ SMM_ATTRIBUTES SmmAttributes;\r
\r
///\r
/// Function Soft SMI is to perform. Type SMM_FUNCTION is defined below.\r
- ///
- SMM_FUNCTION SmmFunction;
+ ///\r
+ SMM_FUNCTION SmmFunction;\r
\r
///\r
/// SmmPort size depends upon SmmAttributes and ranges from2 bytes to 16 bytes\r
- ///
- UINT8 SmmPort;
+ ///\r
+ UINT8 SmmPort;\r
\r
///\r
/// SmmData size depends upon SmmAttributes and ranges from2 bytes to 16 bytes\r
- ///
- UINT8 SmmData;
-} SMM_ENTRY;
-
-///
-/// SMM_TABLE
-///
-typedef struct {
- UINT16 NumSmmEntries; ///< Number of entries represented by SmmEntry.
- SMM_ENTRY SmmEntry; ///< One entry per function. Type SMM_ENTRY is defined below.
-} SMM_TABLE;
-
-///
-/// UDC_ATTRIBUTES
-///
-typedef struct {
+ ///\r
+ UINT8 SmmData;\r
+} SMM_ENTRY;\r
+\r
+///\r
+/// SMM_TABLE\r
+///\r
+typedef struct {\r
+ UINT16 NumSmmEntries; ///< Number of entries represented by SmmEntry.\r
+ SMM_ENTRY SmmEntry; ///< One entry per function. Type SMM_ENTRY is defined below.\r
+} SMM_TABLE;\r
+\r
+///\r
+/// UDC_ATTRIBUTES\r
+///\r
+typedef struct {\r
///\r
/// This bit set indicates that the ServiceAreaData is valid.\r
- ///
- UINT8 DirectoryServiceValidity : 1;
+ ///\r
+ UINT8 DirectoryServiceValidity : 1;\r
\r
///\r
/// This bit set indicates to use the Reserve Area Boot Code Address (RACBA) only if\r
/// DirectoryServiceValidity is 0.\r
- ///
- UINT8 RabcaUsedFlag : 1;
+ ///\r
+ UINT8 RabcaUsedFlag : 1;\r
\r
///\r
/// This bit set indicates to execute hard disk diagnostics.\r
- ///
- UINT8 ExecuteHddDiagnosticsFlag : 1;
+ ///\r
+ UINT8 ExecuteHddDiagnosticsFlag : 1;\r
\r
///\r
/// Reserved for future use. Set to 0.\r
- ///
- UINT8 Reserved : 5;
-} UDC_ATTRIBUTES;
-
-///
-/// UD_TABLE
-///
-typedef struct {
+ ///\r
+ UINT8 Reserved : 5;\r
+} UDC_ATTRIBUTES;\r
+\r
+///\r
+/// UD_TABLE\r
+///\r
+typedef struct {\r
///\r
/// This field contains the bit-mapped attributes of the PARTIES information. Type\r
/// UDC_ATTRIBUTES is defined below.\r
- ///
- UDC_ATTRIBUTES Attributes;
+ ///\r
+ UDC_ATTRIBUTES Attributes;\r
\r
///\r
/// This field contains the zero-based device on which the selected\r
/// ServiceDataArea is present. It is 0 for master and 1 for the slave device. \r
- ///
- UINT8 DeviceNumber;
+ ///\r
+ UINT8 DeviceNumber;\r
\r
///\r
/// This field contains the zero-based index into the BbsTable for the parent device.\r
/// This index allows the user to reference the parent device information such as PCI\r
/// bus, device function.\r
- ///
- UINT8 BbsTableEntryNumberForParentDevice;
+ ///\r
+ UINT8 BbsTableEntryNumberForParentDevice;\r
\r
///\r
/// This field contains the zero-based index into the BbsTable for the boot entry.\r
- ///
- UINT8 BbsTableEntryNumberForBoot;
+ ///\r
+ UINT8 BbsTableEntryNumberForBoot;\r
\r
///\r
/// This field contains the zero-based index into the BbsTable for the HDD diagnostics entry.\r
- ///
- UINT8 BbsTableEntryNumberForHddDiag;
+ ///\r
+ UINT8 BbsTableEntryNumberForHddDiag;\r
\r
///\r
/// The raw Beer data.\r
- ///
- UINT8 BeerData[128];
+ ///\r
+ UINT8 BeerData[128];\r
\r
///\r
/// The raw data of selected service area.\r
- ///
- UINT8 ServiceAreaData[64];
-} UD_TABLE;
-
-#define EFI_TO_LEGACY_MAJOR_VERSION 0x02
-#define EFI_TO_LEGACY_MINOR_VERSION 0x00
-#define MAX_IDE_CONTROLLER 8
-
-///
-/// EFI_TO_COMPATIBILITY16_BOOT_TABLE
-///
-typedef struct {
- UINT16 MajorVersion; ///< The EfiCompatibility major version number.
- UINT16 MinorVersion; ///< The EfiCompatibility minor version number.
- UINT32 AcpiTable; ///< Location of the RSDT ACPI table. < 4G range
- UINT32 SmbiosTable; ///< Location of the SMBIOS table in EFI memory. < 4G range
- UINT32 SmbiosTableLength;
- //
- // Legacy SIO state
- //
- DEVICE_PRODUCER_DATA_HEADER SioData; ///< Standard traditional device information.
- UINT16 DevicePathType; ///< The default boot type.
- UINT16 PciIrqMask; ///< Mask of which IRQs have been assigned to PCI.
+ ///\r
+ UINT8 ServiceAreaData[64];\r
+} UD_TABLE;\r
+\r
+#define EFI_TO_LEGACY_MAJOR_VERSION 0x02\r
+#define EFI_TO_LEGACY_MINOR_VERSION 0x00\r
+#define MAX_IDE_CONTROLLER 8\r
+\r
+///\r
+/// EFI_TO_COMPATIBILITY16_BOOT_TABLE\r
+///\r
+typedef struct {\r
+ UINT16 MajorVersion; ///< The EfiCompatibility major version number.\r
+ UINT16 MinorVersion; ///< The EfiCompatibility minor version number.\r
+ UINT32 AcpiTable; ///< Location of the RSDT ACPI table. < 4G range\r
+ UINT32 SmbiosTable; ///< Location of the SMBIOS table in EFI memory. < 4G range\r
+ UINT32 SmbiosTableLength;\r
+ //\r
+ // Legacy SIO state\r
+ //\r
+ DEVICE_PRODUCER_DATA_HEADER SioData; ///< Standard traditional device information.\r
+ UINT16 DevicePathType; ///< The default boot type.\r
+ UINT16 PciIrqMask; ///< Mask of which IRQs have been assigned to PCI.\r
UINT32 NumberE820Entries; ///< Number of E820 entries. The number can change from the\r
- ///< Compatibility16InitializeYourself() function.
- //
- // Controller & Drive Identify[2] per controller information
- //
- HDD_INFO HddInfo[MAX_IDE_CONTROLLER]; ///< Hard disk drive information, including raw Identify Drive data.
- UINT32 NumberBbsEntries; ///< Number of entries in the BBS table
- UINT32 BbsTable; ///< Pointer to the BBS table. Type BBS_TABLE is defined below.
- UINT32 SmmTable; ///< Pointer to the SMM table. Type SMM_TABLE is defined below.
+ ///< Compatibility16InitializeYourself() function.\r
+ //\r
+ // Controller & Drive Identify[2] per controller information\r
+ //\r
+ HDD_INFO HddInfo[MAX_IDE_CONTROLLER]; ///< Hard disk drive information, including raw Identify Drive data.\r
+ UINT32 NumberBbsEntries; ///< Number of entries in the BBS table\r
+ UINT32 BbsTable; ///< Pointer to the BBS table. Type BBS_TABLE is defined below.\r
+ UINT32 SmmTable; ///< Pointer to the SMM table. Type SMM_TABLE is defined below.\r
UINT32 OsMemoryAbove1Mb; ///< The amount of usable memory above 1 MB, i.e. E820 type 1 memory. This value can\r
///< differ from the value in EFI_TO_COMPATIBILITY16_INIT_TABLE as more\r
- ///< memory may have been discovered.
+ ///< memory may have been discovered.\r
UINT32 UnconventionalDeviceTable; ///< Information to boot off an unconventional device like a PARTIES partition. Type\r
- ///< UD_TABLE is defined below.
-} EFI_TO_COMPATIBILITY16_BOOT_TABLE;
-
-///
-/// EFI_LEGACY_INSTALL_PCI_HANDLER
-///
-typedef struct {
- UINT8 PciBus; ///< The PCI bus of the device.
- UINT8 PciDeviceFun; ///< The PCI device in bits 7:3 and function in bits 2:0.
- UINT8 PciSegment; ///< The PCI segment of the device.
- UINT8 PciClass; ///< The PCI class code of the device.
- UINT8 PciSubclass; ///< The PCI subclass code of the device.
- UINT8 PciInterface; ///< The PCI interface code of the device.
- //
- // Primary section
- //
- UINT8 PrimaryIrq; ///< The primary device IRQ.
- UINT8 PrimaryReserved; ///< Reserved.
- UINT16 PrimaryControl; ///< The primary device control I/O base.
- UINT16 PrimaryBase; ///< The primary device I/O base.
- UINT16 PrimaryBusMaster; ///< The primary device bus master I/O base.
- //
- // Secondary Section
- //
- UINT8 SecondaryIrq; ///< The secondary device IRQ.
- UINT8 SecondaryReserved; ///< Reserved.
- UINT16 SecondaryControl; ///< The secondary device control I/O base.
- UINT16 SecondaryBase; ///< The secondary device I/O base.
- UINT16 SecondaryBusMaster; ///< The secondary device bus master I/O base.
-} EFI_LEGACY_INSTALL_PCI_HANDLER;
-
-//
-// Restore default pack value
-//
-#pragma pack()
-
-#endif /* _FRAMEWORK_LEGACY_16_H_ */
+ ///< UD_TABLE is defined below.\r
+} EFI_TO_COMPATIBILITY16_BOOT_TABLE;\r
+\r
+///\r
+/// EFI_LEGACY_INSTALL_PCI_HANDLER\r
+///\r
+typedef struct {\r
+ UINT8 PciBus; ///< The PCI bus of the device.\r
+ UINT8 PciDeviceFun; ///< The PCI device in bits 7:3 and function in bits 2:0.\r
+ UINT8 PciSegment; ///< The PCI segment of the device.\r
+ UINT8 PciClass; ///< The PCI class code of the device.\r
+ UINT8 PciSubclass; ///< The PCI subclass code of the device.\r
+ UINT8 PciInterface; ///< The PCI interface code of the device.\r
+ //\r
+ // Primary section\r
+ //\r
+ UINT8 PrimaryIrq; ///< The primary device IRQ.\r
+ UINT8 PrimaryReserved; ///< Reserved.\r
+ UINT16 PrimaryControl; ///< The primary device control I/O base.\r
+ UINT16 PrimaryBase; ///< The primary device I/O base.\r
+ UINT16 PrimaryBusMaster; ///< The primary device bus master I/O base.\r
+ //\r
+ // Secondary Section\r
+ //\r
+ UINT8 SecondaryIrq; ///< The secondary device IRQ.\r
+ UINT8 SecondaryReserved; ///< Reserved.\r
+ UINT16 SecondaryControl; ///< The secondary device control I/O base.\r
+ UINT16 SecondaryBase; ///< The secondary device I/O base.\r
+ UINT16 SecondaryBusMaster; ///< The secondary device bus master I/O base.\r
+} EFI_LEGACY_INSTALL_PCI_HANDLER;\r
+\r
+//\r
+// Restore default pack value\r
+//\r
+#pragma pack()\r
+\r
+#endif /* _FRAMEWORK_LEGACY_16_H_ */\r
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