ShellPkg/UefiShellLevel2CommandsLib: Handle the returned error

[mirror_edk2.git] / IntelFrameworkPkg / Include / Protocol / LegacyBios.h

/** @file\r
  The EFI Legacy BIOS Protocol is used to abstract legacy Option ROM usage\r
  under EFI and Legacy OS boot.  This file also includes all the related\r
  COMPATIBILIY16 structures and defintions.\r
\r
  Note: The names for EFI_IA32_REGISTER_SET elements were picked to follow\r
  well known naming conventions.\r
\r
  Thunk is the code that switches from 32-bit protected environment into the 16-bit real-mode\r
	environment. Reverse thunk is the code that does the opposite.\r
\r
Copyright (c) 2007 - 2015, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials are licensed and made available under \r
the terms and conditions of the BSD License that accompanies this distribution.  \r
The full text of the license may be found at\r
http://opensource.org/licenses/bsd-license.php.                                          \r
    \r
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     \r
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
  @par Revision Reference:\r
  This protocol is defined in Framework for EFI Compatibility Support Module spec\r
  Version 0.98.\r
\r
**/\r
\r
#ifndef _EFI_LEGACY_BIOS_H_\r
#define _EFI_LEGACY_BIOS_H_\r
\r
///\r
/// \r
///\r
#pragma pack(1)\r
\r
typedef UINT8                       SERIAL_MODE;\r
typedef UINT8                       PARALLEL_MODE;\r
\r
#define EFI_COMPATIBILITY16_TABLE_SIGNATURE SIGNATURE_32 ('I', 'F', 'E', '$')\r
\r
///\r
/// There is a table located within the traditional BIOS in either the 0xF000:xxxx or 0xE000:xxxx\r
/// physical address range. It is located on a 16-byte boundary and provides the physical address of the\r
/// entry point for the Compatibility16 functions. These functions provide the platform-specific\r
/// information that is required by the generic EfiCompatibility code. The functions are invoked via\r
/// thunking by using EFI_LEGACY_BIOS_PROTOCOL.FarCall86() with the 32-bit physical\r
/// entry point.\r
///\r
typedef struct {\r
  ///\r
  /// The string "$EFI" denotes the start of the EfiCompatibility table. Byte 0 is "I," byte\r
  /// 1 is "F," byte 2 is "E," and byte 3 is "$" and is normally accessed as a DWORD or UINT32.\r
  ///\r
  UINT32                            Signature;\r
  \r
  ///\r
  /// The value required such that byte checksum of TableLength equals zero.\r
  ///\r
  UINT8                             TableChecksum;\r
  \r
  ///\r
  /// The length of this table.\r
  ///\r
  UINT8                             TableLength;\r
  \r
  ///\r
  /// The major EFI revision for which this table was generated.\r
  /// \r
  UINT8                             EfiMajorRevision;\r
  \r
  ///\r
  /// The minor EFI revision for which this table was generated.\r
  ///\r
  UINT8                             EfiMinorRevision;\r
  \r
  ///\r
  /// The major revision of this table.\r
  ///\r
  UINT8                             TableMajorRevision;\r
  \r
  ///\r
  /// The minor revision of this table.\r
  ///\r
  UINT8                             TableMinorRevision;\r
  \r
  ///\r
  /// Reserved for future usage.\r
  ///\r
  UINT16                            Reserved;\r
  \r
  ///\r
  /// The segment of the entry point within the traditional BIOS for Compatibility16 functions.\r
  ///\r
  UINT16                            Compatibility16CallSegment;\r
  \r
  ///\r
  /// The offset of the entry point within the traditional BIOS for Compatibility16 functions.\r
  ///\r
  UINT16                            Compatibility16CallOffset;\r
  \r
  ///\r
  /// The segment of the entry point within the traditional BIOS for EfiCompatibility \r
  /// to invoke the PnP installation check.\r
  ///\r
  UINT16                            PnPInstallationCheckSegment;\r
  \r
  ///\r
  /// The Offset of the entry point within the traditional BIOS for EfiCompatibility \r
  /// to invoke the PnP installation check.\r
  ///\r
  UINT16                            PnPInstallationCheckOffset;\r
  \r
  ///\r
  /// EFI system resources table. Type EFI_SYSTEM_TABLE is defined in the IntelPlatform \r
  ///Innovation Framework for EFI Driver Execution Environment Core Interface Specification (DXE CIS).\r
  ///\r
  UINT32                            EfiSystemTable; \r
  \r
  ///\r
  /// The address of an OEM-provided identifier string. The string is null terminated.\r
  ///\r
  UINT32                            OemIdStringPointer;\r
  \r
  ///\r
  /// The 32-bit physical address where ACPI RSD PTR is stored within the traditional\r
  /// BIOS. The remained of the ACPI tables are located at their EFI addresses. The size\r
  /// reserved is the maximum for ACPI 2.0. The EfiCompatibility will fill in the ACPI\r
  /// RSD PTR with either the ACPI 1.0b or 2.0 values.\r
  ///\r
  UINT32                            AcpiRsdPtrPointer;\r
  \r
  ///\r
  /// The OEM revision number. Usage is undefined but provided for OEM module usage.\r
  ///\r
  UINT16                            OemRevision;\r
  \r
  ///\r
  /// The 32-bit physical address where INT15 E820 data is stored within the traditional\r
  /// BIOS. The EfiCompatibility code will fill in the E820Pointer value and copy the\r
  /// data to the indicated area.\r
  ///\r
  UINT32                            E820Pointer;\r
  \r
  ///\r
  /// The length of the E820 data and is filled in by the EfiCompatibility code.\r
  ///\r
  UINT32                            E820Length;\r
  \r
  ///\r
  /// The 32-bit physical address where the $PIR table is stored in the traditional BIOS.\r
  /// The EfiCompatibility code will fill in the IrqRoutingTablePointer value and\r
  /// copy the data to the indicated area.\r
  ///\r
  UINT32                            IrqRoutingTablePointer;\r
  \r
  ///\r
  /// The length of the $PIR table and is filled in by the EfiCompatibility code.\r
  ///\r
  UINT32                            IrqRoutingTableLength;\r
  \r
  ///\r
  /// The 32-bit physical address where the MP table is stored in the traditional BIOS.\r
  /// The EfiCompatibility code will fill in the MpTablePtr value and copy the data \r
  /// to the indicated area.\r
  ///\r
  UINT32                            MpTablePtr;\r
  \r
  ///\r
  /// The length of the MP table and is filled in by the EfiCompatibility code.\r
  ///\r
  UINT32                            MpTableLength;\r
  \r
  ///\r
  /// The segment of the OEM-specific INT table/code.\r
  /// \r
  UINT16                            OemIntSegment;\r
  \r
  ///\r
  /// The offset of the OEM-specific INT table/code.\r
  ///\r
  UINT16                            OemIntOffset;\r
  \r
  ///\r
  /// The segment of the OEM-specific 32-bit table/code.\r
  ///\r
  UINT16                            Oem32Segment;\r
  \r
  ///\r
  /// The offset of the OEM-specific 32-bit table/code.\r
  ///\r
  UINT16                            Oem32Offset;\r
  \r
  ///\r
  /// The segment of the OEM-specific 16-bit table/code.\r
  ///\r
  UINT16                            Oem16Segment;\r
  \r
  ///\r
  /// The offset of the OEM-specific 16-bit table/code.\r
  ///\r
  UINT16                            Oem16Offset;\r
  \r
  ///\r
  /// The segment of the TPM binary passed to 16-bit CSM.\r
  ///\r
  UINT16                            TpmSegment;\r
  \r
  ///\r
  /// The offset of the TPM binary passed to 16-bit CSM.\r
  ///\r
  UINT16                            TpmOffset;\r
  \r
  ///\r
  /// A pointer to a string identifying the independent BIOS vendor.\r
  ///\r
  UINT32                            IbvPointer;\r
  \r
  ///\r
  /// This field is NULL for all systems not supporting PCI Express. This field is the base\r
  /// value of the start of the PCI Express memory-mapped configuration registers and\r
  /// must be filled in prior to EfiCompatibility code issuing the Compatibility16 function\r
  /// Compatibility16InitializeYourself().\r
  /// Compatibility16InitializeYourself() is defined in Compatability16\r
  /// Functions.\r
  ///\r
  UINT32                            PciExpressBase;\r
  \r
  ///\r
  /// Maximum PCI bus number assigned.\r
  ///\r
  UINT8                             LastPciBus;\r
\r
  ///\r
  /// Start Address of Upper Memory Area (UMA) to be set as Read/Write. If\r
  /// UmaAddress is a valid address in the shadow RAM, it also indicates that the region\r