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79964ac8 1/** @file\r
2 This file declares SMM Control abstraction protocol.\r
8411f1c0 3 This protocol is used initiate SMI/PMI activations. This protocol could be published by either of\r
4 the following:\r
5 - A processor driver to abstract the SMI/PMI IPI\r
6 - The driver that abstracts the ASIC that is supporting the APM port, such as the ICH in an\r
0b34b869 7 Intel chipset\r
8411f1c0 8 Because of the possibility of performing SMI or PMI IPI transactions, the ability to generate this\r
0b34b869 9 event from a platform chipset agent is an optional capability for both IA-32 and Itanium based\r
8411f1c0 10 systems.\r
79964ac8 11\r
053d9774 12 Copyright (c) 2007,2009 Intel Corporation\r
79964ac8 13 All rights reserved. This program and the accompanying materials\r
14 are licensed and made available under the terms and conditions of the BSD License\r
15 which accompanies this distribution. The full text of the license may be found at\r
16 http://opensource.org/licenses/bsd-license.php\r
17\r
18 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
19 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
20\r
21 Module Name: SmmControl.h\r
22\r
23 @par Revision Reference:\r
24 This Protocol is defined in Framework of EFI SMM Core Interface Spec\r
25 Version 0.9.\r
26\r
27**/\r
28\r
29#ifndef _SMM_CONTROL_H_\r
30#define _SMM_CONTROL_H_\r
31\r
b80fbe85 32#include <PiDxe.h>\r
33\r
79964ac8 34typedef struct _EFI_SMM_CONTROL_PROTOCOL EFI_SMM_CONTROL_PROTOCOL;\r
35\r
36#define EFI_SMM_CONTROL_PROTOCOL_GUID \\r
37 { \\r
38 0x8d12e231, 0xc667, 0x4fd1, {0x98, 0xf2, 0x24, 0x49, 0xa7, 0xe7, 0xb2, 0xe5 } \\r
39 }\r
700a7869 40//\r
79964ac8 41// SMM Access specification Data Structures\r
42//\r
43typedef struct {\r
412fb9ef 44 /// \r
45 /// Describes the I/O location of the particular port that engendered the synchronous\r
46 /// SMI. For example, this location can include but is not limited to the traditional \r
47 /// PCAT* APM port of 0B2h.\r
48 ///\r
79964ac8 49 UINT8 SmiTriggerRegister;\r
412fb9ef 50 ///\r
51 /// Describes the value that was written to the respective activation port.\r
52 ///\r
79964ac8 53 UINT8 SmiDataRegister;\r
54} EFI_SMM_CONTROL_REGISTER;\r
55\r
56//\r
57// SMM Control specification member function\r
58//\r
59/**\r
60 Invokes SMI activation from either the preboot or runtime environment.\r
61\r
62 @param This The EFI_SMM_CONTROL_PROTOCOL instance.\r
63 @param ArgumentBuffer Optional sized data to pass into the protocol activation.\r
64 @param ArgumentBufferSize Optional size of the data.\r
65 @param Periodic Optional mechanism to engender a periodic stream.\r
66 @param ActivationInterval Optional parameter to repeat at this period one\r
67 time or, if the Periodic Boolean is set, periodically.\r
68\r
69 @retval EFI_SUCCESS The SMI/PMI has been engendered.\r
70 @retval EFI_DEVICE_ERROR The timing is unsupported.\r
71 @retval EFI_INVALID_PARAMETER The activation period is unsupported.\r
72 @retval EFI_NOT_STARTED The SMM base service has not been initialized.\r
73\r
74**/\r
75typedef\r
76EFI_STATUS\r
69686d56 77(EFIAPI *EFI_SMM_ACTIVATE)(\r
79964ac8 78 IN EFI_SMM_CONTROL_PROTOCOL *This,\r
79 IN OUT INT8 *ArgumentBuffer OPTIONAL,\r
80 IN OUT UINTN *ArgumentBufferSize OPTIONAL,\r
81 IN BOOLEAN Periodic OPTIONAL,\r
82 IN UINTN ActivationInterval OPTIONAL\r
83 );\r
84\r
85/**\r
86 Clears any system state that was created in response to the Active call.\r
87\r
88 @param This The EFI_SMM_CONTROL_PROTOCOL instance.\r
700a7869 89 @param Periodic Optional parameter to repeat at this period one \r
90 time or, if the Periodic Boolean is set, periodically.\r
79964ac8 91\r
92 @retval EFI_SUCCESS The SMI/PMI has been engendered.\r
93 @retval EFI_DEVICE_ERROR The source could not be cleared.\r
94 @retval EFI_INVALID_PARAMETER The service did not support the Periodic input argument.\r
95\r
96**/\r
97typedef\r
98EFI_STATUS\r
69686d56 99(EFIAPI *EFI_SMM_DEACTIVATE)(\r
79964ac8 100 IN EFI_SMM_CONTROL_PROTOCOL *This,\r
101 IN BOOLEAN Periodic OPTIONAL\r
102 );\r
103\r
104/**\r
105 Provides information on the source register used to generate the SMI.\r
106\r
107 @param This The EFI_SMM_CONTROL_PROTOCOL instance.\r
108 @param SmiRegister Pointer to the SMI register description structure\r
109\r
110 @retval EFI_SUCCESS The register structure has been returned.\r
412fb9ef 111 @retval EFI_DEVICE_ERROR The source could not be cleared.\r
112 @retval EFI_INVALID_PARAMETER The service did not support the Periodic input argument.\r
79964ac8 113\r
114**/\r
115typedef\r
116EFI_STATUS\r
69686d56 117(EFIAPI *EFI_SMM_GET_REGISTER_INFO)(\r
79964ac8 118 IN EFI_SMM_CONTROL_PROTOCOL *This,\r
119 IN OUT EFI_SMM_CONTROL_REGISTER *SmiRegister\r
120 );\r
121\r
122/**\r
123 @par Protocol Description:\r
124 This protocol is used initiate SMI/PMI activations.\r
125\r
126 @param Trigger\r
127 Initiates the SMI/PMI activation.\r
128\r
129 @param Clear\r
130 Quiesces the SMI/PMI activation.\r
131\r
132 @param GetRegisterInfo\r
133 Provides data on the register used as the source of the SMI.\r
134\r
135 @param MinimumTriggerPeriod\r
136 Minimum interval at which the platform can set the period.\r
137\r
412fb9ef 138 @retval EFI_SUCCESS The register structure has been returned.\r
79964ac8 139**/\r
140\r
053d9774 141//\r
142// SMM Control Protocol\r
143//\r
144/**\r
412fb9ef 145 This protocol is used initiate SMI/PMI activations. \r
146 This protocol could be published by either of the following:\r
147 - A processor driver to abstract the SMI/PMI IPI\r
c41da1c6 148 - The driver that abstracts the ASIC that is supporting the APM port, such as the ICH in an Intel chipset\r
412fb9ef 149 Because of the possibility of performing SMI or PMI IPI transactions, the ability to generate this\r
053d9774 150 \r
412fb9ef 151 The EFI_SMM_CONTROL_PROTOCOL is used by the platform chipset or processor driver. This\r
053d9774 152 protocol is useable both in boot services and runtime. The runtime aspect is so that an\r
153 implementation of EFI_SMM_BASE_PROTOCOL.Communicate() can layer upon this service\r
154 and provide an SMI callback from a general EFI runtime driver.\r
155 The purpose of this protocol is to provide an abstraction to the platform hardware that generates an\r
156 SMI or PMI. There are often I/O ports that, when accessed, will engender the\r
157**/\r
79964ac8 158struct _EFI_SMM_CONTROL_PROTOCOL {\r
412fb9ef 159 ///\r
160 /// Initiates the SMI/PMI activation.\r
161 ///\r
79964ac8 162 EFI_SMM_ACTIVATE Trigger;\r
412fb9ef 163 ///\r
164 /// Quiesces the SMI/PMI activation.\r
165 ///\r
79964ac8 166 EFI_SMM_DEACTIVATE Clear;\r
412fb9ef 167 ///\r
168 /// Provides data on the register used as the source of the SMI.\r
169 ///\r
79964ac8 170 EFI_SMM_GET_REGISTER_INFO GetRegisterInfo;\r
412fb9ef 171 ///\r
172 /// Minimum interval at which the platform can set the period. A maximum is not\r
173 /// specified in that the SMM infrastructure code can emulate a maximum interval that is\r
174 /// greater than the hardware capabilities by using software emulation in the SMM\r
175 /// infrastructure code.\r
176 ///\r
79964ac8 177 UINTN MinimumTriggerPeriod;\r
178};\r
179\r
180extern EFI_GUID gEfiSmmControlProtocolGuid;\r
181\r
182#endif\r