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1 /** @file
2 This file declares SMM Control abstraction protocol.
3 This protocol is used initiate SMI/PMI activations. This protocol could be published by either of
4 the following:
5 - A processor driver to abstract the SMI/PMI IPI
6 - The driver that abstracts the ASIC that is supporting the APM port, such as the ICH in an
7 Intel chipset
8 Because of the possibility of performing SMI or PMI IPI transactions, the ability to generate this
9 event from a platform chipset agent is an optional capability for both IA-32 and Itanium based
10 systems.
11
12 Copyright (c) 2007,2009 Intel Corporation
13 All rights reserved. This program and the accompanying materials
14 are licensed and made available under the terms and conditions of the BSD License
15 which accompanies this distribution. The full text of the license may be found at
16 http://opensource.org/licenses/bsd-license.php
17
18 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
19 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
20
21 Module Name: SmmControl.h
22
23 @par Revision Reference:
24 This Protocol is defined in Framework of EFI SMM Core Interface Spec
25 Version 0.9.
26
27 **/
28
29 #ifndef _SMM_CONTROL_H_
30 #define _SMM_CONTROL_H_
31
32 #include <PiDxe.h>
33
34 typedef struct _EFI_SMM_CONTROL_PROTOCOL EFI_SMM_CONTROL_PROTOCOL;
35
36 #define EFI_SMM_CONTROL_PROTOCOL_GUID \
37 { \
38 0x8d12e231, 0xc667, 0x4fd1, {0x98, 0xf2, 0x24, 0x49, 0xa7, 0xe7, 0xb2, 0xe5 } \
39 }
40 //
41 // SMM Access specification Data Structures
42 //
43 typedef struct {
44 ///
45 /// Describes the I/O location of the particular port that engendered the synchronous
46 /// SMI. For example, this location can include but is not limited to the traditional
47 /// PCAT* APM port of 0B2h.
48 ///
49 UINT8 SmiTriggerRegister;
50 ///
51 /// Describes the value that was written to the respective activation port.
52 ///
53 UINT8 SmiDataRegister;
54 } EFI_SMM_CONTROL_REGISTER;
55
56 //
57 // SMM Control specification member function
58 //
59 /**
60 Invokes SMI activation from either the preboot or runtime environment.
61
62 @param This The EFI_SMM_CONTROL_PROTOCOL instance.
63 @param ArgumentBuffer Optional sized data to pass into the protocol activation.
64 @param ArgumentBufferSize Optional size of the data.
65 @param Periodic Optional mechanism to engender a periodic stream.
66 @param ActivationInterval Optional parameter to repeat at this period one
67 time or, if the Periodic Boolean is set, periodically.
68
69 @retval EFI_SUCCESS The SMI/PMI has been engendered.
70 @retval EFI_DEVICE_ERROR The timing is unsupported.
71 @retval EFI_INVALID_PARAMETER The activation period is unsupported.
72 @retval EFI_NOT_STARTED The SMM base service has not been initialized.
73
74 **/
75 typedef
76 EFI_STATUS
77 (EFIAPI *EFI_SMM_ACTIVATE)(
78 IN EFI_SMM_CONTROL_PROTOCOL *This,
79 IN OUT INT8 *ArgumentBuffer OPTIONAL,
80 IN OUT UINTN *ArgumentBufferSize OPTIONAL,
81 IN BOOLEAN Periodic OPTIONAL,
82 IN UINTN ActivationInterval OPTIONAL
83 );
84
85 /**
86 Clears any system state that was created in response to the Active call.
87
88 @param This The EFI_SMM_CONTROL_PROTOCOL instance.
89 @param Periodic Optional parameter to repeat at this period one
90 time or, if the Periodic Boolean is set, periodically.
91
92 @retval EFI_SUCCESS The SMI/PMI has been engendered.
93 @retval EFI_DEVICE_ERROR The source could not be cleared.
94 @retval EFI_INVALID_PARAMETER The service did not support the Periodic input argument.
95
96 **/
97 typedef
98 EFI_STATUS
99 (EFIAPI *EFI_SMM_DEACTIVATE)(
100 IN EFI_SMM_CONTROL_PROTOCOL *This,
101 IN BOOLEAN Periodic OPTIONAL
102 );
103
104 /**
105 Provides information on the source register used to generate the SMI.
106
107 @param This The EFI_SMM_CONTROL_PROTOCOL instance.
108 @param SmiRegister Pointer to the SMI register description structure
109
110 @retval EFI_SUCCESS The register structure has been returned.
111 @retval EFI_DEVICE_ERROR The source could not be cleared.
112 @retval EFI_INVALID_PARAMETER The service did not support the Periodic input argument.
113
114 **/
115 typedef
116 EFI_STATUS
117 (EFIAPI *EFI_SMM_GET_REGISTER_INFO)(
118 IN EFI_SMM_CONTROL_PROTOCOL *This,
119 IN OUT EFI_SMM_CONTROL_REGISTER *SmiRegister
120 );
121
122 /**
123 @par Protocol Description:
124 This protocol is used initiate SMI/PMI activations.
125
126 @param Trigger
127 Initiates the SMI/PMI activation.
128
129 @param Clear
130 Quiesces the SMI/PMI activation.
131
132 @param GetRegisterInfo
133 Provides data on the register used as the source of the SMI.
134
135 @param MinimumTriggerPeriod
136 Minimum interval at which the platform can set the period.
137
138 @retval EFI_SUCCESS The register structure has been returned.
139 **/
140
141 //
142 // SMM Control Protocol
143 //
144 /**
145 This protocol is used initiate SMI/PMI activations.
146 This protocol could be published by either of the following:
147 - A processor driver to abstract the SMI/PMI IPI
148 - The driver that abstracts the ASIC that is supporting the APM port, such as the ICH in an Intel chipset
149 Because of the possibility of performing SMI or PMI IPI transactions, the ability to generate this
150
151 The EFI_SMM_CONTROL_PROTOCOL is used by the platform chipset or processor driver. This
152 protocol is useable both in boot services and runtime. The runtime aspect is so that an
153 implementation of EFI_SMM_BASE_PROTOCOL.Communicate() can layer upon this service
154 and provide an SMI callback from a general EFI runtime driver.
155 The purpose of this protocol is to provide an abstraction to the platform hardware that generates an
156 SMI or PMI. There are often I/O ports that, when accessed, will engender the
157 **/
158 struct _EFI_SMM_CONTROL_PROTOCOL {
159 ///
160 /// Initiates the SMI/PMI activation.
161 ///
162 EFI_SMM_ACTIVATE Trigger;
163 ///
164 /// Quiesces the SMI/PMI activation.
165 ///
166 EFI_SMM_DEACTIVATE Clear;
167 ///
168 /// Provides data on the register used as the source of the SMI.
169 ///
170 EFI_SMM_GET_REGISTER_INFO GetRegisterInfo;
171 ///
172 /// Minimum interval at which the platform can set the period. A maximum is not
173 /// specified in that the SMM infrastructure code can emulate a maximum interval that is
174 /// greater than the hardware capabilities by using software emulation in the SMM
175 /// infrastructure code.
176 ///
177 UINTN MinimumTriggerPeriod;
178 };
179
180 extern EFI_GUID gEfiSmmControlProtocolGuid;
181
182 #endif