]>
Commit | Line | Data |
---|---|---|
cf1d4549 JY |
1 | /** @file\r |
2 | Intel FSP API definition from Intel Firmware Support Package External\r | |
3 | Architecture Specification v2.0.\r | |
4 | \r | |
5 | Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>\r | |
6 | This program and the accompanying materials\r | |
7 | are licensed and made available under the terms and conditions of the BSD License\r | |
8 | which accompanies this distribution. The full text of the license may be found at\r | |
9 | http://opensource.org/licenses/bsd-license.php.\r | |
10 | \r | |
11 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
12 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
13 | \r | |
14 | **/\r | |
15 | \r | |
16 | #ifndef _FSP_API_H_\r | |
17 | #define _FSP_API_H_\r | |
18 | \r | |
19 | #pragma pack(1)\r | |
20 | typedef struct {\r | |
21 | ///\r | |
22 | /// UPD Region Signature. This signature will be\r | |
23 | /// "XXXXXX_T" for FSP-T\r | |
24 | /// "XXXXXX_M" for FSP-M\r | |
25 | /// "XXXXXX_S" for FSP-S\r | |
26 | /// Where XXXXXX is an unique signature\r | |
27 | ///\r | |
28 | UINT64 Signature;\r | |
29 | ///\r | |
30 | /// Revision of the Data structure. For FSP v2.0 value is 1.\r | |
31 | ///\r | |
32 | UINT8 Revision;\r | |
33 | UINT8 Reserved[23];\r | |
34 | } FSP_UPD_HEADER;\r | |
35 | \r | |
36 | typedef struct {\r | |
37 | ///\r | |
38 | /// Revision of the structure. For FSP v2.0 value is 1.\r | |
39 | ///\r | |
40 | UINT8 Revision;\r | |
41 | UINT8 Reserved[3];\r | |
42 | ///\r | |
43 | /// Pointer to the non-volatile storage (NVS) data buffer.\r | |
44 | /// If it is NULL it indicates the NVS data is not available.\r | |
45 | ///\r | |
46 | VOID *NvsBufferPtr;\r | |
47 | ///\r | |
48 | /// Pointer to the temporary stack base address to be\r | |
49 | /// consumed inside FspMemoryInit() API.\r | |
50 | ///\r | |
51 | VOID *StackBase;\r | |
52 | ///\r | |
53 | /// Temporary stack size to be consumed inside\r | |
54 | /// FspMemoryInit() API.\r | |
55 | ///\r | |
56 | UINT32 StackSize;\r | |
57 | ///\r | |
58 | /// Size of memory to be reserved by FSP below "top\r | |
59 | /// of low usable memory" for bootloader usage.\r | |
60 | ///\r | |
61 | UINT32 BootLoaderTolumSize;\r | |
62 | ///\r | |
63 | /// Current boot mode.\r | |
64 | ///\r | |
65 | UINT32 BootMode;\r | |
66 | UINT8 Reserved1[8];\r | |
67 | } FSPM_ARCH_UPD;\r | |
68 | \r | |
69 | typedef struct {\r | |
70 | FSP_UPD_HEADER FspUpdHeader;\r | |
71 | } FSPT_UPD_COMMON;\r | |
72 | \r | |
73 | typedef struct {\r | |
74 | FSP_UPD_HEADER FspUpdHeader;\r | |
75 | FSPM_ARCH_UPD FspmArchUpd;\r | |
76 | } FSPM_UPD_COMMON;\r | |
77 | \r | |
78 | typedef struct {\r | |
79 | FSP_UPD_HEADER FspUpdHeader;\r | |
80 | } FSPS_UPD_COMMON;\r | |
81 | \r | |
82 | typedef enum {\r | |
83 | ///\r | |
84 | /// This stage is notified when the bootloader completes the\r | |
85 | /// PCI enumeration and the resource allocation for the\r | |
86 | /// PCI devices is complete.\r | |
87 | ///\r | |
88 | EnumInitPhaseAfterPciEnumeration = 0x20,\r | |
89 | ///\r | |
90 | /// This stage is notified just before the bootloader hand-off\r | |
91 | /// to the OS loader.\r | |
92 | ///\r | |
93 | EnumInitPhaseReadyToBoot = 0x40,\r | |
94 | ///\r | |
95 | /// This stage is notified just before the firmware/Preboot\r | |
96 | /// environment transfers management of all system resources\r | |
97 | /// to the OS or next level execution environment.\r | |
98 | ///\r | |
99 | EnumInitPhaseEndOfFirmware = 0xF0\r | |
100 | } FSP_INIT_PHASE;\r | |
101 | \r | |
102 | typedef struct {\r | |
103 | ///\r | |
104 | /// Notification phase used for NotifyPhase API\r | |
105 | ///\r | |
106 | FSP_INIT_PHASE Phase;\r | |
107 | } NOTIFY_PHASE_PARAMS;\r | |
108 | \r | |
109 | #pragma pack()\r | |
110 | \r | |
111 | /**\r | |
112 | This FSP API is called soon after coming out of reset and before memory and stack is\r | |
113 | available. This FSP API will load the microcode update, enable code caching for the\r | |
114 | region specified by the boot loader and also setup a temporary stack to be used until\r | |
115 | main memory is initialized.\r | |
116 | \r | |
117 | A hardcoded stack can be set up with the following values, and the "esp" register\r | |
118 | initialized to point to this hardcoded stack.\r | |
119 | 1. The return address where the FSP will return control after setting up a temporary\r | |
120 | stack.\r | |
121 | 2. A pointer to the input parameter structure\r | |
122 | \r | |
123 | However, since the stack is in ROM and not writeable, this FSP API cannot be called\r | |
124 | using the "call" instruction, but needs to be jumped to.\r | |
125 | \r | |
126 | @param[in] FsptUpdDataPtr Pointer to the FSPT_UPD data structure.\r | |
127 | \r | |
128 | @retval EFI_SUCCESS Temporary RAM was initialized successfully.\r | |
129 | @retval EFI_INVALID_PARAMETER Input parameters are invalid.\r | |
130 | @retval EFI_UNSUPPORTED The FSP calling conditions were not met.\r | |
131 | @retval EFI_DEVICE_ERROR Temp RAM initialization failed.\r | |
132 | \r | |
133 | If this function is successful, the FSP initializes the ECX and EDX registers to point to\r | |
134 | a temporary but writeable memory range available to the boot loader and returns with\r | |
135 | FSP_SUCCESS in register EAX. Register ECX points to the start of this temporary\r | |
136 | memory range and EDX points to the end of the range. Boot loader is free to use the\r | |
137 | whole range described. Typically the boot loader can reload the ESP register to point\r | |
138 | to the end of this returned range so that it can be used as a standard stack.\r | |
139 | **/\r | |
140 | typedef\r | |
141 | EFI_STATUS\r | |
142 | (EFIAPI *FSP_TEMP_RAM_INIT) (\r | |
143 | IN VOID *FsptUpdDataPtr\r | |
144 | );\r | |
145 | \r | |
146 | /**\r | |
147 | This FSP API is used to notify the FSP about the different phases in the boot process.\r | |
148 | This allows the FSP to take appropriate actions as needed during different initialization\r | |
149 | phases. The phases will be platform dependent and will be documented with the FSP\r | |
150 | release. The current FSP supports two notify phases:\r | |
151 | Post PCI enumeration\r | |
152 | Ready To Boot\r | |
153 | \r | |
154 | @param[in] NotifyPhaseParamPtr Address pointer to the NOTIFY_PHASE_PRAMS\r | |
155 | \r | |
156 | @retval EFI_SUCCESS The notification was handled successfully.\r | |
157 | @retval EFI_UNSUPPORTED The notification was not called in the proper order.\r | |
158 | @retval EFI_INVALID_PARAMETER The notification code is invalid.\r | |
159 | **/\r | |
160 | typedef\r | |
161 | EFI_STATUS\r | |
162 | (EFIAPI *FSP_NOTIFY_PHASE) (\r | |
163 | IN NOTIFY_PHASE_PARAMS *NotifyPhaseParamPtr\r | |
164 | );\r | |
165 | \r | |
166 | /**\r | |
167 | This FSP API is called after TempRamInit and initializes the memory.\r | |
168 | This FSP API accepts a pointer to a data structure that will be platform dependent\r | |
169 | and defined for each FSP binary. This will be documented in Integration guide with\r | |
170 | each FSP release.\r | |
171 | After FspMemInit completes its execution, it passes the pointer to the HobList and\r | |
172 | returns to the boot loader from where it was called. BootLoader is responsible to \r | |
173 | migrate it's stack and data to Memory.\r | |
174 | FspMemoryInit, TempRamExit and FspSiliconInit APIs provide an alternate method to\r | |
175 | complete the silicon initialization and provides bootloader an opportunity to get\r | |
176 | control after system memory is available and before the temporary RAM is torn down.\r | |
177 | \r | |
178 | @param[in] FspmUpdDataPtr Pointer to the FSPM_UPD data sructure.\r | |
179 | @param[out] HobListPtr Pointer to receive the address of the HOB list.\r | |
180 | \r | |
181 | @retval EFI_SUCCESS FSP execution environment was initialized successfully.\r | |
182 | @retval EFI_INVALID_PARAMETER Input parameters are invalid.\r | |
183 | @retval EFI_UNSUPPORTED The FSP calling conditions were not met.\r | |
184 | @retval EFI_DEVICE_ERROR FSP initialization failed.\r | |
185 | @retval EFI_OUT_OF_RESOURCES Stack range requested by FSP is not met.\r | |
186 | @retval FSP_STATUS_RESET_REQUIREDx A reset is reuired. These status codes will not be returned during S3.\r | |
187 | **/\r | |
188 | typedef\r | |
189 | EFI_STATUS\r | |
190 | (EFIAPI *FSP_MEMORY_INIT) (\r | |
191 | IN VOID *FspmUpdDataPtr,\r | |
192 | OUT VOID **HobListPtr\r | |
193 | );\r | |
194 | \r | |
195 | \r | |
196 | /**\r | |
197 | This FSP API is called after FspMemoryInit API. This FSP API tears down the temporary\r | |
198 | memory setup by TempRamInit API. This FSP API accepts a pointer to a data structure\r | |
199 | that will be platform dependent and defined for each FSP binary. This will be\r | |
200 | documented in Integration Guide.\r | |
201 | FspMemoryInit, TempRamExit and FspSiliconInit APIs provide an alternate method to\r | |
202 | complete the silicon initialization and provides bootloader an opportunity to get\r | |
203 | control after system memory is available and before the temporary RAM is torn down.\r | |
204 | \r | |
205 | @param[in] TempRamExitParamPtr Pointer to the Temp Ram Exit parameters structure.\r | |
206 | This structure is normally defined in the Integration Guide.\r | |
207 | And if it is not defined in the Integration Guide, pass NULL.\r | |
208 | \r | |
209 | @retval EFI_SUCCESS FSP execution environment was initialized successfully.\r | |
210 | @retval EFI_INVALID_PARAMETER Input parameters are invalid.\r | |
211 | @retval EFI_UNSUPPORTED The FSP calling conditions were not met.\r | |
212 | @retval EFI_DEVICE_ERROR FSP initialization failed.\r | |
213 | **/\r | |
214 | typedef\r | |
215 | EFI_STATUS\r | |
216 | (EFIAPI *FSP_TEMP_RAM_EXIT) (\r | |
217 | IN VOID *TempRamExitParamPtr\r | |
218 | );\r | |
219 | \r | |
220 | \r | |
221 | /**\r | |
222 | This FSP API is called after TempRamExit API.\r | |
223 | FspMemoryInit, TempRamExit and FspSiliconInit APIs provide an alternate method to complete the\r | |
224 | silicon initialization.\r | |
225 | \r | |
226 | @param[in] FspsUpdDataPtr Pointer to the FSPS_UPD data structure.\r | |
227 | If NULL, FSP will use the default parameters.\r | |
228 | \r | |
229 | @retval EFI_SUCCESS FSP execution environment was initialized successfully.\r | |
230 | @retval EFI_INVALID_PARAMETER Input parameters are invalid.\r | |
231 | @retval EFI_UNSUPPORTED The FSP calling conditions were not met.\r | |
232 | @retval EFI_DEVICE_ERROR FSP initialization failed.\r | |
233 | @retval FSP_STATUS_RESET_REQUIREDx A reset is reuired. These status codes will not be returned during S3.\r | |
234 | **/\r | |
235 | typedef\r | |
236 | EFI_STATUS\r | |
237 | (EFIAPI *FSP_SILICON_INIT) (\r | |
238 | IN VOID *FspsUpdDataPtr\r | |
239 | );\r | |
240 | \r | |
241 | #endif\r |