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cf1d4549 JY |
1 | /** @file\r |
2 | Intel FSP API definition from Intel Firmware Support Package External\r | |
3 | Architecture Specification v2.0.\r | |
4 | \r | |
e37bb20c | 5 | Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>\r |
9672cd30 | 6 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
cf1d4549 JY |
7 | \r |
8 | **/\r | |
9 | \r | |
10 | #ifndef _FSP_API_H_\r | |
11 | #define _FSP_API_H_\r | |
12 | \r | |
19089568 GM |
13 | ///\r |
14 | /// FSP Reset Status code\r | |
15 | /// These are defined in FSP EAS v2.0 section 11.2.2 - OEM Status Code\r | |
16 | /// @{\r | |
17 | #define FSP_STATUS_RESET_REQUIRED_COLD 0x40000001\r | |
18 | #define FSP_STATUS_RESET_REQUIRED_WARM 0x40000002\r | |
19 | #define FSP_STATUS_RESET_REQUIRED_3 0x40000003\r | |
20 | #define FSP_STATUS_RESET_REQUIRED_4 0x40000004\r | |
21 | #define FSP_STATUS_RESET_REQUIRED_5 0x40000005\r | |
22 | #define FSP_STATUS_RESET_REQUIRED_6 0x40000006\r | |
23 | #define FSP_STATUS_RESET_REQUIRED_7 0x40000007\r | |
24 | #define FSP_STATUS_RESET_REQUIRED_8 0x40000008\r | |
25 | /// @}\r | |
26 | \r | |
cf1d4549 | 27 | #pragma pack(1)\r |
6d0ac988 JY |
28 | ///\r |
29 | /// FSP_UPD_HEADER Configuration.\r | |
30 | ///\r | |
cf1d4549 JY |
31 | typedef struct {\r |
32 | ///\r | |
33 | /// UPD Region Signature. This signature will be\r | |
34 | /// "XXXXXX_T" for FSP-T\r | |
35 | /// "XXXXXX_M" for FSP-M\r | |
36 | /// "XXXXXX_S" for FSP-S\r | |
37 | /// Where XXXXXX is an unique signature\r | |
38 | ///\r | |
39 | UINT64 Signature;\r | |
40 | ///\r | |
41 | /// Revision of the Data structure. For FSP v2.0 value is 1.\r | |
42 | ///\r | |
43 | UINT8 Revision;\r | |
44 | UINT8 Reserved[23];\r | |
45 | } FSP_UPD_HEADER;\r | |
46 | \r | |
6d0ac988 JY |
47 | ///\r |
48 | /// FSPM_ARCH_UPD Configuration.\r | |
49 | ///\r | |
cf1d4549 JY |
50 | typedef struct {\r |
51 | ///\r | |
52 | /// Revision of the structure. For FSP v2.0 value is 1.\r | |
53 | ///\r | |
54 | UINT8 Revision;\r | |
55 | UINT8 Reserved[3];\r | |
56 | ///\r | |
57 | /// Pointer to the non-volatile storage (NVS) data buffer.\r | |
58 | /// If it is NULL it indicates the NVS data is not available.\r | |
59 | ///\r | |
60 | VOID *NvsBufferPtr;\r | |
61 | ///\r | |
62 | /// Pointer to the temporary stack base address to be\r | |
63 | /// consumed inside FspMemoryInit() API.\r | |
64 | ///\r | |
65 | VOID *StackBase;\r | |
66 | ///\r | |
67 | /// Temporary stack size to be consumed inside\r | |
68 | /// FspMemoryInit() API.\r | |
69 | ///\r | |
70 | UINT32 StackSize;\r | |
71 | ///\r | |
72 | /// Size of memory to be reserved by FSP below "top\r | |
73 | /// of low usable memory" for bootloader usage.\r | |
74 | ///\r | |
75 | UINT32 BootLoaderTolumSize;\r | |
76 | ///\r | |
77 | /// Current boot mode.\r | |
78 | ///\r | |
79 | UINT32 BootMode;\r | |
80 | UINT8 Reserved1[8];\r | |
81 | } FSPM_ARCH_UPD;\r | |
82 | \r | |
6d0ac988 JY |
83 | ///\r |
84 | /// FSPT_UPD_COMMON Configuration.\r | |
85 | ///\r | |
cf1d4549 | 86 | typedef struct {\r |
6d0ac988 JY |
87 | ///\r |
88 | /// FSP_UPD_HEADER Configuration.\r | |
89 | ///\r | |
cf1d4549 JY |
90 | FSP_UPD_HEADER FspUpdHeader;\r |
91 | } FSPT_UPD_COMMON;\r | |
92 | \r | |
6d0ac988 JY |
93 | ///\r |
94 | /// FSPM_UPD_COMMON Configuration.\r | |
95 | ///\r | |
cf1d4549 | 96 | typedef struct {\r |
6d0ac988 JY |
97 | ///\r |
98 | /// FSP_UPD_HEADER Configuration.\r | |
99 | ///\r | |
cf1d4549 | 100 | FSP_UPD_HEADER FspUpdHeader;\r |
6d0ac988 JY |
101 | ///\r |
102 | /// FSPM_ARCH_UPD Configuration.\r | |
103 | ///\r | |
cf1d4549 JY |
104 | FSPM_ARCH_UPD FspmArchUpd;\r |
105 | } FSPM_UPD_COMMON;\r | |
106 | \r | |
6d0ac988 JY |
107 | ///\r |
108 | /// FSPS_UPD_COMMON Configuration.\r | |
109 | ///\r | |
cf1d4549 | 110 | typedef struct {\r |
6d0ac988 JY |
111 | ///\r |
112 | /// FSP_UPD_HEADER Configuration.\r | |
113 | ///\r | |
cf1d4549 JY |
114 | FSP_UPD_HEADER FspUpdHeader;\r |
115 | } FSPS_UPD_COMMON;\r | |
116 | \r | |
6d0ac988 JY |
117 | ///\r |
118 | /// Enumeration of FSP_INIT_PHASE for NOTIFY_PHASE.\r | |
119 | ///\r | |
cf1d4549 JY |
120 | typedef enum {\r |
121 | ///\r | |
122 | /// This stage is notified when the bootloader completes the\r | |
123 | /// PCI enumeration and the resource allocation for the\r | |
124 | /// PCI devices is complete.\r | |
125 | ///\r | |
126 | EnumInitPhaseAfterPciEnumeration = 0x20,\r | |
127 | ///\r | |
128 | /// This stage is notified just before the bootloader hand-off\r | |
129 | /// to the OS loader.\r | |
130 | ///\r | |
131 | EnumInitPhaseReadyToBoot = 0x40,\r | |
132 | ///\r | |
133 | /// This stage is notified just before the firmware/Preboot\r | |
134 | /// environment transfers management of all system resources\r | |
135 | /// to the OS or next level execution environment.\r | |
136 | ///\r | |
137 | EnumInitPhaseEndOfFirmware = 0xF0\r | |
138 | } FSP_INIT_PHASE;\r | |
139 | \r | |
6d0ac988 JY |
140 | ///\r |
141 | /// Definition of NOTIFY_PHASE_PARAMS.\r | |
142 | ///\r | |
cf1d4549 JY |
143 | typedef struct {\r |
144 | ///\r | |
145 | /// Notification phase used for NotifyPhase API\r | |
146 | ///\r | |
147 | FSP_INIT_PHASE Phase;\r | |
148 | } NOTIFY_PHASE_PARAMS;\r | |
149 | \r | |
150 | #pragma pack()\r | |
151 | \r | |
152 | /**\r | |
153 | This FSP API is called soon after coming out of reset and before memory and stack is\r | |
154 | available. This FSP API will load the microcode update, enable code caching for the\r | |
155 | region specified by the boot loader and also setup a temporary stack to be used until\r | |
156 | main memory is initialized.\r | |
157 | \r | |
158 | A hardcoded stack can be set up with the following values, and the "esp" register\r | |
159 | initialized to point to this hardcoded stack.\r | |
160 | 1. The return address where the FSP will return control after setting up a temporary\r | |
161 | stack.\r | |
162 | 2. A pointer to the input parameter structure\r | |
163 | \r | |
164 | However, since the stack is in ROM and not writeable, this FSP API cannot be called\r | |
165 | using the "call" instruction, but needs to be jumped to.\r | |
166 | \r | |
167 | @param[in] FsptUpdDataPtr Pointer to the FSPT_UPD data structure.\r | |
168 | \r | |
169 | @retval EFI_SUCCESS Temporary RAM was initialized successfully.\r | |
170 | @retval EFI_INVALID_PARAMETER Input parameters are invalid.\r | |
171 | @retval EFI_UNSUPPORTED The FSP calling conditions were not met.\r | |
172 | @retval EFI_DEVICE_ERROR Temp RAM initialization failed.\r | |
173 | \r | |
174 | If this function is successful, the FSP initializes the ECX and EDX registers to point to\r | |
175 | a temporary but writeable memory range available to the boot loader and returns with\r | |
176 | FSP_SUCCESS in register EAX. Register ECX points to the start of this temporary\r | |
177 | memory range and EDX points to the end of the range. Boot loader is free to use the\r | |
178 | whole range described. Typically the boot loader can reload the ESP register to point\r | |
179 | to the end of this returned range so that it can be used as a standard stack.\r | |
180 | **/\r | |
181 | typedef\r | |
182 | EFI_STATUS\r | |
183 | (EFIAPI *FSP_TEMP_RAM_INIT) (\r | |
184 | IN VOID *FsptUpdDataPtr\r | |
185 | );\r | |
186 | \r | |
187 | /**\r | |
188 | This FSP API is used to notify the FSP about the different phases in the boot process.\r | |
189 | This allows the FSP to take appropriate actions as needed during different initialization\r | |
190 | phases. The phases will be platform dependent and will be documented with the FSP\r | |
191 | release. The current FSP supports two notify phases:\r | |
192 | Post PCI enumeration\r | |
193 | Ready To Boot\r | |
194 | \r | |
195 | @param[in] NotifyPhaseParamPtr Address pointer to the NOTIFY_PHASE_PRAMS\r | |
196 | \r | |
197 | @retval EFI_SUCCESS The notification was handled successfully.\r | |
198 | @retval EFI_UNSUPPORTED The notification was not called in the proper order.\r | |
199 | @retval EFI_INVALID_PARAMETER The notification code is invalid.\r | |
200 | **/\r | |
201 | typedef\r | |
202 | EFI_STATUS\r | |
203 | (EFIAPI *FSP_NOTIFY_PHASE) (\r | |
204 | IN NOTIFY_PHASE_PARAMS *NotifyPhaseParamPtr\r | |
205 | );\r | |
206 | \r | |
207 | /**\r | |
208 | This FSP API is called after TempRamInit and initializes the memory.\r | |
209 | This FSP API accepts a pointer to a data structure that will be platform dependent\r | |
210 | and defined for each FSP binary. This will be documented in Integration guide with\r | |
211 | each FSP release.\r | |
212 | After FspMemInit completes its execution, it passes the pointer to the HobList and\r | |
e37bb20c | 213 | returns to the boot loader from where it was called. BootLoader is responsible to\r |
cf1d4549 JY |
214 | migrate it's stack and data to Memory.\r |
215 | FspMemoryInit, TempRamExit and FspSiliconInit APIs provide an alternate method to\r | |
216 | complete the silicon initialization and provides bootloader an opportunity to get\r | |
217 | control after system memory is available and before the temporary RAM is torn down.\r | |
218 | \r | |
219 | @param[in] FspmUpdDataPtr Pointer to the FSPM_UPD data sructure.\r | |
220 | @param[out] HobListPtr Pointer to receive the address of the HOB list.\r | |
221 | \r | |
222 | @retval EFI_SUCCESS FSP execution environment was initialized successfully.\r | |
223 | @retval EFI_INVALID_PARAMETER Input parameters are invalid.\r | |
224 | @retval EFI_UNSUPPORTED The FSP calling conditions were not met.\r | |
225 | @retval EFI_DEVICE_ERROR FSP initialization failed.\r | |
226 | @retval EFI_OUT_OF_RESOURCES Stack range requested by FSP is not met.\r | |
227 | @retval FSP_STATUS_RESET_REQUIREDx A reset is reuired. These status codes will not be returned during S3.\r | |
228 | **/\r | |
229 | typedef\r | |
230 | EFI_STATUS\r | |
231 | (EFIAPI *FSP_MEMORY_INIT) (\r | |
232 | IN VOID *FspmUpdDataPtr,\r | |
233 | OUT VOID **HobListPtr\r | |
234 | );\r | |
235 | \r | |
236 | \r | |
237 | /**\r | |
238 | This FSP API is called after FspMemoryInit API. This FSP API tears down the temporary\r | |
239 | memory setup by TempRamInit API. This FSP API accepts a pointer to a data structure\r | |
240 | that will be platform dependent and defined for each FSP binary. This will be\r | |
241 | documented in Integration Guide.\r | |
242 | FspMemoryInit, TempRamExit and FspSiliconInit APIs provide an alternate method to\r | |
243 | complete the silicon initialization and provides bootloader an opportunity to get\r | |
244 | control after system memory is available and before the temporary RAM is torn down.\r | |
245 | \r | |
246 | @param[in] TempRamExitParamPtr Pointer to the Temp Ram Exit parameters structure.\r | |
247 | This structure is normally defined in the Integration Guide.\r | |
248 | And if it is not defined in the Integration Guide, pass NULL.\r | |
249 | \r | |
250 | @retval EFI_SUCCESS FSP execution environment was initialized successfully.\r | |
251 | @retval EFI_INVALID_PARAMETER Input parameters are invalid.\r | |
252 | @retval EFI_UNSUPPORTED The FSP calling conditions were not met.\r | |
253 | @retval EFI_DEVICE_ERROR FSP initialization failed.\r | |
254 | **/\r | |
255 | typedef\r | |
256 | EFI_STATUS\r | |
257 | (EFIAPI *FSP_TEMP_RAM_EXIT) (\r | |
258 | IN VOID *TempRamExitParamPtr\r | |
259 | );\r | |
260 | \r | |
261 | \r | |
262 | /**\r | |
263 | This FSP API is called after TempRamExit API.\r | |
264 | FspMemoryInit, TempRamExit and FspSiliconInit APIs provide an alternate method to complete the\r | |
265 | silicon initialization.\r | |
266 | \r | |
267 | @param[in] FspsUpdDataPtr Pointer to the FSPS_UPD data structure.\r | |
268 | If NULL, FSP will use the default parameters.\r | |
269 | \r | |
270 | @retval EFI_SUCCESS FSP execution environment was initialized successfully.\r | |
271 | @retval EFI_INVALID_PARAMETER Input parameters are invalid.\r | |
272 | @retval EFI_UNSUPPORTED The FSP calling conditions were not met.\r | |
273 | @retval EFI_DEVICE_ERROR FSP initialization failed.\r | |
274 | @retval FSP_STATUS_RESET_REQUIREDx A reset is reuired. These status codes will not be returned during S3.\r | |
275 | **/\r | |
276 | typedef\r | |
277 | EFI_STATUS\r | |
278 | (EFIAPI *FSP_SILICON_INIT) (\r | |
279 | IN VOID *FspsUpdDataPtr\r | |
280 | );\r | |
281 | \r | |
282 | #endif\r |