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[mirror_edk2.git] / IntelFsp2WrapperPkg / Library / BaseFspWrapperApiLib / FspWrapperApiLib.c
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1/** @file\r
2 Provide FSP API related function.\r
3\r
86a2f3c4 4 Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.<BR>\r
512e23a3 5 SPDX-License-Identifier: BSD-2-Clause-Patent\r
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6\r
7**/\r
8\r
9#include <PiPei.h>\r
10\r
11#include <Library/FspWrapperApiLib.h>\r
12#include <Library/BaseLib.h>\r
13#include <Library/BaseMemoryLib.h>\r
14\r
15/**\r
86a2f3c4 16 Wrapper for a thunk to transition from long mode to compatibility mode to execute 32-bit code and then transit back to\r
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17 long mode.\r
18\r
19 @param[in] Function The 32bit code entry to be executed.\r
20 @param[in] Param1 The first parameter to pass to 32bit code.\r
21 @param[in] Param2 The second parameter to pass to 32bit code.\r
22\r
23 @return EFI_STATUS.\r
24**/\r
25EFI_STATUS\r
26Execute32BitCode (\r
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27 IN UINT64 Function,\r
28 IN UINT64 Param1,\r
29 IN UINT64 Param2\r
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30 );\r
31\r
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32/**\r
33 Wrapper to execute 64-bit code directly from long mode.\r
34\r
35 @param[in] Function The 64bit code entry to be executed.\r
36 @param[in] Param1 The first parameter to pass to 64bit code.\r
37 @param[in] Param2 The second parameter to pass to 64bit code.\r
38\r
39 @return EFI_STATUS.\r
40**/\r
41EFI_STATUS\r
42Execute64BitCode (\r
43 IN UINT64 Function,\r
44 IN UINT64 Param1,\r
45 IN UINT64 Param2\r
46 );\r
47\r
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48/**\r
49 Find FSP header pointer.\r
50\r
51 @param[in] FlashFvFspBase Flash address of FSP FV.\r
52\r
53 @return FSP header pointer.\r
54**/\r
55FSP_INFO_HEADER *\r
56EFIAPI\r
57FspFindFspHeader (\r
58 IN EFI_PHYSICAL_ADDRESS FlashFvFspBase\r
59 )\r
60{\r
7c7184e2 61 UINT8 *CheckPointer;\r
cf1d4549 62\r
7c7184e2 63 CheckPointer = (UINT8 *)(UINTN)FlashFvFspBase;\r
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64\r
65 if (((EFI_FIRMWARE_VOLUME_HEADER *)CheckPointer)->Signature != EFI_FVH_SIGNATURE) {\r
66 return NULL;\r
67 }\r
68\r
69 if (((EFI_FIRMWARE_VOLUME_HEADER *)CheckPointer)->ExtHeaderOffset != 0) {\r
70 CheckPointer = CheckPointer + ((EFI_FIRMWARE_VOLUME_HEADER *)CheckPointer)->ExtHeaderOffset;\r
71 CheckPointer = CheckPointer + ((EFI_FIRMWARE_VOLUME_EXT_HEADER *)CheckPointer)->ExtHeaderSize;\r
7c7184e2 72 CheckPointer = (UINT8 *)ALIGN_POINTER (CheckPointer, 8);\r
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73 } else {\r
74 CheckPointer = CheckPointer + ((EFI_FIRMWARE_VOLUME_HEADER *)CheckPointer)->HeaderLength;\r
75 }\r
76\r
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77 CheckPointer = CheckPointer + sizeof (EFI_FFS_FILE_HEADER);\r
78\r
79 if (((EFI_RAW_SECTION *)CheckPointer)->Type != EFI_SECTION_RAW) {\r
80 return NULL;\r
81 }\r
82\r
83 CheckPointer = CheckPointer + sizeof (EFI_RAW_SECTION);\r
84\r
85 return (FSP_INFO_HEADER *)CheckPointer;\r
86}\r
87\r
88/**\r
89 Call FSP API - FspNotifyPhase.\r
90\r
91 @param[in] NotifyPhaseParams Address pointer to the NOTIFY_PHASE_PARAMS structure.\r
92\r
93 @return EFI status returned by FspNotifyPhase API.\r
94**/\r
95EFI_STATUS\r
96EFIAPI\r
97CallFspNotifyPhase (\r
7c7184e2 98 IN NOTIFY_PHASE_PARAMS *NotifyPhaseParams\r
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99 )\r
100{\r
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101 FSP_INFO_HEADER *FspHeader;\r
102 FSP_NOTIFY_PHASE NotifyPhaseApi;\r
103 EFI_STATUS Status;\r
104 BOOLEAN InterruptState;\r
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105\r
106 FspHeader = (FSP_INFO_HEADER *)FspFindFspHeader (PcdGet32 (PcdFspsBaseAddress));\r
107 if (FspHeader == NULL) {\r
108 return EFI_DEVICE_ERROR;\r
109 }\r
110\r
d953f4f1 111 NotifyPhaseApi = (FSP_NOTIFY_PHASE)((UINTN)FspHeader->ImageBase + FspHeader->NotifyPhaseEntryOffset);\r
cf1d4549 112 InterruptState = SaveAndDisableInterrupts ();\r
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113 if ((FspHeader->ImageAttribute & IMAGE_ATTRIBUTE_64BIT_MODE_SUPPORT) == FSP_IA32) {\r
114 Status = Execute32BitCode ((UINTN)NotifyPhaseApi, (UINTN)NotifyPhaseParams, (UINTN)NULL);\r
115 } else {\r
116 Status = Execute64BitCode ((UINTN)NotifyPhaseApi, (UINTN)NotifyPhaseParams, (UINTN)NULL);\r
117 }\r
7c424c28 118\r
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119 SetInterruptState (InterruptState);\r
120\r
121 return Status;\r
122}\r
123\r
124/**\r
125 Call FSP API - FspMemoryInit.\r
126\r
127 @param[in] FspmUpdDataPtr Address pointer to the FSP_MEMORY_INIT_PARAMS structure.\r
128 @param[out] HobListPtr Address of the HobList pointer.\r
129\r
130 @return EFI status returned by FspMemoryInit API.\r
131**/\r
132EFI_STATUS\r
133EFIAPI\r
134CallFspMemoryInit (\r
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135 IN VOID *FspmUpdDataPtr,\r
136 OUT VOID **HobListPtr\r
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137 )\r
138{\r
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139 FSP_INFO_HEADER *FspHeader;\r
140 FSP_MEMORY_INIT FspMemoryInitApi;\r
141 EFI_STATUS Status;\r
142 BOOLEAN InterruptState;\r
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143\r
144 FspHeader = (FSP_INFO_HEADER *)FspFindFspHeader (PcdGet32 (PcdFspmBaseAddress));\r
145 if (FspHeader == NULL) {\r
146 return EFI_DEVICE_ERROR;\r
147 }\r
148\r
d953f4f1 149 FspMemoryInitApi = (FSP_MEMORY_INIT)((UINTN)FspHeader->ImageBase + FspHeader->FspMemoryInitEntryOffset);\r
7c7184e2 150 InterruptState = SaveAndDisableInterrupts ();\r
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151 if ((FspHeader->ImageAttribute & IMAGE_ATTRIBUTE_64BIT_MODE_SUPPORT) == FSP_IA32) {\r
152 Status = Execute32BitCode ((UINTN)FspMemoryInitApi, (UINTN)FspmUpdDataPtr, (UINTN)HobListPtr);\r
153 } else {\r
154 Status = Execute64BitCode ((UINTN)FspMemoryInitApi, (UINTN)FspmUpdDataPtr, (UINTN)HobListPtr);\r
155 }\r
7c424c28 156\r
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157 SetInterruptState (InterruptState);\r
158\r
159 return Status;\r
160}\r
161\r
162/**\r
163 Call FSP API - TempRamExit.\r
164\r
165 @param[in] TempRamExitParam Address pointer to the TempRamExit parameters structure.\r
166\r
167 @return EFI status returned by TempRamExit API.\r
168**/\r
169EFI_STATUS\r
170EFIAPI\r
171CallTempRamExit (\r
7c7184e2 172 IN VOID *TempRamExitParam\r
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173 )\r
174{\r
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175 FSP_INFO_HEADER *FspHeader;\r
176 FSP_TEMP_RAM_EXIT TempRamExitApi;\r
177 EFI_STATUS Status;\r
178 BOOLEAN InterruptState;\r
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179\r
180 FspHeader = (FSP_INFO_HEADER *)FspFindFspHeader (PcdGet32 (PcdFspmBaseAddress));\r
181 if (FspHeader == NULL) {\r
182 return EFI_DEVICE_ERROR;\r
183 }\r
184\r
d953f4f1 185 TempRamExitApi = (FSP_TEMP_RAM_EXIT)((UINTN)FspHeader->ImageBase + FspHeader->TempRamExitEntryOffset);\r
cf1d4549 186 InterruptState = SaveAndDisableInterrupts ();\r
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187 if ((FspHeader->ImageAttribute & IMAGE_ATTRIBUTE_64BIT_MODE_SUPPORT) == FSP_IA32) {\r
188 Status = Execute32BitCode ((UINTN)TempRamExitApi, (UINTN)TempRamExitParam, (UINTN)NULL);\r
189 } else {\r
190 Status = Execute64BitCode ((UINTN)TempRamExitApi, (UINTN)TempRamExitParam, (UINTN)NULL);\r
191 }\r
7c424c28 192\r
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193 SetInterruptState (InterruptState);\r
194\r
195 return Status;\r
196}\r
197\r
198/**\r
199 Call FSP API - FspSiliconInit.\r
200\r
201 @param[in] FspsUpdDataPtr Address pointer to the Silicon Init parameters structure.\r
202\r
203 @return EFI status returned by FspSiliconInit API.\r
204**/\r
205EFI_STATUS\r
206EFIAPI\r
207CallFspSiliconInit (\r
7c7184e2 208 IN VOID *FspsUpdDataPtr\r
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209 )\r
210{\r
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211 FSP_INFO_HEADER *FspHeader;\r
212 FSP_SILICON_INIT FspSiliconInitApi;\r
213 EFI_STATUS Status;\r
214 BOOLEAN InterruptState;\r
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215\r
216 FspHeader = (FSP_INFO_HEADER *)FspFindFspHeader (PcdGet32 (PcdFspsBaseAddress));\r
217 if (FspHeader == NULL) {\r
218 return EFI_DEVICE_ERROR;\r
219 }\r
220\r
d953f4f1 221 FspSiliconInitApi = (FSP_SILICON_INIT)((UINTN)FspHeader->ImageBase + FspHeader->FspSiliconInitEntryOffset);\r
7c7184e2 222 InterruptState = SaveAndDisableInterrupts ();\r
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223 if ((FspHeader->ImageAttribute & IMAGE_ATTRIBUTE_64BIT_MODE_SUPPORT) == FSP_IA32) {\r
224 Status = Execute32BitCode ((UINTN)FspSiliconInitApi, (UINTN)FspsUpdDataPtr, (UINTN)NULL);\r
225 } else {\r
226 Status = Execute64BitCode ((UINTN)FspSiliconInitApi, (UINTN)FspsUpdDataPtr, (UINTN)NULL);\r
227 }\r
7c424c28 228\r
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229 SetInterruptState (InterruptState);\r
230\r
231 return Status;\r
232}\r