IntelSiliconPkg/IgdOpRegion: Add definition for Intel IGD
[mirror_edk2.git] / IntelSiliconPkg / Include / IndustryStandard / IgdOpRegion.h
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1/** @file\r
2 IGD OpRegion definition from Intel Integrated Graphics Device OpRegion\r
3 Specification.\r
4\r
5 https://01.org/sites/default/files/documentation/acpi_igd_opregion_spec_0.pdf\r
6\r
7 There are some mismatch between the specification and the implementation.\r
8 The definition follows the latest implementation.\r
9 1) INTEL_IGD_OPREGION_HEADER.RSV1[0xA0]\r
10 2) INTEL_IGD_OPREGION_MBOX1.RSV3[0x3C]\r
11 3) INTEL_IGD_OPREGION_MBOX3.RSV5[0x62]\r
12 4) INTEL_IGD_OPREGION_VBT.RVBT[0x1C00]\r
13\r
14 Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>\r
15 This program and the accompanying materials\r
16 are licensed and made available under the terms and conditions of the BSD License\r
17 which accompanies this distribution. The full text of the license may be found at\r
18 http://opensource.org/licenses/bsd-license.php\r
19\r
20 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
21 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
22\r
23**/\r
24#ifndef _IGD_OPREGION_H_\r
25#define _IGD_OPREGION_H_\r
26\r
27/**\r
28 OpRegion structures:\r
29 Sub-structures define the different parts of the OpRegion followed by the\r
30 main structure representing the entire OpRegion.\r
31\r
32 Note: These structures are packed to 1 byte offsets because the exact\r
33 data location is requred by the supporting design specification due to\r
34 the fact that the data is used by ASL and Graphics driver code compiled\r
35 separatly.\r
36**/\r
37#pragma pack(1)\r
38///\r
39/// OpRegion header (mailbox 0) structure and defines.\r
40///\r
41typedef struct {\r
42 CHAR8 SIGN[0x10]; ///< Offset 0 OpRegion Signature\r
43 UINT32 SIZE; ///< Offset 16 OpRegion Size\r
44 UINT32 OVER; ///< Offset 20 OpRegion Structure Version\r
45 UINT8 SVER[0x20]; ///< Offset 24 System BIOS Build Version\r
46 UINT8 VVER[0x10]; ///< Offset 56 Video BIOS Build Version\r
47 UINT8 GVER[0x10]; ///< Offset 72 Graphic Driver Build Version\r
48 UINT32 MBOX; ///< Offset 88 Supported Mailboxes\r
49 UINT32 DMOD; ///< Offset 92 Driver Model\r
50 UINT8 RSV1[0xA0]; ///< Offset 96 Reserved\r
51} INTEL_IGD_OPREGION_HEADER;\r
52\r
53///\r
54/// OpRegion mailbox 1 (public ACPI Methods).\r
55///\r
56typedef struct {\r
57 UINT32 DRDY; ///< Offset 0 Driver Readiness\r
58 UINT32 CSTS; ///< Offset 4 Status\r
59 UINT32 CEVT; ///< Offset 8 Current Event\r
60 UINT8 RSV2[0x14]; ///< Offset 12 Reserved\r
61 UINT32 DIDL[8]; ///< Offset 32 Supported Display Devices ID List\r
62 UINT32 CPDL[8]; ///< Offset 64 Currently Attached Display Devices List\r
63 UINT32 CADL[8]; ///< Offset 96 Currently Active Display Devices List\r
64 UINT32 NADL[8]; ///< Offset 128 Next Active Devices List\r
65 UINT32 ASLP; ///< Offset 160 ASL Sleep Time Out\r
66 UINT32 TIDX; ///< Offset 164 Toggle Table Index\r
67 UINT32 CHPD; ///< Offset 168 Current Hotplug Enable Indicator\r
68 UINT32 CLID; ///< Offset 172 Current Lid State Indicator\r
69 UINT32 CDCK; ///< Offset 176 Current Docking State Indicator\r
70 UINT32 SXSW; ///< Offset 180 Display Switch Notification on Sx State Resume\r
71 UINT32 EVTS; ///< Offset 184 Events supported by ASL\r
72 UINT32 CNOT; ///< Offset 188 Current OS Notification\r
73 UINT32 NRDY; ///< Offset 192 Driver Status\r
74 UINT8 RSV3[0x3C]; ///< Offset 196 Reserved\r
75} INTEL_IGD_OPREGION_MBOX1;\r
76\r
77///\r
78/// OpRegion mailbox 2 (Software SCI Interface).\r
79///\r
80typedef struct {\r
81 UINT32 SCIC; ///< Offset 0 Software SCI Command / Status / Data\r
82 UINT32 PARM; ///< Offset 4 Software SCI Parameters\r
83 UINT32 DSLP; ///< Offset 8 Driver Sleep Time Out\r
84 UINT8 RSV4[0xF4]; ///< Offset 12 Reserved\r
85} INTEL_IGD_OPREGION_MBOX2;\r
86\r
87///\r
88/// OpRegion mailbox 3 (BIOS/Driver Communication - ASLE Support).\r
89///\r
90typedef struct {\r
91 UINT32 ARDY; ///< Offset 0 Driver Readiness\r
92 UINT32 ASLC; ///< Offset 4 ASLE Interrupt Command / Status\r
93 UINT32 TCHE; ///< Offset 8 Technology Enabled Indicator\r
94 UINT32 ALSI; ///< Offset 12 Current ALS Luminance Reading\r
95 UINT32 BCLP; ///< Offset 16 Requested Backlight Britness\r
96 UINT32 PFIT; ///< Offset 20 Panel Fitting State or Request\r
97 UINT32 CBLV; ///< Offset 24 Current Brightness Level\r
98 UINT16 BCLM[0x14]; ///< Offset 28 Backlight Brightness Levels Duty Cycle Mapping Table\r
99 UINT32 CPFM; ///< Offset 68 Current Panel Fitting Mode\r
100 UINT32 EPFM; ///< Offset 72 Enabled Panel Fitting Modes\r
101 UINT8 PLUT[0x4A]; ///< Offset 76 Panel Look Up Table & Identifier\r
102 UINT32 PFMB; ///< Offset 150 PWM Frequency and Minimum Brightness\r
103 UINT32 CCDV; ///< Offset 154 Color Correction Default Values\r
104 UINT8 RSV5[0x62]; ///< Offset 158 Reserved\r
105} INTEL_IGD_OPREGION_MBOX3;\r
106\r
107///\r
108/// OpRegion mailbox 4 (VBT).\r
109///\r
110typedef struct {\r
111 UINT8 RVBT[0x1C00]; ///< Offset 0 Raw VBT Data\r
112} INTEL_IGD_OPREGION_VBT;\r
113\r
114///\r
115/// IGD OpRegion Structure\r
116///\r
117typedef struct {\r
118 INTEL_IGD_OPREGION_HEADER Header; ///< OpRegion header\r
119 INTEL_IGD_OPREGION_MBOX1 MBox1; ///< Mailbox 1: Public ACPI Methods\r
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120 INTEL_IGD_OPREGION_MBOX2 MBox2; ///< Mailbox 2: Software SCI Inteface\r
121 INTEL_IGD_OPREGION_MBOX3 MBox3; ///< Mailbox 3: BIOS/Driver Communication\r
122 INTEL_IGD_OPREGION_VBT VBT; ///< VBT: Video BIOS Table (OEM customizable data)\r
123} IGD_IGD_OPREGION_STRUCTURE;\r
124#pragma pack()\r
125\r
126#endif\r