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[mirror_edk2.git] / MdeModulePkg / Bus / Pci / EhciDxe / UsbHcMem.h
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913cb9dc 1/** @file\r
2\r
78c2ffb5 3 This file contains the definination for host controller memory management routines.\r
4\r
cd5ebaa0 5Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>\r
9d510e61 6SPDX-License-Identifier: BSD-2-Clause-Patent\r
913cb9dc 7\r
913cb9dc 8**/\r
9\r
10#ifndef _EFI_EHCI_MEM_H_\r
11#define _EFI_EHCI_MEM_H_\r
12\r
1436aea4 13#define USB_HC_BIT(a) ((UINTN)(1 << (a)))\r
913cb9dc 14\r
15#define USB_HC_BIT_IS_SET(Data, Bit) \\r
16 ((BOOLEAN)(((Data) & USB_HC_BIT(Bit)) == USB_HC_BIT(Bit)))\r
17\r
18#define USB_HC_HIGH_32BIT(Addr64) \\r
19 ((UINT32)(RShiftU64((UINTN)(Addr64), 32) & 0XFFFFFFFF))\r
20\r
1ccdbf2a 21typedef struct _USBHC_MEM_BLOCK USBHC_MEM_BLOCK;\r
22struct _USBHC_MEM_BLOCK {\r
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23 UINT8 *Bits; // Bit array to record which unit is allocated\r
24 UINTN BitsLen;\r
25 UINT8 *Buf;\r
26 UINT8 *BufHost;\r
27 UINTN BufLen; // Memory size in bytes\r
28 VOID *Mapping;\r
29 USBHC_MEM_BLOCK *Next;\r
1ccdbf2a 30};\r
913cb9dc 31\r
32//\r
33// USBHC_MEM_POOL is used to manage the memory used by USB\r
34// host controller. EHCI requires the control memory and transfer\r
35// data to be on the same 4G memory.\r
36//\r
37typedef struct _USBHC_MEM_POOL {\r
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38 EFI_PCI_IO_PROTOCOL *PciIo;\r
39 BOOLEAN Check4G;\r
40 UINT32 Which4G;\r
41 USBHC_MEM_BLOCK *Head;\r
913cb9dc 42} USBHC_MEM_POOL;\r
43\r
1ccdbf2a 44//\r
45// Memory allocation unit, must be 2^n, n>4\r
46//\r
1436aea4 47#define USBHC_MEM_UNIT 64\r
913cb9dc 48\r
1ccdbf2a 49#define USBHC_MEM_UNIT_MASK (USBHC_MEM_UNIT - 1)\r
50#define USBHC_MEM_DEFAULT_PAGES 16\r
913cb9dc 51\r
52#define USBHC_MEM_ROUND(Len) (((Len) + USBHC_MEM_UNIT_MASK) & (~USBHC_MEM_UNIT_MASK))\r
53\r
54//\r
55// Advance the byte and bit to the next bit, adjust byte accordingly.\r
56//\r
57#define NEXT_BIT(Byte, Bit) \\r
58 do { \\r
59 (Bit)++; \\r
60 if ((Bit) > 7) { \\r
61 (Byte)++; \\r
62 (Bit) = 0; \\r
63 } \\r
64 } while (0)\r
65\r
78c2ffb5 66/**\r
67 Initialize the memory management pool for the host controller.\r
68\r
69 @param PciIo The PciIo that can be used to access the host controller.\r
70 @param Check4G Whether the host controller requires allocated memory\r
71 from one 4G address space.\r
72 @param Which4G The 4G memory area each memory allocated should be from.\r
73\r
74 @retval EFI_SUCCESS The memory pool is initialized.\r
75 @retval EFI_OUT_OF_RESOURCE Fail to init the memory pool.\r
76\r
77**/\r
913cb9dc 78USBHC_MEM_POOL *\r
79UsbHcInitMemPool (\r
80 IN EFI_PCI_IO_PROTOCOL *PciIo,\r
81 IN BOOLEAN Check4G,\r
82 IN UINT32 Which4G\r
ed66e1bc 83 );\r
913cb9dc 84\r
913cb9dc 85/**\r
78c2ffb5 86 Release the memory management pool.\r
913cb9dc 87\r
78c2ffb5 88 @param Pool The USB memory pool to free.\r
913cb9dc 89\r
78c2ffb5 90 @retval EFI_SUCCESS The memory pool is freed.\r
91 @retval EFI_DEVICE_ERROR Failed to free the memory pool.\r
913cb9dc 92\r
93**/\r
94EFI_STATUS\r
95UsbHcFreeMemPool (\r
1436aea4 96 IN USBHC_MEM_POOL *Pool\r
ed66e1bc 97 );\r
913cb9dc 98\r
913cb9dc 99/**\r
100 Allocate some memory from the host controller's memory pool\r
101 which can be used to communicate with host controller.\r
102\r
78c2ffb5 103 @param Pool The host controller's memory pool.\r
104 @param Size Size of the memory to allocate.\r
913cb9dc 105\r
78c2ffb5 106 @return The allocated memory or NULL.\r
913cb9dc 107\r
108**/\r
109VOID *\r
110UsbHcAllocateMem (\r
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111 IN USBHC_MEM_POOL *Pool,\r
112 IN UINTN Size\r
ed66e1bc 113 );\r
913cb9dc 114\r
913cb9dc 115/**\r
78c2ffb5 116 Free the allocated memory back to the memory pool.\r
913cb9dc 117\r
78c2ffb5 118 @param Pool The memory pool of the host controller.\r
119 @param Mem The memory to free.\r
120 @param Size The size of the memory to free.\r
913cb9dc 121\r
913cb9dc 122**/\r
123VOID\r
124UsbHcFreeMem (\r
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125 IN USBHC_MEM_POOL *Pool,\r
126 IN VOID *Mem,\r
127 IN UINTN Size\r
ed66e1bc 128 );\r
739802e4 129\r
130/**\r
592b87a4 131 Calculate the corresponding pci bus address according to the Mem parameter.\r
739802e4 132\r
133 @param Pool The memory pool of the host controller.\r
592b87a4 134 @param Mem The pointer to host memory.\r
135 @param Size The size of the memory region.\r
739802e4 136\r
137 @return the pci memory address\r
138**/\r
139EFI_PHYSICAL_ADDRESS\r
140UsbHcGetPciAddressForHostMem (\r
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141 IN USBHC_MEM_POOL *Pool,\r
142 IN VOID *Mem,\r
143 IN UINTN Size\r
739802e4 144 );\r
145\r
913cb9dc 146#endif\r