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4b1bf81c 1/** @file\r
2PEIM to produce gPeiUsb2HostControllerPpiGuid based on gPeiUsbControllerPpiGuid\r
3which is used to enable recovery function from USB Drivers.\r
4\r
ca243131 5Copyright (c) 2010 - 2013, Intel Corporation. All rights reserved.<BR>\r
4b1bf81c 6 \r
7This program and the accompanying materials\r
8are licensed and made available under the terms and conditions\r
9of the BSD License which accompanies this distribution. The\r
10full text of the license may be found at\r
11http://opensource.org/licenses/bsd-license.php\r
12\r
13THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
14WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
15\r
16**/\r
17\r
18#include "EhcPeim.h"\r
19\r
20//\r
21// Two arrays used to translate the EHCI port state (change)\r
22// to the UEFI protocol's port state (change).\r
23//\r
24USB_PORT_STATE_MAP mUsbPortStateMap[] = {\r
25 {PORTSC_CONN, USB_PORT_STAT_CONNECTION},\r
26 {PORTSC_ENABLED, USB_PORT_STAT_ENABLE},\r
27 {PORTSC_SUSPEND, USB_PORT_STAT_SUSPEND},\r
28 {PORTSC_OVERCUR, USB_PORT_STAT_OVERCURRENT},\r
29 {PORTSC_RESET, USB_PORT_STAT_RESET},\r
30 {PORTSC_POWER, USB_PORT_STAT_POWER},\r
31 {PORTSC_OWNER, USB_PORT_STAT_OWNER}\r
32};\r
33\r
34USB_PORT_STATE_MAP mUsbPortChangeMap[] = {\r
35 {PORTSC_CONN_CHANGE, USB_PORT_STAT_C_CONNECTION},\r
36 {PORTSC_ENABLE_CHANGE, USB_PORT_STAT_C_ENABLE},\r
37 {PORTSC_OVERCUR_CHANGE, USB_PORT_STAT_C_OVERCURRENT}\r
38};\r
39\r
40/**\r
41 Read Ehc Operation register.\r
42 \r
43 @param Ehc The EHCI device.\r
44 @param Offset The operation register offset.\r
45\r
46 @retval the register content read.\r
47\r
48**/\r
49UINT32\r
50EhcReadOpReg (\r
51 IN PEI_USB2_HC_DEV *Ehc,\r
52 IN UINT32 Offset\r
53 )\r
54{\r
55 UINT32 Data;\r
56 \r
57 ASSERT (Ehc->CapLen != 0);\r
58\r
59 Data = MmioRead32 (Ehc->UsbHostControllerBaseAddress + Ehc->CapLen + Offset);\r
60 \r
61 return Data;\r
62}\r
63\r
64/**\r
65 Write the data to the EHCI operation register.\r
66 \r
67 @param Ehc The EHCI device.\r
68 @param Offset EHCI operation register offset.\r
69 @param Data The data to write.\r
70\r
71**/\r
72VOID\r
73EhcWriteOpReg (\r
74 IN PEI_USB2_HC_DEV *Ehc,\r
75 IN UINT32 Offset,\r
76 IN UINT32 Data\r
77 )\r
78{\r
79\r
80 ASSERT (Ehc->CapLen != 0);\r
81\r
82 MmioWrite32(Ehc->UsbHostControllerBaseAddress + Ehc->CapLen + Offset, Data);\r
83\r
84}\r
85\r
86/**\r
87 Set one bit of the operational register while keeping other bits.\r
88 \r
89 @param Ehc The EHCI device.\r
90 @param Offset The offset of the operational register.\r
91 @param Bit The bit mask of the register to set.\r
92\r
93**/\r
94VOID\r
95EhcSetOpRegBit (\r
96 IN PEI_USB2_HC_DEV *Ehc,\r
97 IN UINT32 Offset,\r
98 IN UINT32 Bit\r
99 )\r
100{\r
101 UINT32 Data;\r
102\r
103 Data = EhcReadOpReg (Ehc, Offset);\r
104 Data |= Bit;\r
105 EhcWriteOpReg (Ehc, Offset, Data);\r
106}\r
107\r
108/**\r
109 Clear one bit of the operational register while keeping other bits.\r
110 \r
111 @param Ehc The EHCI device.\r
112 @param Offset The offset of the operational register.\r
113 @param Bit The bit mask of the register to clear.\r
114\r
115**/\r
116VOID\r
117EhcClearOpRegBit (\r
118 IN PEI_USB2_HC_DEV *Ehc,\r
119 IN UINT32 Offset,\r
120 IN UINT32 Bit\r
121 )\r
122{\r
123 UINT32 Data;\r
124\r
125 Data = EhcReadOpReg (Ehc, Offset);\r
126 Data &= ~Bit;\r
127 EhcWriteOpReg (Ehc, Offset, Data);\r
128}\r
129\r
130/**\r
131 Wait the operation register's bit as specified by Bit \r
132 to become set (or clear).\r
133 \r
134 @param Ehc The EHCI device.\r
135 @param Offset The offset of the operational register.\r
136 @param Bit The bit mask of the register to wait for.\r
137 @param WaitToSet Wait the bit to set or clear.\r
138 @param Timeout The time to wait before abort (in millisecond).\r
139\r
140 @retval EFI_SUCCESS The bit successfully changed by host controller.\r
141 @retval EFI_TIMEOUT The time out occurred.\r
142\r
143**/\r
144EFI_STATUS\r
145EhcWaitOpRegBit (\r
146 IN PEI_USB2_HC_DEV *Ehc,\r
147 IN UINT32 Offset,\r
148 IN UINT32 Bit,\r
149 IN BOOLEAN WaitToSet,\r
150 IN UINT32 Timeout\r
151 )\r
152{\r
153 UINT32 Index;\r
154\r
155 for (Index = 0; Index < Timeout / EHC_SYNC_POLL_INTERVAL + 1; Index++) {\r
156 if (EHC_REG_BIT_IS_SET (Ehc, Offset, Bit) == WaitToSet) {\r
157 return EFI_SUCCESS;\r
158 }\r
159\r
160 MicroSecondDelay (EHC_SYNC_POLL_INTERVAL);\r
161 }\r
162\r
163 return EFI_TIMEOUT;\r
164}\r
165\r
166/**\r
167 Read EHCI capability register.\r
168 \r
169 @param Ehc The EHCI device.\r
170 @param Offset Capability register address.\r
171\r
172 @retval the register content read.\r
173\r
174**/\r
175UINT32\r
176EhcReadCapRegister (\r
177 IN PEI_USB2_HC_DEV *Ehc,\r
178 IN UINT32 Offset\r
179 )\r
180{\r
181 UINT32 Data;\r
182 \r
183 Data = MmioRead32(Ehc->UsbHostControllerBaseAddress + Offset);\r
184 \r
185 return Data;\r
186}\r
187\r
188/**\r
189 Set door bell and wait it to be ACKed by host controller.\r
190 This function is used to synchronize with the hardware.\r
191 \r
192 @param Ehc The EHCI device.\r
193 @param Timeout The time to wait before abort (in millisecond, ms).\r
194\r
195 @retval EFI_TIMEOUT Time out happened while waiting door bell to set.\r
196 @retval EFI_SUCCESS Synchronized with the hardware.\r
197\r
198**/\r
199EFI_STATUS\r
200EhcSetAndWaitDoorBell (\r
201 IN PEI_USB2_HC_DEV *Ehc,\r
202 IN UINT32 Timeout\r
203 )\r
204{\r
205 EFI_STATUS Status;\r
206 UINT32 Data;\r
207\r
208 EhcSetOpRegBit (Ehc, EHC_USBCMD_OFFSET, USBCMD_IAAD);\r
209\r
210 Status = EhcWaitOpRegBit (Ehc, EHC_USBSTS_OFFSET, USBSTS_IAA, TRUE, Timeout);\r
211\r
212 //\r
213 // ACK the IAA bit in USBSTS register. Make sure other\r
214 // interrupt bits are not ACKed. These bits are WC (Write Clean).\r
215 //\r
216 Data = EhcReadOpReg (Ehc, EHC_USBSTS_OFFSET);\r
217 Data &= ~USBSTS_INTACK_MASK;\r
218 Data |= USBSTS_IAA;\r
219\r
220 EhcWriteOpReg (Ehc, EHC_USBSTS_OFFSET, Data);\r
221\r
222 return Status;\r
223}\r
224\r
225/**\r
226 Clear all the interrutp status bits, these bits \r
227 are Write-Clean.\r
228 \r
229 @param Ehc The EHCI device.\r
230\r
231**/\r
232VOID\r
233EhcAckAllInterrupt (\r
234 IN PEI_USB2_HC_DEV *Ehc\r
235 )\r
236{\r
237 EhcWriteOpReg (Ehc, EHC_USBSTS_OFFSET, USBSTS_INTACK_MASK);\r
238}\r
239\r
240/**\r
241 Enable the periodic schedule then wait EHC to \r
242 actually enable it.\r
243 \r
244 @param Ehc The EHCI device.\r
245 @param Timeout The time to wait before abort (in millisecond, ms).\r
246\r
247 @retval EFI_TIMEOUT Time out happened while enabling periodic schedule.\r
248 @retval EFI_SUCCESS The periodical schedule is enabled.\r
249\r
250**/\r
251EFI_STATUS\r
252EhcEnablePeriodSchd (\r
253 IN PEI_USB2_HC_DEV *Ehc,\r
254 IN UINT32 Timeout\r
255 )\r
256{\r
257 EFI_STATUS Status;\r
258\r
259 EhcSetOpRegBit (Ehc, EHC_USBCMD_OFFSET, USBCMD_ENABLE_PERIOD);\r
260\r
261 Status = EhcWaitOpRegBit (Ehc, EHC_USBSTS_OFFSET, USBSTS_PERIOD_ENABLED, TRUE, Timeout);\r
262 return Status;\r
263}\r
264\r
265/**\r
266 Enable asynchrounous schedule.\r
267 \r
268 @param Ehc The EHCI device.\r
269 @param Timeout Time to wait before abort.\r
270\r
271 @retval EFI_SUCCESS The EHCI asynchronous schedule is enabled.\r
272 @retval Others Failed to enable the asynchronous scheudle.\r
273\r
274**/\r
275EFI_STATUS\r
276EhcEnableAsyncSchd (\r
277 IN PEI_USB2_HC_DEV *Ehc,\r
278 IN UINT32 Timeout\r
279 )\r
280{\r
281 EFI_STATUS Status;\r
282\r
283 EhcSetOpRegBit (Ehc, EHC_USBCMD_OFFSET, USBCMD_ENABLE_ASYNC);\r
284\r
285 Status = EhcWaitOpRegBit (Ehc, EHC_USBSTS_OFFSET, USBSTS_ASYNC_ENABLED, TRUE, Timeout);\r
286 return Status;\r
287}\r
288\r
289/**\r
290 Check whether Ehc is halted.\r
291 \r
292 @param Ehc The EHCI device.\r
293\r
294 @retval TRUE The controller is halted.\r
295 @retval FALSE The controller isn't halted.\r
296\r
297**/\r
298BOOLEAN\r
299EhcIsHalt (\r
300 IN PEI_USB2_HC_DEV *Ehc\r
301 )\r
302{\r
303 return EHC_REG_BIT_IS_SET (Ehc, EHC_USBSTS_OFFSET, USBSTS_HALT);\r
304}\r
305\r
306/**\r
307 Check whether system error occurred.\r
308 \r
309 @param Ehc The EHCI device.\r
310\r
311 @retval TRUE System error happened.\r
312 @retval FALSE No system error.\r
313\r
314**/\r
315BOOLEAN\r
316EhcIsSysError (\r
317 IN PEI_USB2_HC_DEV *Ehc\r
318 )\r
319{\r
320 return EHC_REG_BIT_IS_SET (Ehc, EHC_USBSTS_OFFSET, USBSTS_SYS_ERROR);\r
321}\r
322\r
323/**\r
324 Reset the host controller.\r
325 \r
326 @param Ehc The EHCI device.\r
327 @param Timeout Time to wait before abort (in millisecond, ms).\r
328\r
329 @retval EFI_TIMEOUT The transfer failed due to time out.\r
330 @retval Others Failed to reset the host.\r
331\r
332**/\r
333EFI_STATUS\r
334EhcResetHC (\r
335 IN PEI_USB2_HC_DEV *Ehc,\r
336 IN UINT32 Timeout\r
337 )\r
338{\r
339 EFI_STATUS Status;\r
340\r
341 //\r
342 // Host can only be reset when it is halt. If not so, halt it\r
343 //\r
344 if (!EHC_REG_BIT_IS_SET (Ehc, EHC_USBSTS_OFFSET, USBSTS_HALT)) {\r
345 Status = EhcHaltHC (Ehc, Timeout);\r
346\r
347 if (EFI_ERROR (Status)) {\r
348 return Status;\r
349 }\r
350 }\r
351\r
352 EhcSetOpRegBit (Ehc, EHC_USBCMD_OFFSET, USBCMD_RESET);\r
353 Status = EhcWaitOpRegBit (Ehc, EHC_USBCMD_OFFSET, USBCMD_RESET, FALSE, Timeout);\r
354 return Status;\r
355}\r
356\r
357/**\r
358 Halt the host controller.\r
359 \r
360 @param Ehc The EHCI device.\r
361 @param Timeout Time to wait before abort.\r
362\r
363 @retval EFI_TIMEOUT Failed to halt the controller before Timeout.\r
364 @retval EFI_SUCCESS The EHCI is halt.\r
365\r
366**/\r
367EFI_STATUS\r
368EhcHaltHC (\r
369 IN PEI_USB2_HC_DEV *Ehc,\r
370 IN UINT32 Timeout\r
371 )\r
372{\r
373 EFI_STATUS Status;\r
374\r
375 EhcClearOpRegBit (Ehc, EHC_USBCMD_OFFSET, USBCMD_RUN);\r
376 Status = EhcWaitOpRegBit (Ehc, EHC_USBSTS_OFFSET, USBSTS_HALT, TRUE, Timeout);\r
377 return Status;\r
378}\r
379\r
380/**\r
381 Set the EHCI to run.\r
382 \r
383 @param Ehc The EHCI device.\r
384 @param Timeout Time to wait before abort.\r
385\r
386 @retval EFI_SUCCESS The EHCI is running.\r
387 @retval Others Failed to set the EHCI to run.\r
388\r
389**/\r
390EFI_STATUS\r
391EhcRunHC (\r
392 IN PEI_USB2_HC_DEV *Ehc,\r
393 IN UINT32 Timeout\r
394 )\r
395{\r
396 EFI_STATUS Status;\r
397\r
398 EhcSetOpRegBit (Ehc, EHC_USBCMD_OFFSET, USBCMD_RUN);\r
399 Status = EhcWaitOpRegBit (Ehc, EHC_USBSTS_OFFSET, USBSTS_HALT, FALSE, Timeout);\r
400 return Status;\r
401}\r
402\r
23b0b155 403/**\r
404 Power On All EHCI Ports.\r
405 \r
406 @param Ehc The EHCI device.\r
407\r
408**/\r
409VOID\r
410EhcPowerOnAllPorts (\r
411 IN PEI_USB2_HC_DEV *Ehc\r
412 )\r
413{\r
414 UINT8 PortNumber;\r
415 UINT8 Index;\r
416\r
417 PortNumber = (UINT8)(Ehc->HcStructParams & HCSP_NPORTS);\r
418 for (Index = 0; Index < PortNumber; Index++) {\r
419 EhcSetOpRegBit (Ehc, EHC_PORT_STAT_OFFSET + 4 * Index, PORTSC_POWER);\r
420 }\r
421}\r
422\r
4b1bf81c 423/**\r
424 Initialize the HC hardware. \r
425 EHCI spec lists the five things to do to initialize the hardware.\r
426 1. Program CTRLDSSEGMENT.\r
427 2. Set USBINTR to enable interrupts.\r
428 3. Set periodic list base.\r
429 4. Set USBCMD, interrupt threshold, frame list size etc.\r
430 5. Write 1 to CONFIGFLAG to route all ports to EHCI.\r
431 \r
432 @param Ehc The EHCI device.\r
433\r
434 @retval EFI_SUCCESS The EHCI has come out of halt state.\r
435 @retval EFI_TIMEOUT Time out happened.\r
436\r
437**/\r
438EFI_STATUS\r
439EhcInitHC (\r
440 IN PEI_USB2_HC_DEV *Ehc\r
441 )\r
442{\r
443 EFI_STATUS Status;\r
444 EFI_PHYSICAL_ADDRESS TempPtr;\r
445 UINTN PageNumber;\r
446 \r
447 ASSERT (EhcIsHalt (Ehc));\r
448\r
449 //\r
450 // Allocate the periodic frame and associated memeory\r
451 // management facilities if not already done.\r
452 //\r
453 if (Ehc->PeriodFrame != NULL) {\r
454 EhcFreeSched (Ehc);\r
455 }\r
456 PageNumber = sizeof(PEI_URB)/PAGESIZE +1;\r
457 Status = PeiServicesAllocatePages (\r
458 EfiBootServicesCode,\r
459 PageNumber,\r
460 &TempPtr\r
461 );\r
462 Ehc->Urb = (PEI_URB *) ((UINTN) TempPtr);\r
463 if (Ehc->Urb == NULL) {\r
464 return Status;\r
465 }\r
23b0b155 466\r
467 EhcPowerOnAllPorts (Ehc); \r
468 MicroSecondDelay (EHC_ROOT_PORT_RECOVERY_STALL);\r
4b1bf81c 469 \r
470 Status = EhcInitSched (Ehc);\r
471\r
472 if (EFI_ERROR (Status)) {\r
473 return Status;\r
474 }\r
475 //\r
476 // 1. Program the CTRLDSSEGMENT register with the high 32 bit addr\r
477 //\r
478 EhcWriteOpReg (Ehc, EHC_CTRLDSSEG_OFFSET, Ehc->High32bitAddr);\r
479\r
480 //\r
481 // 2. Clear USBINTR to disable all the interrupt. UEFI works by polling\r
482 //\r
483 EhcWriteOpReg (Ehc, EHC_USBINTR_OFFSET, 0);\r
484\r
485 //\r
486 // 3. Program periodic frame list, already done in EhcInitSched\r
487 // 4. Start the Host Controller\r
488 //\r
489 EhcSetOpRegBit (Ehc, EHC_USBCMD_OFFSET, USBCMD_RUN);\r
490\r
491 //\r
492 // 5. Set all ports routing to EHC\r
493 //\r
494 EhcSetOpRegBit (Ehc, EHC_CONFIG_FLAG_OFFSET, CONFIGFLAG_ROUTE_EHC);\r
495\r
496 //\r
497 // Wait roothub port power stable\r
498 //\r
499 MicroSecondDelay (EHC_ROOT_PORT_RECOVERY_STALL);\r
500\r
501 Status = EhcEnablePeriodSchd (Ehc, EHC_GENERIC_TIMEOUT);\r
502\r
503 if (EFI_ERROR (Status)) {\r
504 return Status;\r
505 }\r
506\r
507 Status = EhcEnableAsyncSchd (Ehc, EHC_GENERIC_TIMEOUT);\r
508\r
509 if (EFI_ERROR (Status)) {\r
510 return Status;\r
511 }\r
512\r
513 return EFI_SUCCESS;\r
514}\r
515\r
516/**\r
517 Submits bulk transfer to a bulk endpoint of a USB device.\r
518 \r
519 @param PeiServices The pointer of EFI_PEI_SERVICES.\r
520 @param This The pointer of PEI_USB2_HOST_CONTROLLER_PPI.\r
521 @param DeviceAddress Target device address.\r
522 @param EndPointAddress Endpoint number and its direction in bit 7.\r
523 @param DeviceSpeed Device speed, Low speed device doesn't support \r
524 bulk transfer.\r
525 @param MaximumPacketLength Maximum packet size the endpoint is capable of \r
526 sending or receiving.\r
527 @param Data Array of pointers to the buffers of data to transmit \r
528 from or receive into.\r
529 @param DataLength The lenght of the data buffer.\r
530 @param DataToggle On input, the initial data toggle for the transfer;\r
531 On output, it is updated to to next data toggle to use of \r
532 the subsequent bulk transfer.\r
533 @param TimeOut Indicates the maximum time, in millisecond, which the\r
534 transfer is allowed to complete.\r
ca243131
FT
535 If Timeout is 0, then the caller must wait for the function\r
536 to be completed until EFI_SUCCESS or EFI_DEVICE_ERROR is returned.\r
4b1bf81c 537 @param Translator A pointr to the transaction translator data. \r
538 @param TransferResult A pointer to the detailed result information of the\r
539 bulk transfer.\r
540\r
541 @retval EFI_SUCCESS The transfer was completed successfully.\r
542 @retval EFI_OUT_OF_RESOURCES The transfer failed due to lack of resource.\r
543 @retval EFI_INVALID_PARAMETER Parameters are invalid.\r
544 @retval EFI_TIMEOUT The transfer failed due to timeout.\r
545 @retval EFI_DEVICE_ERROR The transfer failed due to host controller error.\r
546\r
547**/\r
548EFI_STATUS\r
549EFIAPI\r
550EhcBulkTransfer (\r
551 IN EFI_PEI_SERVICES **PeiServices,\r
552 IN PEI_USB2_HOST_CONTROLLER_PPI *This,\r
553 IN UINT8 DeviceAddress,\r
554 IN UINT8 EndPointAddress,\r
555 IN UINT8 DeviceSpeed,\r
556 IN UINTN MaximumPacketLength,\r
557 IN OUT VOID *Data[EFI_USB_MAX_BULK_BUFFER_NUM],\r
558 IN OUT UINTN *DataLength,\r
559 IN OUT UINT8 *DataToggle,\r
560 IN UINTN TimeOut,\r
561 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,\r
562 OUT UINT32 *TransferResult\r
563 )\r
564{\r
565 PEI_USB2_HC_DEV *Ehc;\r
566 PEI_URB *Urb;\r
567 EFI_STATUS Status;\r
568\r
569 //\r
570 // Validate the parameters\r
571 //\r
572 if ((DataLength == NULL) || (*DataLength == 0) || \r
573 (Data == NULL) || (Data[0] == NULL) || (TransferResult == NULL)) {\r
574 return EFI_INVALID_PARAMETER;\r
575 }\r
576\r
577 if ((*DataToggle != 0) && (*DataToggle != 1)) {\r
578 return EFI_INVALID_PARAMETER;\r
579 }\r
580\r
581 if ((DeviceSpeed == EFI_USB_SPEED_LOW) ||\r
582 ((DeviceSpeed == EFI_USB_SPEED_FULL) && (MaximumPacketLength > 64)) ||\r
583 ((EFI_USB_SPEED_HIGH == DeviceSpeed) && (MaximumPacketLength > 512))) {\r
584 return EFI_INVALID_PARAMETER;\r
585 }\r
586\r
587 Ehc =PEI_RECOVERY_USB_EHC_DEV_FROM_EHCI_THIS(This);\r
588 *TransferResult = EFI_USB_ERR_SYSTEM;\r
589 Status = EFI_DEVICE_ERROR;\r
590\r
591 if (EhcIsHalt (Ehc) || EhcIsSysError (Ehc)) {\r
592 EhcAckAllInterrupt (Ehc);\r
593 goto ON_EXIT;\r
594 }\r
595\r
596 EhcAckAllInterrupt (Ehc);\r
597\r
598 //\r
599 // Create a new URB, insert it into the asynchronous\r
600 // schedule list, then poll the execution status.\r
601 //\r
602 Urb = EhcCreateUrb (\r
603 Ehc,\r
604 DeviceAddress,\r
605 EndPointAddress,\r
606 DeviceSpeed,\r
607 *DataToggle,\r
608 MaximumPacketLength,\r
609 Translator,\r
610 EHC_BULK_TRANSFER,\r
611 NULL,\r
612 Data[0],\r
613 *DataLength,\r
614 NULL,\r
615 NULL,\r
616 1\r
617 );\r
618\r
619 if (Urb == NULL) {\r
620 Status = EFI_OUT_OF_RESOURCES;\r
621 goto ON_EXIT;\r
622 }\r
623\r
624 EhcLinkQhToAsync (Ehc, Urb->Qh);\r
625 Status = EhcExecTransfer (Ehc, Urb, TimeOut);\r
626 EhcUnlinkQhFromAsync (Ehc, Urb->Qh);\r
627\r
628 *TransferResult = Urb->Result;\r
629 *DataLength = Urb->Completed;\r
630 *DataToggle = Urb->DataToggle;\r
631\r
632 if (*TransferResult == EFI_USB_NOERROR) {\r
633 Status = EFI_SUCCESS;\r
634 }\r
635\r
636 EhcAckAllInterrupt (Ehc);\r
637 EhcFreeUrb (Ehc, Urb);\r
638\r
639ON_EXIT:\r
640 return Status;\r
641}\r
642\r
643/**\r
644 Retrieves the number of root hub ports.\r
645\r
646 @param[in] PeiServices The pointer to the PEI Services Table.\r
647 @param[in] This The pointer to this instance of the \r
648 PEI_USB2_HOST_CONTROLLER_PPI.\r
649 @param[out] PortNumber The pointer to the number of the root hub ports. \r
650 \r
651 @retval EFI_SUCCESS The port number was retrieved successfully.\r
652 @retval EFI_INVALID_PARAMETER PortNumber is NULL.\r
653\r
654**/\r
655EFI_STATUS\r
656EFIAPI\r
657EhcGetRootHubPortNumber (\r
658 IN EFI_PEI_SERVICES **PeiServices,\r
659 IN PEI_USB2_HOST_CONTROLLER_PPI *This,\r
660 OUT UINT8 *PortNumber\r
661 )\r
662{\r
663\r
664 PEI_USB2_HC_DEV *EhcDev;\r
665 EhcDev = PEI_RECOVERY_USB_EHC_DEV_FROM_EHCI_THIS (This);\r
666 \r
667 if (PortNumber == NULL) {\r
668 return EFI_INVALID_PARAMETER;\r
669 } \r
670 \r
671 *PortNumber = (UINT8)(EhcDev->HcStructParams & HCSP_NPORTS);\r
672 return EFI_SUCCESS;\r
673 \r
674}\r
675\r
676/**\r
677 Clears a feature for the specified root hub port.\r
678 \r
679 @param PeiServices The pointer of EFI_PEI_SERVICES.\r
680 @param This The pointer of PEI_USB2_HOST_CONTROLLER_PPI.\r
681 @param PortNumber Specifies the root hub port whose feature\r
682 is requested to be cleared.\r
683 @param PortFeature Indicates the feature selector associated with the\r
684 feature clear request.\r
685\r
686 @retval EFI_SUCCESS The feature specified by PortFeature was cleared \r
687 for the USB root hub port specified by PortNumber.\r
688 @retval EFI_INVALID_PARAMETER PortNumber is invalid or PortFeature is invalid.\r
689\r
690**/\r
691EFI_STATUS\r
692EFIAPI\r
693EhcClearRootHubPortFeature (\r
694 IN EFI_PEI_SERVICES **PeiServices,\r
695 IN PEI_USB2_HOST_CONTROLLER_PPI *This,\r
696 IN UINT8 PortNumber,\r
697 IN EFI_USB_PORT_FEATURE PortFeature\r
698 )\r
699{\r
700 PEI_USB2_HC_DEV *Ehc;\r
701 UINT32 Offset;\r
702 UINT32 State;\r
703 UINT32 TotalPort;\r
704 EFI_STATUS Status;\r
705\r
706 Ehc = PEI_RECOVERY_USB_EHC_DEV_FROM_EHCI_THIS (This);\r
707 Status = EFI_SUCCESS;\r
708\r
709 TotalPort = (Ehc->HcStructParams & HCSP_NPORTS);\r
710\r
711 if (PortNumber >= TotalPort) {\r
712 Status = EFI_INVALID_PARAMETER;\r
713 goto ON_EXIT;\r
714 }\r
715\r
716 Offset = EHC_PORT_STAT_OFFSET + (4 * PortNumber);\r
717 State = EhcReadOpReg (Ehc, Offset);\r
718 State &= ~PORTSC_CHANGE_MASK;\r
719\r
720 switch (PortFeature) {\r
721 case EfiUsbPortEnable:\r
722 //\r
723 // Clear PORT_ENABLE feature means disable port.\r
724 //\r
725 State &= ~PORTSC_ENABLED;\r
726 EhcWriteOpReg (Ehc, Offset, State);\r
727 break;\r
728\r
729 case EfiUsbPortSuspend:\r
730 //\r
731 // A write of zero to this bit is ignored by the host\r
732 // controller. The host controller will unconditionally\r
733 // set this bit to a zero when:\r
734 // 1. software sets the Forct Port Resume bit to a zero from a one.\r
735 // 2. software sets the Port Reset bit to a one frome a zero.\r
736 //\r
737 State &= ~PORSTSC_RESUME;\r
738 EhcWriteOpReg (Ehc, Offset, State);\r
739 break;\r
740\r
741 case EfiUsbPortReset:\r
742 //\r
743 // Clear PORT_RESET means clear the reset signal.\r
744 //\r
745 State &= ~PORTSC_RESET;\r
746 EhcWriteOpReg (Ehc, Offset, State);\r
747 break;\r
748\r
749 case EfiUsbPortOwner:\r
750 //\r
751 // Clear port owner means this port owned by EHC\r
752 //\r
753 State &= ~PORTSC_OWNER;\r
754 EhcWriteOpReg (Ehc, Offset, State);\r
755 break;\r
756\r
757 case EfiUsbPortConnectChange:\r
758 //\r
759 // Clear connect status change\r
760 //\r
761 State |= PORTSC_CONN_CHANGE;\r
762 EhcWriteOpReg (Ehc, Offset, State);\r
763 break;\r
764\r
765 case EfiUsbPortEnableChange:\r
766 //\r
767 // Clear enable status change\r
768 //\r
769 State |= PORTSC_ENABLE_CHANGE;\r
770 EhcWriteOpReg (Ehc, Offset, State);\r
771 break;\r
772\r
773 case EfiUsbPortOverCurrentChange:\r
774 //\r
775 // Clear PortOverCurrent change\r
776 //\r
777 State |= PORTSC_OVERCUR_CHANGE;\r
778 EhcWriteOpReg (Ehc, Offset, State);\r
779 break;\r
780\r
781 case EfiUsbPortPower:\r
782 case EfiUsbPortSuspendChange:\r
783 case EfiUsbPortResetChange:\r
784 //\r
785 // Not supported or not related operation\r
786 //\r
787 break;\r
788\r
789 default:\r
790 Status = EFI_INVALID_PARAMETER;\r
791 break;\r
792 }\r
793\r
794ON_EXIT:\r
795 return Status;\r
796}\r
797\r
798/**\r
799 Sets a feature for the specified root hub port.\r
800 \r
801 @param PeiServices The pointer of EFI_PEI_SERVICES\r
802 @param This The pointer of PEI_USB2_HOST_CONTROLLER_PPI\r
803 @param PortNumber Root hub port to set.\r
804 @param PortFeature Feature to set.\r
805\r
806 @retval EFI_SUCCESS The feature specified by PortFeature was set.\r
807 @retval EFI_INVALID_PARAMETER PortNumber is invalid or PortFeature is invalid.\r
808 @retval EFI_TIMEOUT The time out occurred.\r
809\r
810**/\r
811EFI_STATUS\r
812EFIAPI\r
813EhcSetRootHubPortFeature (\r
814 IN EFI_PEI_SERVICES **PeiServices,\r
815 IN PEI_USB2_HOST_CONTROLLER_PPI *This,\r
816 IN UINT8 PortNumber,\r
817 IN EFI_USB_PORT_FEATURE PortFeature\r
818 )\r
819{\r
820 PEI_USB2_HC_DEV *Ehc;\r
821 UINT32 Offset;\r
822 UINT32 State;\r
823 UINT32 TotalPort;\r
824 EFI_STATUS Status;\r
825\r
826 Ehc = PEI_RECOVERY_USB_EHC_DEV_FROM_EHCI_THIS (This);\r
827 Status = EFI_SUCCESS;\r
828\r
829 TotalPort = (Ehc->HcStructParams & HCSP_NPORTS);\r
830\r
831 if (PortNumber >= TotalPort) {\r
832 Status = EFI_INVALID_PARAMETER;\r
833 goto ON_EXIT;\r
834 }\r
835\r
836 Offset = (UINT32) (EHC_PORT_STAT_OFFSET + (4 * PortNumber));\r
837 State = EhcReadOpReg (Ehc, Offset);\r
838\r
839 //\r
840 // Mask off the port status change bits, these bits are\r
841 // write clean bit\r
842 //\r
843 State &= ~PORTSC_CHANGE_MASK;\r
844\r
845 switch (PortFeature) {\r
846 case EfiUsbPortEnable:\r
847 //\r
848 // Sofeware can't set this bit, Port can only be enable by\r
849 // EHCI as a part of the reset and enable\r
850 //\r
851 State |= PORTSC_ENABLED;\r
852 EhcWriteOpReg (Ehc, Offset, State);\r
853 break;\r
854\r
855 case EfiUsbPortSuspend:\r
856 State |= PORTSC_SUSPEND;\r
857 EhcWriteOpReg (Ehc, Offset, State);\r
858 break;\r
859\r
860 case EfiUsbPortReset:\r
861 //\r
862 // Make sure Host Controller not halt before reset it\r
863 //\r
864 if (EhcIsHalt (Ehc)) {\r
865 Status = EhcRunHC (Ehc, EHC_GENERIC_TIMEOUT);\r
866\r
867 if (EFI_ERROR (Status)) {\r
868 break;\r
869 }\r
870 }\r
871 \r
872 //\r
873 // Set one to PortReset bit must also set zero to PortEnable bit\r
874 //\r
875 State |= PORTSC_RESET;\r
876 State &= ~PORTSC_ENABLED;\r
877 EhcWriteOpReg (Ehc, Offset, State);\r
878 break;\r
879\r
880 case EfiUsbPortPower:\r
881 //\r
882 // Not supported, ignore the operation\r
883 //\r
884 Status = EFI_SUCCESS;\r
885 break;\r
886\r
887 case EfiUsbPortOwner:\r
888 State |= PORTSC_OWNER;\r
889 EhcWriteOpReg (Ehc, Offset, State);\r
890 break;\r
891\r
892 default:\r
893 Status = EFI_INVALID_PARAMETER;\r
894 }\r
895\r
896ON_EXIT:\r
897 return Status;\r
898}\r
899\r
900/**\r
901 Retrieves the current status of a USB root hub port.\r
902 \r
903 @param PeiServices The pointer of EFI_PEI_SERVICES.\r
904 @param This The pointer of PEI_USB2_HOST_CONTROLLER_PPI.\r
905 @param PortNumber The root hub port to retrieve the state from. \r
906 @param PortStatus Variable to receive the port state.\r
907\r
908 @retval EFI_SUCCESS The status of the USB root hub port specified.\r
909 by PortNumber was returned in PortStatus.\r
910 @retval EFI_INVALID_PARAMETER PortNumber is invalid.\r
911\r
912**/\r
913EFI_STATUS\r
914EFIAPI\r
915EhcGetRootHubPortStatus (\r
916 IN EFI_PEI_SERVICES **PeiServices,\r
917 IN PEI_USB2_HOST_CONTROLLER_PPI *This,\r
918 IN UINT8 PortNumber,\r
919 OUT EFI_USB_PORT_STATUS *PortStatus\r
920 )\r
921{\r
922 PEI_USB2_HC_DEV *Ehc;\r
923 UINT32 Offset;\r
924 UINT32 State;\r
925 UINT32 TotalPort;\r
926 UINTN Index;\r
927 UINTN MapSize;\r
928 EFI_STATUS Status;\r
929\r
930 if (PortStatus == NULL) {\r
931 return EFI_INVALID_PARAMETER;\r
932 }\r
933\r
934 Ehc = PEI_RECOVERY_USB_EHC_DEV_FROM_EHCI_THIS(This);\r
935 Status = EFI_SUCCESS;\r
936\r
937 TotalPort = (Ehc->HcStructParams & HCSP_NPORTS);\r
938\r
939 if (PortNumber >= TotalPort) {\r
940 Status = EFI_INVALID_PARAMETER;\r
941 goto ON_EXIT;\r
942 }\r
943\r
944 Offset = (UINT32) (EHC_PORT_STAT_OFFSET + (4 * PortNumber));\r
945 PortStatus->PortStatus = 0;\r
946 PortStatus->PortChangeStatus = 0;\r
947\r
948 State = EhcReadOpReg (Ehc, Offset);\r
949\r
950 //\r
951 // Identify device speed. If in K state, it is low speed.\r
952 // If the port is enabled after reset, the device is of \r
953 // high speed. The USB bus driver should retrieve the actual\r
954 // port speed after reset. \r
955 //\r
956 if (EHC_BIT_IS_SET (State, PORTSC_LINESTATE_K)) {\r
957 PortStatus->PortStatus |= USB_PORT_STAT_LOW_SPEED;\r
958\r
959 } else if (EHC_BIT_IS_SET (State, PORTSC_ENABLED)) {\r
960 PortStatus->PortStatus |= USB_PORT_STAT_HIGH_SPEED;\r
961 }\r
962 \r
963 //\r
964 // Convert the EHCI port/port change state to UEFI status\r
965 //\r
966 MapSize = sizeof (mUsbPortStateMap) / sizeof (USB_PORT_STATE_MAP);\r
967\r
968 for (Index = 0; Index < MapSize; Index++) {\r
969 if (EHC_BIT_IS_SET (State, mUsbPortStateMap[Index].HwState)) {\r
970 PortStatus->PortStatus = (UINT16) (PortStatus->PortStatus | mUsbPortStateMap[Index].UefiState);\r
971 }\r
972 }\r
973\r
974 MapSize = sizeof (mUsbPortChangeMap) / sizeof (USB_PORT_STATE_MAP);\r
975\r
976 for (Index = 0; Index < MapSize; Index++) {\r
977 if (EHC_BIT_IS_SET (State, mUsbPortChangeMap[Index].HwState)) {\r
978 PortStatus->PortChangeStatus = (UINT16) (PortStatus->PortChangeStatus | mUsbPortChangeMap[Index].UefiState);\r
979 }\r
980 }\r
981\r
982ON_EXIT:\r
983 return Status;\r
984}\r
985\r
986/**\r
987 Submits control transfer to a target USB device.\r
988 \r
989 @param PeiServices The pointer of EFI_PEI_SERVICES.\r
990 @param This The pointer of PEI_USB2_HOST_CONTROLLER_PPI.\r
991 @param DeviceAddress The target device address.\r
992 @param DeviceSpeed Target device speed.\r
993 @param MaximumPacketLength Maximum packet size the default control transfer \r
994 endpoint is capable of sending or receiving.\r
995 @param Request USB device request to send.\r
996 @param TransferDirection Specifies the data direction for the data stage.\r
997 @param Data Data buffer to be transmitted or received from USB device.\r
998 @param DataLength The size (in bytes) of the data buffer.\r
999 @param TimeOut Indicates the maximum timeout, in millisecond.\r
ca243131
FT
1000 If Timeout is 0, then the caller must wait for the function\r
1001 to be completed until EFI_SUCCESS or EFI_DEVICE_ERROR is returned.\r
4b1bf81c 1002 @param Translator Transaction translator to be used by this device.\r
1003 @param TransferResult Return the result of this control transfer.\r
1004\r
1005 @retval EFI_SUCCESS Transfer was completed successfully.\r
1006 @retval EFI_OUT_OF_RESOURCES The transfer failed due to lack of resources.\r
1007 @retval EFI_INVALID_PARAMETER Some parameters are invalid.\r
1008 @retval EFI_TIMEOUT Transfer failed due to timeout.\r
1009 @retval EFI_DEVICE_ERROR Transfer failed due to host controller or device error.\r
1010\r
1011**/\r
1012EFI_STATUS\r
1013EFIAPI\r
1014EhcControlTransfer (\r
1015 IN EFI_PEI_SERVICES **PeiServices,\r
1016 IN PEI_USB2_HOST_CONTROLLER_PPI *This,\r
1017 IN UINT8 DeviceAddress,\r
1018 IN UINT8 DeviceSpeed,\r
1019 IN UINTN MaximumPacketLength,\r
1020 IN EFI_USB_DEVICE_REQUEST *Request,\r
1021 IN EFI_USB_DATA_DIRECTION TransferDirection,\r
1022 IN OUT VOID *Data,\r
1023 IN OUT UINTN *DataLength,\r
1024 IN UINTN TimeOut,\r
1025 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,\r
1026 OUT UINT32 *TransferResult\r
1027 )\r
1028{\r
1029 PEI_USB2_HC_DEV *Ehc;\r
1030 PEI_URB *Urb;\r
1031 UINT8 Endpoint;\r
1032 EFI_STATUS Status;\r
1033\r
1034 //\r
1035 // Validate parameters\r
1036 //\r
1037 if ((Request == NULL) || (TransferResult == NULL)) {\r
1038 return EFI_INVALID_PARAMETER;\r
1039 }\r
1040\r
1041 if ((TransferDirection != EfiUsbDataIn) &&\r
1042 (TransferDirection != EfiUsbDataOut) &&\r
1043 (TransferDirection != EfiUsbNoData)) {\r
1044 return EFI_INVALID_PARAMETER;\r
1045 }\r
1046\r
1047 if ((TransferDirection == EfiUsbNoData) && \r
1048 ((Data != NULL) || (*DataLength != 0))) {\r
1049 return EFI_INVALID_PARAMETER;\r
1050 }\r
1051\r
1052 if ((TransferDirection != EfiUsbNoData) && \r
1053 ((Data == NULL) || (*DataLength == 0))) {\r
1054 return EFI_INVALID_PARAMETER;\r
1055 }\r
1056\r
1057 if ((MaximumPacketLength != 8) && (MaximumPacketLength != 16) &&\r
1058 (MaximumPacketLength != 32) && (MaximumPacketLength != 64)) {\r
1059 return EFI_INVALID_PARAMETER;\r
1060 }\r
1061\r
1062\r
1063 if ((DeviceSpeed == EFI_USB_SPEED_LOW) ||\r
1064 ((DeviceSpeed == EFI_USB_SPEED_FULL) && (MaximumPacketLength > 64)) ||\r
1065 ((EFI_USB_SPEED_HIGH == DeviceSpeed) && (MaximumPacketLength > 512))) {\r
1066 return EFI_INVALID_PARAMETER;\r
1067 }\r
1068\r
1069 Ehc = PEI_RECOVERY_USB_EHC_DEV_FROM_EHCI_THIS (This);\r
1070\r
1071 Status = EFI_DEVICE_ERROR;\r
1072 *TransferResult = EFI_USB_ERR_SYSTEM;\r
1073\r
1074 if (EhcIsHalt (Ehc) || EhcIsSysError (Ehc)) {\r
1075 EhcAckAllInterrupt (Ehc);\r
1076 goto ON_EXIT;\r
1077 }\r
1078\r
1079 EhcAckAllInterrupt (Ehc);\r
1080\r
1081 //\r
1082 // Create a new URB, insert it into the asynchronous\r
1083 // schedule list, then poll the execution status.\r
1084 //\r
1085 //\r
1086 // Encode the direction in address, although default control\r
1087 // endpoint is bidirectional. EhcCreateUrb expects this\r
1088 // combination of Ep addr and its direction.\r
1089 //\r
1090 Endpoint = (UINT8) (0 | ((TransferDirection == EfiUsbDataIn) ? 0x80 : 0));\r
1091 Urb = EhcCreateUrb (\r
1092 Ehc,\r
1093 DeviceAddress,\r
1094 Endpoint,\r
1095 DeviceSpeed,\r
1096 0,\r
1097 MaximumPacketLength,\r
1098 Translator,\r
1099 EHC_CTRL_TRANSFER,\r
1100 Request,\r
1101 Data,\r
1102 *DataLength,\r
1103 NULL,\r
1104 NULL,\r
1105 1\r
1106 );\r
1107\r
1108 if (Urb == NULL) {\r
1109 Status = EFI_OUT_OF_RESOURCES;\r
1110 goto ON_EXIT;\r
1111 }\r
1112\r
1113 EhcLinkQhToAsync (Ehc, Urb->Qh);\r
1114 Status = EhcExecTransfer (Ehc, Urb, TimeOut);\r
1115 EhcUnlinkQhFromAsync (Ehc, Urb->Qh);\r
1116\r
1117 //\r
1118 // Get the status from URB. The result is updated in EhcCheckUrbResult\r
1119 // which is called by EhcExecTransfer\r
1120 //\r
1121 *TransferResult = Urb->Result;\r
1122 *DataLength = Urb->Completed;\r
1123\r
1124 if (*TransferResult == EFI_USB_NOERROR) {\r
1125 Status = EFI_SUCCESS;\r
1126 }\r
1127\r
1128 EhcAckAllInterrupt (Ehc);\r
1129 EhcFreeUrb (Ehc, Urb);\r
1130\r
1131ON_EXIT:\r
1132 return Status;\r
1133}\r
1134\r
1135/**\r
1136 @param FileHandle Handle of the file being invoked.\r
1137 @param PeiServices Describes the list of possible PEI Services.\r
1138\r
1139 @retval EFI_SUCCESS PPI successfully installed.\r
1140\r
1141**/\r
1142EFI_STATUS\r
1143EFIAPI\r
1144EhcPeimEntry (\r
1145 IN EFI_PEI_FILE_HANDLE FileHandle,\r
1146 IN CONST EFI_PEI_SERVICES **PeiServices\r
1147 )\r
1148{\r
1149 PEI_USB_CONTROLLER_PPI *ChipSetUsbControllerPpi;\r
1150 EFI_STATUS Status;\r
1151 UINT8 Index;\r
1152 UINTN ControllerType;\r
1153 UINTN BaseAddress;\r
1154 UINTN MemPages;\r
1155 PEI_USB2_HC_DEV *EhcDev;\r
1156 EFI_PHYSICAL_ADDRESS TempPtr;\r
1157\r
1158 //\r
1159 // Shadow this PEIM to run from memory\r
1160 //\r
1161 if (!EFI_ERROR (PeiServicesRegisterForShadow (FileHandle))) {\r
1162 return EFI_SUCCESS;\r
1163 }\r
1164\r
1165 Status = PeiServicesLocatePpi (\r
1166 &gPeiUsbControllerPpiGuid,\r
1167 0,\r
1168 NULL,\r
1169 (VOID **) &ChipSetUsbControllerPpi\r
1170 );\r
1171 if (EFI_ERROR (Status)) {\r
1172 return EFI_UNSUPPORTED;\r
1173 }\r
1174\r
1175 Index = 0;\r
1176 while (TRUE) {\r
1177 Status = ChipSetUsbControllerPpi->GetUsbController (\r
1178 (EFI_PEI_SERVICES **) PeiServices,\r
1179 ChipSetUsbControllerPpi,\r
1180 Index,\r
1181 &ControllerType,\r
1182 &BaseAddress\r
1183 );\r
1184 //\r
1185 // When status is error, meant no controller is found\r
1186 //\r
1187 if (EFI_ERROR (Status)) {\r
1188 break;\r
1189 }\r
1190 \r
1191 //\r
1192 // This PEIM is for UHC type controller.\r
1193 //\r
1194 if (ControllerType != PEI_EHCI_CONTROLLER) {\r
1195 Index++;\r
1196 continue;\r
1197 }\r
1198\r
1199 MemPages = sizeof (PEI_USB2_HC_DEV) / PAGESIZE + 1;\r
1200 Status = PeiServicesAllocatePages (\r
1201 EfiBootServicesCode,\r
1202 MemPages,\r
1203 &TempPtr\r
1204 );\r
1205 if (EFI_ERROR (Status)) {\r
1206 return EFI_OUT_OF_RESOURCES;\r
1207 }\r
1208\r
1209 ZeroMem((VOID *)(UINTN)TempPtr, MemPages*PAGESIZE);\r
1210 EhcDev = (PEI_USB2_HC_DEV *) ((UINTN) TempPtr);\r
1211\r
1212 EhcDev->Signature = USB2_HC_DEV_SIGNATURE;\r
1213\r
1214 EhcDev->UsbHostControllerBaseAddress = (UINT32) BaseAddress;\r
1215\r
1216\r
1217 EhcDev->HcStructParams = EhcReadCapRegister (EhcDev, EHC_HCSPARAMS_OFFSET);\r
1218 EhcDev->HcCapParams = EhcReadCapRegister (EhcDev, EHC_HCCPARAMS_OFFSET);\r
1219 EhcDev->CapLen = EhcReadCapRegister (EhcDev, EHC_CAPLENGTH_OFFSET) & 0x0FF;\r
1220 //\r
1221 // Initialize Uhc's hardware\r
1222 //\r
1223 Status = InitializeUsbHC (EhcDev);\r
1224 if (EFI_ERROR (Status)) {\r
1225 return Status;\r
1226 }\r
1227\r
1228 EhcDev->Usb2HostControllerPpi.ControlTransfer = EhcControlTransfer;\r
1229 EhcDev->Usb2HostControllerPpi.BulkTransfer = EhcBulkTransfer;\r
1230 EhcDev->Usb2HostControllerPpi.GetRootHubPortNumber = EhcGetRootHubPortNumber;\r
1231 EhcDev->Usb2HostControllerPpi.GetRootHubPortStatus = EhcGetRootHubPortStatus;\r
1232 EhcDev->Usb2HostControllerPpi.SetRootHubPortFeature = EhcSetRootHubPortFeature;\r
1233 EhcDev->Usb2HostControllerPpi.ClearRootHubPortFeature = EhcClearRootHubPortFeature;\r
1234\r
1235 EhcDev->PpiDescriptor.Flags = (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST);\r
1236 EhcDev->PpiDescriptor.Guid = &gPeiUsb2HostControllerPpiGuid;\r
1237 EhcDev->PpiDescriptor.Ppi = &EhcDev->Usb2HostControllerPpi;\r
1238\r
1239 Status = PeiServicesInstallPpi (&EhcDev->PpiDescriptor);\r
1240 if (EFI_ERROR (Status)) {\r
1241 Index++;\r
1242 continue;\r
1243 }\r
1244\r
1245 Index++;\r
1246 }\r
1247\r
1248 return EFI_SUCCESS;\r
1249}\r
1250\r
1251/**\r
1252 @param EhcDev EHCI Device.\r
1253\r
1254 @retval EFI_SUCCESS EHCI successfully initialized.\r
1255 @retval EFI_ABORTED EHCI was failed to be initialized.\r
1256\r
1257**/\r
1258EFI_STATUS\r
1259InitializeUsbHC (\r
1260 IN PEI_USB2_HC_DEV *EhcDev \r
1261 )\r
1262{\r
1263 EFI_STATUS Status;\r
1264\r
1265 \r
1266 EhcResetHC (EhcDev, EHC_RESET_TIMEOUT);\r
1267\r
1268 Status = EhcInitHC (EhcDev);\r
1269\r
1270 if (EFI_ERROR (Status)) {\r
1271 return EFI_ABORTED; \r
1272 }\r
1273 \r
1274 return EFI_SUCCESS;\r
1275}\r