MdeModulePkg/PciBusDxe: dispatch option ROMs for foreign architectures

[mirror_edk2.git] / MdeModulePkg / Bus / Pci / PciBusDxe / PciCommand.c

/** @file\r
  PCI command register operations supporting functions implementation for PCI Bus module.\r
\r
Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>\r
SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
#include "PciBus.h"\r
\r
/**\r
  Operate the PCI register via PciIo function interface.\r
\r
  @param PciIoDevice    Pointer to instance of PCI_IO_DEVICE.\r
  @param Command        Operator command.\r
  @param Offset         The address within the PCI configuration space for the PCI controller.\r
  @param Operation      Type of Operation.\r
  @param PtrCommand     Return buffer holding old PCI command, if operation is not EFI_SET_REGISTER.\r
\r
  @return Status of PciIo operation.\r
\r
**/\r
EFI_STATUS\r
PciOperateRegister (\r
  IN  PCI_IO_DEVICE *PciIoDevice,\r
  IN  UINT16        Command,\r
  IN  UINT8         Offset,\r
  IN  UINT8         Operation,\r
  OUT UINT16        *PtrCommand\r
  )\r
{\r
  UINT16              OldCommand;\r
  EFI_STATUS          Status;\r
  EFI_PCI_IO_PROTOCOL *PciIo;\r
\r
  OldCommand  = 0;\r
  PciIo       = &PciIoDevice->PciIo;\r
\r
  if (Operation != EFI_SET_REGISTER) {\r
    Status = PciIo->Pci.Read (\r
                          PciIo,\r
                          EfiPciIoWidthUint16,\r
                          Offset,\r
                          1,\r
                          &OldCommand\r
                          );\r
\r
    if (Operation == EFI_GET_REGISTER) {\r
      *PtrCommand = OldCommand;\r
      return Status;\r
    }\r
  }\r
\r
  if (Operation == EFI_ENABLE_REGISTER) {\r
    OldCommand = (UINT16) (OldCommand | Command);\r
  } else if (Operation == EFI_DISABLE_REGISTER) {\r
    OldCommand = (UINT16) (OldCommand & ~(Command));\r
  } else {\r
    OldCommand = Command;\r
  }\r
\r
  return PciIo->Pci.Write (\r
                      PciIo,\r
                      EfiPciIoWidthUint16,\r
                      Offset,\r
                      1,\r
                      &OldCommand\r
                      );\r
}\r
\r
/**\r
  Check the capability supporting by given device.\r
\r
  @param PciIoDevice   Pointer to instance of PCI_IO_DEVICE.\r
\r
  @retval TRUE         Capability supported.\r
  @retval FALSE        Capability not supported.\r
\r
**/\r
BOOLEAN\r
PciCapabilitySupport (\r
  IN PCI_IO_DEVICE  *PciIoDevice\r
  )\r
{\r
  if ((PciIoDevice->Pci.Hdr.Status & EFI_PCI_STATUS_CAPABILITY) != 0) {\r
    return TRUE;\r
  }\r
\r
  return FALSE;\r
}\r
\r
/**\r
  Locate capability register block per capability ID.\r
\r
  @param PciIoDevice       A pointer to the PCI_IO_DEVICE.\r
  @param CapId             The capability ID.\r
  @param Offset            A pointer to the offset returned.\r
  @param NextRegBlock      A pointer to the next block returned.\r
\r
  @retval EFI_SUCCESS      Successfully located capability register block.\r
  @retval EFI_UNSUPPORTED  Pci device does not support capability.\r
  @retval EFI_NOT_FOUND    Pci device support but can not find register block.\r
\r
**/\r
EFI_STATUS\r
LocateCapabilityRegBlock (\r
  IN PCI_IO_DEVICE  *PciIoDevice,\r
  IN UINT8          CapId,\r
  IN OUT UINT8      *Offset,\r
  OUT UINT8         *NextRegBlock OPTIONAL\r
  )\r
{\r
  UINT8   CapabilityPtr;\r
  UINT16  CapabilityEntry;\r
  UINT8   CapabilityID;\r
\r
  //\r
  // To check the capability of this device supports\r
  //\r
  if (!PciCapabilitySupport (PciIoDevice)) {\r
    return EFI_UNSUPPORTED;\r
  }\r
\r
  if (*Offset != 0) {\r
    CapabilityPtr = *Offset;\r
  } else {\r
\r
    CapabilityPtr = 0;\r
    if (IS_CARDBUS_BRIDGE (&PciIoDevice->Pci)) {\r
\r
      PciIoDevice->PciIo.Pci.Read (\r
                               &PciIoDevice->PciIo,\r
                               EfiPciIoWidthUint8,\r
                               EFI_PCI_CARDBUS_BRIDGE_CAPABILITY_PTR,\r
                               1,\r
                               &CapabilityPtr\r
                               );\r
    } else {\r
\r
      PciIoDevice->PciIo.Pci.Read (\r
                               &PciIoDevice->PciIo,\r
                               EfiPciIoWidthUint8,\r
                               PCI_CAPBILITY_POINTER_OFFSET,\r
                               1,\r
                               &CapabilityPtr\r
                               );\r
    }\r
  }\r
\r
  while ((CapabilityPtr >= 0x40) && ((CapabilityPtr & 0x03) == 0x00)) {\r
    PciIoDevice->PciIo.Pci.Read (\r
                             &PciIoDevice->PciIo,\r
                             EfiPciIoWidthUint16,\r
                             CapabilityPtr,\r
                             1,\r
                             &CapabilityEntry\r
                             );\r
\r
    CapabilityID = (UINT8) CapabilityEntry;\r
\r
    if (CapabilityID == CapId) {\r
      *Offset = CapabilityPtr;\r
      if (NextRegBlock != NULL) {\r
        *NextRegBlock = (UINT8) (CapabilityEntry >> 8);\r
      }\r
\r
      return EFI_SUCCESS;\r
    }\r
\r
    //\r
    // Certain PCI device may incorrectly have capability pointing to itself,\r
    // break to avoid dead loop.\r
    //\r
    if (CapabilityPtr == (UINT8) (CapabilityEntry >> 8)) {\r
      break;\r
    }\r
\r
    CapabilityPtr = (UINT8) (CapabilityEntry >> 8);\r
  }\r
\r
  return EFI_NOT_FOUND;\r
}\r
\r
/**\r
  Locate PciExpress capability register block per capability ID.\r
\r
  @param PciIoDevice       A pointer to the PCI_IO_DEVICE.\r
  @param CapId             The capability ID.\r
  @param Offset            A pointer to the offset returned.\r
  @param NextRegBlock      A pointer to the next block returned.\r
\r
  @retval EFI_SUCCESS      Successfully located capability register block.\r
  @retval EFI_UNSUPPORTED  Pci device does not support capability.\r
  @retval EFI_NOT_FOUND    Pci device support but can not find register block.\r
\r
**/\r
EFI_STATUS\r
LocatePciExpressCapabilityRegBlock (\r
  IN     PCI_IO_DEVICE *PciIoDevice,\r
  IN     UINT16        CapId,\r
  IN OUT UINT32        *Offset,\r
     OUT UINT32        *NextRegBlock OPTIONAL\r
  )\r
{\r
  EFI_STATUS           Status;\r
  UINT32               CapabilityPtr;\r
  UINT32               CapabilityEntry;\r
  UINT16               CapabilityID;\r
\r
  //\r
  // To check the capability of this device supports\r
  //\r
  if (!PciIoDevice->IsPciExp) {\r
    return EFI_UNSUPPORTED;\r
  }\r
\r
  if (*Offset != 0) {\r
    CapabilityPtr = *Offset;\r
  } else {\r
    CapabilityPtr = EFI_PCIE_CAPABILITY_BASE_OFFSET;\r
  }\r
\r
  while (CapabilityPtr != 0) {\r
    //\r
    // Mask it to DWORD alignment per PCI spec\r
    //\r
    CapabilityPtr &= 0xFFC;\r
    Status = PciIoDevice->PciIo.Pci.Read (\r
                                      &PciIoDevice->PciIo,\r
                                      EfiPciIoWidthUint32,\r
                                      CapabilityPtr,\r
                                      1,\r
                                      &CapabilityEntry\r
                                      );\r
    if (EFI_ERROR (Status)) {\r
      break;\r
    }\r
\r
    CapabilityID = (UINT16) CapabilityEntry;\r
\r
    if (CapabilityID == CapId) {\r
      *Offset = CapabilityPtr;\r
      if (NextRegBlock != NULL) {\r
        *NextRegBlock = (CapabilityEntry >> 20) & 0xFFF;\r
      }\r
\r
      return EFI_SUCCESS;\r
    }\r
\r
    CapabilityPtr = (CapabilityEntry >> 20) & 0xFFF;\r
  }\r
\r
  return EFI_NOT_FOUND;\r
}\r