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23c98c94 | 1 | /** @file\r |
2 | Task priority (TPL) function\r | |
504214c4 | 3 | \r |
23c98c94 | 4 | Copyright (c) 2006 - 2008, Intel Corporation. <BR>\r |
5 | All rights reserved. This program and the accompanying materials\r | |
6 | are licensed and made available under the terms and conditions of the BSD License\r | |
7 | which accompanies this distribution. The full text of the license may be found at\r | |
8 | http://opensource.org/licenses/bsd-license.php\r | |
28a00297 | 9 | \r |
23c98c94 | 10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
28a00297 | 12 | \r |
504214c4 | 13 | **/\r |
28a00297 | 14 | \r |
15 | #include <DxeMain.h>\r | |
16 | \r | |
162ed594 | 17 | \r |
18 | /**\r | |
19 | Set Interrupt State.\r | |
20 | \r | |
21 | @param Enable The state of enable or disable interrupt\r | |
22 | \r | |
23 | **/\r | |
28a00297 | 24 | VOID\r |
25 | CoreSetInterruptState (\r | |
26 | IN BOOLEAN Enable\r | |
27 | )\r | |
28a00297 | 28 | {\r |
29 | if (gCpu != NULL) {\r | |
30 | if (Enable) {\r | |
31 | gCpu->EnableInterrupt(gCpu);\r | |
32 | } else {\r | |
33 | gCpu->DisableInterrupt(gCpu);\r | |
34 | }\r | |
35 | }\r | |
36 | }\r | |
37 | \r | |
38 | //\r | |
39 | // Return the highest set bit\r | |
40 | //\r | |
162ed594 | 41 | \r |
42 | /**\r | |
43 | Return the highest set bit.\r | |
44 | \r | |
45 | @param Number The value to check \r | |
46 | \r | |
47 | @return Bit position of the highest set bit\r | |
48 | \r | |
49 | **/\r | |
28a00297 | 50 | UINTN\r |
51 | CoreHighestSetBit (\r | |
52 | IN UINTN Number\r | |
53 | )\r | |
28a00297 | 54 | {\r |
55 | UINTN msb;\r | |
56 | \r | |
57 | msb = 31;\r | |
58 | while ((msb > 0) && ((Number & (UINTN)(1 << msb)) == 0)) {\r | |
59 | msb--;\r | |
60 | }\r | |
61 | \r | |
62 | return msb;\r | |
63 | }\r | |
64 | \r | |
65 | \r | |
66 | \r | |
28a00297 | 67 | \r |
162ed594 | 68 | /**\r |
28a00297 | 69 | Raise the task priority level to the new level.\r |
70 | High level is implemented by disabling processor interrupts.\r | |
71 | \r | |
162ed594 | 72 | @param NewTpl New task priority level \r |
28a00297 | 73 | \r |
162ed594 | 74 | @return The previous task priority level\r |
28a00297 | 75 | \r |
162ed594 | 76 | **/\r |
77 | EFI_TPL\r | |
78 | EFIAPI\r | |
79 | CoreRaiseTpl (\r | |
80 | IN EFI_TPL NewTpl\r | |
81 | )\r | |
28a00297 | 82 | {\r |
83 | EFI_TPL OldTpl;\r | |
84 | \r | |
85 | OldTpl = gEfiCurrentTpl;\r | |
86 | ASSERT (OldTpl <= NewTpl);\r | |
87 | ASSERT (VALID_TPL (NewTpl));\r | |
88 | \r | |
89 | //\r | |
90 | // If raising to high level, disable interrupts\r | |
91 | //\r | |
92 | if (NewTpl >= TPL_HIGH_LEVEL && OldTpl < TPL_HIGH_LEVEL) {\r | |
93 | CoreSetInterruptState (FALSE);\r | |
94 | }\r | |
95 | \r | |
96 | //\r | |
97 | // Set the new value\r | |
98 | //\r | |
99 | gEfiCurrentTpl = NewTpl;\r | |
100 | \r | |
101 | return OldTpl;\r | |
102 | }\r | |
103 | \r | |
104 | \r | |
105 | \r | |
162ed594 | 106 | \r |
107 | /**\r | |
108 | Lowers the task priority to the previous value. If the new\r | |
109 | priority unmasks events at a higher priority, they are dispatched.\r | |
110 | \r | |
111 | @param NewTpl New, lower, task priority\r | |
112 | \r | |
113 | **/\r | |
28a00297 | 114 | VOID\r |
115 | EFIAPI\r | |
116 | CoreRestoreTpl (\r | |
117 | IN EFI_TPL NewTpl\r | |
118 | )\r | |
28a00297 | 119 | {\r |
120 | EFI_TPL OldTpl;\r | |
121 | \r | |
122 | OldTpl = gEfiCurrentTpl;\r | |
123 | ASSERT (NewTpl <= OldTpl);\r | |
124 | ASSERT (VALID_TPL (NewTpl));\r | |
125 | \r | |
126 | //\r | |
127 | // If lowering below HIGH_LEVEL, make sure\r | |
128 | // interrupts are enabled\r | |
129 | //\r | |
130 | \r | |
131 | if (OldTpl >= TPL_HIGH_LEVEL && NewTpl < TPL_HIGH_LEVEL) {\r | |
132 | gEfiCurrentTpl = TPL_HIGH_LEVEL; \r | |
133 | }\r | |
134 | \r | |
135 | //\r | |
136 | // Dispatch any pending events\r | |
137 | //\r | |
138 | \r | |
139 | while ((-2 << NewTpl) & gEventPending) {\r | |
140 | gEfiCurrentTpl = CoreHighestSetBit (gEventPending);\r | |
141 | if (gEfiCurrentTpl < TPL_HIGH_LEVEL) {\r | |
142 | CoreSetInterruptState (TRUE);\r | |
143 | }\r | |
144 | CoreDispatchEventNotifies (gEfiCurrentTpl);\r | |
145 | }\r | |
146 | \r | |
147 | //\r | |
148 | // Set the new value\r | |
149 | //\r | |
150 | \r | |
151 | gEfiCurrentTpl = NewTpl;\r | |
152 | \r | |
153 | //\r | |
154 | // If lowering below HIGH_LEVEL, make sure\r | |
155 | // interrupts are enabled\r | |
156 | //\r | |
157 | if (gEfiCurrentTpl < TPL_HIGH_LEVEL) {\r | |
158 | CoreSetInterruptState (TRUE);\r | |
159 | }\r | |
160 | \r | |
161 | }\r |