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23c98c94 | 1 | /** @file\r |
e94a9ff7 | 2 | Task priority (TPL) functions.\r |
504214c4 | 3 | \r |
d1102dba | 4 | Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r |
9d510e61 | 5 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
28a00297 | 6 | \r |
504214c4 | 7 | **/\r |
28a00297 | 8 | \r |
9c4ac31c | 9 | #include "DxeMain.h"\r |
ec90508b | 10 | #include "Event.h"\r |
162ed594 | 11 | \r |
12 | /**\r | |
13 | Set Interrupt State.\r | |
14 | \r | |
15 | @param Enable The state of enable or disable interrupt\r | |
16 | \r | |
17 | **/\r | |
28a00297 | 18 | VOID\r |
19 | CoreSetInterruptState (\r | |
1436aea4 | 20 | IN BOOLEAN Enable\r |
28a00297 | 21 | )\r |
28a00297 | 22 | {\r |
0803854b | 23 | EFI_STATUS Status;\r |
24 | BOOLEAN InSmm;\r | |
d1102dba | 25 | \r |
0803854b | 26 | if (gCpu == NULL) {\r |
27 | return;\r | |
28 | }\r | |
1436aea4 | 29 | \r |
0803854b | 30 | if (!Enable) {\r |
31 | gCpu->DisableInterrupt (gCpu);\r | |
32 | return;\r | |
33 | }\r | |
1436aea4 | 34 | \r |
0803854b | 35 | if (gSmmBase2 == NULL) {\r |
36 | gCpu->EnableInterrupt (gCpu);\r | |
37 | return;\r | |
38 | }\r | |
1436aea4 | 39 | \r |
0803854b | 40 | Status = gSmmBase2->InSmm (gSmmBase2, &InSmm);\r |
41 | if (!EFI_ERROR (Status) && !InSmm) {\r | |
1436aea4 | 42 | gCpu->EnableInterrupt (gCpu);\r |
28a00297 | 43 | }\r |
44 | }\r | |
45 | \r | |
162ed594 | 46 | /**\r |
28a00297 | 47 | Raise the task priority level to the new level.\r |
48 | High level is implemented by disabling processor interrupts.\r | |
49 | \r | |
022c6d45 | 50 | @param NewTpl New task priority level\r |
28a00297 | 51 | \r |
162ed594 | 52 | @return The previous task priority level\r |
28a00297 | 53 | \r |
162ed594 | 54 | **/\r |
55 | EFI_TPL\r | |
56 | EFIAPI\r | |
57 | CoreRaiseTpl (\r | |
1436aea4 | 58 | IN EFI_TPL NewTpl\r |
162ed594 | 59 | )\r |
28a00297 | 60 | {\r |
1436aea4 | 61 | EFI_TPL OldTpl;\r |
28a00297 | 62 | \r |
63 | OldTpl = gEfiCurrentTpl;\r | |
d4848bb9 | 64 | if (OldTpl > NewTpl) {\r |
87000d77 | 65 | DEBUG ((DEBUG_ERROR, "FATAL ERROR - RaiseTpl with OldTpl(0x%x) > NewTpl(0x%x)\n", OldTpl, NewTpl));\r |
d4848bb9 SZ |
66 | ASSERT (FALSE);\r |
67 | }\r | |
1436aea4 | 68 | \r |
28a00297 | 69 | ASSERT (VALID_TPL (NewTpl));\r |
70 | \r | |
71 | //\r | |
72 | // If raising to high level, disable interrupts\r | |
73 | //\r | |
1436aea4 | 74 | if ((NewTpl >= TPL_HIGH_LEVEL) && (OldTpl < TPL_HIGH_LEVEL)) {\r |
28a00297 | 75 | CoreSetInterruptState (FALSE);\r |
76 | }\r | |
77 | \r | |
78 | //\r | |
79 | // Set the new value\r | |
80 | //\r | |
81 | gEfiCurrentTpl = NewTpl;\r | |
82 | \r | |
83 | return OldTpl;\r | |
84 | }\r | |
85 | \r | |
162ed594 | 86 | /**\r |
87 | Lowers the task priority to the previous value. If the new\r | |
88 | priority unmasks events at a higher priority, they are dispatched.\r | |
89 | \r | |
90 | @param NewTpl New, lower, task priority\r | |
91 | \r | |
92 | **/\r | |
28a00297 | 93 | VOID\r |
94 | EFIAPI\r | |
95 | CoreRestoreTpl (\r | |
1436aea4 | 96 | IN EFI_TPL NewTpl\r |
28a00297 | 97 | )\r |
28a00297 | 98 | {\r |
1436aea4 MK |
99 | EFI_TPL OldTpl;\r |
100 | EFI_TPL PendingTpl;\r | |
28a00297 | 101 | \r |
102 | OldTpl = gEfiCurrentTpl;\r | |
d4848bb9 | 103 | if (NewTpl > OldTpl) {\r |
87000d77 | 104 | DEBUG ((DEBUG_ERROR, "FATAL ERROR - RestoreTpl with NewTpl(0x%x) > OldTpl(0x%x)\n", NewTpl, OldTpl));\r |
d4848bb9 SZ |
105 | ASSERT (FALSE);\r |
106 | }\r | |
1436aea4 | 107 | \r |
28a00297 | 108 | ASSERT (VALID_TPL (NewTpl));\r |
109 | \r | |
110 | //\r | |
111 | // If lowering below HIGH_LEVEL, make sure\r | |
112 | // interrupts are enabled\r | |
113 | //\r | |
114 | \r | |
1436aea4 | 115 | if ((OldTpl >= TPL_HIGH_LEVEL) && (NewTpl < TPL_HIGH_LEVEL)) {\r |
022c6d45 | 116 | gEfiCurrentTpl = TPL_HIGH_LEVEL;\r |
28a00297 | 117 | }\r |
118 | \r | |
119 | //\r | |
120 | // Dispatch any pending events\r | |
121 | //\r | |
d9be0f66 | 122 | while (gEventPending != 0) {\r |
1436aea4 | 123 | PendingTpl = (UINTN)HighBitSet64 (gEventPending);\r |
d9be0f66 HW |
124 | if (PendingTpl <= NewTpl) {\r |
125 | break;\r | |
126 | }\r | |
127 | \r | |
128 | gEfiCurrentTpl = PendingTpl;\r | |
28a00297 | 129 | if (gEfiCurrentTpl < TPL_HIGH_LEVEL) {\r |
130 | CoreSetInterruptState (TRUE);\r | |
131 | }\r | |
1436aea4 | 132 | \r |
28a00297 | 133 | CoreDispatchEventNotifies (gEfiCurrentTpl);\r |
134 | }\r | |
135 | \r | |
136 | //\r | |
137 | // Set the new value\r | |
138 | //\r | |
139 | \r | |
140 | gEfiCurrentTpl = NewTpl;\r | |
141 | \r | |
142 | //\r | |
143 | // If lowering below HIGH_LEVEL, make sure\r | |
144 | // interrupts are enabled\r | |
145 | //\r | |
146 | if (gEfiCurrentTpl < TPL_HIGH_LEVEL) {\r | |
147 | CoreSetInterruptState (TRUE);\r | |
148 | }\r | |
28a00297 | 149 | }\r |