MdeModulePkg/UfsPassThruDxe: Fix unaligned data transfer handling

[mirror_edk2.git] / MdeModulePkg / Include / Protocol / SdMmcOverride.h

/** @file\r
  Protocol to describe overrides required to support non-standard SDHCI\r
  implementations\r
\r
  Copyright (c) 2017 - 2018, Linaro, Ltd. All rights reserved.<BR>\r
\r
  SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
#ifndef __SD_MMC_OVERRIDE_H__\r
#define __SD_MMC_OVERRIDE_H__\r
\r
#include <Protocol/SdMmcPassThru.h>\r
\r
#define EDKII_SD_MMC_OVERRIDE_PROTOCOL_GUID \\r
  { 0xeaf9e3c1, 0xc9cd, 0x46db, { 0xa5, 0xe5, 0x5a, 0x12, 0x4c, 0x83, 0x23, 0x23 } }\r
\r
#define EDKII_SD_MMC_OVERRIDE_PROTOCOL_VERSION    0x2\r
\r
typedef struct _EDKII_SD_MMC_OVERRIDE EDKII_SD_MMC_OVERRIDE;\r
\r
//\r
// Bus timing modes\r
//\r
typedef enum {\r
  SdMmcUhsSdr12,\r
  SdMmcUhsSdr25,\r
  SdMmcUhsSdr50,\r
  SdMmcUhsSdr104,\r
  SdMmcUhsDdr50,\r
  SdMmcMmcLegacy,\r
  SdMmcMmcHsSdr,\r
  SdMmcMmcHsDdr,\r
  SdMmcMmcHs200,\r
  SdMmcMmcHs400,\r
} SD_MMC_BUS_MODE;\r
\r
typedef enum {\r
  EdkiiSdMmcResetPre,\r
  EdkiiSdMmcResetPost,\r
  EdkiiSdMmcInitHostPre,\r
  EdkiiSdMmcInitHostPost,\r
  EdkiiSdMmcUhsSignaling,\r
  EdkiiSdMmcSwitchClockFreqPost,\r
} EDKII_SD_MMC_PHASE_TYPE;\r
\r
/**\r
\r
  Override function for SDHCI capability bits\r
\r
  @param[in]      ControllerHandle      The EFI_HANDLE of the controller.\r
  @param[in]      Slot                  The 0 based slot index.\r
  @param[in,out]  SdMmcHcSlotCapability The SDHCI capability structure.\r
  @param[in,out]  BaseClkFreq           The base clock frequency value that\r
                                        optionally can be updated.\r
\r
  @retval EFI_SUCCESS           The override function completed successfully.\r
  @retval EFI_NOT_FOUND         The specified controller or slot does not exist.\r
  @retval EFI_INVALID_PARAMETER SdMmcHcSlotCapability is NULL\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI * EDKII_SD_MMC_CAPABILITY) (\r
  IN      EFI_HANDLE                      ControllerHandle,\r
  IN      UINT8                           Slot,\r
  IN OUT  VOID                            *SdMmcHcSlotCapability,\r
  IN OUT  UINT32                          *BaseClkFreq\r
  );\r
\r
/**\r
\r
  Override function for SDHCI controller operations\r
\r
  @param[in]      ControllerHandle      The EFI_HANDLE of the controller.\r
  @param[in]      Slot                  The 0 based slot index.\r
  @param[in]      PhaseType             The type of operation and whether the\r
                                        hook is invoked right before (pre) or\r
                                        right after (post)\r
  @param[in,out]  PhaseData             The pointer to a phase-specific data.\r
\r
  @retval EFI_SUCCESS           The override function completed successfully.\r
  @retval EFI_NOT_FOUND         The specified controller or slot does not exist.\r
  @retval EFI_INVALID_PARAMETER PhaseType is invalid\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI * EDKII_SD_MMC_NOTIFY_PHASE) (\r
  IN      EFI_HANDLE                      ControllerHandle,\r
  IN      UINT8                           Slot,\r
  IN      EDKII_SD_MMC_PHASE_TYPE         PhaseType,\r
  IN OUT  VOID                           *PhaseData\r
  );\r
\r
struct _EDKII_SD_MMC_OVERRIDE {\r
  //\r
  // Protocol version of this implementation\r
  //\r
  UINTN                         Version;\r
  //\r
  // Callback to override SD/MMC host controller capability bits\r
  //\r
  EDKII_SD_MMC_CAPABILITY       Capability;\r
  //\r
  // Callback to invoke SD/MMC override hooks\r
  //\r
  EDKII_SD_MMC_NOTIFY_PHASE     NotifyPhase;\r
};\r
\r
extern EFI_GUID gEdkiiSdMmcOverrideProtocolGuid;\r
\r
#endif\r