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[mirror_edk2.git] / MdeModulePkg / Include / Protocol / SdMmcOverride.h
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1/** @file\r
2 Protocol to describe overrides required to support non-standard SDHCI\r
3 implementations\r
4\r
5 Copyright (c) 2017 - 2018, Linaro, Ltd. All rights reserved.<BR>\r
6\r
9d510e61 7 SPDX-License-Identifier: BSD-2-Clause-Patent\r
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8\r
9**/\r
10\r
11#ifndef __SD_MMC_OVERRIDE_H__\r
12#define __SD_MMC_OVERRIDE_H__\r
13\r
14#include <Protocol/SdMmcPassThru.h>\r
15\r
16#define EDKII_SD_MMC_OVERRIDE_PROTOCOL_GUID \\r
17 { 0xeaf9e3c1, 0xc9cd, 0x46db, { 0xa5, 0xe5, 0x5a, 0x12, 0x4c, 0x83, 0x23, 0x23 } }\r
18\r
1436aea4 19#define EDKII_SD_MMC_OVERRIDE_PROTOCOL_VERSION 0x3\r
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20\r
21typedef struct _EDKII_SD_MMC_OVERRIDE EDKII_SD_MMC_OVERRIDE;\r
22\r
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23#define EDKII_SD_MMC_BUS_WIDTH_IGNORE MAX_UINT8\r
24#define EDKII_SD_MMC_CLOCK_FREQ_IGNORE MAX_UINT32\r
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25#define EDKII_SD_MMC_DRIVER_STRENGTH_IGNORE MAX_UINT8\r
26\r
27typedef enum {\r
1436aea4 28 SdDriverStrengthTypeB = 0,\r
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29 SdDriverStrengthTypeA,\r
30 SdDriverStrengthTypeC,\r
31 SdDriverStrengthTypeD,\r
32 SdDriverStrengthIgnore = EDKII_SD_MMC_DRIVER_STRENGTH_IGNORE\r
33} SD_DRIVER_STRENGTH_TYPE;\r
34\r
35typedef enum {\r
1436aea4 36 EmmcDriverStrengthType0 = 0,\r
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37 EmmcDriverStrengthType1,\r
38 EmmcDriverStrengthType2,\r
39 EmmcDriverStrengthType3,\r
40 EmmcDriverStrengthType4,\r
41 EmmcDriverStrengthIgnore = EDKII_SD_MMC_DRIVER_STRENGTH_IGNORE\r
42} EMMC_DRIVER_STRENGTH_TYPE;\r
43\r
44typedef union {\r
45 SD_DRIVER_STRENGTH_TYPE Sd;\r
46 EMMC_DRIVER_STRENGTH_TYPE Emmc;\r
47} EDKII_SD_MMC_DRIVER_STRENGTH;\r
48\r
49typedef struct {\r
50 //\r
51 // The target width of the bus. If user tells driver to ignore it\r
52 // or specifies unsupported width driver will choose highest supported\r
53 // bus width for a given mode.\r
54 //\r
1436aea4 55 UINT8 BusWidth;\r
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56 //\r
57 // The target clock frequency of the bus in MHz. If user tells driver to ignore\r
58 // it or specifies unsupported frequency driver will choose highest supported\r
59 // clock frequency for a given mode.\r
60 //\r
1436aea4 61 UINT32 ClockFreq;\r
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62 //\r
63 // The target driver strength of the bus. If user tells driver to\r
64 // ignore it or specifies unsupported driver strength, driver will\r
65 // default to Type0 for eMMC cards and TypeB for SD cards. Driver strength\r
66 // setting is only considered if chosen bus timing supports them.\r
67 //\r
1436aea4 68 EDKII_SD_MMC_DRIVER_STRENGTH DriverStrength;\r
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69} EDKII_SD_MMC_OPERATING_PARAMETERS;\r
70\r
a4708009 71typedef enum {\r
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72 SdMmcSdDs,\r
73 SdMmcSdHs,\r
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74 SdMmcUhsSdr12,\r
75 SdMmcUhsSdr25,\r
76 SdMmcUhsSdr50,\r
a4708009 77 SdMmcUhsDdr50,\r
f56cc67f 78 SdMmcUhsSdr104,\r
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79 SdMmcMmcLegacy,\r
80 SdMmcMmcHsSdr,\r
81 SdMmcMmcHsDdr,\r
82 SdMmcMmcHs200,\r
83 SdMmcMmcHs400,\r
84} SD_MMC_BUS_MODE;\r
85\r
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86typedef enum {\r
87 EdkiiSdMmcResetPre,\r
88 EdkiiSdMmcResetPost,\r
89 EdkiiSdMmcInitHostPre,\r
90 EdkiiSdMmcInitHostPost,\r
a4708009 91 EdkiiSdMmcUhsSignaling,\r
b7b803a6 92 EdkiiSdMmcSwitchClockFreqPost,\r
f56cc67f 93 EdkiiSdMmcGetOperatingParam\r
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94} EDKII_SD_MMC_PHASE_TYPE;\r
95\r
96/**\r
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97 Override function for SDHCI capability bits\r
98\r
99 @param[in] ControllerHandle The EFI_HANDLE of the controller.\r
100 @param[in] Slot The 0 based slot index.\r
101 @param[in,out] SdMmcHcSlotCapability The SDHCI capability structure.\r
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102 @param[in,out] BaseClkFreq The base clock frequency value that\r
103 optionally can be updated.\r
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104\r
105 @retval EFI_SUCCESS The override function completed successfully.\r
106 @retval EFI_NOT_FOUND The specified controller or slot does not exist.\r
107 @retval EFI_INVALID_PARAMETER SdMmcHcSlotCapability is NULL\r
108\r
109**/\r
110typedef\r
111EFI_STATUS\r
1436aea4 112(EFIAPI *EDKII_SD_MMC_CAPABILITY)(\r
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113 IN EFI_HANDLE ControllerHandle,\r
114 IN UINT8 Slot,\r
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115 IN OUT VOID *SdMmcHcSlotCapability,\r
116 IN OUT UINT32 *BaseClkFreq\r
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117 );\r
118\r
119/**\r
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120 Override function for SDHCI controller operations\r
121\r
122 @param[in] ControllerHandle The EFI_HANDLE of the controller.\r
123 @param[in] Slot The 0 based slot index.\r
124 @param[in] PhaseType The type of operation and whether the\r
125 hook is invoked right before (pre) or\r
126 right after (post)\r
49c99534 127 @param[in,out] PhaseData The pointer to a phase-specific data.\r
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128\r
129 @retval EFI_SUCCESS The override function completed successfully.\r
130 @retval EFI_NOT_FOUND The specified controller or slot does not exist.\r
131 @retval EFI_INVALID_PARAMETER PhaseType is invalid\r
132\r
133**/\r
134typedef\r
135EFI_STATUS\r
1436aea4 136(EFIAPI *EDKII_SD_MMC_NOTIFY_PHASE)(\r
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137 IN EFI_HANDLE ControllerHandle,\r
138 IN UINT8 Slot,\r
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139 IN EDKII_SD_MMC_PHASE_TYPE PhaseType,\r
140 IN OUT VOID *PhaseData\r
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141 );\r
142\r
143struct _EDKII_SD_MMC_OVERRIDE {\r
144 //\r
145 // Protocol version of this implementation\r
146 //\r
1436aea4 147 UINTN Version;\r
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148 //\r
149 // Callback to override SD/MMC host controller capability bits\r
150 //\r
1436aea4 151 EDKII_SD_MMC_CAPABILITY Capability;\r
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152 //\r
153 // Callback to invoke SD/MMC override hooks\r
154 //\r
1436aea4 155 EDKII_SD_MMC_NOTIFY_PHASE NotifyPhase;\r
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156};\r
157\r
1436aea4 158extern EFI_GUID gEdkiiSdMmcOverrideProtocolGuid;\r
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159\r
160#endif\r