[mirror_edk2.git] / MdePkg / Include / IndustryStandard / Acpi20.h

/** @file   \r
	ACPI 2.0 definitions from the ACPI Specification, revision 2.0\r
\r
  Copyright (c) 2006 - 2008, Intel Corporation\r
  All rights reserved. This program and the accompanying materials                          \r
  are licensed and made available under the terms and conditions of the BSD License         \r
  which accompanies this distribution.  The full text of the license may be found at        \r
  http://opensource.org/licenses/bsd-license.php                                            \r
\r
  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     \r
  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             \r
**/\r
\r
#ifndef _ACPI_2_0_H_\r
#define _ACPI_2_0_H_\r
\r
#include <IndustryStandard/Acpi1_0.h>\r
\r
//\r
// Ensure proper structure formats\r
//\r
#pragma pack(1)\r
\r
///\r
/// ACPI 2.0 Generic Address Space definition\r
///\r
typedef struct {\r
  UINT8   AddressSpaceId;\r
  UINT8   RegisterBitWidth;\r
  UINT8   RegisterBitOffset;\r
  UINT8   Reserved;\r
  UINT64  Address;\r
} EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE;\r
\r
//\r
// Generic Address Space Address IDs\r
//\r
#define EFI_ACPI_2_0_SYSTEM_MEMORY              0\r
#define EFI_ACPI_2_0_SYSTEM_IO                  1\r
#define EFI_ACPI_2_0_PCI_CONFIGURATION_SPACE    2\r
#define EFI_ACPI_2_0_EMBEDDED_CONTROLLER        3\r
#define EFI_ACPI_2_0_SMBUS                      4\r
#define EFI_ACPI_2_0_FUNCTIONAL_FIXED_HARDWARE  0x7F\r
\r
//\r
// ACPI 2.0 table structures\r
//\r
\r
///\r
/// Root System Description Pointer Structure\r
///\r
typedef struct {\r
  UINT64  Signature;\r
  UINT8   Checksum;\r
  UINT8   OemId[6];\r
  UINT8   Revision;\r
  UINT32  RsdtAddress;\r
  UINT32  Length;\r
  UINT64  XsdtAddress;\r
  UINT8   ExtendedChecksum;\r
  UINT8   Reserved[3];\r
} EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER;\r
\r
///\r
/// RSD_PTR Revision (as defined in ACPI 2.0 spec.)\r
///\r
#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02\r
\r
///\r
/// Common table header, this prefaces all ACPI tables, including FACS, but\r
/// excluding the RSD PTR structure\r
///\r
typedef struct {\r
  UINT32  Signature;\r
  UINT32  Length;\r
} EFI_ACPI_2_0_COMMON_HEADER;\r
\r
//\r
// Root System Description Table\r
// No definition needed as it is a common description table header, the same with \r
// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.\r
//\r
\r
///\r
/// RSDT Revision (as defined in ACPI 2.0 spec.)\r
///\r
#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
\r
//\r
// Extended System Description Table\r
// No definition needed as it is a common description table header, the same with \r
// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.\r
//\r
\r
///\r
/// XSDT Revision (as defined in ACPI 2.0 spec.)\r
///\r
#define EFI_ACPI_2_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
\r
///\r
/// Fixed ACPI Description Table Structure (FADT)\r
///\r
typedef struct {\r
  EFI_ACPI_DESCRIPTION_HEADER             Header;\r
  UINT32                                  FirmwareCtrl;\r
  UINT32                                  Dsdt;\r
  UINT8                                   Reserved0;\r
  UINT8                                   PreferredPmProfile;\r
  UINT16                                  SciInt;\r
  UINT32                                  SmiCmd;\r
  UINT8                                   AcpiEnable;\r
  UINT8                                   AcpiDisable;\r
  UINT8                                   S4BiosReq;\r
  UINT8                                   PstateCnt;\r
  UINT32                                  Pm1aEvtBlk;\r
  UINT32                                  Pm1bEvtBlk;\r
  UINT32                                  Pm1aCntBlk;\r
  UINT32                                  Pm1bCntBlk;\r
  UINT32                                  Pm2CntBlk;\r
  UINT32                                  PmTmrBlk;\r
  UINT32                                  Gpe0Blk;\r
  UINT32                                  Gpe1Blk;\r
  UINT8                                   Pm1EvtLen;\r
  UINT8                                   Pm1CntLen;\r
  UINT8                                   Pm2CntLen;\r
  UINT8                                   PmTmrLen;\r
  UINT8                                   Gpe0BlkLen;\r
  UINT8                                   Gpe1BlkLen;\r
  UINT8                                   Gpe1Base;\r
  UINT8                                   CstCnt;\r
  UINT16                                  PLvl2Lat;\r
  UINT16                                  PLvl3Lat;\r
  UINT16                                  FlushSize;\r
  UINT16                                  FlushStride;\r
  UINT8                                   DutyOffset;\r
  UINT8                                   DutyWidth;\r
  UINT8                                   DayAlrm;\r
  UINT8                                   MonAlrm;\r
  UINT8                                   Century;\r
  UINT16                                  IaPcBootArch;\r
  UINT8                                   Reserved1;\r
  UINT32                                  Flags;\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  ResetReg;\r
  UINT8                                   ResetValue;\r
  UINT8                                   Reserved2[3];\r
  UINT64                                  XFirmwareCtrl;\r
  UINT64                                  XDsdt;\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XPm1aEvtBlk;\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XPm1bEvtBlk;\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XPm1aCntBlk;\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XPm1bCntBlk;\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XPm2CntBlk;\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XPmTmrBlk;\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XGpe0Blk;\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XGpe1Blk;\r
} EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE;\r
\r
///\r
/// FADT Version (as defined in ACPI 2.0 spec.)\r
///\r
#define EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION  0x03\r
\r
///\r
/// Fixed ACPI Description Table Boot Architecture Flags\r
/// All other bits are reserved and must be set to 0.\r
///\r
#define EFI_ACPI_2_0_LEGACY_DEVICES (1 << 0)\r
#define EFI_ACPI_2_0_8042           (1 << 1)\r
\r
//\r
// Fixed ACPI Description Table Fixed Feature Flags\r
// All other bits are reserved and must be set to 0.\r
//\r
#define EFI_ACPI_2_0_WBINVD         (1 << 0)\r
#define EFI_ACPI_2_0_WBINVD_FLUSH   (1 << 1)\r
#define EFI_ACPI_2_0_PROC_C1        (1 << 2)\r
#define EFI_ACPI_2_0_P_LVL2_UP      (1 << 3)\r
#define EFI_ACPI_2_0_PWR_BUTTON     (1 << 4)\r
#define EFI_ACPI_2_0_SLP_BUTTON     (1 << 5)\r
#define EFI_ACPI_2_0_FIX_RTC        (1 << 6)\r
#define EFI_ACPI_2_0_RTC_S4         (1 << 7)\r
#define EFI_ACPI_2_0_TMR_VAL_EXT    (1 << 8)\r
#define EFI_ACPI_2_0_DCK_CAP        (1 << 9)\r
#define EFI_ACPI_2_0_RESET_REG_SUP  (1 << 10)\r
#define EFI_ACPI_2_0_SEALED_CASE    (1 << 11)\r
#define EFI_ACPI_2_0_HEADLESS       (1 << 12)\r
#define EFI_ACPI_2_0_CPU_SW_SLP     (1 << 13)\r
\r
///\r
/// Firmware ACPI Control Structure\r
///\r
typedef struct {\r
  UINT32  Signature;\r
  UINT32  Length;\r
  UINT32  HardwareSignature;\r
  UINT32  FirmwareWakingVector;\r
  UINT32  GlobalLock;\r
  UINT32  Flags;\r
  UINT64  XFirmwareWakingVector;\r
  UINT8   Version;\r
  UINT8   Reserved[31];\r
} EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;\r
\r
///\r
/// FACS Version (as defined in ACPI 2.0 spec.)\r
///\r
#define EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION  0x01\r
\r
///\r
/// Firmware Control Structure Feature Flags\r
/// All other bits are reserved and must be set to 0.\r
///\r
#define EFI_ACPI_2_0_S4BIOS_F (1 << 0)\r
\r
///\r
/// Multiple APIC Description Table header definition.  The rest of the table\r
/// must be defined in a platform specific manner.\r
///\r
typedef struct {\r
  EFI_ACPI_DESCRIPTION_HEADER Header;\r
  UINT32                      LocalApicAddress;\r
  UINT32                      Flags;\r
} EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;\r
\r
///\r
/// MADT Revision (as defined in ACPI 2.0 spec.)\r
///\r
#define EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x01\r
\r
///\r
/// Multiple APIC Flags\r
/// All other bits are reserved and must be set to 0.\r
///\r
#define EFI_ACPI_2_0_PCAT_COMPAT  (1 << 0)\r
\r
//\r
// Multiple APIC Description Table APIC structure types\r
// All other values between 0x09 an 0xFF are reserved and\r
// will be ignored by OSPM.\r
//\r
#define EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC           0x00\r
#define EFI_ACPI_2_0_IO_APIC                        0x01\r
#define EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE      0x02\r
#define EFI_ACPI_2_0_NON_MASKABLE_INTERRUPT_SOURCE  0x03\r
#define EFI_ACPI_2_0_LOCAL_APIC_NMI                 0x04\r
#define EFI_ACPI_2_0_LOCAL_APIC_ADDRESS_OVERRIDE    0x05\r
#define EFI_ACPI_2_0_IO_SAPIC                       0x06\r
#define EFI_ACPI_2_0_PROCESSOR_LOCAL_SAPIC          0x07\r
#define EFI_ACPI_2_0_PLATFORM_INTERRUPT_SOURCES     0x08\r
\r
//\r
// APIC Structure Definitions\r
//\r
\r
///\r
/// Processor Local APIC Structure Definition\r
///\r
typedef struct {\r
  UINT8   Type;\r
  UINT8   Length;\r
  UINT8   AcpiProcessorId;\r
  UINT8   ApicId;\r
  UINT32  Flags;\r
} EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC_STRUCTURE;\r
\r
///\r
/// Local APIC Flags.  All other bits are reserved and must be 0.\r
///\r
#define EFI_ACPI_2_0_LOCAL_APIC_ENABLED (1 << 0)\r
\r
///\r
/// IO APIC Structure\r
///\r
typedef struct {\r
  UINT8   Type;\r
  UINT8   Length;\r
  UINT8   IoApicId;\r
  UINT8   Reserved;\r
  UINT32  IoApicAddress;\r
  UINT32  GlobalSystemInterruptBase;\r
} EFI_ACPI_2_0_IO_APIC_STRUCTURE;\r
\r
///\r
/// Interrupt Source Override Structure\r
///\r
typedef struct {\r
  UINT8   Type;\r
  UINT8   Length;\r
  UINT8   Bus;\r
  UINT8   Source;\r
  UINT32  GlobalSystemInterrupt;\r
  UINT16  Flags;\r
} EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;\r
\r
///\r
/// Non-Maskable Interrupt Source Structure\r
///\r
typedef struct {\r
  UINT8   Type;\r
  UINT8   Length;\r
  UINT16  Flags;\r
  UINT32  GlobalSystemInterrupt;\r
} EFI_ACPI_2_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;\r
\r
///\r
/// Local APIC NMI Structure\r
///\r
typedef struct {\r
  UINT8   Type;\r
  UINT8   Length;\r
  UINT8   AcpiProcessorId;\r
  UINT16  Flags;\r
  UINT8   LocalApicLint;\r
} EFI_ACPI_2_0_LOCAL_APIC_NMI_STRUCTURE;\r
\r
///\r
/// Local APIC Address Override Structure\r
///\r
typedef struct {\r
  UINT8   Type;\r
  UINT8   Length;\r
  UINT16  Reserved;\r
  UINT64  LocalApicAddress;\r
} EFI_ACPI_2_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;\r
\r
///\r
/// IO SAPIC Structure\r
///\r
typedef struct {\r
  UINT8   Type;\r
  UINT8   Length;\r
  UINT8   IoApicId;\r
  UINT8   Reserved;\r
  UINT32  GlobalSystemInterruptBase;\r
  UINT64  IoSapicAddress;\r
} EFI_ACPI_2_0_IO_SAPIC_STRUCTURE;\r
\r
///\r
/// Local SAPIC Structure\r
///\r
typedef struct {\r
  UINT8   Type;\r
  UINT8   Length;\r
  UINT8   AcpiProcessorId;\r
  UINT8   LocalSapicId;\r
  UINT8   LocalSapicEid;\r
  UINT8   Reserved[3];\r
  UINT32  Flags;\r
} EFI_ACPI_2_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE;\r
\r
///\r
/// Platform Interrupt Sources Structure\r
///\r
typedef struct {\r
  UINT8   Type;\r
  UINT8   Length;\r
  UINT16  Flags;\r
  UINT8   InterruptType;\r
  UINT8   ProcessorId;\r
  UINT8   ProcessorEid;\r
  UINT8   IoSapicVector;\r
  UINT32  GlobalSystemInterrupt;\r
  UINT32  Reserved;\r
} EFI_ACPI_2_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;\r
\r
///\r
/// Smart Battery Description Table (SBST)\r
///\r
typedef struct {\r
  EFI_ACPI_DESCRIPTION_HEADER Header;\r
  UINT32                      WarningEnergyLevel;\r
  UINT32                      LowEnergyLevel;\r
  UINT32                      CriticalEnergyLevel;\r
} EFI_ACPI_2_0_SMART_BATTERY_DESCRIPTION_TABLE;\r
\r
///\r
/// SBST Version (as defined in ACPI 2.0 spec.)\r
///\r
#define EFI_ACPI_2_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01\r
\r
///\r
/// Embedded Controller Boot Resources Table (ECDT)\r
/// The table is followed by a null terminated ASCII string that contains\r
/// a fully qualified reference to the name space object.\r
///\r
typedef struct {\r
  EFI_ACPI_DESCRIPTION_HEADER             Header;\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  EcControl;\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  EcData;\r
  UINT32                                  Uid;\r
  UINT8                                   GpeBit;\r
} EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;\r
\r
///\r
/// ECDT Version (as defined in ACPI 2.0 spec.)\r
///\r
#define EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION  0x01\r
\r
//\r
// Known table signatures\r
//\r
\r
///\r
/// "RSD PTR " Root System Description Pointer\r
///\r
#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE  0x2052545020445352\r
\r
///\r
/// "SPIC" Multiple SAPIC Description Table\r
///\r
/// BUGBUG: Don't know where this came from except SR870BN4 uses it.\r
/// #define EFI_ACPI_2_0_MULTIPLE_SAPIC_DESCRIPTION_TABLE_SIGNATURE 0x43495053\r
///\r
#define EFI_ACPI_2_0_MULTIPLE_SAPIC_DESCRIPTION_TABLE_SIGNATURE 0x43495041\r
\r
///\r
/// "BOOT" MS Simple Boot Spec\r
///\r
#define EFI_ACPI_2_0_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE 0x544F4F42\r
\r
///\r
/// "DBGP" MS Bebug Port Spec\r
///\r
#define EFI_ACPI_2_0_DEBUG_PORT_TABLE_SIGNATURE 0x50474244\r
\r
///\r
/// "DSDT" Differentiated System Description Table\r
///\r
#define EFI_ACPI_2_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  0x54445344\r
\r
///\r
/// "ECDT" Embedded Controller Boot Resources Table\r
///\r
#define EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE 0x54444345\r
\r
///\r
/// "ETDT" Event Timer Description Table\r
///\r
#define EFI_ACPI_2_0_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE  0x54445445\r
\r
///\r
/// "FACS" Firmware ACPI Control Structure\r
///\r
#define EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE  0x53434146\r
\r
///\r
/// "FACP" Fixed ACPI Description Table\r
///\r
#define EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE 0x50434146\r
\r
///\r
/// "APIC" Multiple APIC Description Table\r
///\r
#define EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE  0x43495041\r
\r
///\r
/// "PSDT" Persistent System Description Table\r
///\r
#define EFI_ACPI_2_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  0x54445350\r
\r
///\r
/// "RSDT" Root System Description Table\r
///\r
#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  0x54445352\r
\r
///\r
/// "SBST" Smart Battery Specification Table\r
///\r
#define EFI_ACPI_2_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE  0x54534253\r
\r
///\r
/// "SLIT" System Locality Information Table\r
///\r
#define EFI_ACPI_2_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE  0x54494C53\r
\r
///\r
/// "SPCR" Serial Port Concole Redirection Table\r
///\r
#define EFI_ACPI_2_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE  0x52435053\r
\r
///\r
/// "SRAT" Static Resource Affinity Table\r
///\r
#define EFI_ACPI_2_0_STATIC_RESOURCE_AFFINITY_TABLE_SIGNATURE 0x54415253\r
\r
///\r
/// "SSDT" Secondary System Description Table\r
///\r
#define EFI_ACPI_2_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445353\r
\r
///\r
/// "SPMI" Server Platform Management Interface Table\r
///\r
#define EFI_ACPI_2_0_SERVER_PLATFORM_MANAGEMENT_INTERFACE_SIGNATURE 0x494D5053\r
\r
///\r
/// "XSDT" Extended System Description Table\r
///\r
#define EFI_ACPI_2_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  0x54445358\r
\r
///\r
/// "MCFG" Static Resource Affinity Table\r
///\r
#define EFI_ACPI_2_0_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_SIGNATURE 0x4746434D\r
\r
#pragma pack()\r
\r
#endif\r
Commit	Line	Data
42eedea9	1	/** @file \r
568eb0cb	2	ACPI 2.0 definitions from the ACPI Specification, revision 2.0\r
568eb0cb	3	\r
2b1cf49a	4	Copyright (c) 2006 - 2008, Intel Corporation\r
568eb0cb	5	All rights reserved. This program and the accompanying materials \r
	6	are licensed and made available under the terms and conditions of the BSD License \r
	7	which accompanies this distribution. The full text of the license may be found at \r
	8	http://opensource.org/licenses/bsd-license.php \r
	9	\r
	10	THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
	11	WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
	12	**/\r
	13	\r
	14	#ifndef _ACPI_2_0_H_\r
	15	#define _ACPI_2_0_H_\r
	16	\r
ecc40942	17	#include <IndustryStandard/Acpi1_0.h>\r
568eb0cb	18	\r
	19	//\r
	20	// Ensure proper structure formats\r
	21	//\r
	22	#pragma pack(1)\r
568eb0cb	23	\r
1bc5d021	24	///\r
	25	/// ACPI 2.0 Generic Address Space definition\r
	26	///\r
568eb0cb	27	typedef struct {\r
	28	UINT8 AddressSpaceId;\r
	29	UINT8 RegisterBitWidth;\r
	30	UINT8 RegisterBitOffset;\r
	31	UINT8 Reserved;\r
	32	UINT64 Address;\r
	33	} EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE;\r
	34	\r
	35	//\r
	36	// Generic Address Space Address IDs\r
	37	//\r
	38	#define EFI_ACPI_2_0_SYSTEM_MEMORY 0\r
	39	#define EFI_ACPI_2_0_SYSTEM_IO 1\r
	40	#define EFI_ACPI_2_0_PCI_CONFIGURATION_SPACE 2\r
	41	#define EFI_ACPI_2_0_EMBEDDED_CONTROLLER 3\r
	42	#define EFI_ACPI_2_0_SMBUS 4\r
	43	#define EFI_ACPI_2_0_FUNCTIONAL_FIXED_HARDWARE 0x7F\r
	44	\r
	45	//\r
	46	// ACPI 2.0 table structures\r
	47	//\r
1bc5d021	48	\r
	49	///\r
	50	/// Root System Description Pointer Structure\r
	51	///\r
568eb0cb	52	typedef struct {\r
	53	UINT64 Signature;\r
	54	UINT8 Checksum;\r
	55	UINT8 OemId[6];\r
	56	UINT8 Revision;\r
	57	UINT32 RsdtAddress;\r
	58	UINT32 Length;\r
	59	UINT64 XsdtAddress;\r
	60	UINT8 ExtendedChecksum;\r
	61	UINT8 Reserved[3];\r
	62	} EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER;\r
	63	\r
1bc5d021	64	///\r
	65	/// RSD_PTR Revision (as defined in ACPI 2.0 spec.)\r
	66	///\r
568eb0cb	67	#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02\r
568eb0cb	68	\r
1bc5d021	69	///\r
	70	/// Common table header, this prefaces all ACPI tables, including FACS, but\r
	71	/// excluding the RSD PTR structure\r
	72	///\r
568eb0cb	73	typedef struct {\r
	74	UINT32 Signature;\r
	75	UINT32 Length;\r
	76	} EFI_ACPI_2_0_COMMON_HEADER;\r
	77	\r
	78	//\r
	79	// Root System Description Table\r
2b1cf49a	80	// No definition needed as it is a common description table header, the same with \r
2b1cf49a	81	// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.\r
568eb0cb	82	//\r
1bc5d021	83	\r
	84	///\r
	85	/// RSDT Revision (as defined in ACPI 2.0 spec.)\r
	86	///\r
568eb0cb	87	#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
	88	\r
	89	//\r
	90	// Extended System Description Table\r
2b1cf49a	91	// No definition needed as it is a common description table header, the same with \r
2b1cf49a	92	// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.\r
568eb0cb	93	//\r
1bc5d021	94	\r
	95	///\r
	96	/// XSDT Revision (as defined in ACPI 2.0 spec.)\r
	97	///\r
568eb0cb	98	#define EFI_ACPI_2_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
568eb0cb	99	\r
1bc5d021	100	///\r
	101	/// Fixed ACPI Description Table Structure (FADT)\r
	102	///\r
568eb0cb	103	typedef struct {\r
	104	EFI_ACPI_DESCRIPTION_HEADER Header;\r
	105	UINT32 FirmwareCtrl;\r
	106	UINT32 Dsdt;\r
	107	UINT8 Reserved0;\r
	108	UINT8 PreferredPmProfile;\r
	109	UINT16 SciInt;\r
	110	UINT32 SmiCmd;\r
	111	UINT8 AcpiEnable;\r
	112	UINT8 AcpiDisable;\r
	113	UINT8 S4BiosReq;\r
	114	UINT8 PstateCnt;\r
	115	UINT32 Pm1aEvtBlk;\r
	116	UINT32 Pm1bEvtBlk;\r
	117	UINT32 Pm1aCntBlk;\r
	118	UINT32 Pm1bCntBlk;\r
	119	UINT32 Pm2CntBlk;\r
	120	UINT32 PmTmrBlk;\r
	121	UINT32 Gpe0Blk;\r
	122	UINT32 Gpe1Blk;\r
	123	UINT8 Pm1EvtLen;\r
	124	UINT8 Pm1CntLen;\r
	125	UINT8 Pm2CntLen;\r
	126	UINT8 PmTmrLen;\r
	127	UINT8 Gpe0BlkLen;\r
	128	UINT8 Gpe1BlkLen;\r
	129	UINT8 Gpe1Base;\r
	130	UINT8 CstCnt;\r
	131	UINT16 PLvl2Lat;\r
	132	UINT16 PLvl3Lat;\r
	133	UINT16 FlushSize;\r
	134	UINT16 FlushStride;\r
	135	UINT8 DutyOffset;\r
	136	UINT8 DutyWidth;\r
	137	UINT8 DayAlrm;\r
	138	UINT8 MonAlrm;\r
	139	UINT8 Century;\r
	140	UINT16 IaPcBootArch;\r
	141	UINT8 Reserved1;\r
	142	UINT32 Flags;\r
	143	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE ResetReg;\r
	144	UINT8 ResetValue;\r
	145	UINT8 Reserved2[3];\r
	146	UINT64 XFirmwareCtrl;\r
	147	UINT64 XDsdt;\r
	148	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;\r
	149	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;\r
	150	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;\r
	151	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;\r
	152	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;\r
	153	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;\r
	154	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;\r
	155	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;\r
	156	} EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE;\r
	157	\r
1bc5d021	158	///\r
	159	/// FADT Version (as defined in ACPI 2.0 spec.)\r
	160	///\r
568eb0cb	161	#define EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x03\r
568eb0cb	162	\r
1bc5d021	163	///\r
	164	/// Fixed ACPI Description Table Boot Architecture Flags\r
	165	/// All other bits are reserved and must be set to 0.\r
	166	///\r
568eb0cb	167	#define EFI_ACPI_2_0_LEGACY_DEVICES (1 << 0)\r
	168	#define EFI_ACPI_2_0_8042 (1 << 1)\r
	169	\r
	170	//\r
	171	// Fixed ACPI Description Table Fixed Feature Flags\r
	172	// All other bits are reserved and must be set to 0.\r
	173	//\r
	174	#define EFI_ACPI_2_0_WBINVD (1 << 0)\r
	175	#define EFI_ACPI_2_0_WBINVD_FLUSH (1 << 1)\r
	176	#define EFI_ACPI_2_0_PROC_C1 (1 << 2)\r
	177	#define EFI_ACPI_2_0_P_LVL2_UP (1 << 3)\r
	178	#define EFI_ACPI_2_0_PWR_BUTTON (1 << 4)\r
	179	#define EFI_ACPI_2_0_SLP_BUTTON (1 << 5)\r
	180	#define EFI_ACPI_2_0_FIX_RTC (1 << 6)\r
	181	#define EFI_ACPI_2_0_RTC_S4 (1 << 7)\r
	182	#define EFI_ACPI_2_0_TMR_VAL_EXT (1 << 8)\r
	183	#define EFI_ACPI_2_0_DCK_CAP (1 << 9)\r
	184	#define EFI_ACPI_2_0_RESET_REG_SUP (1 << 10)\r
	185	#define EFI_ACPI_2_0_SEALED_CASE (1 << 11)\r
	186	#define EFI_ACPI_2_0_HEADLESS (1 << 12)\r
	187	#define EFI_ACPI_2_0_CPU_SW_SLP (1 << 13)\r
	188	\r
1bc5d021	189	///\r
	190	/// Firmware ACPI Control Structure\r
	191	///\r
568eb0cb	192	typedef struct {\r
	193	UINT32 Signature;\r
	194	UINT32 Length;\r
	195	UINT32 HardwareSignature;\r
	196	UINT32 FirmwareWakingVector;\r
	197	UINT32 GlobalLock;\r
	198	UINT32 Flags;\r
	199	UINT64 XFirmwareWakingVector;\r
	200	UINT8 Version;\r
	201	UINT8 Reserved[31];\r
	202	} EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;\r
	203	\r
1bc5d021	204	///\r
	205	/// FACS Version (as defined in ACPI 2.0 spec.)\r
	206	///\r
568eb0cb	207	#define EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x01\r
568eb0cb	208	\r
1bc5d021	209	///\r
	210	/// Firmware Control Structure Feature Flags\r
	211	/// All other bits are reserved and must be set to 0.\r
	212	///\r
568eb0cb	213	#define EFI_ACPI_2_0_S4BIOS_F (1 << 0)\r
568eb0cb	214	\r
1bc5d021	215	///\r
	216	/// Multiple APIC Description Table header definition. The rest of the table\r
	217	/// must be defined in a platform specific manner.\r
	218	///\r
568eb0cb	219	typedef struct {\r
	220	EFI_ACPI_DESCRIPTION_HEADER Header;\r
	221	UINT32 LocalApicAddress;\r
	222	UINT32 Flags;\r
	223	} EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;\r
	224	\r
1bc5d021	225	///\r
	226	/// MADT Revision (as defined in ACPI 2.0 spec.)\r
	227	///\r
568eb0cb	228	#define EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x01\r
568eb0cb	229	\r
1bc5d021	230	///\r
	231	/// Multiple APIC Flags\r
	232	/// All other bits are reserved and must be set to 0.\r
	233	///\r
568eb0cb	234	#define EFI_ACPI_2_0_PCAT_COMPAT (1 << 0)\r
	235	\r
	236	//\r
	237	// Multiple APIC Description Table APIC structure types\r
	238	// All other values between 0x09 an 0xFF are reserved and\r
	239	// will be ignored by OSPM.\r
	240	//\r
	241	#define EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC 0x00\r
	242	#define EFI_ACPI_2_0_IO_APIC 0x01\r
	243	#define EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE 0x02\r
	244	#define EFI_ACPI_2_0_NON_MASKABLE_INTERRUPT_SOURCE 0x03\r
	245	#define EFI_ACPI_2_0_LOCAL_APIC_NMI 0x04\r
	246	#define EFI_ACPI_2_0_LOCAL_APIC_ADDRESS_OVERRIDE 0x05\r
	247	#define EFI_ACPI_2_0_IO_SAPIC 0x06\r
	248	#define EFI_ACPI_2_0_PROCESSOR_LOCAL_SAPIC 0x07\r
	249	#define EFI_ACPI_2_0_PLATFORM_INTERRUPT_SOURCES 0x08\r
	250	\r
	251	//\r
	252	// APIC Structure Definitions\r
	253	//\r
1bc5d021	254	\r
	255	///\r
	256	/// Processor Local APIC Structure Definition\r
	257	///\r
568eb0cb	258	typedef struct {\r
	259	UINT8 Type;\r
	260	UINT8 Length;\r
	261	UINT8 AcpiProcessorId;\r
	262	UINT8 ApicId;\r
	263	UINT32 Flags;\r
	264	} EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC_STRUCTURE;\r
	265	\r
1bc5d021	266	///\r
	267	/// Local APIC Flags. All other bits are reserved and must be 0.\r
	268	///\r
568eb0cb	269	#define EFI_ACPI_2_0_LOCAL_APIC_ENABLED (1 << 0)\r
568eb0cb	270	\r
1bc5d021	271	///\r
	272	/// IO APIC Structure\r
	273	///\r
568eb0cb	274	typedef struct {\r
	275	UINT8 Type;\r
	276	UINT8 Length;\r
	277	UINT8 IoApicId;\r
	278	UINT8 Reserved;\r
	279	UINT32 IoApicAddress;\r
	280	UINT32 GlobalSystemInterruptBase;\r
	281	} EFI_ACPI_2_0_IO_APIC_STRUCTURE;\r
	282	\r
1bc5d021	283	///\r
	284	/// Interrupt Source Override Structure\r
	285	///\r
568eb0cb	286	typedef struct {\r
	287	UINT8 Type;\r
	288	UINT8 Length;\r
	289	UINT8 Bus;\r
	290	UINT8 Source;\r
	291	UINT32 GlobalSystemInterrupt;\r
	292	UINT16 Flags;\r
	293	} EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;\r
	294	\r
1bc5d021	295	///\r
	296	/// Non-Maskable Interrupt Source Structure\r
	297	///\r
568eb0cb	298	typedef struct {\r
	299	UINT8 Type;\r
	300	UINT8 Length;\r
	301	UINT16 Flags;\r
	302	UINT32 GlobalSystemInterrupt;\r
	303	} EFI_ACPI_2_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;\r
	304	\r
1bc5d021	305	///\r
	306	/// Local APIC NMI Structure\r
	307	///\r
568eb0cb	308	typedef struct {\r
	309	UINT8 Type;\r
	310	UINT8 Length;\r
	311	UINT8 AcpiProcessorId;\r
	312	UINT16 Flags;\r
	313	UINT8 LocalApicLint;\r
	314	} EFI_ACPI_2_0_LOCAL_APIC_NMI_STRUCTURE;\r
	315	\r
1bc5d021	316	///\r
	317	/// Local APIC Address Override Structure\r
	318	///\r
568eb0cb	319	typedef struct {\r
	320	UINT8 Type;\r
	321	UINT8 Length;\r
	322	UINT16 Reserved;\r
	323	UINT64 LocalApicAddress;\r
	324	} EFI_ACPI_2_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;\r
	325	\r
1bc5d021	326	///\r
	327	/// IO SAPIC Structure\r
	328	///\r
568eb0cb	329	typedef struct {\r
	330	UINT8 Type;\r
	331	UINT8 Length;\r
	332	UINT8 IoApicId;\r
	333	UINT8 Reserved;\r
	334	UINT32 GlobalSystemInterruptBase;\r
	335	UINT64 IoSapicAddress;\r
	336	} EFI_ACPI_2_0_IO_SAPIC_STRUCTURE;\r
	337	\r
1bc5d021	338	///\r
	339	/// Local SAPIC Structure\r
	340	///\r
568eb0cb	341	typedef struct {\r
	342	UINT8 Type;\r
	343	UINT8 Length;\r
	344	UINT8 AcpiProcessorId;\r
	345	UINT8 LocalSapicId;\r
	346	UINT8 LocalSapicEid;\r
	347	UINT8 Reserved[3];\r
	348	UINT32 Flags;\r
	349	} EFI_ACPI_2_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE;\r
	350	\r
1bc5d021	351	///\r
	352	/// Platform Interrupt Sources Structure\r
	353	///\r
568eb0cb	354	typedef struct {\r
	355	UINT8 Type;\r
	356	UINT8 Length;\r
	357	UINT16 Flags;\r
	358	UINT8 InterruptType;\r
	359	UINT8 ProcessorId;\r
	360	UINT8 ProcessorEid;\r
	361	UINT8 IoSapicVector;\r
	362	UINT32 GlobalSystemInterrupt;\r
	363	UINT32 Reserved;\r
	364	} EFI_ACPI_2_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;\r
	365	\r
1bc5d021	366	///\r
	367	/// Smart Battery Description Table (SBST)\r
	368	///\r
568eb0cb	369	typedef struct {\r
	370	EFI_ACPI_DESCRIPTION_HEADER Header;\r
	371	UINT32 WarningEnergyLevel;\r
	372	UINT32 LowEnergyLevel;\r
	373	UINT32 CriticalEnergyLevel;\r
	374	} EFI_ACPI_2_0_SMART_BATTERY_DESCRIPTION_TABLE;\r
	375	\r
1bc5d021	376	///\r
	377	/// SBST Version (as defined in ACPI 2.0 spec.)\r
	378	///\r
568eb0cb	379	#define EFI_ACPI_2_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01\r
568eb0cb	380	\r
1bc5d021	381	///\r
	382	/// Embedded Controller Boot Resources Table (ECDT)\r
	383	/// The table is followed by a null terminated ASCII string that contains\r
	384	/// a fully qualified reference to the name space object.\r
	385	///\r
568eb0cb	386	typedef struct {\r
	387	EFI_ACPI_DESCRIPTION_HEADER Header;\r
	388	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE EcControl;\r
	389	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE EcData;\r
	390	UINT32 Uid;\r
	391	UINT8 GpeBit;\r
	392	} EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;\r
	393	\r
1bc5d021	394	///\r
	395	/// ECDT Version (as defined in ACPI 2.0 spec.)\r
	396	///\r
568eb0cb	397	#define EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01\r
	398	\r
	399	//\r
	400	// Known table signatures\r
	401	//\r
1bc5d021	402	\r
	403	///\r
	404	/// "RSD PTR " Root System Description Pointer\r
	405	///\r
568eb0cb	406	#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE 0x2052545020445352\r
568eb0cb	407	\r
1bc5d021	408	///\r
	409	/// "SPIC" Multiple SAPIC Description Table\r
	410	///\r
	411	/// BUGBUG: Don't know where this came from except SR870BN4 uses it.\r
	412	/// #define EFI_ACPI_2_0_MULTIPLE_SAPIC_DESCRIPTION_TABLE_SIGNATURE 0x43495053\r
	413	///\r
568eb0cb	414	#define EFI_ACPI_2_0_MULTIPLE_SAPIC_DESCRIPTION_TABLE_SIGNATURE 0x43495041\r
568eb0cb	415	\r
1bc5d021	416	///\r
	417	/// "BOOT" MS Simple Boot Spec\r
	418	///\r
568eb0cb	419	#define EFI_ACPI_2_0_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE 0x544F4F42\r
568eb0cb	420	\r
1bc5d021	421	///\r
	422	/// "DBGP" MS Bebug Port Spec\r
	423	///\r
568eb0cb	424	#define EFI_ACPI_2_0_DEBUG_PORT_TABLE_SIGNATURE 0x50474244\r
568eb0cb	425	\r
1bc5d021	426	///\r
	427	/// "DSDT" Differentiated System Description Table\r
	428	///\r
568eb0cb	429	#define EFI_ACPI_2_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445344\r
568eb0cb	430	\r
1bc5d021	431	///\r
	432	/// "ECDT" Embedded Controller Boot Resources Table\r
	433	///\r
568eb0cb	434	#define EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE 0x54444345\r
568eb0cb	435	\r
1bc5d021	436	///\r
	437	/// "ETDT" Event Timer Description Table\r
	438	///\r
568eb0cb	439	#define EFI_ACPI_2_0_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE 0x54445445\r
568eb0cb	440	\r
1bc5d021	441	///\r
	442	/// "FACS" Firmware ACPI Control Structure\r
	443	///\r
568eb0cb	444	#define EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE 0x53434146\r
568eb0cb	445	\r
1bc5d021	446	///\r
	447	/// "FACP" Fixed ACPI Description Table\r
	448	///\r
568eb0cb	449	#define EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE 0x50434146\r
568eb0cb	450	\r
1bc5d021	451	///\r
	452	/// "APIC" Multiple APIC Description Table\r
	453	///\r
568eb0cb	454	#define EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE 0x43495041\r
568eb0cb	455	\r
1bc5d021	456	///\r
	457	/// "PSDT" Persistent System Description Table\r
	458	///\r
568eb0cb	459	#define EFI_ACPI_2_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445350\r
568eb0cb	460	\r
1bc5d021	461	///\r
	462	/// "RSDT" Root System Description Table\r
	463	///\r
568eb0cb	464	#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445352\r
568eb0cb	465	\r
1bc5d021	466	///\r
	467	/// "SBST" Smart Battery Specification Table\r
	468	///\r
568eb0cb	469	#define EFI_ACPI_2_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE 0x54534253\r
568eb0cb	470	\r
1bc5d021	471	///\r
	472	/// "SLIT" System Locality Information Table\r
	473	///\r
568eb0cb	474	#define EFI_ACPI_2_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE 0x54494C53\r
568eb0cb	475	\r
1bc5d021	476	///\r
	477	/// "SPCR" Serial Port Concole Redirection Table\r
	478	///\r
568eb0cb	479	#define EFI_ACPI_2_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE 0x52435053\r
568eb0cb	480	\r
1bc5d021	481	///\r
	482	/// "SRAT" Static Resource Affinity Table\r
	483	///\r
568eb0cb	484	#define EFI_ACPI_2_0_STATIC_RESOURCE_AFFINITY_TABLE_SIGNATURE 0x54415253\r
568eb0cb	485	\r
1bc5d021	486	///\r
	487	/// "SSDT" Secondary System Description Table\r
	488	///\r
568eb0cb	489	#define EFI_ACPI_2_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445353\r
568eb0cb	490	\r
1bc5d021	491	///\r
	492	/// "SPMI" Server Platform Management Interface Table\r
	493	///\r
568eb0cb	494	#define EFI_ACPI_2_0_SERVER_PLATFORM_MANAGEMENT_INTERFACE_SIGNATURE 0x494D5053\r
568eb0cb	495	\r
1bc5d021	496	///\r
	497	/// "XSDT" Extended System Description Table\r
	498	///\r
568eb0cb	499	#define EFI_ACPI_2_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445358\r
568eb0cb	500	\r
1bc5d021	501	///\r
	502	/// "MCFG" Static Resource Affinity Table\r
	503	///\r
3431f363	504	#define EFI_ACPI_2_0_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_SIGNATURE 0x4746434D\r
3431f363	505	\r
568eb0cb	506	#pragma pack()\r
	507	\r
	508	#endif\r