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1.Measure ACPI table data comes from flash event type EV_POST_CODE ACPI DATA to PCR[0]
[mirror_edk2.git] / MdePkg / Include / IndustryStandard / Acpi50.h
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4a18b92c 1/** @file \r
978929a9 2 ACPI 5.0 definitions from the ACPI Specification Revision 5.0 December 6, 2011\r
4a18b92c 3\r
83218902 4 Copyright (c) 2011 - 2012, Intel Corporation. All rights reserved.<BR>\r
4a18b92c
JY		 5 This program and the accompanying materials \r
6 are licensed and made available under the terms and conditions of the BSD License \r
7 which accompanies this distribution. The full text of the license may be found at \r
8 http://opensource.org/licenses/bsd-license.php \r
9\r
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
12**/\r
13\r
14#ifndef _ACPI_5_0_H_\r
15#define _ACPI_5_0_H_\r
16\r
17#include <IndustryStandard/Acpi40.h>\r
18\r
19//\r
20// Define for Desriptor\r
21//\r
22#define ACPI_SMALL_FIXED_DMA_DESCRIPTOR_NAME 0x0A\r
23#define ACPI_LARGE_GPIO_CONNECTION_DESCRIPTOR_NAME 0x0C\r
24#define ACPI_LARGE_GENERIC_SERIAL_BUS_CONNECTION_DESCRIPTOR_NAME 0x0E\r
25\r
26#define ACPI_FIXED_DMA_DESCRIPTOR 0x55\r
27#define ACPI_GPIO_CONNECTION_DESCRIPTOR 0x8C\r
28#define ACPI_GENERIC_SERIAL_BUS_CONNECTION_DESCRIPTOR 0x8E\r
29\r
30#pragma pack(1)\r
31\r
32///\r
33/// Generic DMA Descriptor.\r
34///\r
35typedef PACKED struct {\r
36 ACPI_SMALL_RESOURCE_HEADER Header;\r
37 UINT16 DmaRequestLine;\r
38 UINT16 DmaChannel;\r
39 UINT8 DmaTransferWidth;\r
40} EFI_ACPI_FIXED_DMA_DESCRIPTOR;\r
41\r
42///\r
43/// GPIO Connection Descriptor\r
44///\r
45typedef PACKED struct {\r
46 ACPI_LARGE_RESOURCE_HEADER Header;\r
47 UINT8 RevisionId;\r
48 UINT8 ConnectionType;\r
49 UINT16 GeneralFlags;\r
50 UINT16 InterruptFlags;\r
51 UINT8 PinConfiguration;\r
52 UINT16 OutputDriveStrength;\r
53 UINT16 DebounceTimeout;\r
54 UINT16 PinTableOffset;\r
55 UINT8 ResourceSourceIndex;\r
56 UINT16 ResourceSourceNameOffset;\r
57 UINT16 VendorDataOffset;\r
58 UINT16 VendorDataLength;\r
59} EFI_ACPI_GPIO_CONNECTION_DESCRIPTOR;\r
60\r
61#define EFI_ACPI_GPIO_CONNECTION_TYPE_INTERRUPT 0x0\r
62#define EFI_ACPI_GPIO_CONNECTION_TYPE_IO 0x1\r
63\r
64///\r
65/// Serial Bus Resource Descriptor (Generic)\r
66///\r
67typedef PACKED struct {\r
68 ACPI_LARGE_RESOURCE_HEADER Header;\r
69 UINT8 RevisionId;\r
70 UINT8 ResourceSourceIndex;\r
71 UINT8 SerialBusType;\r
72 UINT8 GeneralFlags;\r
73 UINT16 TypeSpecificFlags;\r
74 UINT8 TypeSpecificRevisionId;\r
75 UINT16 TypeDataLength;\r
76// Type specific data\r
77} EFI_ACPI_SERIAL_BUS_RESOURCE_DESCRIPTOR;\r
78\r
79#define EFI_ACPI_SERIAL_BUS_RESOURCE_TYPE_I2C 0x1\r
80#define EFI_ACPI_SERIAL_BUS_RESOURCE_TYPE_SPI 0x2\r
81#define EFI_ACPI_SERIAL_BUS_RESOURCE_TYPE_UART 0x3\r
82\r
83///\r
84/// Serial Bus Resource Descriptor (I2C)\r
85///\r
86typedef PACKED struct {\r
87 ACPI_LARGE_RESOURCE_HEADER Header;\r
88 UINT8 RevisionId;\r
89 UINT8 ResourceSourceIndex;\r
90 UINT8 SerialBusType;\r
91 UINT8 GeneralFlags;\r
92 UINT16 TypeSpecificFlags;\r
93 UINT8 TypeSpecificRevisionId;\r
94 UINT16 TypeDataLength;\r
95 UINT32 ConnectionSpeed;\r
96 UINT16 SlaveAddress;\r
97} EFI_ACPI_SERIAL_BUS_RESOURCE_I2C_DESCRIPTOR;\r
98\r
99///\r
100/// Serial Bus Resource Descriptor (SPI)\r
101///\r
102typedef PACKED struct {\r
103 ACPI_LARGE_RESOURCE_HEADER Header;\r
104 UINT8 RevisionId;\r
105 UINT8 ResourceSourceIndex;\r
106 UINT8 SerialBusType;\r
107 UINT8 GeneralFlags;\r
108 UINT16 TypeSpecificFlags;\r
109 UINT8 TypeSpecificRevisionId;\r
110 UINT16 TypeDataLength;\r
111 UINT32 ConnectionSpeed;\r
112 UINT8 DataBitLength;\r
113 UINT8 Phase;\r
114 UINT8 Polarity;\r
115 UINT16 DeviceSelection;\r
116} EFI_ACPI_SERIAL_BUS_RESOURCE_SPI_DESCRIPTOR;\r
117\r
118///\r
119/// Serial Bus Resource Descriptor (UART)\r
120///\r
121typedef PACKED struct {\r
122 ACPI_LARGE_RESOURCE_HEADER Header;\r
123 UINT8 RevisionId;\r
124 UINT8 ResourceSourceIndex;\r
125 UINT8 SerialBusType;\r
126 UINT8 GeneralFlags;\r
127 UINT16 TypeSpecificFlags;\r
128 UINT8 TypeSpecificRevisionId;\r
129 UINT16 TypeDataLength;\r
130 UINT32 DefaultBaudRate;\r
131 UINT16 RxFIFO;\r
132 UINT16 TxFIFO;\r
133 UINT8 Parity;\r
134 UINT8 SerialLinesEnabled;\r
135} EFI_ACPI_SERIAL_BUS_RESOURCE_UART_DESCRIPTOR;\r
136\r
137#pragma pack()\r
138\r
139//\r
140// Ensure proper structure formats\r
141//\r
142#pragma pack(1)\r
143\r
144///\r
145/// ACPI 5.0 Generic Address Space definition\r
146///\r
147typedef struct {\r
148 UINT8 AddressSpaceId;\r
149 UINT8 RegisterBitWidth;\r
150 UINT8 RegisterBitOffset;\r
151 UINT8 AccessSize;\r
152 UINT64 Address;\r
153} EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE;\r
154\r
155//\r
156// Generic Address Space Address IDs\r
157//\r
158#define EFI_ACPI_5_0_SYSTEM_MEMORY 0\r
159#define EFI_ACPI_5_0_SYSTEM_IO 1\r
160#define EFI_ACPI_5_0_PCI_CONFIGURATION_SPACE 2\r
161#define EFI_ACPI_5_0_EMBEDDED_CONTROLLER 3\r
162#define EFI_ACPI_5_0_SMBUS 4\r
163#define EFI_ACPI_5_0_FUNCTIONAL_FIXED_HARDWARE 0x7F\r
164\r
165//\r
166// Generic Address Space Access Sizes\r
167//\r
168#define EFI_ACPI_5_0_UNDEFINED 0\r
169#define EFI_ACPI_5_0_BYTE 1\r
170#define EFI_ACPI_5_0_WORD 2\r
171#define EFI_ACPI_5_0_DWORD 3\r
172#define EFI_ACPI_5_0_QWORD 4\r
173\r
174//\r
175// ACPI 5.0 table structures\r
176//\r
177\r
178///\r
179/// Root System Description Pointer Structure\r
180///\r
181typedef struct {\r
182 UINT64 Signature;\r
183 UINT8 Checksum;\r
184 UINT8 OemId[6];\r
185 UINT8 Revision;\r
186 UINT32 RsdtAddress;\r
187 UINT32 Length;\r
188 UINT64 XsdtAddress;\r
189 UINT8 ExtendedChecksum;\r
190 UINT8 Reserved[3];\r
191} EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_POINTER;\r
192\r
193///\r
194/// RSD_PTR Revision (as defined in ACPI 5.0 spec.)\r
195///\r
196#define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 5.0) says current value is 2\r
197\r
198///\r
199/// Common table header, this prefaces all ACPI tables, including FACS, but\r
200/// excluding the RSD PTR structure\r
201///\r
202typedef struct {\r
203 UINT32 Signature;\r
204 UINT32 Length;\r
205} EFI_ACPI_5_0_COMMON_HEADER;\r
206\r
207//\r
208// Root System Description Table\r
209// No definition needed as it is a common description table header, the same with \r
210// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.\r
211//\r
212\r
213///\r
214/// RSDT Revision (as defined in ACPI 5.0 spec.)\r
215///\r
216#define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
217\r
218//\r
219// Extended System Description Table\r
220// No definition needed as it is a common description table header, the same with \r
221// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.\r
222//\r
223\r
224///\r
225/// XSDT Revision (as defined in ACPI 5.0 spec.)\r
226///\r
227#define EFI_ACPI_5_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
228\r
229///\r
230/// Fixed ACPI Description Table Structure (FADT)\r
231///\r
232typedef struct {\r
233 EFI_ACPI_DESCRIPTION_HEADER Header;\r
234 UINT32 FirmwareCtrl;\r
235 UINT32 Dsdt;\r
236 UINT8 Reserved0;\r
237 UINT8 PreferredPmProfile;\r
238 UINT16 SciInt;\r
239 UINT32 SmiCmd;\r
240 UINT8 AcpiEnable;\r
241 UINT8 AcpiDisable;\r
242 UINT8 S4BiosReq;\r
243 UINT8 PstateCnt;\r
244 UINT32 Pm1aEvtBlk;\r
245 UINT32 Pm1bEvtBlk;\r
246 UINT32 Pm1aCntBlk;\r
247 UINT32 Pm1bCntBlk;\r
248 UINT32 Pm2CntBlk;\r
249 UINT32 PmTmrBlk;\r
250 UINT32 Gpe0Blk;\r
251 UINT32 Gpe1Blk;\r
252 UINT8 Pm1EvtLen;\r
253 UINT8 Pm1CntLen;\r
254 UINT8 Pm2CntLen;\r
255 UINT8 PmTmrLen;\r
256 UINT8 Gpe0BlkLen;\r
257 UINT8 Gpe1BlkLen;\r
258 UINT8 Gpe1Base;\r
259 UINT8 CstCnt;\r
260 UINT16 PLvl2Lat;\r
261 UINT16 PLvl3Lat;\r
262 UINT16 FlushSize;\r
263 UINT16 FlushStride;\r
264 UINT8 DutyOffset;\r
265 UINT8 DutyWidth;\r
266 UINT8 DayAlrm;\r
267 UINT8 MonAlrm;\r
268 UINT8 Century;\r
269 UINT16 IaPcBootArch;\r
270 UINT8 Reserved1;\r
271 UINT32 Flags;\r
272 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE ResetReg;\r
273 UINT8 ResetValue;\r
274 UINT8 Reserved2[3];\r
275 UINT64 XFirmwareCtrl;\r
276 UINT64 XDsdt;\r
277 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;\r
278 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;\r
279 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;\r
280 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;\r
281 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;\r
282 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;\r
283 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;\r
284 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;\r
285 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE SleepControlReg;\r
286 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE SleepStatusReg;\r
287} EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE;\r
288\r
289///\r
290/// FADT Version (as defined in ACPI 5.0 spec.)\r
291///\r
292#define EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x05\r
293\r
294//\r
295// Fixed ACPI Description Table Preferred Power Management Profile\r
296//\r
297#define EFI_ACPI_5_0_PM_PROFILE_UNSPECIFIED 0\r
298#define EFI_ACPI_5_0_PM_PROFILE_DESKTOP 1\r
299#define EFI_ACPI_5_0_PM_PROFILE_MOBILE 2\r
300#define EFI_ACPI_5_0_PM_PROFILE_WORKSTATION 3\r
301#define EFI_ACPI_5_0_PM_PROFILE_ENTERPRISE_SERVER 4\r
302#define EFI_ACPI_5_0_PM_PROFILE_SOHO_SERVER 5\r
303#define EFI_ACPI_5_0_PM_PROFILE_APPLIANCE_PC 6\r
304#define EFI_ACPI_5_0_PM_PROFILE_PERFORMANCE_SERVER 7\r
305#define EFI_ACPI_5_0_PM_PROFILE_TABLET 8\r
306\r
307//\r
308// Fixed ACPI Description Table Boot Architecture Flags\r
309// All other bits are reserved and must be set to 0.\r
310//\r
311#define EFI_ACPI_5_0_LEGACY_DEVICES BIT0\r
312#define EFI_ACPI_5_0_8042 BIT1\r
313#define EFI_ACPI_5_0_VGA_NOT_PRESENT BIT2\r
314#define EFI_ACPI_5_0_MSI_NOT_SUPPORTED BIT3\r
315#define EFI_ACPI_5_0_PCIE_ASPM_CONTROLS BIT4\r
316#define EFI_ACPI_5_0_CMOS_RTC_NOT_PRESENT BIT5\r
317\r
318//\r
319// Fixed ACPI Description Table Fixed Feature Flags\r
320// All other bits are reserved and must be set to 0.\r
321//\r
322#define EFI_ACPI_5_0_WBINVD BIT0\r
323#define EFI_ACPI_5_0_WBINVD_FLUSH BIT1\r
324#define EFI_ACPI_5_0_PROC_C1 BIT2\r
325#define EFI_ACPI_5_0_P_LVL2_UP BIT3\r
326#define EFI_ACPI_5_0_PWR_BUTTON BIT4\r
327#define EFI_ACPI_5_0_SLP_BUTTON BIT5\r
328#define EFI_ACPI_5_0_FIX_RTC BIT6\r
329#define EFI_ACPI_5_0_RTC_S4 BIT7\r
330#define EFI_ACPI_5_0_TMR_VAL_EXT BIT8\r
331#define EFI_ACPI_5_0_DCK_CAP BIT9\r
332#define EFI_ACPI_5_0_RESET_REG_SUP BIT10\r
333#define EFI_ACPI_5_0_SEALED_CASE BIT11\r
334#define EFI_ACPI_5_0_HEADLESS BIT12\r
335#define EFI_ACPI_5_0_CPU_SW_SLP BIT13\r
336#define EFI_ACPI_5_0_PCI_EXP_WAK BIT14\r
337#define EFI_ACPI_5_0_USE_PLATFORM_CLOCK BIT15\r
338#define EFI_ACPI_5_0_S4_RTC_STS_VALID BIT16\r
339#define EFI_ACPI_5_0_REMOTE_POWER_ON_CAPABLE BIT17\r
340#define EFI_ACPI_5_0_FORCE_APIC_CLUSTER_MODEL BIT18\r
341#define EFI_ACPI_5_0_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19\r
342#define EFI_ACPI_5_0_HW_REDUCED_ACPI BIT20\r
343#define EFI_ACPI_5_0_LOW_POWER_S0_IDLE_CAPABLE BIT21\r
344\r
345///\r
346/// Firmware ACPI Control Structure\r
347///\r
348typedef struct {\r
349 UINT32 Signature;\r
350 UINT32 Length;\r
351 UINT32 HardwareSignature;\r
352 UINT32 FirmwareWakingVector;\r
353 UINT32 GlobalLock;\r
354 UINT32 Flags;\r
355 UINT64 XFirmwareWakingVector;\r
356 UINT8 Version;\r
357 UINT8 Reserved0[3];\r
358 UINT32 OspmFlags;\r
359 UINT8 Reserved1[24];\r
360} EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;\r
361\r
362///\r
363/// FACS Version (as defined in ACPI 5.0 spec.)\r
364///\r
365#define EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x02\r
366\r
367///\r
368/// Firmware Control Structure Feature Flags\r
369/// All other bits are reserved and must be set to 0.\r
370///\r
371#define EFI_ACPI_5_0_S4BIOS_F BIT0\r
372#define EFI_ACPI_5_0_64BIT_WAKE_SUPPORTED_F BIT1\r
373\r
374///\r
375/// OSPM Enabled Firmware Control Structure Flags\r
376/// All other bits are reserved and must be set to 0.\r
377///\r
378#define EFI_ACPI_5_0_OSPM_64BIT_WAKE_F BIT0\r
379\r
380//\r
381// Differentiated System Description Table,\r
382// Secondary System Description Table\r
383// and Persistent System Description Table,\r
384// no definition needed as they are common description table header, the same with\r
385// EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block.\r
386//\r
387#define EFI_ACPI_5_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02\r
388#define EFI_ACPI_5_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02\r
389\r
390///\r
391/// Multiple APIC Description Table header definition. The rest of the table\r
392/// must be defined in a platform specific manner.\r
393///\r
394typedef struct {\r
395 EFI_ACPI_DESCRIPTION_HEADER Header;\r
396 UINT32 LocalApicAddress;\r
397 UINT32 Flags;\r
398} EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;\r
399\r
400///\r
401/// MADT Revision (as defined in ACPI 5.0 spec.)\r
402///\r
403#define EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x03\r
404\r
405///\r
406/// Multiple APIC Flags\r
407/// All other bits are reserved and must be set to 0.\r
408///\r
409#define EFI_ACPI_5_0_PCAT_COMPAT BIT0\r
410\r
411//\r
412// Multiple APIC Description Table APIC structure types\r
413// All other values between 0x0D and 0x7F are reserved and\r
414// will be ignored by OSPM. 0x80 ~ 0xFF are reserved for OEM.\r
415//\r
416#define EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC 0x00\r
417#define EFI_ACPI_5_0_IO_APIC 0x01\r
418#define EFI_ACPI_5_0_INTERRUPT_SOURCE_OVERRIDE 0x02\r
419#define EFI_ACPI_5_0_NON_MASKABLE_INTERRUPT_SOURCE 0x03\r
420#define EFI_ACPI_5_0_LOCAL_APIC_NMI 0x04\r
421#define EFI_ACPI_5_0_LOCAL_APIC_ADDRESS_OVERRIDE 0x05\r
422#define EFI_ACPI_5_0_IO_SAPIC 0x06\r
423#define EFI_ACPI_5_0_LOCAL_SAPIC 0x07\r
424#define EFI_ACPI_5_0_PLATFORM_INTERRUPT_SOURCES 0x08\r
425#define EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC 0x09\r
426#define EFI_ACPI_5_0_LOCAL_X2APIC_NMI 0x0A\r
427#define EFI_ACPI_5_0_GIC 0x0B\r
428#define EFI_ACPI_5_0_GICD 0x0C\r
429\r
430//\r
431// APIC Structure Definitions\r
432//\r
433\r
434///\r
435/// Processor Local APIC Structure Definition\r
436///\r
437typedef struct {\r
438 UINT8 Type;\r
439 UINT8 Length;\r
440 UINT8 AcpiProcessorId;\r
441 UINT8 ApicId;\r
442 UINT32 Flags;\r
443} EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_STRUCTURE;\r
444\r
445///\r
446/// Local APIC Flags. All other bits are reserved and must be 0.\r
447///\r
448#define EFI_ACPI_5_0_LOCAL_APIC_ENABLED BIT0\r
449\r
450///\r
451/// IO APIC Structure\r
452///\r
453typedef struct {\r
454 UINT8 Type;\r
455 UINT8 Length;\r
456 UINT8 IoApicId;\r
457 UINT8 Reserved;\r
458 UINT32 IoApicAddress;\r
459 UINT32 GlobalSystemInterruptBase;\r
460} EFI_ACPI_5_0_IO_APIC_STRUCTURE;\r
461\r
462///\r
463/// Interrupt Source Override Structure\r
464///\r
465typedef struct {\r
466 UINT8 Type;\r
467 UINT8 Length;\r
468 UINT8 Bus;\r
469 UINT8 Source;\r
470 UINT32 GlobalSystemInterrupt;\r
471 UINT16 Flags;\r
472} EFI_ACPI_5_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;\r
473\r
474///\r
475/// Platform Interrupt Sources Structure Definition\r
476///\r
477typedef struct {\r
478 UINT8 Type;\r
479 UINT8 Length;\r
480 UINT16 Flags;\r
481 UINT8 InterruptType;\r
482 UINT8 ProcessorId;\r
483 UINT8 ProcessorEid;\r
484 UINT8 IoSapicVector;\r
485 UINT32 GlobalSystemInterrupt;\r
486 UINT32 PlatformInterruptSourceFlags;\r
487 UINT8 CpeiProcessorOverride;\r
488 UINT8 Reserved[31];\r
489} EFI_ACPI_5_0_PLATFORM_INTERRUPT_APIC_STRUCTURE;\r
490\r
491//\r
492// MPS INTI flags.\r
493// All other bits are reserved and must be set to 0.\r
494//\r
495#define EFI_ACPI_5_0_POLARITY (3 << 0)\r
496#define EFI_ACPI_5_0_TRIGGER_MODE (3 << 2)\r
497\r
498///\r
499/// Non-Maskable Interrupt Source Structure\r
500///\r
501typedef struct {\r
502 UINT8 Type;\r
503 UINT8 Length;\r
504 UINT16 Flags;\r
505 UINT32 GlobalSystemInterrupt;\r
506} EFI_ACPI_5_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;\r
507\r
508///\r
509/// Local APIC NMI Structure\r
510///\r
511typedef struct {\r
512 UINT8 Type;\r
513 UINT8 Length;\r
514 UINT8 AcpiProcessorId;\r
515 UINT16 Flags;\r
516 UINT8 LocalApicLint;\r
517} EFI_ACPI_5_0_LOCAL_APIC_NMI_STRUCTURE;\r
518\r
519///\r
520/// Local APIC Address Override Structure\r
521///\r
522typedef struct {\r
523 UINT8 Type;\r
524 UINT8 Length;\r
525 UINT16 Reserved;\r
526 UINT64 LocalApicAddress;\r
527} EFI_ACPI_5_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;\r
528\r
529///\r
530/// IO SAPIC Structure\r
531///\r
532typedef struct {\r
533 UINT8 Type;\r
534 UINT8 Length;\r
535 UINT8 IoApicId;\r
536 UINT8 Reserved;\r
537 UINT32 GlobalSystemInterruptBase;\r
538 UINT64 IoSapicAddress;\r
539} EFI_ACPI_5_0_IO_SAPIC_STRUCTURE;\r
540\r
541///\r
542/// Local SAPIC Structure\r
543/// This struct followed by a null-terminated ASCII string - ACPI Processor UID String\r
544///\r
545typedef struct {\r
546 UINT8 Type;\r
547 UINT8 Length;\r
548 UINT8 AcpiProcessorId;\r
549 UINT8 LocalSapicId;\r
550 UINT8 LocalSapicEid;\r
551 UINT8 Reserved[3];\r
552 UINT32 Flags;\r
553 UINT32 ACPIProcessorUIDValue;\r
554} EFI_ACPI_5_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE;\r
555\r
556///\r
557/// Platform Interrupt Sources Structure\r
558///\r
559typedef struct {\r
560 UINT8 Type;\r
561 UINT8 Length;\r
562 UINT16 Flags;\r
563 UINT8 InterruptType;\r
564 UINT8 ProcessorId;\r
565 UINT8 ProcessorEid;\r
566 UINT8 IoSapicVector;\r
567 UINT32 GlobalSystemInterrupt;\r
568 UINT32 PlatformInterruptSourceFlags;\r
569} EFI_ACPI_5_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;\r
570\r
571///\r
572/// Platform Interrupt Source Flags.\r
573/// All other bits are reserved and must be set to 0.\r
574///\r
575#define EFI_ACPI_5_0_CPEI_PROCESSOR_OVERRIDE BIT0\r
576\r
577///\r
578/// Processor Local x2APIC Structure Definition\r
579///\r
580typedef struct {\r
581 UINT8 Type;\r
582 UINT8 Length;\r
583 UINT8 Reserved[2];\r
584 UINT32 X2ApicId;\r
585 UINT32 Flags;\r
586 UINT32 AcpiProcessorUid;\r
587} EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC_STRUCTURE;\r
588\r
589///\r
590/// Local x2APIC NMI Structure\r
591///\r
592typedef struct {\r
593 UINT8 Type;\r
594 UINT8 Length;\r
595 UINT16 Flags;\r
596 UINT32 AcpiProcessorUid;\r
597 UINT8 LocalX2ApicLint;\r
598 UINT8 Reserved[3];\r
599} EFI_ACPI_5_0_LOCAL_X2APIC_NMI_STRUCTURE;\r
600\r
601///\r
602/// GIC Structure\r
603///\r
604typedef struct {\r
605 UINT8 Type;\r
606 UINT8 Length;\r
607 UINT16 Reserved;\r
608 UINT32 GicId;\r
609 UINT32 AcpiProcessorUid;\r
610 UINT32 Flags;\r
611 UINT32 ParkingProtocolVersion;\r
612 UINT32 PerformanceInterruptGsiv;\r
613 UINT64 ParkedAddress;\r
614 UINT64 PhysicalBaseAddress;\r
615} EFI_ACPI_5_0_GIC_STRUCTURE;\r
616\r
617///\r
618/// GIC Flags. All other bits are reserved and must be 0.\r
619///\r
620#define EFI_ACPI_5_0_GIC_ENABLED BIT0\r
621#define EFI_ACPI_5_0_PERFORMANCE_INTERRUPT_MODEL BIT1\r
622\r
623///\r
624/// GIC Distributor Structure\r
625///\r
626typedef struct {\r
627 UINT8 Type;\r
628 UINT8 Length;\r
629 UINT16 Reserved1;\r
630 UINT32 GicId;\r
631 UINT64 PhysicalBaseAddress;\r
632 UINT32 SystemVectorBase;\r
633 UINT32 Reserved2;\r
634} EFI_ACPI_5_0_GIC_DISTRIBUTOR_STRUCTURE;\r
635\r
636///\r
637/// Smart Battery Description Table (SBST)\r
638///\r
639typedef struct {\r
640 EFI_ACPI_DESCRIPTION_HEADER Header;\r
641 UINT32 WarningEnergyLevel;\r
642 UINT32 LowEnergyLevel;\r
643 UINT32 CriticalEnergyLevel;\r
644} EFI_ACPI_5_0_SMART_BATTERY_DESCRIPTION_TABLE;\r
645\r
646///\r
647/// SBST Version (as defined in ACPI 5.0 spec.)\r
648///\r
649#define EFI_ACPI_5_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01\r
650\r
651///\r
652/// Embedded Controller Boot Resources Table (ECDT)\r
653/// The table is followed by a null terminated ASCII string that contains\r
654/// a fully qualified reference to the name space object.\r
655///\r
656typedef struct {\r
657 EFI_ACPI_DESCRIPTION_HEADER Header;\r
658 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE EcControl;\r
659 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE EcData;\r
660 UINT32 Uid;\r
661 UINT8 GpeBit;\r
662} EFI_ACPI_5_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;\r
663\r
664///\r
665/// ECDT Version (as defined in ACPI 5.0 spec.)\r
666///\r
667#define EFI_ACPI_5_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01\r
668\r
669///\r
670/// System Resource Affinity Table (SRAT). The rest of the table\r
671/// must be defined in a platform specific manner.\r
672///\r
673typedef struct {\r
674 EFI_ACPI_DESCRIPTION_HEADER Header;\r
675 UINT32 Reserved1; ///< Must be set to 1\r
676 UINT64 Reserved2;\r
677} EFI_ACPI_5_0_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER;\r
678\r
679///\r
680/// SRAT Version (as defined in ACPI 5.0 spec.)\r
681///\r
682#define EFI_ACPI_5_0_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION 0x03\r
683\r
684//\r
685// SRAT structure types.\r
686// All other values between 0x03 an 0xFF are reserved and\r
687// will be ignored by OSPM.\r
688//\r
689#define EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY 0x00\r
690#define EFI_ACPI_5_0_MEMORY_AFFINITY 0x01\r
691#define EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC_AFFINITY 0x02\r
692\r
693///\r
694/// Processor Local APIC/SAPIC Affinity Structure Definition\r
695///\r
696typedef struct {\r
697 UINT8 Type;\r
698 UINT8 Length;\r
699 UINT8 ProximityDomain7To0;\r
700 UINT8 ApicId;\r
701 UINT32 Flags;\r
702 UINT8 LocalSapicEid;\r
703 UINT8 ProximityDomain31To8[3];\r
704 UINT32 ClockDomain;\r
705} EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE;\r
706\r
707///\r
708/// Local APIC/SAPIC Flags. All other bits are reserved and must be 0.\r
709///\r
710#define EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)\r
711\r
712///\r
713/// Memory Affinity Structure Definition\r
714///\r
715typedef struct {\r
716 UINT8 Type;\r
717 UINT8 Length;\r
718 UINT32 ProximityDomain;\r
719 UINT16 Reserved1;\r
720 UINT32 AddressBaseLow;\r
721 UINT32 AddressBaseHigh;\r
722 UINT32 LengthLow;\r
723 UINT32 LengthHigh;\r
724 UINT32 Reserved2;\r
725 UINT32 Flags;\r
726 UINT64 Reserved3;\r
727} EFI_ACPI_5_0_MEMORY_AFFINITY_STRUCTURE;\r
728\r
729//\r
730// Memory Flags. All other bits are reserved and must be 0.\r
731//\r
732#define EFI_ACPI_5_0_MEMORY_ENABLED (1 << 0)\r
733#define EFI_ACPI_5_0_MEMORY_HOT_PLUGGABLE (1 << 1)\r
734#define EFI_ACPI_5_0_MEMORY_NONVOLATILE (1 << 2)\r
735\r
736///\r
737/// Processor Local x2APIC Affinity Structure Definition\r
738///\r
739typedef struct {\r
740 UINT8 Type;\r
741 UINT8 Length;\r
742 UINT8 Reserved1[2];\r
743 UINT32 ProximityDomain;\r
744 UINT32 X2ApicId;\r
745 UINT32 Flags;\r
746 UINT32 ClockDomain;\r
747 UINT8 Reserved2[4];\r
748} EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE;\r
749\r
750///\r
751/// System Locality Distance Information Table (SLIT).\r
752/// The rest of the table is a matrix.\r
753///\r
754typedef struct {\r
755 EFI_ACPI_DESCRIPTION_HEADER Header;\r
756 UINT64 NumberOfSystemLocalities;\r
757} EFI_ACPI_5_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER;\r
758\r
759///\r
760/// SLIT Version (as defined in ACPI 5.0 spec.)\r
761///\r
762#define EFI_ACPI_5_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION 0x01\r
763\r
764///\r
765/// Corrected Platform Error Polling Table (CPEP)\r
766///\r
767typedef struct {\r
768 EFI_ACPI_DESCRIPTION_HEADER Header;\r
769 UINT8 Reserved[8];\r
770} EFI_ACPI_5_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER;\r
771\r
772///\r
773/// CPEP Version (as defined in ACPI 5.0 spec.)\r
774///\r
775#define EFI_ACPI_5_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01\r
776\r
777//\r
778// CPEP processor structure types.\r
779//\r
780#define EFI_ACPI_5_0_CPEP_PROCESSOR_APIC_SAPIC 0x00\r
781\r
782///\r
783/// Corrected Platform Error Polling Processor Structure Definition\r
784///\r
785typedef struct {\r
786 UINT8 Type;\r
787 UINT8 Length;\r
788 UINT8 ProcessorId;\r
789 UINT8 ProcessorEid;\r
790 UINT32 PollingInterval;\r
791} EFI_ACPI_5_0_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE;\r
792\r
793///\r
794/// Maximum System Characteristics Table (MSCT)\r
795///\r
796typedef struct {\r
797 EFI_ACPI_DESCRIPTION_HEADER Header;\r
798 UINT32 OffsetProxDomInfo;\r
799 UINT32 MaximumNumberOfProximityDomains;\r
800 UINT32 MaximumNumberOfClockDomains;\r
801 UINT64 MaximumPhysicalAddress;\r
802} EFI_ACPI_5_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER;\r
803\r
804///\r
805/// MSCT Version (as defined in ACPI 5.0 spec.)\r
806///\r
807#define EFI_ACPI_5_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01\r
808\r
809///\r
810/// Maximum Proximity Domain Information Structure Definition\r
811///\r
812typedef struct {\r
813 UINT8 Revision;\r
814 UINT8 Length;\r
815 UINT32 ProximityDomainRangeLow;\r
816 UINT32 ProximityDomainRangeHigh;\r
817 UINT32 MaximumProcessorCapacity;\r
818 UINT64 MaximumMemoryCapacity;\r
819} EFI_ACPI_5_0_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE;\r
820\r
821///\r
822/// ACPI RAS Feature Table definition.\r
823///\r
824typedef struct {\r
825 EFI_ACPI_DESCRIPTION_HEADER Header;\r
826 UINT8 PlatformCommunicationChannelIdentifier[12];\r
827} EFI_ACPI_5_0_RAS_FEATURE_TABLE;\r
828\r
829///\r
830/// RASF Version (as defined in ACPI 5.0 spec.)\r
831///\r
832#define EFI_ACPI_5_0_RAS_FEATURE_TABLE_REVISION 0x01\r
833\r
834///\r
835/// ACPI RASF Platform Communication Channel Shared Memory Region definition.\r
836///\r
837typedef struct {\r
838 UINT32 Signature;\r
839 UINT16 Command;\r
840 UINT16 Status;\r
841 UINT16 Version;\r
842 UINT8 RASCapabilities[16];\r
843 UINT8 SetRASCapabilities[16];\r
844 UINT16 NumberOfRASFParameterBlocks;\r
845 UINT32 SetRASCapabilitiesStatus;\r
846} EFI_ACPI_5_0_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;\r
847\r
848///\r
849/// ACPI RASF PCC command code\r
850///\r
851#define EFI_ACPI_5_0_RASF_PCC_COMMAND_CODE_EXECUTE_RASF_COMMAND 0x01\r
852\r
853///\r
854/// ACPI RASF Platform RAS Capabilities\r
855///\r
856#define EFI_ACPI_5_0_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED 0x01\r
857#define EFI_ACPI_5_0_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED_AND_EXPOSED_TO_SOFTWARE 0x02\r
858\r
859///\r
860/// ACPI RASF Parameter Block structure for PATROL_SCRUB\r
861///\r
862typedef struct {\r
863 UINT16 Type;\r
864 UINT16 Version;\r
865 UINT16 Length;\r
866 UINT16 PatrolScrubCommand;\r
867 UINT64 RequestedAddressRange[2];\r
868 UINT64 ActualAddressRange[2];\r
869 UINT16 Flags;\r
870 UINT8 RequestedSpeed;\r
871} EFI_ACPI_5_0_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE;\r
872\r
873///\r
874/// ACPI RASF Patrol Scrub command\r
875///\r
876#define EFI_ACPI_5_0_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01\r
877#define EFI_ACPI_5_0_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02\r
878#define EFI_ACPI_5_0_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03\r
879\r
880///\r
881/// Memory Power State Table definition.\r
882///\r
883typedef struct {\r
884 EFI_ACPI_DESCRIPTION_HEADER Header;\r
885 UINT8 PlatformCommunicationChannelIdentifier;\r
886 UINT8 Reserved[3];\r
887// Memory Power Node Structure\r
888// Memory Power State Characteristics\r
889} EFI_ACPI_5_0_MEMORY_POWER_STATUS_TABLE;\r
890\r
891///\r
892/// MPST Version (as defined in ACPI 5.0 spec.)\r
893///\r
894#define EFI_ACPI_5_0_MEMORY_POWER_STATE_TABLE_REVISION 0x01\r
895\r
896///\r
897/// MPST Platform Communication Channel Shared Memory Region definition.\r
898///\r
899typedef struct {\r
900 UINT32 Signature;\r
901 UINT16 Command;\r
902 UINT16 Status;\r
903 UINT32 MemoryPowerCommandRegister;\r
904 UINT32 MemoryPowerStatusRegister;\r
905 UINT32 PowerStateId;\r
906 UINT32 MemoryPowerNodeId;\r
907 UINT64 MemoryEnergyConsumed;\r
908 UINT64 ExpectedAveragePowerComsuned;\r
909} EFI_ACPI_5_0_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;\r
910\r
911///\r
912/// ACPI MPST PCC command code\r
913///\r
914#define EFI_ACPI_5_0_MPST_PCC_COMMAND_CODE_EXECUTE_MPST_COMMAND 0x03\r
915\r
916///\r
917/// ACPI MPST Memory Power command\r
918///\r
919#define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01\r
920#define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02\r
921#define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03\r
922#define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04\r
923\r
924///\r
925/// MPST Memory Power Node Table\r
926///\r
927typedef struct {\r
928 UINT8 PowerStateValue;\r
929 UINT8 PowerStateInformationIndex;\r
930} EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE;\r
931\r
932typedef struct {\r
933 UINT8 Flag;\r
934 UINT8 Reserved;\r
935 UINT16 MemoryPowerNodeId;\r
936 UINT32 Length;\r
937 UINT64 AddressBase;\r
938 UINT64 AddressLength;\r
939 UINT32 NumberOfPowerStates;\r
940 UINT32 NumberOfPhysicalComponents;\r
941//EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates];\r
942//UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents];\r
943} EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE;\r
944\r
945#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01\r
946#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02\r
947#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04\r
948\r
949typedef struct {\r
950 UINT16 MemoryPowerNodeCount;\r
951 UINT8 Reserved[2];\r
952} EFI_ACPI_5_0_MPST_MEMORY_POWER_NODE_TABLE;\r
953\r
954///\r
955/// MPST Memory Power State Characteristics Table\r
956///\r
957typedef struct {\r
958 UINT8 PowerStateStructureID;\r
959 UINT8 Flag;\r
960 UINT16 Reserved;\r
961 UINT32 AveragePowerConsumedInMPS0;\r
962 UINT32 RelativePowerSavingToMPS0;\r
963 UINT64 ExitLatencyToMPS0;\r
964} EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE;\r
965\r
966#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01\r
967#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02\r
968#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04\r
969\r
970typedef struct {\r
971 UINT16 MemoryPowerStateCharacteristicsCount;\r
972 UINT8 Reserved[2];\r
973} EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE;\r
974\r
975///\r
976/// Memory Topology Table definition.\r
977///\r
978typedef struct {\r
979 EFI_ACPI_DESCRIPTION_HEADER Header;\r
980 UINT32 Reserved;\r
981} EFI_ACPI_5_0_MEMORY_TOPOLOGY_TABLE;\r
982\r
983///\r
984/// PMTT Version (as defined in ACPI 5.0 spec.)\r
985///\r
986#define EFI_ACPI_5_0_MEMORY_TOPOLOGY_TABLE_REVISION 0x01\r
987\r
988///\r
989/// Common Memory Aggregator Device Structure.\r
990///\r
991typedef struct {\r
992 UINT8 Type;\r
993 UINT8 Reserved;\r
994 UINT16 Length;\r
995 UINT16 Flags;\r
996 UINT16 Reserved1;\r
997} EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
998\r
999///\r
1000/// Memory Aggregator Device Type\r
1001///\r
1002#define EFI_ACPI_5_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET 0x1\r
1003#define EFI_ACPI_5_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER 0x2\r
1004#define EFI_ACPI_5_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM 0x3\r
1005\r
1006///\r
1007/// Socket Memory Aggregator Device Structure.\r
1008///\r
1009typedef struct {\r
1010 EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;\r
fa8801f5
JY		 1011 UINT16 SocketIdentifier;\r
1012 UINT16 Reserved;\r
4a18b92c
JY		 1013//EFI_ACPI_5_0_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE MemoryController[];\r
1014} EFI_ACPI_5_0_PMMT_SOCKET_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
1015\r
1016///\r
1017/// MemoryController Memory Aggregator Device Structure.\r
1018///\r
1019typedef struct {\r
1020 EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;\r
1021 UINT32 ReadLatency;\r
1022 UINT32 WriteLatency;\r
1023 UINT32 ReadBandwidth;\r
1024 UINT32 WriteBandwidth;\r
1025 UINT16 OptimalAccessUnit;\r
1026 UINT16 OptimalAccessAlignment;\r
1027 UINT16 Reserved;\r
1028 UINT16 NumberOfProximityDomains;\r
1029//UINT32 ProximityDomain[NumberOfProximityDomains];\r
1030//EFI_ACPI_5_0_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE PhysicalComponent[];\r
1031} EFI_ACPI_5_0_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
1032\r
1033///\r
1034/// DIMM Memory Aggregator Device Structure.\r
1035///\r
1036typedef struct {\r
1037 EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;\r
1038 UINT16 PhysicalComponentIdentifier;\r
1039 UINT16 Reserved;\r
1040 UINT32 SizeOfDimm;\r
1041 UINT32 SmbiosHandle;\r
1042} EFI_ACPI_5_0_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
1043\r
1044///\r
1045/// Boot Graphics Resource Table definition.\r
1046///\r
1047typedef struct {\r
1048 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1049 ///\r
1050 /// 2-bytes (16 bit) version ID. This value must be 1.\r
1051 ///\r
1052 UINT16 Version;\r
1053 ///\r
1054 /// 1-byte status field indicating current status about the table.\r
1055 /// Bits[7:1] = Reserved (must be zero)\r
1056 /// Bit [0] = Valid. A one indicates the boot image graphic is valid.\r
1057 ///\r
1058 UINT8 Status;\r
1059 ///\r
1060 /// 1-byte enumerated type field indicating format of the image.\r
1061 /// 0 = Bitmap\r
1062 /// 1 - 255 Reserved (for future use)\r
1063 ///\r
1064 UINT8 ImageType;\r
1065 ///\r
1066 /// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy\r
1067 /// of the image bitmap.\r
1068 ///\r
1069 UINT64 ImageAddress;\r
1070 ///\r
1071 /// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image.\r
1072 /// (X, Y) display offset of the top left corner of the boot image.\r
1073 /// The top left corner of the display is at offset (0, 0).\r
1074 ///\r
1075 UINT32 ImageOffsetX;\r
1076 ///\r
1077 /// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image.\r
1078 /// (X, Y) display offset of the top left corner of the boot image.\r
1079 /// The top left corner of the display is at offset (0, 0).\r
1080 ///\r
1081 UINT32 ImageOffsetY;\r
1082} EFI_ACPI_5_0_BOOT_GRAPHICS_RESOURCE_TABLE;\r
1083\r
1084///\r
1085/// BGRT Revision\r
1086///\r
1087#define EFI_ACPI_5_0_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1\r
1088\r
1089///\r
1090/// BGRT Version\r
1091///\r
1092#define EFI_ACPI_5_0_BGRT_VERSION 0x01\r
1093\r
1094///\r
1095/// BGRT Status\r
1096///\r
1097#define EFI_ACPI_5_0_BGRT_STATUS_INVALID 0x00\r
1098#define EFI_ACPI_5_0_BGRT_STATUS_VALID 0x01\r
1099\r
1100///\r
1101/// BGRT Image Type\r
1102///\r
1103#define EFI_ACPI_5_0_BGRT_IMAGE_TYPE_BMP 0x00\r
1104\r
1105///\r
1106/// FPDT Version (as defined in ACPI 5.0 spec.)\r
1107///\r
1108#define EFI_ACPI_5_0_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01\r
1109\r
1110///\r
1111/// FPDT Performance Record Types\r
1112///\r
1113#define EFI_ACPI_5_0_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000\r
1114#define EFI_ACPI_5_0_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001\r
1115\r
1116///\r
1117/// FPDT Performance Record Revision\r
1118///\r
1119#define EFI_ACPI_5_0_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01\r
1120#define EFI_ACPI_5_0_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01\r
1121\r
1122///\r
1123/// FPDT Runtime Performance Record Types\r
1124///\r
1125#define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000\r
1126#define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001\r
1127#define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002\r
1128\r
1129///\r
1130/// FPDT Runtime Performance Record Revision\r
1131///\r
1132#define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_REVISION_S3_RESUME 0x01\r
1133#define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_REVISION_S3_SUSPEND 0x01\r
1134#define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_REVISION_FIRMWARE_BASIC_BOOT 0x02\r
1135\r
1136///\r
1137/// FPDT Performance Record header\r
1138///\r
1139typedef struct {\r
1140 UINT16 Type;\r
1141 UINT8 Length;\r
1142 UINT8 Revision;\r
1143} EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER;\r
1144\r
1145///\r
1146/// FPDT Performance Table header\r
1147///\r
1148typedef struct {\r
1149 UINT32 Signature;\r
1150 UINT32 Length;\r
1151} EFI_ACPI_5_0_FPDT_PERFORMANCE_TABLE_HEADER;\r
1152\r
1153///\r
1154/// FPDT Firmware Basic Boot Performance Pointer Record Structure\r
1155///\r
1156typedef struct {\r
1157 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1158 UINT32 Reserved;\r
1159 ///\r
1160 /// 64-bit processor-relative physical address of the Basic Boot Performance Table.\r
1161 ///\r
1162 UINT64 BootPerformanceTablePointer;\r
1163} EFI_ACPI_5_0_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD;\r
1164\r
1165///\r
1166/// FPDT S3 Performance Table Pointer Record Structure\r
1167///\r
1168typedef struct {\r
1169 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1170 UINT32 Reserved;\r
1171 ///\r
1172 /// 64-bit processor-relative physical address of the S3 Performance Table.\r
1173 ///\r
1174 UINT64 S3PerformanceTablePointer;\r
1175} EFI_ACPI_5_0_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD;\r
1176\r
1177///\r
1178/// FPDT Firmware Basic Boot Performance Record Structure\r
1179///\r
1180typedef struct {\r
1181 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1182 UINT32 Reserved;\r
1183 ///\r
1184 /// Timer value logged at the beginning of firmware image execution.\r
1185 /// This may not always be zero or near zero.\r
1186 ///\r
1187 UINT64 ResetEnd;\r
1188 ///\r
1189 /// Timer value logged just prior to loading the OS boot loader into memory.\r
1190 /// For non-UEFI compatible boots, this field must be zero.\r
1191 ///\r
1192 UINT64 OsLoaderLoadImageStart;\r
1193 ///\r
1194 /// Timer value logged just prior to launching the previously loaded OS boot loader image.\r
1195 /// For non-UEFI compatible boots, the timer value logged will be just prior\r
1196 /// to the INT 19h handler invocation.\r
1197 ///\r
1198 UINT64 OsLoaderStartImageStart;\r
1199 ///\r
1200 /// Timer value logged at the point when the OS loader calls the\r
1201 /// ExitBootServices function for UEFI compatible firmware.\r
1202 /// For non-UEFI compatible boots, this field must be zero.\r
1203 ///\r
1204 UINT64 ExitBootServicesEntry;\r
1205 ///\r
1206 /// Timer value logged at the point just prior towhen the OS loader gaining\r
1207 /// control back from calls the ExitBootServices function for UEFI compatible firmware.\r
1208 /// For non-UEFI compatible boots, this field must be zero.\r
1209 ///\r
1210 UINT64 ExitBootServicesExit;\r
1211} EFI_ACPI_5_0_FPDT_FIRMWARE_BASIC_BOOT_RECORD;\r
1212\r
1213///\r
1214/// FPDT Firmware Basic Boot Performance Table signature\r
1215///\r
1216#define EFI_ACPI_5_0_FPDT_BOOT_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('F', 'B', 'P', 'T')\r
1217\r
1218//\r
1219// FPDT Firmware Basic Boot Performance Table\r
1220//\r
1221typedef struct {\r
1222 EFI_ACPI_5_0_FPDT_PERFORMANCE_TABLE_HEADER Header;\r
1223 //\r
1224 // one or more Performance Records.\r
1225 //\r
1226} EFI_ACPI_5_0_FPDT_FIRMWARE_BASIC_BOOT_TABLE;\r
1227\r
1228///\r
1229/// FPDT "S3PT" S3 Performance Table\r
1230///\r
1231#define EFI_ACPI_5_0_FPDT_S3_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('S', '3', 'P', 'T')\r
1232\r
1233//\r
1234// FPDT Firmware S3 Boot Performance Table\r
1235//\r
1236typedef struct {\r
1237 EFI_ACPI_5_0_FPDT_PERFORMANCE_TABLE_HEADER Header;\r
1238 //\r
1239 // one or more Performance Records.\r
1240 //\r
1241} EFI_ACPI_5_0_FPDT_FIRMWARE_S3_BOOT_TABLE;\r
1242\r
1243///\r
1244/// FPDT Basic S3 Resume Performance Record\r
1245///\r
1246typedef struct {\r
1247 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1248 ///\r
1249 /// A count of the number of S3 resume cycles since the last full boot sequence.\r
1250 ///\r
1251 UINT32 ResumeCount;\r
1252 ///\r
1253 /// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the\r
1254 /// OS waking vector. Only the most recent resume cycle's time is retained.\r
1255 ///\r
1256 UINT64 FullResume;\r
1257 ///\r
1258 /// Average timer value of all resume cycles logged since the last full boot\r
1259 /// sequence, including the most recent resume. Note that the entire log of\r
1260 /// timer values does not need to be retained in order to calculate this average.\r
1261 ///\r
1262 UINT64 AverageResume;\r
1263} EFI_ACPI_5_0_FPDT_S3_RESUME_RECORD;\r
1264\r
1265///\r
1266/// FPDT Basic S3 Suspend Performance Record\r
1267///\r
1268typedef struct {\r
1269 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1270 ///\r
1271 /// Timer value recorded at the OS write to SLP_TYP upon entry to S3.\r
1272 /// Only the most recent suspend cycle's timer value is retained.\r
1273 ///\r
1274 UINT64 SuspendStart;\r
1275 ///\r
1276 /// Timer value recorded at the final firmware write to SLP_TYP (or other\r
1277 /// mechanism) used to trigger hardware entry to S3.\r
1278 /// Only the most recent suspend cycle's timer value is retained.\r
1279 ///\r
1280 UINT64 SuspendEnd;\r
1281} EFI_ACPI_5_0_FPDT_S3_SUSPEND_RECORD;\r
1282\r
1283///\r
1284/// Firmware Performance Record Table definition.\r
1285///\r
1286typedef struct {\r
1287 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1288} EFI_ACPI_5_0_FIRMWARE_PERFORMANCE_RECORD_TABLE;\r
1289\r
1290///\r
1291/// Generic Timer Description Table definition.\r
1292///\r
1293typedef struct {\r
1294 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1295 UINT64 PhysicalAddress;\r
1296 UINT32 GlobalFlags;\r
1297 UINT32 SecurePL1TimerGSIV;\r
1298 UINT32 SecurePL1TimerFlags;\r
1299 UINT32 NonSecurePL1TimerGSIV;\r
1300 UINT32 NonSecurePL1TimerFlags;\r
1301 UINT32 VirtualTimerGSIV;\r
1302 UINT32 VirtualTimerFlags;\r
1303 UINT32 NonSecurePL2TimerGSIV;\r
1304 UINT32 NonSecurePL2TimerFlags;\r
1305} EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE;\r
1306\r
1307///\r
1308/// GTDT Version (as defined in ACPI 5.0 spec.)\r
1309///\r
1310#define EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x01\r
1311\r
1312///\r
1313/// Global Flags. All other bits are reserved and must be 0.\r
1314///\r
1315#define EFI_ACPI_5_0_GTDT_GLOBAL_FLAG_MEMORY_MAPPED_BLOCK_PRESENT BIT0\r
1316#define EFI_ACPI_5_0_GTDT_GLOBAL_FLAG_INTERRUPT_MODE BIT1\r
1317\r
1318///\r
1319/// Timer Flags. All other bits are reserved and must be 0.\r
1320///\r
1321#define EFI_ACPI_5_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0\r
1322#define EFI_ACPI_5_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1\r
1323\r
1324///\r
1325/// Boot Error Record Table (BERT)\r
1326///\r
1327typedef struct {\r
1328 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1329 UINT32 BootErrorRegionLength;\r
1330 UINT64 BootErrorRegion;\r
1331} EFI_ACPI_5_0_BOOT_ERROR_RECORD_TABLE_HEADER;\r
1332\r
1333///\r
1334/// BERT Version (as defined in ACPI 5.0 spec.)\r
1335///\r
1336#define EFI_ACPI_5_0_BOOT_ERROR_RECORD_TABLE_REVISION 0x01\r
1337\r
1338///\r
1339/// Boot Error Region Block Status Definition\r
1340///\r
1341typedef struct {\r
1342 UINT32 UncorrectableErrorValid:1;\r
1343 UINT32 CorrectableErrorValid:1;\r
1344 UINT32 MultipleUncorrectableErrors:1;\r
1345 UINT32 MultipleCorrectableErrors:1;\r
1346 UINT32 ErrorDataEntryCount:10;\r
1347 UINT32 Reserved:18;\r
1348} EFI_ACPI_5_0_ERROR_BLOCK_STATUS;\r
1349\r
1350///\r
1351/// Boot Error Region Definition\r
1352///\r
1353typedef struct {\r
1354 EFI_ACPI_5_0_ERROR_BLOCK_STATUS BlockStatus;\r
1355 UINT32 RawDataOffset;\r
1356 UINT32 RawDataLength;\r
1357 UINT32 DataLength;\r
1358 UINT32 ErrorSeverity;\r
1359} EFI_ACPI_5_0_BOOT_ERROR_REGION_STRUCTURE;\r
1360\r
1361//\r
1362// Boot Error Severity types\r
1363//\r
1364#define EFI_ACPI_5_0_ERROR_SEVERITY_CORRECTABLE 0x00\r
1365#define EFI_ACPI_5_0_ERROR_SEVERITY_FATAL 0x01\r
1366#define EFI_ACPI_5_0_ERROR_SEVERITY_CORRECTED 0x02\r
1367#define EFI_ACPI_5_0_ERROR_SEVERITY_NONE 0x03\r
1368\r
1369///\r
1370/// Generic Error Data Entry Definition\r
1371///\r
1372typedef struct {\r
1373 UINT8 SectionType[16];\r
1374 UINT32 ErrorSeverity;\r
1375 UINT16 Revision;\r
1376 UINT8 ValidationBits;\r
1377 UINT8 Flags;\r
1378 UINT32 ErrorDataLength;\r
1379 UINT8 FruId[16];\r
1380 UINT8 FruText[20];\r
1381} EFI_ACPI_5_0_GENERIC_ERROR_DATA_ENTRY_STRUCTURE;\r
1382\r
1383///\r
1384/// Generic Error Data Entry Version (as defined in ACPI 5.0 spec.)\r
1385///\r
1386#define EFI_ACPI_5_0_GENERIC_ERROR_DATA_ENTRY_REVISION 0x0201\r
1387\r
1388///\r
1389/// HEST - Hardware Error Source Table\r
1390///\r
1391typedef struct {\r
1392 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1393 UINT32 ErrorSourceCount;\r
1394} EFI_ACPI_5_0_HARDWARE_ERROR_SOURCE_TABLE_HEADER;\r
1395\r
1396///\r
1397/// HEST Version (as defined in ACPI 5.0 spec.)\r
1398///\r
1399#define EFI_ACPI_5_0_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01\r
1400\r
1401//\r
1402// Error Source structure types.\r
1403//\r
1404#define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION 0x00\r
1405#define EFI_ACPI_5_0_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK 0x01\r
1406#define EFI_ACPI_5_0_IA32_ARCHITECTURE_NMI_ERROR 0x02\r
1407#define EFI_ACPI_5_0_PCI_EXPRESS_ROOT_PORT_AER 0x06\r
1408#define EFI_ACPI_5_0_PCI_EXPRESS_DEVICE_AER 0x07\r
1409#define EFI_ACPI_5_0_PCI_EXPRESS_BRIDGE_AER 0x08\r
1410#define EFI_ACPI_5_0_GENERIC_HARDWARE_ERROR 0x09\r
1411\r
1412//\r
1413// Error Source structure flags.\r
1414//\r
1415#define EFI_ACPI_5_0_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0)\r
1416#define EFI_ACPI_5_0_ERROR_SOURCE_FLAG_GLOBAL (1 << 1)\r
1417\r
1418///\r
1419/// IA-32 Architecture Machine Check Exception Structure Definition\r
1420///\r
1421typedef struct {\r
1422 UINT16 Type;\r
1423 UINT16 SourceId;\r
1424 UINT8 Reserved0[2];\r
1425 UINT8 Flags;\r
1426 UINT8 Enabled;\r
1427 UINT32 NumberOfRecordsToPreAllocate;\r
1428 UINT32 MaxSectionsPerRecord;\r
1429 UINT64 GlobalCapabilityInitData;\r
1430 UINT64 GlobalControlInitData;\r
1431 UINT8 NumberOfHardwareBanks;\r
1432 UINT8 Reserved1[7];\r
1433} EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE;\r
1434\r
1435///\r
1436/// IA-32 Architecture Machine Check Bank Structure Definition\r
1437///\r
1438typedef struct {\r
1439 UINT8 BankNumber;\r
1440 UINT8 ClearStatusOnInitialization;\r
1441 UINT8 StatusDataFormat;\r
1442 UINT8 Reserved0;\r
1443 UINT32 ControlRegisterMsrAddress;\r
1444 UINT64 ControlInitData;\r
1445 UINT32 StatusRegisterMsrAddress;\r
1446 UINT32 AddressRegisterMsrAddress;\r
1447 UINT32 MiscRegisterMsrAddress;\r
1448} EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE;\r
1449\r
1450///\r
1451/// IA-32 Architecture Machine Check Bank Structure MCA data format\r
1452///\r
1453#define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00\r
1454#define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01\r
1455#define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02\r
1456\r
1457//\r
1458// Hardware Error Notification types. All other values are reserved\r
1459//\r
1460#define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00\r
1461#define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01\r
1462#define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02\r
1463#define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_SCI 0x03\r
1464#define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_NMI 0x04\r
1465\r
1466///\r
1467/// Hardware Error Notification Configuration Write Enable Structure Definition\r
1468///\r
1469typedef struct {\r
1470 UINT16 Type:1;\r
1471 UINT16 PollInterval:1;\r
1472 UINT16 SwitchToPollingThresholdValue:1;\r
1473 UINT16 SwitchToPollingThresholdWindow:1;\r
1474 UINT16 ErrorThresholdValue:1;\r
1475 UINT16 ErrorThresholdWindow:1;\r
1476 UINT16 Reserved:10;\r
1477} EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE;\r
1478\r
1479///\r
1480/// Hardware Error Notification Structure Definition\r
1481///\r
1482typedef struct {\r
1483 UINT8 Type;\r
1484 UINT8 Length;\r
1485 EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable;\r
1486 UINT32 PollInterval;\r
1487 UINT32 Vector;\r
1488 UINT32 SwitchToPollingThresholdValue;\r
1489 UINT32 SwitchToPollingThresholdWindow;\r
1490 UINT32 ErrorThresholdValue;\r
1491 UINT32 ErrorThresholdWindow;\r
1492} EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE;\r
1493\r
1494///\r
1495/// IA-32 Architecture Corrected Machine Check Structure Definition\r
1496///\r
1497typedef struct {\r
1498 UINT16 Type;\r
1499 UINT16 SourceId;\r
1500 UINT8 Reserved0[2];\r
1501 UINT8 Flags;\r
1502 UINT8 Enabled;\r
1503 UINT32 NumberOfRecordsToPreAllocate;\r
1504 UINT32 MaxSectionsPerRecord;\r
1505 EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;\r
1506 UINT8 NumberOfHardwareBanks;\r
1507 UINT8 Reserved1[3];\r
1508} EFI_ACPI_5_0_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE;\r
1509\r
1510///\r
1511/// IA-32 Architecture NMI Error Structure Definition\r
1512///\r
1513typedef struct {\r
1514 UINT16 Type;\r
1515 UINT16 SourceId;\r
1516 UINT8 Reserved0[2];\r
1517 UINT32 NumberOfRecordsToPreAllocate;\r
1518 UINT32 MaxSectionsPerRecord;\r
1519 UINT32 MaxRawDataLength;\r
1520} EFI_ACPI_5_0_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE;\r
1521\r
1522///\r
1523/// PCI Express Root Port AER Structure Definition\r
1524///\r
1525typedef struct {\r
1526 UINT16 Type;\r
1527 UINT16 SourceId;\r
1528 UINT8 Reserved0[2];\r
1529 UINT8 Flags;\r
1530 UINT8 Enabled;\r
1531 UINT32 NumberOfRecordsToPreAllocate;\r
1532 UINT32 MaxSectionsPerRecord;\r
1533 UINT32 Bus;\r
1534 UINT16 Device;\r
1535 UINT16 Function;\r
1536 UINT16 DeviceControl;\r
1537 UINT8 Reserved1[2];\r
1538 UINT32 UncorrectableErrorMask;\r
1539 UINT32 UncorrectableErrorSeverity;\r
1540 UINT32 CorrectableErrorMask;\r
1541 UINT32 AdvancedErrorCapabilitiesAndControl;\r
1542 UINT32 RootErrorCommand;\r
1543} EFI_ACPI_5_0_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE;\r
1544\r
1545///\r
1546/// PCI Express Device AER Structure Definition\r
1547///\r
1548typedef struct {\r
1549 UINT16 Type;\r
1550 UINT16 SourceId;\r
1551 UINT8 Reserved0[2];\r
1552 UINT8 Flags;\r
1553 UINT8 Enabled;\r
1554 UINT32 NumberOfRecordsToPreAllocate;\r
1555 UINT32 MaxSectionsPerRecord;\r
1556 UINT32 Bus;\r
1557 UINT16 Device;\r
1558 UINT16 Function;\r
1559 UINT16 DeviceControl;\r
1560 UINT8 Reserved1[2];\r
1561 UINT32 UncorrectableErrorMask;\r
1562 UINT32 UncorrectableErrorSeverity;\r
1563 UINT32 CorrectableErrorMask;\r
1564 UINT32 AdvancedErrorCapabilitiesAndControl;\r
1565} EFI_ACPI_5_0_PCI_EXPRESS_DEVICE_AER_STRUCTURE;\r
1566\r
1567///\r
1568/// PCI Express Bridge AER Structure Definition\r
1569///\r
1570typedef struct {\r
1571 UINT16 Type;\r
1572 UINT16 SourceId;\r
1573 UINT8 Reserved0[2];\r
1574 UINT8 Flags;\r
1575 UINT8 Enabled;\r
1576 UINT32 NumberOfRecordsToPreAllocate;\r
1577 UINT32 MaxSectionsPerRecord;\r
1578 UINT32 Bus;\r
1579 UINT16 Device;\r
1580 UINT16 Function;\r
1581 UINT16 DeviceControl;\r
1582 UINT8 Reserved1[2];\r
1583 UINT32 UncorrectableErrorMask;\r
1584 UINT32 UncorrectableErrorSeverity;\r
1585 UINT32 CorrectableErrorMask;\r
1586 UINT32 AdvancedErrorCapabilitiesAndControl;\r
1587 UINT32 SecondaryUncorrectableErrorMask;\r
1588 UINT32 SecondaryUncorrectableErrorSeverity;\r
1589 UINT32 SecondaryAdvancedErrorCapabilitiesAndControl;\r
1590} EFI_ACPI_5_0_PCI_EXPRESS_BRIDGE_AER_STRUCTURE;\r
1591\r
1592///\r
1593/// Generic Hardware Error Source Structure Definition\r
1594///\r
1595typedef struct {\r
1596 UINT16 Type;\r
1597 UINT16 SourceId;\r
1598 UINT16 RelatedSourceId;\r
1599 UINT8 Flags;\r
1600 UINT8 Enabled;\r
1601 UINT32 NumberOfRecordsToPreAllocate;\r
1602 UINT32 MaxSectionsPerRecord;\r
1603 UINT32 MaxRawDataLength;\r
1604 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;\r
1605 EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;\r
1606 UINT32 ErrorStatusBlockLength;\r
1607} EFI_ACPI_5_0_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE;\r
1608\r
1609///\r
1610/// Generic Error Status Definition\r
1611///\r
1612typedef struct {\r
1613 EFI_ACPI_5_0_ERROR_BLOCK_STATUS BlockStatus;\r
1614 UINT32 RawDataOffset;\r
1615 UINT32 RawDataLength;\r
1616 UINT32 DataLength;\r
1617 UINT32 ErrorSeverity;\r
1618} EFI_ACPI_5_0_GENERIC_ERROR_STATUS_STRUCTURE;\r
1619\r
1620///\r
1621/// ERST - Error Record Serialization Table\r
1622///\r
1623typedef struct {\r
1624 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1625 UINT32 SerializationHeaderSize;\r
1626 UINT8 Reserved0[4];\r
1627 UINT32 InstructionEntryCount;\r
1628} EFI_ACPI_5_0_ERROR_RECORD_SERIALIZATION_TABLE_HEADER;\r
1629\r
1630///\r
1631/// ERST Version (as defined in ACPI 5.0 spec.)\r
1632///\r
1633#define EFI_ACPI_5_0_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01\r
1634\r
1635///\r
1636/// ERST Serialization Actions\r
1637///\r
1638#define EFI_ACPI_5_0_ERST_BEGIN_WRITE_OPERATION 0x00\r
1639#define EFI_ACPI_5_0_ERST_BEGIN_READ_OPERATION 0x01\r
1640#define EFI_ACPI_5_0_ERST_BEGIN_CLEAR_OPERATION 0x02\r
1641#define EFI_ACPI_5_0_ERST_END_OPERATION 0x03\r
1642#define EFI_ACPI_5_0_ERST_SET_RECORD_OFFSET 0x04\r
1643#define EFI_ACPI_5_0_ERST_EXECUTE_OPERATION 0x05\r
1644#define EFI_ACPI_5_0_ERST_CHECK_BUSY_STATUS 0x06\r
1645#define EFI_ACPI_5_0_ERST_GET_COMMAND_STATUS 0x07\r
1646#define EFI_ACPI_5_0_ERST_GET_RECORD_IDENTIFIER 0x08\r
1647#define EFI_ACPI_5_0_ERST_SET_RECORD_IDENTIFIER 0x09\r
1648#define EFI_ACPI_5_0_ERST_GET_RECORD_COUNT 0x0A\r
1649#define EFI_ACPI_5_0_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B\r
1650#define EFI_ACPI_5_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D\r
1651#define EFI_ACPI_5_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E\r
1652#define EFI_ACPI_5_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F\r
1653\r
1654///\r
1655/// ERST Action Command Status\r
1656///\r
1657#define EFI_ACPI_5_0_ERST_STATUS_SUCCESS 0x00\r
1658#define EFI_ACPI_5_0_ERST_STATUS_NOT_ENOUGH_SPACE 0x01\r
1659#define EFI_ACPI_5_0_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02\r
1660#define EFI_ACPI_5_0_ERST_STATUS_FAILED 0x03\r
1661#define EFI_ACPI_5_0_ERST_STATUS_RECORD_STORE_EMPTY 0x04\r
1662#define EFI_ACPI_5_0_ERST_STATUS_RECORD_NOT_FOUND 0x05\r
1663\r
1664///\r
1665/// ERST Serialization Instructions\r
1666///\r
1667#define EFI_ACPI_5_0_ERST_READ_REGISTER 0x00\r
1668#define EFI_ACPI_5_0_ERST_READ_REGISTER_VALUE 0x01\r
1669#define EFI_ACPI_5_0_ERST_WRITE_REGISTER 0x02\r
1670#define EFI_ACPI_5_0_ERST_WRITE_REGISTER_VALUE 0x03\r
1671#define EFI_ACPI_5_0_ERST_NOOP 0x04\r
1672#define EFI_ACPI_5_0_ERST_LOAD_VAR1 0x05\r
1673#define EFI_ACPI_5_0_ERST_LOAD_VAR2 0x06\r
1674#define EFI_ACPI_5_0_ERST_STORE_VAR1 0x07\r
1675#define EFI_ACPI_5_0_ERST_ADD 0x08\r
1676#define EFI_ACPI_5_0_ERST_SUBTRACT 0x09\r
1677#define EFI_ACPI_5_0_ERST_ADD_VALUE 0x0A\r
1678#define EFI_ACPI_5_0_ERST_SUBTRACT_VALUE 0x0B\r
1679#define EFI_ACPI_5_0_ERST_STALL 0x0C\r
1680#define EFI_ACPI_5_0_ERST_STALL_WHILE_TRUE 0x0D\r
1681#define EFI_ACPI_5_0_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E\r
1682#define EFI_ACPI_5_0_ERST_GOTO 0x0F\r
1683#define EFI_ACPI_5_0_ERST_SET_SRC_ADDRESS_BASE 0x10\r
1684#define EFI_ACPI_5_0_ERST_SET_DST_ADDRESS_BASE 0x11\r
1685#define EFI_ACPI_5_0_ERST_MOVE_DATA 0x12\r
1686\r
1687///\r
1688/// ERST Instruction Flags\r
1689///\r
1690#define EFI_ACPI_5_0_ERST_PRESERVE_REGISTER 0x01\r
1691\r
1692///\r
1693/// ERST Serialization Instruction Entry\r
1694///\r
1695typedef struct {\r
1696 UINT8 SerializationAction;\r
1697 UINT8 Instruction;\r
1698 UINT8 Flags;\r
1699 UINT8 Reserved0;\r
1700 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion;\r
1701 UINT64 Value;\r
1702 UINT64 Mask;\r
1703} EFI_ACPI_5_0_ERST_SERIALIZATION_INSTRUCTION_ENTRY;\r
1704\r
1705///\r
1706/// EINJ - Error Injection Table\r
1707///\r
1708typedef struct {\r
1709 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1710 UINT32 InjectionHeaderSize;\r
1711 UINT8 InjectionFlags;\r
1712 UINT8 Reserved0[3];\r
1713 UINT32 InjectionEntryCount;\r
1714} EFI_ACPI_5_0_ERROR_INJECTION_TABLE_HEADER;\r
1715\r
1716///\r
1717/// EINJ Version (as defined in ACPI 5.0 spec.)\r
1718///\r
1719#define EFI_ACPI_5_0_ERROR_INJECTION_TABLE_REVISION 0x01\r
1720\r
1721///\r
1722/// EINJ Error Injection Actions\r
1723///\r
1724#define EFI_ACPI_5_0_EINJ_BEGIN_INJECTION_OPERATION 0x00\r
1725#define EFI_ACPI_5_0_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01\r
1726#define EFI_ACPI_5_0_EINJ_SET_ERROR_TYPE 0x02\r
1727#define EFI_ACPI_5_0_EINJ_GET_ERROR_TYPE 0x03\r
1728#define EFI_ACPI_5_0_EINJ_END_OPERATION 0x04\r
1729#define EFI_ACPI_5_0_EINJ_EXECUTE_OPERATION 0x05\r
1730#define EFI_ACPI_5_0_EINJ_CHECK_BUSY_STATUS 0x06\r
1731#define EFI_ACPI_5_0_EINJ_GET_COMMAND_STATUS 0x07\r
1732#define EFI_ACPI_5_0_EINJ_TRIGGER_ERROR 0xFF\r
1733\r
1734///\r
1735/// EINJ Action Command Status\r
1736///\r
1737#define EFI_ACPI_5_0_EINJ_STATUS_SUCCESS 0x00\r
1738#define EFI_ACPI_5_0_EINJ_STATUS_UNKNOWN_FAILURE 0x01\r
1739#define EFI_ACPI_5_0_EINJ_STATUS_INVALID_ACCESS 0x02\r
1740\r
1741///\r
1742/// EINJ Error Type Definition\r
1743///\r
1744#define EFI_ACPI_5_0_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0)\r
1745#define EFI_ACPI_5_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1)\r
1746#define EFI_ACPI_5_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2)\r
1747#define EFI_ACPI_5_0_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3)\r
1748#define EFI_ACPI_5_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4)\r
1749#define EFI_ACPI_5_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5)\r
1750#define EFI_ACPI_5_0_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6)\r
1751#define EFI_ACPI_5_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7)\r
1752#define EFI_ACPI_5_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8)\r
1753#define EFI_ACPI_5_0_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9)\r
1754#define EFI_ACPI_5_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10)\r
1755#define EFI_ACPI_5_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11)\r
1756\r
1757///\r
1758/// EINJ Injection Instructions\r
1759///\r
1760#define EFI_ACPI_5_0_EINJ_READ_REGISTER 0x00\r
1761#define EFI_ACPI_5_0_EINJ_READ_REGISTER_VALUE 0x01\r
1762#define EFI_ACPI_5_0_EINJ_WRITE_REGISTER 0x02\r
1763#define EFI_ACPI_5_0_EINJ_WRITE_REGISTER_VALUE 0x03\r
1764#define EFI_ACPI_5_0_EINJ_NOOP 0x04\r
1765\r
1766///\r
1767/// EINJ Instruction Flags\r
1768///\r
1769#define EFI_ACPI_5_0_EINJ_PRESERVE_REGISTER 0x01\r
1770\r
1771///\r
1772/// EINJ Injection Instruction Entry\r
1773///\r
1774typedef struct {\r
1775 UINT8 InjectionAction;\r
1776 UINT8 Instruction;\r
1777 UINT8 Flags;\r
1778 UINT8 Reserved0;\r
1779 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion;\r
1780 UINT64 Value;\r
1781 UINT64 Mask;\r
1782} EFI_ACPI_5_0_EINJ_INJECTION_INSTRUCTION_ENTRY;\r
1783\r
1784///\r
1785/// EINJ Trigger Action Table\r
1786///\r
1787typedef struct {\r
1788 UINT32 HeaderSize;\r
1789 UINT32 Revision;\r
1790 UINT32 TableSize;\r
1791 UINT32 EntryCount;\r
1792} EFI_ACPI_5_0_EINJ_TRIGGER_ACTION_TABLE;\r
1793\r
1794///\r
1795/// Platform Communications Channel Table (PCCT)\r
1796///\r
1797typedef struct {\r
1798 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1799 UINT32 Flags;\r
17aa79bf 1800 UINT64 Reserved;\r
4a18b92c
JY		 1801} EFI_ACPI_5_0_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER;\r
1802\r
1803///\r
1804/// PCCT Version (as defined in ACPI 5.0 spec.)\r
1805///\r
1806#define EFI_ACPI_5_0_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x01\r
1807\r
1808///\r
1809/// PCCT Global Flags\r
1810///\r
1811#define EFI_ACPI_5_0_PCCT_FLAGS_SCI_DOORBELL BIT0\r
1812\r
1813//\r
1814// PCCT Subspace type\r
1815//\r
1816#define EFI_ACPI_5_0_PCCT_SUBSPACE_TYPE_GENERIC 0x00\r
1817\r
1818///\r
1819/// PCC Subspace Structure Header\r
1820///\r
1821typedef struct {\r
1822 UINT8 Type;\r
1823 UINT8 Length;\r
1824} EFI_ACPI_5_0_PCCT_SUBSPACE_HEADER;\r
1825\r
1826///\r
1827/// Generic Communications Subspace Structure\r
1828///\r
1829typedef struct {\r
1830 UINT8 Type;\r
1831 UINT8 Length;\r
1832 UINT8 Reserved[6];\r
1833 UINT64 BaseAddress;\r
1834 UINT64 AddressLength;\r
1835 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;\r
1836 UINT64 DoorbellPreserve;\r
1837 UINT64 DoorbellWrite;\r
83218902
JY		 1838 UINT32 NominalLatency;\r
1839 UINT32 MaximumPeriodicAccessRate;\r
1840 UINT16 MinimumRequestTurnaroundTime;\r
4a18b92c
JY		 1841} EFI_ACPI_5_0_PCCT_SUBSPACE_GENERIC;\r
1842\r
1843///\r
1844/// Generic Communications Channel Shared Memory Region\r
1845///\r
1846\r
1847typedef struct {\r
1848 UINT8 Command;\r
1849 UINT8 Reserved:7;\r
1850 UINT8 GenerateSci:1;\r
1851} EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND;\r
1852\r
1853typedef struct {\r
1854 UINT8 CommandComplete:1;\r
1855 UINT8 SciDoorbell:1;\r
1856 UINT8 Error:1;\r
1857 UINT8 Reserved:5;\r
1858 UINT8 Reserved1;\r
1859} EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS;\r
1860\r
1861typedef struct {\r
1862 UINT32 Signature;\r
1863 EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND Command;\r
1864 EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS Status;\r
1865} EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER;\r
1866\r
1867//\r
1868// Known table signatures\r
1869//\r
1870\r
1871///\r
1872/// "RSD PTR " Root System Description Pointer\r
1873///\r
1874#define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ') \r
1875\r
1876///\r
1877/// "APIC" Multiple APIC Description Table\r
1878///\r
1879#define EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C')\r
1880\r
1881///\r
1882/// "BERT" Boot Error Record Table\r
1883///\r
1884#define EFI_ACPI_5_0_BOOT_ERROR_RECORD_TABLE_SIGNATURE SIGNATURE_32('B', 'E', 'R', 'T')\r
1885\r
1886///\r
1887/// "BGRT" Boot Graphics Resource Table\r
1888///\r
1889#define EFI_ACPI_5_0_BOOT_GRAPHICS_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('B', 'G', 'R', 'T')\r
1890\r
1891///\r
1892/// "CPEP" Corrected Platform Error Polling Table\r
1893///\r
1894#define EFI_ACPI_5_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE SIGNATURE_32('C', 'P', 'E', 'P')\r
1895\r
1896///\r
1897/// "DSDT" Differentiated System Description Table\r
1898///\r
1899#define EFI_ACPI_5_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T')\r
1900\r
1901///\r
1902/// "ECDT" Embedded Controller Boot Resources Table\r
1903///\r
1904#define EFI_ACPI_5_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T')\r
1905\r
1906///\r
1907/// "EINJ" Error Injection Table\r
1908///\r
1909#define EFI_ACPI_5_0_ERROR_INJECTION_TABLE_SIGNATURE SIGNATURE_32('E', 'I', 'N', 'J')\r
1910\r
1911///\r
1912/// "ERST" Error Record Serialization Table\r
1913///\r
1914#define EFI_ACPI_5_0_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE SIGNATURE_32('E', 'R', 'S', 'T')\r
1915\r
1916///\r
1917/// "FACP" Fixed ACPI Description Table\r
1918///\r
1919#define EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P')\r
1920\r
1921///\r
1922/// "FACS" Firmware ACPI Control Structure\r
1923///\r
1924#define EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S')\r
1925\r
1926///\r
1927/// "FPDT" Firmware Performance Data Table\r
1928///\r
1929#define EFI_ACPI_5_0_FIRMWARE_PERFORMANCE_DATA_TABLE_SIGNATURE SIGNATURE_32('F', 'P', 'D', 'T')\r
1930\r
1931///\r
1932/// "GTDT" Generic Timer Description Table\r
1933///\r
1934#define EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('G', 'T', 'D', 'T')\r
1935\r
1936///\r
1937/// "HEST" Hardware Error Source Table\r
1938///\r
1939#define EFI_ACPI_5_0_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE SIGNATURE_32('H', 'E', 'S', 'T')\r
1940\r
1941///\r
1942/// "MPST" Memory Power State Table\r
1943///\r
1944#define EFI_ACPI_5_0_MEMORY_POWER_STATE_TABLE_SIGNATURE SIGNATURE_32('M', 'P', 'S', 'T')\r
1945\r
1946///\r
1947/// "MSCT" Maximum System Characteristics Table\r
1948///\r
1949#define EFI_ACPI_5_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'C', 'T')\r
1950\r
1951///\r
1952/// "PMTT" Platform Memory Topology Table\r
1953///\r
1954#define EFI_ACPI_5_0_PLATFORM_MEMORY_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'M', 'T', 'T')\r
1955\r
1956///\r
1957/// "PSDT" Persistent System Description Table\r
1958///\r
1959#define EFI_ACPI_5_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T')\r
1960\r
1961///\r
1962/// "RASF" ACPI RAS Feature Table\r
1963///\r
1964#define EFI_ACPI_5_0_ACPI_RAS_FEATURE_TABLE_SIGNATURE SIGNATURE_32('R', 'A', 'S', 'F')\r
1965\r
1966///\r
1967/// "RSDT" Root System Description Table\r
1968///\r
1969#define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T')\r
1970\r
1971///\r
1972/// "SBST" Smart Battery Specification Table\r
1973///\r
1974#define EFI_ACPI_5_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T')\r
1975\r
1976///\r
1977/// "SLIT" System Locality Information Table\r
1978///\r
1979#define EFI_ACPI_5_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T')\r
1980\r
1981///\r
1982/// "SRAT" System Resource Affinity Table\r
1983///\r
1984#define EFI_ACPI_5_0_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T')\r
1985\r
1986///\r
1987/// "SSDT" Secondary System Description Table\r
1988///\r
1989#define EFI_ACPI_5_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T')\r
1990\r
1991///\r
1992/// "XSDT" Extended System Description Table\r
1993///\r
1994#define EFI_ACPI_5_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T')\r
1995\r
1996///\r
1997/// "BOOT" MS Simple Boot Spec\r
1998///\r
1999#define EFI_ACPI_5_0_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T')\r
2000\r
2001///\r
2002/// "CSRT" MS Core System Resource Table\r
2003///\r
2004#define EFI_ACPI_5_0_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('C', 'S', 'R', 'T')\r
2005\r
2006///\r
2007/// "DBG2" MS Debug Port 2 Spec\r
2008///\r
2009#define EFI_ACPI_5_0_DEBUG_PORT_2_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', '2')\r
2010\r
2011///\r
2012/// "DBGP" MS Debug Port Spec\r
2013///\r
2014#define EFI_ACPI_5_0_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P')\r
2015\r
2016///\r
2017/// "DMAR" DMA Remapping Table\r
2018///\r
2019#define EFI_ACPI_5_0_DMA_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('D', 'M', 'A', 'R')\r
2020\r
2021///\r
2022/// "ETDT" Event Timer Description Table\r
2023///\r
2024#define EFI_ACPI_5_0_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T')\r
2025\r
2026///\r
2027/// "HPET" IA-PC High Precision Event Timer Table\r
2028///\r
2029#define EFI_ACPI_5_0_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE SIGNATURE_32('H', 'P', 'E', 'T')\r
2030\r
2031///\r
2032/// "iBFT" iSCSI Boot Firmware Table\r
2033///\r
2034#define EFI_ACPI_5_0_ISCSI_BOOT_FIRMWARE_TABLE_SIGNATURE SIGNATURE_32('i', 'B', 'F', 'T')\r
2035\r
2036///\r
2037/// "IVRS" I/O Virtualization Reporting Structure\r
2038///\r
2039#define EFI_ACPI_5_0_IO_VIRTUALIZATION_REPORTING_STRUCTURE_SIGNATURE SIGNATURE_32('I', 'V', 'R', 'S')\r
2040\r
2041///\r
2042/// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table\r
2043///\r
2044#define EFI_ACPI_5_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G')\r
2045\r
2046///\r
2047/// "MCHI" Management Controller Host Interface Table\r
2048///\r
2049#define EFI_ACPI_5_0_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'H', 'I')\r
2050\r
2051///\r
2052/// "MSDM" MS Data Management Table\r
2053///\r
2054#define EFI_ACPI_5_0_DATA_MANAGEMENT_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'D', 'M')\r
2055\r
2056///\r
2057/// "SLIC" MS Software Licensing Table Specification\r
2058///\r
2059#define EFI_ACPI_5_0_SOFTWARE_LICENSING_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'C')\r
2060\r
2061///\r
2062/// "SPCR" Serial Port Concole Redirection Table\r
2063///\r
2064#define EFI_ACPI_5_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')\r
2065\r
2066///\r
2067/// "SPMI" Server Platform Management Interface Table\r
2068///\r
2069#define EFI_ACPI_5_0_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I')\r
2070\r
2071///\r
2072/// "TCPA" Trusted Computing Platform Alliance Capabilities Table\r
2073///\r
2074#define EFI_ACPI_5_0_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE SIGNATURE_32('T', 'C', 'P', 'A')\r
2075\r
2076///\r
2077/// "TPM2" Trusted Computing Platform 1 Table\r
2078///\r
2079#define EFI_ACPI_5_0_TRUSTED_COMPUTING_PLATFORM_2_TABLE_SIGNATURE SIGNATURE_32('T', 'P', 'M', '2')\r
2080\r
2081///\r
2082/// "UEFI" UEFI ACPI Data Table\r
2083///\r
2084#define EFI_ACPI_5_0_UEFI_ACPI_DATA_TABLE_SIGNATURE SIGNATURE_32('U', 'E', 'F', 'I')\r
2085\r
2086///\r
2087/// "WAET" Windows ACPI Enlightenment Table\r
2088///\r
2089#define EFI_ACPI_5_0_WINDOWS_ACPI_ENLIGHTENMENT_TABLE_SIGNATURE SIGNATURE_32('W', 'A', 'E', 'T')\r
2090\r
2091///\r
2092/// "WDAT" Watchdog Action Table\r
2093///\r
2094#define EFI_ACPI_5_0_WATCHDOG_ACTION_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'A', 'T')\r
2095\r
2096///\r
2097/// "WDRT" Watchdog Resource Table\r
2098///\r
2099#define EFI_ACPI_5_0_WATCHDOG_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'R', 'T')\r
2100\r
2101///\r
2102/// "WPBT" MS Platform Binary Table\r
2103///\r
2104#define EFI_ACPI_5_0_PLATFORM_BINARY_TABLE_SIGNATURE SIGNATURE_32('W', 'P', 'B', 'T')\r
2105\r
2106#pragma pack()\r
2107\r
2108#endif\r
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