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1 /** @file
2 ACPI 5.0 definitions from the ACPI Specification Revision 5.0 December 6, 2011
3
4 Copyright (c) 2011 - 2012, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
9
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12 **/
13
14 #ifndef _ACPI_5_0_H_
15 #define _ACPI_5_0_H_
16
17 #include <IndustryStandard/Acpi40.h>
18
19 //
20 // Define for Desriptor
21 //
22 #define ACPI_SMALL_FIXED_DMA_DESCRIPTOR_NAME 0x0A
23 #define ACPI_LARGE_GPIO_CONNECTION_DESCRIPTOR_NAME 0x0C
24 #define ACPI_LARGE_GENERIC_SERIAL_BUS_CONNECTION_DESCRIPTOR_NAME 0x0E
25
26 #define ACPI_FIXED_DMA_DESCRIPTOR 0x55
27 #define ACPI_GPIO_CONNECTION_DESCRIPTOR 0x8C
28 #define ACPI_GENERIC_SERIAL_BUS_CONNECTION_DESCRIPTOR 0x8E
29
30 #pragma pack(1)
31
32 ///
33 /// Generic DMA Descriptor.
34 ///
35 typedef PACKED struct {
36 ACPI_SMALL_RESOURCE_HEADER Header;
37 UINT16 DmaRequestLine;
38 UINT16 DmaChannel;
39 UINT8 DmaTransferWidth;
40 } EFI_ACPI_FIXED_DMA_DESCRIPTOR;
41
42 ///
43 /// GPIO Connection Descriptor
44 ///
45 typedef PACKED struct {
46 ACPI_LARGE_RESOURCE_HEADER Header;
47 UINT8 RevisionId;
48 UINT8 ConnectionType;
49 UINT16 GeneralFlags;
50 UINT16 InterruptFlags;
51 UINT8 PinConfiguration;
52 UINT16 OutputDriveStrength;
53 UINT16 DebounceTimeout;
54 UINT16 PinTableOffset;
55 UINT8 ResourceSourceIndex;
56 UINT16 ResourceSourceNameOffset;
57 UINT16 VendorDataOffset;
58 UINT16 VendorDataLength;
59 } EFI_ACPI_GPIO_CONNECTION_DESCRIPTOR;
60
61 #define EFI_ACPI_GPIO_CONNECTION_TYPE_INTERRUPT 0x0
62 #define EFI_ACPI_GPIO_CONNECTION_TYPE_IO 0x1
63
64 ///
65 /// Serial Bus Resource Descriptor (Generic)
66 ///
67 typedef PACKED struct {
68 ACPI_LARGE_RESOURCE_HEADER Header;
69 UINT8 RevisionId;
70 UINT8 ResourceSourceIndex;
71 UINT8 SerialBusType;
72 UINT8 GeneralFlags;
73 UINT16 TypeSpecificFlags;
74 UINT8 TypeSpecificRevisionId;
75 UINT16 TypeDataLength;
76 // Type specific data
77 } EFI_ACPI_SERIAL_BUS_RESOURCE_DESCRIPTOR;
78
79 #define EFI_ACPI_SERIAL_BUS_RESOURCE_TYPE_I2C 0x1
80 #define EFI_ACPI_SERIAL_BUS_RESOURCE_TYPE_SPI 0x2
81 #define EFI_ACPI_SERIAL_BUS_RESOURCE_TYPE_UART 0x3
82
83 ///
84 /// Serial Bus Resource Descriptor (I2C)
85 ///
86 typedef PACKED struct {
87 ACPI_LARGE_RESOURCE_HEADER Header;
88 UINT8 RevisionId;
89 UINT8 ResourceSourceIndex;
90 UINT8 SerialBusType;
91 UINT8 GeneralFlags;
92 UINT16 TypeSpecificFlags;
93 UINT8 TypeSpecificRevisionId;
94 UINT16 TypeDataLength;
95 UINT32 ConnectionSpeed;
96 UINT16 SlaveAddress;
97 } EFI_ACPI_SERIAL_BUS_RESOURCE_I2C_DESCRIPTOR;
98
99 ///
100 /// Serial Bus Resource Descriptor (SPI)
101 ///
102 typedef PACKED struct {
103 ACPI_LARGE_RESOURCE_HEADER Header;
104 UINT8 RevisionId;
105 UINT8 ResourceSourceIndex;
106 UINT8 SerialBusType;
107 UINT8 GeneralFlags;
108 UINT16 TypeSpecificFlags;
109 UINT8 TypeSpecificRevisionId;
110 UINT16 TypeDataLength;
111 UINT32 ConnectionSpeed;
112 UINT8 DataBitLength;
113 UINT8 Phase;
114 UINT8 Polarity;
115 UINT16 DeviceSelection;
116 } EFI_ACPI_SERIAL_BUS_RESOURCE_SPI_DESCRIPTOR;
117
118 ///
119 /// Serial Bus Resource Descriptor (UART)
120 ///
121 typedef PACKED struct {
122 ACPI_LARGE_RESOURCE_HEADER Header;
123 UINT8 RevisionId;
124 UINT8 ResourceSourceIndex;
125 UINT8 SerialBusType;
126 UINT8 GeneralFlags;
127 UINT16 TypeSpecificFlags;
128 UINT8 TypeSpecificRevisionId;
129 UINT16 TypeDataLength;
130 UINT32 DefaultBaudRate;
131 UINT16 RxFIFO;
132 UINT16 TxFIFO;
133 UINT8 Parity;
134 UINT8 SerialLinesEnabled;
135 } EFI_ACPI_SERIAL_BUS_RESOURCE_UART_DESCRIPTOR;
136
137 #pragma pack()
138
139 //
140 // Ensure proper structure formats
141 //
142 #pragma pack(1)
143
144 ///
145 /// ACPI 5.0 Generic Address Space definition
146 ///
147 typedef struct {
148 UINT8 AddressSpaceId;
149 UINT8 RegisterBitWidth;
150 UINT8 RegisterBitOffset;
151 UINT8 AccessSize;
152 UINT64 Address;
153 } EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE;
154
155 //
156 // Generic Address Space Address IDs
157 //
158 #define EFI_ACPI_5_0_SYSTEM_MEMORY 0
159 #define EFI_ACPI_5_0_SYSTEM_IO 1
160 #define EFI_ACPI_5_0_PCI_CONFIGURATION_SPACE 2
161 #define EFI_ACPI_5_0_EMBEDDED_CONTROLLER 3
162 #define EFI_ACPI_5_0_SMBUS 4
163 #define EFI_ACPI_5_0_FUNCTIONAL_FIXED_HARDWARE 0x7F
164
165 //
166 // Generic Address Space Access Sizes
167 //
168 #define EFI_ACPI_5_0_UNDEFINED 0
169 #define EFI_ACPI_5_0_BYTE 1
170 #define EFI_ACPI_5_0_WORD 2
171 #define EFI_ACPI_5_0_DWORD 3
172 #define EFI_ACPI_5_0_QWORD 4
173
174 //
175 // ACPI 5.0 table structures
176 //
177
178 ///
179 /// Root System Description Pointer Structure
180 ///
181 typedef struct {
182 UINT64 Signature;
183 UINT8 Checksum;
184 UINT8 OemId[6];
185 UINT8 Revision;
186 UINT32 RsdtAddress;
187 UINT32 Length;
188 UINT64 XsdtAddress;
189 UINT8 ExtendedChecksum;
190 UINT8 Reserved[3];
191 } EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_POINTER;
192
193 ///
194 /// RSD_PTR Revision (as defined in ACPI 5.0 spec.)
195 ///
196 #define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 5.0) says current value is 2
197
198 ///
199 /// Common table header, this prefaces all ACPI tables, including FACS, but
200 /// excluding the RSD PTR structure
201 ///
202 typedef struct {
203 UINT32 Signature;
204 UINT32 Length;
205 } EFI_ACPI_5_0_COMMON_HEADER;
206
207 //
208 // Root System Description Table
209 // No definition needed as it is a common description table header, the same with
210 // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.
211 //
212
213 ///
214 /// RSDT Revision (as defined in ACPI 5.0 spec.)
215 ///
216 #define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
217
218 //
219 // Extended System Description Table
220 // No definition needed as it is a common description table header, the same with
221 // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.
222 //
223
224 ///
225 /// XSDT Revision (as defined in ACPI 5.0 spec.)
226 ///
227 #define EFI_ACPI_5_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
228
229 ///
230 /// Fixed ACPI Description Table Structure (FADT)
231 ///
232 typedef struct {
233 EFI_ACPI_DESCRIPTION_HEADER Header;
234 UINT32 FirmwareCtrl;
235 UINT32 Dsdt;
236 UINT8 Reserved0;
237 UINT8 PreferredPmProfile;
238 UINT16 SciInt;
239 UINT32 SmiCmd;
240 UINT8 AcpiEnable;
241 UINT8 AcpiDisable;
242 UINT8 S4BiosReq;
243 UINT8 PstateCnt;
244 UINT32 Pm1aEvtBlk;
245 UINT32 Pm1bEvtBlk;
246 UINT32 Pm1aCntBlk;
247 UINT32 Pm1bCntBlk;
248 UINT32 Pm2CntBlk;
249 UINT32 PmTmrBlk;
250 UINT32 Gpe0Blk;
251 UINT32 Gpe1Blk;
252 UINT8 Pm1EvtLen;
253 UINT8 Pm1CntLen;
254 UINT8 Pm2CntLen;
255 UINT8 PmTmrLen;
256 UINT8 Gpe0BlkLen;
257 UINT8 Gpe1BlkLen;
258 UINT8 Gpe1Base;
259 UINT8 CstCnt;
260 UINT16 PLvl2Lat;
261 UINT16 PLvl3Lat;
262 UINT16 FlushSize;
263 UINT16 FlushStride;
264 UINT8 DutyOffset;
265 UINT8 DutyWidth;
266 UINT8 DayAlrm;
267 UINT8 MonAlrm;
268 UINT8 Century;
269 UINT16 IaPcBootArch;
270 UINT8 Reserved1;
271 UINT32 Flags;
272 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE ResetReg;
273 UINT8 ResetValue;
274 UINT8 Reserved2[3];
275 UINT64 XFirmwareCtrl;
276 UINT64 XDsdt;
277 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;
278 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;
279 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;
280 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;
281 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;
282 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;
283 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;
284 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;
285 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE SleepControlReg;
286 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE SleepStatusReg;
287 } EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE;
288
289 ///
290 /// FADT Version (as defined in ACPI 5.0 spec.)
291 ///
292 #define EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x05
293
294 //
295 // Fixed ACPI Description Table Preferred Power Management Profile
296 //
297 #define EFI_ACPI_5_0_PM_PROFILE_UNSPECIFIED 0
298 #define EFI_ACPI_5_0_PM_PROFILE_DESKTOP 1
299 #define EFI_ACPI_5_0_PM_PROFILE_MOBILE 2
300 #define EFI_ACPI_5_0_PM_PROFILE_WORKSTATION 3
301 #define EFI_ACPI_5_0_PM_PROFILE_ENTERPRISE_SERVER 4
302 #define EFI_ACPI_5_0_PM_PROFILE_SOHO_SERVER 5
303 #define EFI_ACPI_5_0_PM_PROFILE_APPLIANCE_PC 6
304 #define EFI_ACPI_5_0_PM_PROFILE_PERFORMANCE_SERVER 7
305 #define EFI_ACPI_5_0_PM_PROFILE_TABLET 8
306
307 //
308 // Fixed ACPI Description Table Boot Architecture Flags
309 // All other bits are reserved and must be set to 0.
310 //
311 #define EFI_ACPI_5_0_LEGACY_DEVICES BIT0
312 #define EFI_ACPI_5_0_8042 BIT1
313 #define EFI_ACPI_5_0_VGA_NOT_PRESENT BIT2
314 #define EFI_ACPI_5_0_MSI_NOT_SUPPORTED BIT3
315 #define EFI_ACPI_5_0_PCIE_ASPM_CONTROLS BIT4
316 #define EFI_ACPI_5_0_CMOS_RTC_NOT_PRESENT BIT5
317
318 //
319 // Fixed ACPI Description Table Fixed Feature Flags
320 // All other bits are reserved and must be set to 0.
321 //
322 #define EFI_ACPI_5_0_WBINVD BIT0
323 #define EFI_ACPI_5_0_WBINVD_FLUSH BIT1
324 #define EFI_ACPI_5_0_PROC_C1 BIT2
325 #define EFI_ACPI_5_0_P_LVL2_UP BIT3
326 #define EFI_ACPI_5_0_PWR_BUTTON BIT4
327 #define EFI_ACPI_5_0_SLP_BUTTON BIT5
328 #define EFI_ACPI_5_0_FIX_RTC BIT6
329 #define EFI_ACPI_5_0_RTC_S4 BIT7
330 #define EFI_ACPI_5_0_TMR_VAL_EXT BIT8
331 #define EFI_ACPI_5_0_DCK_CAP BIT9
332 #define EFI_ACPI_5_0_RESET_REG_SUP BIT10
333 #define EFI_ACPI_5_0_SEALED_CASE BIT11
334 #define EFI_ACPI_5_0_HEADLESS BIT12
335 #define EFI_ACPI_5_0_CPU_SW_SLP BIT13
336 #define EFI_ACPI_5_0_PCI_EXP_WAK BIT14
337 #define EFI_ACPI_5_0_USE_PLATFORM_CLOCK BIT15
338 #define EFI_ACPI_5_0_S4_RTC_STS_VALID BIT16
339 #define EFI_ACPI_5_0_REMOTE_POWER_ON_CAPABLE BIT17
340 #define EFI_ACPI_5_0_FORCE_APIC_CLUSTER_MODEL BIT18
341 #define EFI_ACPI_5_0_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19
342 #define EFI_ACPI_5_0_HW_REDUCED_ACPI BIT20
343 #define EFI_ACPI_5_0_LOW_POWER_S0_IDLE_CAPABLE BIT21
344
345 ///
346 /// Firmware ACPI Control Structure
347 ///
348 typedef struct {
349 UINT32 Signature;
350 UINT32 Length;
351 UINT32 HardwareSignature;
352 UINT32 FirmwareWakingVector;
353 UINT32 GlobalLock;
354 UINT32 Flags;
355 UINT64 XFirmwareWakingVector;
356 UINT8 Version;
357 UINT8 Reserved0[3];
358 UINT32 OspmFlags;
359 UINT8 Reserved1[24];
360 } EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;
361
362 ///
363 /// FACS Version (as defined in ACPI 5.0 spec.)
364 ///
365 #define EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x02
366
367 ///
368 /// Firmware Control Structure Feature Flags
369 /// All other bits are reserved and must be set to 0.
370 ///
371 #define EFI_ACPI_5_0_S4BIOS_F BIT0
372 #define EFI_ACPI_5_0_64BIT_WAKE_SUPPORTED_F BIT1
373
374 ///
375 /// OSPM Enabled Firmware Control Structure Flags
376 /// All other bits are reserved and must be set to 0.
377 ///
378 #define EFI_ACPI_5_0_OSPM_64BIT_WAKE_F BIT0
379
380 //
381 // Differentiated System Description Table,
382 // Secondary System Description Table
383 // and Persistent System Description Table,
384 // no definition needed as they are common description table header, the same with
385 // EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block.
386 //
387 #define EFI_ACPI_5_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
388 #define EFI_ACPI_5_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
389
390 ///
391 /// Multiple APIC Description Table header definition. The rest of the table
392 /// must be defined in a platform specific manner.
393 ///
394 typedef struct {
395 EFI_ACPI_DESCRIPTION_HEADER Header;
396 UINT32 LocalApicAddress;
397 UINT32 Flags;
398 } EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;
399
400 ///
401 /// MADT Revision (as defined in ACPI 5.0 spec.)
402 ///
403 #define EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x03
404
405 ///
406 /// Multiple APIC Flags
407 /// All other bits are reserved and must be set to 0.
408 ///
409 #define EFI_ACPI_5_0_PCAT_COMPAT BIT0
410
411 //
412 // Multiple APIC Description Table APIC structure types
413 // All other values between 0x0D and 0x7F are reserved and
414 // will be ignored by OSPM. 0x80 ~ 0xFF are reserved for OEM.
415 //
416 #define EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC 0x00
417 #define EFI_ACPI_5_0_IO_APIC 0x01
418 #define EFI_ACPI_5_0_INTERRUPT_SOURCE_OVERRIDE 0x02
419 #define EFI_ACPI_5_0_NON_MASKABLE_INTERRUPT_SOURCE 0x03
420 #define EFI_ACPI_5_0_LOCAL_APIC_NMI 0x04
421 #define EFI_ACPI_5_0_LOCAL_APIC_ADDRESS_OVERRIDE 0x05
422 #define EFI_ACPI_5_0_IO_SAPIC 0x06
423 #define EFI_ACPI_5_0_LOCAL_SAPIC 0x07
424 #define EFI_ACPI_5_0_PLATFORM_INTERRUPT_SOURCES 0x08
425 #define EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC 0x09
426 #define EFI_ACPI_5_0_LOCAL_X2APIC_NMI 0x0A
427 #define EFI_ACPI_5_0_GIC 0x0B
428 #define EFI_ACPI_5_0_GICD 0x0C
429
430 //
431 // APIC Structure Definitions
432 //
433
434 ///
435 /// Processor Local APIC Structure Definition
436 ///
437 typedef struct {
438 UINT8 Type;
439 UINT8 Length;
440 UINT8 AcpiProcessorId;
441 UINT8 ApicId;
442 UINT32 Flags;
443 } EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_STRUCTURE;
444
445 ///
446 /// Local APIC Flags. All other bits are reserved and must be 0.
447 ///
448 #define EFI_ACPI_5_0_LOCAL_APIC_ENABLED BIT0
449
450 ///
451 /// IO APIC Structure
452 ///
453 typedef struct {
454 UINT8 Type;
455 UINT8 Length;
456 UINT8 IoApicId;
457 UINT8 Reserved;
458 UINT32 IoApicAddress;
459 UINT32 GlobalSystemInterruptBase;
460 } EFI_ACPI_5_0_IO_APIC_STRUCTURE;
461
462 ///
463 /// Interrupt Source Override Structure
464 ///
465 typedef struct {
466 UINT8 Type;
467 UINT8 Length;
468 UINT8 Bus;
469 UINT8 Source;
470 UINT32 GlobalSystemInterrupt;
471 UINT16 Flags;
472 } EFI_ACPI_5_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;
473
474 ///
475 /// Platform Interrupt Sources Structure Definition
476 ///
477 typedef struct {
478 UINT8 Type;
479 UINT8 Length;
480 UINT16 Flags;
481 UINT8 InterruptType;
482 UINT8 ProcessorId;
483 UINT8 ProcessorEid;
484 UINT8 IoSapicVector;
485 UINT32 GlobalSystemInterrupt;
486 UINT32 PlatformInterruptSourceFlags;
487 UINT8 CpeiProcessorOverride;
488 UINT8 Reserved[31];
489 } EFI_ACPI_5_0_PLATFORM_INTERRUPT_APIC_STRUCTURE;
490
491 //
492 // MPS INTI flags.
493 // All other bits are reserved and must be set to 0.
494 //
495 #define EFI_ACPI_5_0_POLARITY (3 << 0)
496 #define EFI_ACPI_5_0_TRIGGER_MODE (3 << 2)
497
498 ///
499 /// Non-Maskable Interrupt Source Structure
500 ///
501 typedef struct {
502 UINT8 Type;
503 UINT8 Length;
504 UINT16 Flags;
505 UINT32 GlobalSystemInterrupt;
506 } EFI_ACPI_5_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;
507
508 ///
509 /// Local APIC NMI Structure
510 ///
511 typedef struct {
512 UINT8 Type;
513 UINT8 Length;
514 UINT8 AcpiProcessorId;
515 UINT16 Flags;
516 UINT8 LocalApicLint;
517 } EFI_ACPI_5_0_LOCAL_APIC_NMI_STRUCTURE;
518
519 ///
520 /// Local APIC Address Override Structure
521 ///
522 typedef struct {
523 UINT8 Type;
524 UINT8 Length;
525 UINT16 Reserved;
526 UINT64 LocalApicAddress;
527 } EFI_ACPI_5_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;
528
529 ///
530 /// IO SAPIC Structure
531 ///
532 typedef struct {
533 UINT8 Type;
534 UINT8 Length;
535 UINT8 IoApicId;
536 UINT8 Reserved;
537 UINT32 GlobalSystemInterruptBase;
538 UINT64 IoSapicAddress;
539 } EFI_ACPI_5_0_IO_SAPIC_STRUCTURE;
540
541 ///
542 /// Local SAPIC Structure
543 /// This struct followed by a null-terminated ASCII string - ACPI Processor UID String
544 ///
545 typedef struct {
546 UINT8 Type;
547 UINT8 Length;
548 UINT8 AcpiProcessorId;
549 UINT8 LocalSapicId;
550 UINT8 LocalSapicEid;
551 UINT8 Reserved[3];
552 UINT32 Flags;
553 UINT32 ACPIProcessorUIDValue;
554 } EFI_ACPI_5_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE;
555
556 ///
557 /// Platform Interrupt Sources Structure
558 ///
559 typedef struct {
560 UINT8 Type;
561 UINT8 Length;
562 UINT16 Flags;
563 UINT8 InterruptType;
564 UINT8 ProcessorId;
565 UINT8 ProcessorEid;
566 UINT8 IoSapicVector;
567 UINT32 GlobalSystemInterrupt;
568 UINT32 PlatformInterruptSourceFlags;
569 } EFI_ACPI_5_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;
570
571 ///
572 /// Platform Interrupt Source Flags.
573 /// All other bits are reserved and must be set to 0.
574 ///
575 #define EFI_ACPI_5_0_CPEI_PROCESSOR_OVERRIDE BIT0
576
577 ///
578 /// Processor Local x2APIC Structure Definition
579 ///
580 typedef struct {
581 UINT8 Type;
582 UINT8 Length;
583 UINT8 Reserved[2];
584 UINT32 X2ApicId;
585 UINT32 Flags;
586 UINT32 AcpiProcessorUid;
587 } EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC_STRUCTURE;
588
589 ///
590 /// Local x2APIC NMI Structure
591 ///
592 typedef struct {
593 UINT8 Type;
594 UINT8 Length;
595 UINT16 Flags;
596 UINT32 AcpiProcessorUid;
597 UINT8 LocalX2ApicLint;
598 UINT8 Reserved[3];
599 } EFI_ACPI_5_0_LOCAL_X2APIC_NMI_STRUCTURE;
600
601 ///
602 /// GIC Structure
603 ///
604 typedef struct {
605 UINT8 Type;
606 UINT8 Length;
607 UINT16 Reserved;
608 UINT32 GicId;
609 UINT32 AcpiProcessorUid;
610 UINT32 Flags;
611 UINT32 ParkingProtocolVersion;
612 UINT32 PerformanceInterruptGsiv;
613 UINT64 ParkedAddress;
614 UINT64 PhysicalBaseAddress;
615 } EFI_ACPI_5_0_GIC_STRUCTURE;
616
617 ///
618 /// GIC Flags. All other bits are reserved and must be 0.
619 ///
620 #define EFI_ACPI_5_0_GIC_ENABLED BIT0
621 #define EFI_ACPI_5_0_PERFORMANCE_INTERRUPT_MODEL BIT1
622
623 ///
624 /// GIC Distributor Structure
625 ///
626 typedef struct {
627 UINT8 Type;
628 UINT8 Length;
629 UINT16 Reserved1;
630 UINT32 GicId;
631 UINT64 PhysicalBaseAddress;
632 UINT32 SystemVectorBase;
633 UINT32 Reserved2;
634 } EFI_ACPI_5_0_GIC_DISTRIBUTOR_STRUCTURE;
635
636 ///
637 /// Smart Battery Description Table (SBST)
638 ///
639 typedef struct {
640 EFI_ACPI_DESCRIPTION_HEADER Header;
641 UINT32 WarningEnergyLevel;
642 UINT32 LowEnergyLevel;
643 UINT32 CriticalEnergyLevel;
644 } EFI_ACPI_5_0_SMART_BATTERY_DESCRIPTION_TABLE;
645
646 ///
647 /// SBST Version (as defined in ACPI 5.0 spec.)
648 ///
649 #define EFI_ACPI_5_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
650
651 ///
652 /// Embedded Controller Boot Resources Table (ECDT)
653 /// The table is followed by a null terminated ASCII string that contains
654 /// a fully qualified reference to the name space object.
655 ///
656 typedef struct {
657 EFI_ACPI_DESCRIPTION_HEADER Header;
658 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE EcControl;
659 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE EcData;
660 UINT32 Uid;
661 UINT8 GpeBit;
662 } EFI_ACPI_5_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;
663
664 ///
665 /// ECDT Version (as defined in ACPI 5.0 spec.)
666 ///
667 #define EFI_ACPI_5_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01
668
669 ///
670 /// System Resource Affinity Table (SRAT). The rest of the table
671 /// must be defined in a platform specific manner.
672 ///
673 typedef struct {
674 EFI_ACPI_DESCRIPTION_HEADER Header;
675 UINT32 Reserved1; ///< Must be set to 1
676 UINT64 Reserved2;
677 } EFI_ACPI_5_0_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER;
678
679 ///
680 /// SRAT Version (as defined in ACPI 5.0 spec.)
681 ///
682 #define EFI_ACPI_5_0_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION 0x03
683
684 //
685 // SRAT structure types.
686 // All other values between 0x03 an 0xFF are reserved and
687 // will be ignored by OSPM.
688 //
689 #define EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY 0x00
690 #define EFI_ACPI_5_0_MEMORY_AFFINITY 0x01
691 #define EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC_AFFINITY 0x02
692
693 ///
694 /// Processor Local APIC/SAPIC Affinity Structure Definition
695 ///
696 typedef struct {
697 UINT8 Type;
698 UINT8 Length;
699 UINT8 ProximityDomain7To0;
700 UINT8 ApicId;
701 UINT32 Flags;
702 UINT8 LocalSapicEid;
703 UINT8 ProximityDomain31To8[3];
704 UINT32 ClockDomain;
705 } EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE;
706
707 ///
708 /// Local APIC/SAPIC Flags. All other bits are reserved and must be 0.
709 ///
710 #define EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)
711
712 ///
713 /// Memory Affinity Structure Definition
714 ///
715 typedef struct {
716 UINT8 Type;
717 UINT8 Length;
718 UINT32 ProximityDomain;
719 UINT16 Reserved1;
720 UINT32 AddressBaseLow;
721 UINT32 AddressBaseHigh;
722 UINT32 LengthLow;
723 UINT32 LengthHigh;
724 UINT32 Reserved2;
725 UINT32 Flags;
726 UINT64 Reserved3;
727 } EFI_ACPI_5_0_MEMORY_AFFINITY_STRUCTURE;
728
729 //
730 // Memory Flags. All other bits are reserved and must be 0.
731 //
732 #define EFI_ACPI_5_0_MEMORY_ENABLED (1 << 0)
733 #define EFI_ACPI_5_0_MEMORY_HOT_PLUGGABLE (1 << 1)
734 #define EFI_ACPI_5_0_MEMORY_NONVOLATILE (1 << 2)
735
736 ///
737 /// Processor Local x2APIC Affinity Structure Definition
738 ///
739 typedef struct {
740 UINT8 Type;
741 UINT8 Length;
742 UINT8 Reserved1[2];
743 UINT32 ProximityDomain;
744 UINT32 X2ApicId;
745 UINT32 Flags;
746 UINT32 ClockDomain;
747 UINT8 Reserved2[4];
748 } EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE;
749
750 ///
751 /// System Locality Distance Information Table (SLIT).
752 /// The rest of the table is a matrix.
753 ///
754 typedef struct {
755 EFI_ACPI_DESCRIPTION_HEADER Header;
756 UINT64 NumberOfSystemLocalities;
757 } EFI_ACPI_5_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER;
758
759 ///
760 /// SLIT Version (as defined in ACPI 5.0 spec.)
761 ///
762 #define EFI_ACPI_5_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION 0x01
763
764 ///
765 /// Corrected Platform Error Polling Table (CPEP)
766 ///
767 typedef struct {
768 EFI_ACPI_DESCRIPTION_HEADER Header;
769 UINT8 Reserved[8];
770 } EFI_ACPI_5_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER;
771
772 ///
773 /// CPEP Version (as defined in ACPI 5.0 spec.)
774 ///
775 #define EFI_ACPI_5_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01
776
777 //
778 // CPEP processor structure types.
779 //
780 #define EFI_ACPI_5_0_CPEP_PROCESSOR_APIC_SAPIC 0x00
781
782 ///
783 /// Corrected Platform Error Polling Processor Structure Definition
784 ///
785 typedef struct {
786 UINT8 Type;
787 UINT8 Length;
788 UINT8 ProcessorId;
789 UINT8 ProcessorEid;
790 UINT32 PollingInterval;
791 } EFI_ACPI_5_0_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE;
792
793 ///
794 /// Maximum System Characteristics Table (MSCT)
795 ///
796 typedef struct {
797 EFI_ACPI_DESCRIPTION_HEADER Header;
798 UINT32 OffsetProxDomInfo;
799 UINT32 MaximumNumberOfProximityDomains;
800 UINT32 MaximumNumberOfClockDomains;
801 UINT64 MaximumPhysicalAddress;
802 } EFI_ACPI_5_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER;
803
804 ///
805 /// MSCT Version (as defined in ACPI 5.0 spec.)
806 ///
807 #define EFI_ACPI_5_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01
808
809 ///
810 /// Maximum Proximity Domain Information Structure Definition
811 ///
812 typedef struct {
813 UINT8 Revision;
814 UINT8 Length;
815 UINT32 ProximityDomainRangeLow;
816 UINT32 ProximityDomainRangeHigh;
817 UINT32 MaximumProcessorCapacity;
818 UINT64 MaximumMemoryCapacity;
819 } EFI_ACPI_5_0_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE;
820
821 ///
822 /// ACPI RAS Feature Table definition.
823 ///
824 typedef struct {
825 EFI_ACPI_DESCRIPTION_HEADER Header;
826 UINT8 PlatformCommunicationChannelIdentifier[12];
827 } EFI_ACPI_5_0_RAS_FEATURE_TABLE;
828
829 ///
830 /// RASF Version (as defined in ACPI 5.0 spec.)
831 ///
832 #define EFI_ACPI_5_0_RAS_FEATURE_TABLE_REVISION 0x01
833
834 ///
835 /// ACPI RASF Platform Communication Channel Shared Memory Region definition.
836 ///
837 typedef struct {
838 UINT32 Signature;
839 UINT16 Command;
840 UINT16 Status;
841 UINT16 Version;
842 UINT8 RASCapabilities[16];
843 UINT8 SetRASCapabilities[16];
844 UINT16 NumberOfRASFParameterBlocks;
845 UINT32 SetRASCapabilitiesStatus;
846 } EFI_ACPI_5_0_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;
847
848 ///
849 /// ACPI RASF PCC command code
850 ///
851 #define EFI_ACPI_5_0_RASF_PCC_COMMAND_CODE_EXECUTE_RASF_COMMAND 0x01
852
853 ///
854 /// ACPI RASF Platform RAS Capabilities
855 ///
856 #define EFI_ACPI_5_0_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED 0x01
857 #define EFI_ACPI_5_0_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED_AND_EXPOSED_TO_SOFTWARE 0x02
858
859 ///
860 /// ACPI RASF Parameter Block structure for PATROL_SCRUB
861 ///
862 typedef struct {
863 UINT16 Type;
864 UINT16 Version;
865 UINT16 Length;
866 UINT16 PatrolScrubCommand;
867 UINT64 RequestedAddressRange[2];
868 UINT64 ActualAddressRange[2];
869 UINT16 Flags;
870 UINT8 RequestedSpeed;
871 } EFI_ACPI_5_0_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE;
872
873 ///
874 /// ACPI RASF Patrol Scrub command
875 ///
876 #define EFI_ACPI_5_0_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01
877 #define EFI_ACPI_5_0_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02
878 #define EFI_ACPI_5_0_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03
879
880 ///
881 /// Memory Power State Table definition.
882 ///
883 typedef struct {
884 EFI_ACPI_DESCRIPTION_HEADER Header;
885 UINT8 PlatformCommunicationChannelIdentifier;
886 UINT8 Reserved[3];
887 // Memory Power Node Structure
888 // Memory Power State Characteristics
889 } EFI_ACPI_5_0_MEMORY_POWER_STATUS_TABLE;
890
891 ///
892 /// MPST Version (as defined in ACPI 5.0 spec.)
893 ///
894 #define EFI_ACPI_5_0_MEMORY_POWER_STATE_TABLE_REVISION 0x01
895
896 ///
897 /// MPST Platform Communication Channel Shared Memory Region definition.
898 ///
899 typedef struct {
900 UINT32 Signature;
901 UINT16 Command;
902 UINT16 Status;
903 UINT32 MemoryPowerCommandRegister;
904 UINT32 MemoryPowerStatusRegister;
905 UINT32 PowerStateId;
906 UINT32 MemoryPowerNodeId;
907 UINT64 MemoryEnergyConsumed;
908 UINT64 ExpectedAveragePowerComsuned;
909 } EFI_ACPI_5_0_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;
910
911 ///
912 /// ACPI MPST PCC command code
913 ///
914 #define EFI_ACPI_5_0_MPST_PCC_COMMAND_CODE_EXECUTE_MPST_COMMAND 0x03
915
916 ///
917 /// ACPI MPST Memory Power command
918 ///
919 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01
920 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02
921 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03
922 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04
923
924 ///
925 /// MPST Memory Power Node Table
926 ///
927 typedef struct {
928 UINT8 PowerStateValue;
929 UINT8 PowerStateInformationIndex;
930 } EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE;
931
932 typedef struct {
933 UINT8 Flag;
934 UINT8 Reserved;
935 UINT16 MemoryPowerNodeId;
936 UINT32 Length;
937 UINT64 AddressBase;
938 UINT64 AddressLength;
939 UINT32 NumberOfPowerStates;
940 UINT32 NumberOfPhysicalComponents;
941 //EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates];
942 //UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents];
943 } EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE;
944
945 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01
946 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02
947 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04
948
949 typedef struct {
950 UINT16 MemoryPowerNodeCount;
951 UINT8 Reserved[2];
952 } EFI_ACPI_5_0_MPST_MEMORY_POWER_NODE_TABLE;
953
954 ///
955 /// MPST Memory Power State Characteristics Table
956 ///
957 typedef struct {
958 UINT8 PowerStateStructureID;
959 UINT8 Flag;
960 UINT16 Reserved;
961 UINT32 AveragePowerConsumedInMPS0;
962 UINT32 RelativePowerSavingToMPS0;
963 UINT64 ExitLatencyToMPS0;
964 } EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE;
965
966 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01
967 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02
968 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04
969
970 typedef struct {
971 UINT16 MemoryPowerStateCharacteristicsCount;
972 UINT8 Reserved[2];
973 } EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE;
974
975 ///
976 /// Memory Topology Table definition.
977 ///
978 typedef struct {
979 EFI_ACPI_DESCRIPTION_HEADER Header;
980 UINT32 Reserved;
981 } EFI_ACPI_5_0_MEMORY_TOPOLOGY_TABLE;
982
983 ///
984 /// PMTT Version (as defined in ACPI 5.0 spec.)
985 ///
986 #define EFI_ACPI_5_0_MEMORY_TOPOLOGY_TABLE_REVISION 0x01
987
988 ///
989 /// Common Memory Aggregator Device Structure.
990 ///
991 typedef struct {
992 UINT8 Type;
993 UINT8 Reserved;
994 UINT16 Length;
995 UINT16 Flags;
996 UINT16 Reserved1;
997 } EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
998
999 ///
1000 /// Memory Aggregator Device Type
1001 ///
1002 #define EFI_ACPI_5_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET 0x1
1003 #define EFI_ACPI_5_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER 0x2
1004 #define EFI_ACPI_5_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM 0x3
1005
1006 ///
1007 /// Socket Memory Aggregator Device Structure.
1008 ///
1009 typedef struct {
1010 EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
1011 UINT16 SocketIdentifier;
1012 UINT16 Reserved;
1013 //EFI_ACPI_5_0_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE MemoryController[];
1014 } EFI_ACPI_5_0_PMMT_SOCKET_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
1015
1016 ///
1017 /// MemoryController Memory Aggregator Device Structure.
1018 ///
1019 typedef struct {
1020 EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
1021 UINT32 ReadLatency;
1022 UINT32 WriteLatency;
1023 UINT32 ReadBandwidth;
1024 UINT32 WriteBandwidth;
1025 UINT16 OptimalAccessUnit;
1026 UINT16 OptimalAccessAlignment;
1027 UINT16 Reserved;
1028 UINT16 NumberOfProximityDomains;
1029 //UINT32 ProximityDomain[NumberOfProximityDomains];
1030 //EFI_ACPI_5_0_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE PhysicalComponent[];
1031 } EFI_ACPI_5_0_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
1032
1033 ///
1034 /// DIMM Memory Aggregator Device Structure.
1035 ///
1036 typedef struct {
1037 EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
1038 UINT16 PhysicalComponentIdentifier;
1039 UINT16 Reserved;
1040 UINT32 SizeOfDimm;
1041 UINT32 SmbiosHandle;
1042 } EFI_ACPI_5_0_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
1043
1044 ///
1045 /// Boot Graphics Resource Table definition.
1046 ///
1047 typedef struct {
1048 EFI_ACPI_DESCRIPTION_HEADER Header;
1049 ///
1050 /// 2-bytes (16 bit) version ID. This value must be 1.
1051 ///
1052 UINT16 Version;
1053 ///
1054 /// 1-byte status field indicating current status about the table.
1055 /// Bits[7:1] = Reserved (must be zero)
1056 /// Bit [0] = Valid. A one indicates the boot image graphic is valid.
1057 ///
1058 UINT8 Status;
1059 ///
1060 /// 1-byte enumerated type field indicating format of the image.
1061 /// 0 = Bitmap
1062 /// 1 - 255 Reserved (for future use)
1063 ///
1064 UINT8 ImageType;
1065 ///
1066 /// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy
1067 /// of the image bitmap.
1068 ///
1069 UINT64 ImageAddress;
1070 ///
1071 /// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image.
1072 /// (X, Y) display offset of the top left corner of the boot image.
1073 /// The top left corner of the display is at offset (0, 0).
1074 ///
1075 UINT32 ImageOffsetX;
1076 ///
1077 /// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image.
1078 /// (X, Y) display offset of the top left corner of the boot image.
1079 /// The top left corner of the display is at offset (0, 0).
1080 ///
1081 UINT32 ImageOffsetY;
1082 } EFI_ACPI_5_0_BOOT_GRAPHICS_RESOURCE_TABLE;
1083
1084 ///
1085 /// BGRT Revision
1086 ///
1087 #define EFI_ACPI_5_0_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1
1088
1089 ///
1090 /// BGRT Version
1091 ///
1092 #define EFI_ACPI_5_0_BGRT_VERSION 0x01
1093
1094 ///
1095 /// BGRT Status
1096 ///
1097 #define EFI_ACPI_5_0_BGRT_STATUS_INVALID 0x00
1098 #define EFI_ACPI_5_0_BGRT_STATUS_VALID 0x01
1099
1100 ///
1101 /// BGRT Image Type
1102 ///
1103 #define EFI_ACPI_5_0_BGRT_IMAGE_TYPE_BMP 0x00
1104
1105 ///
1106 /// FPDT Version (as defined in ACPI 5.0 spec.)
1107 ///
1108 #define EFI_ACPI_5_0_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01
1109
1110 ///
1111 /// FPDT Performance Record Types
1112 ///
1113 #define EFI_ACPI_5_0_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000
1114 #define EFI_ACPI_5_0_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001
1115
1116 ///
1117 /// FPDT Performance Record Revision
1118 ///
1119 #define EFI_ACPI_5_0_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01
1120 #define EFI_ACPI_5_0_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01
1121
1122 ///
1123 /// FPDT Runtime Performance Record Types
1124 ///
1125 #define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000
1126 #define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001
1127 #define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002
1128
1129 ///
1130 /// FPDT Runtime Performance Record Revision
1131 ///
1132 #define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_REVISION_S3_RESUME 0x01
1133 #define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_REVISION_S3_SUSPEND 0x01
1134 #define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_REVISION_FIRMWARE_BASIC_BOOT 0x02
1135
1136 ///
1137 /// FPDT Performance Record header
1138 ///
1139 typedef struct {
1140 UINT16 Type;
1141 UINT8 Length;
1142 UINT8 Revision;
1143 } EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER;
1144
1145 ///
1146 /// FPDT Performance Table header
1147 ///
1148 typedef struct {
1149 UINT32 Signature;
1150 UINT32 Length;
1151 } EFI_ACPI_5_0_FPDT_PERFORMANCE_TABLE_HEADER;
1152
1153 ///
1154 /// FPDT Firmware Basic Boot Performance Pointer Record Structure
1155 ///
1156 typedef struct {
1157 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
1158 UINT32 Reserved;
1159 ///
1160 /// 64-bit processor-relative physical address of the Basic Boot Performance Table.
1161 ///
1162 UINT64 BootPerformanceTablePointer;
1163 } EFI_ACPI_5_0_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD;
1164
1165 ///
1166 /// FPDT S3 Performance Table Pointer Record Structure
1167 ///
1168 typedef struct {
1169 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
1170 UINT32 Reserved;
1171 ///
1172 /// 64-bit processor-relative physical address of the S3 Performance Table.
1173 ///
1174 UINT64 S3PerformanceTablePointer;
1175 } EFI_ACPI_5_0_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD;
1176
1177 ///
1178 /// FPDT Firmware Basic Boot Performance Record Structure
1179 ///
1180 typedef struct {
1181 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
1182 UINT32 Reserved;
1183 ///
1184 /// Timer value logged at the beginning of firmware image execution.
1185 /// This may not always be zero or near zero.
1186 ///
1187 UINT64 ResetEnd;
1188 ///
1189 /// Timer value logged just prior to loading the OS boot loader into memory.
1190 /// For non-UEFI compatible boots, this field must be zero.
1191 ///
1192 UINT64 OsLoaderLoadImageStart;
1193 ///
1194 /// Timer value logged just prior to launching the previously loaded OS boot loader image.
1195 /// For non-UEFI compatible boots, the timer value logged will be just prior
1196 /// to the INT 19h handler invocation.
1197 ///
1198 UINT64 OsLoaderStartImageStart;
1199 ///
1200 /// Timer value logged at the point when the OS loader calls the
1201 /// ExitBootServices function for UEFI compatible firmware.
1202 /// For non-UEFI compatible boots, this field must be zero.
1203 ///
1204 UINT64 ExitBootServicesEntry;
1205 ///
1206 /// Timer value logged at the point just prior towhen the OS loader gaining
1207 /// control back from calls the ExitBootServices function for UEFI compatible firmware.
1208 /// For non-UEFI compatible boots, this field must be zero.
1209 ///
1210 UINT64 ExitBootServicesExit;
1211 } EFI_ACPI_5_0_FPDT_FIRMWARE_BASIC_BOOT_RECORD;
1212
1213 ///
1214 /// FPDT Firmware Basic Boot Performance Table signature
1215 ///
1216 #define EFI_ACPI_5_0_FPDT_BOOT_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('F', 'B', 'P', 'T')
1217
1218 //
1219 // FPDT Firmware Basic Boot Performance Table
1220 //
1221 typedef struct {
1222 EFI_ACPI_5_0_FPDT_PERFORMANCE_TABLE_HEADER Header;
1223 //
1224 // one or more Performance Records.
1225 //
1226 } EFI_ACPI_5_0_FPDT_FIRMWARE_BASIC_BOOT_TABLE;
1227
1228 ///
1229 /// FPDT "S3PT" S3 Performance Table
1230 ///
1231 #define EFI_ACPI_5_0_FPDT_S3_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('S', '3', 'P', 'T')
1232
1233 //
1234 // FPDT Firmware S3 Boot Performance Table
1235 //
1236 typedef struct {
1237 EFI_ACPI_5_0_FPDT_PERFORMANCE_TABLE_HEADER Header;
1238 //
1239 // one or more Performance Records.
1240 //
1241 } EFI_ACPI_5_0_FPDT_FIRMWARE_S3_BOOT_TABLE;
1242
1243 ///
1244 /// FPDT Basic S3 Resume Performance Record
1245 ///
1246 typedef struct {
1247 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
1248 ///
1249 /// A count of the number of S3 resume cycles since the last full boot sequence.
1250 ///
1251 UINT32 ResumeCount;
1252 ///
1253 /// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the
1254 /// OS waking vector. Only the most recent resume cycle's time is retained.
1255 ///
1256 UINT64 FullResume;
1257 ///
1258 /// Average timer value of all resume cycles logged since the last full boot
1259 /// sequence, including the most recent resume. Note that the entire log of
1260 /// timer values does not need to be retained in order to calculate this average.
1261 ///
1262 UINT64 AverageResume;
1263 } EFI_ACPI_5_0_FPDT_S3_RESUME_RECORD;
1264
1265 ///
1266 /// FPDT Basic S3 Suspend Performance Record
1267 ///
1268 typedef struct {
1269 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
1270 ///
1271 /// Timer value recorded at the OS write to SLP_TYP upon entry to S3.
1272 /// Only the most recent suspend cycle's timer value is retained.
1273 ///
1274 UINT64 SuspendStart;
1275 ///
1276 /// Timer value recorded at the final firmware write to SLP_TYP (or other
1277 /// mechanism) used to trigger hardware entry to S3.
1278 /// Only the most recent suspend cycle's timer value is retained.
1279 ///
1280 UINT64 SuspendEnd;
1281 } EFI_ACPI_5_0_FPDT_S3_SUSPEND_RECORD;
1282
1283 ///
1284 /// Firmware Performance Record Table definition.
1285 ///
1286 typedef struct {
1287 EFI_ACPI_DESCRIPTION_HEADER Header;
1288 } EFI_ACPI_5_0_FIRMWARE_PERFORMANCE_RECORD_TABLE;
1289
1290 ///
1291 /// Generic Timer Description Table definition.
1292 ///
1293 typedef struct {
1294 EFI_ACPI_DESCRIPTION_HEADER Header;
1295 UINT64 PhysicalAddress;
1296 UINT32 GlobalFlags;
1297 UINT32 SecurePL1TimerGSIV;
1298 UINT32 SecurePL1TimerFlags;
1299 UINT32 NonSecurePL1TimerGSIV;
1300 UINT32 NonSecurePL1TimerFlags;
1301 UINT32 VirtualTimerGSIV;
1302 UINT32 VirtualTimerFlags;
1303 UINT32 NonSecurePL2TimerGSIV;
1304 UINT32 NonSecurePL2TimerFlags;
1305 } EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE;
1306
1307 ///
1308 /// GTDT Version (as defined in ACPI 5.0 spec.)
1309 ///
1310 #define EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x01
1311
1312 ///
1313 /// Global Flags. All other bits are reserved and must be 0.
1314 ///
1315 #define EFI_ACPI_5_0_GTDT_GLOBAL_FLAG_MEMORY_MAPPED_BLOCK_PRESENT BIT0
1316 #define EFI_ACPI_5_0_GTDT_GLOBAL_FLAG_INTERRUPT_MODE BIT1
1317
1318 ///
1319 /// Timer Flags. All other bits are reserved and must be 0.
1320 ///
1321 #define EFI_ACPI_5_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0
1322 #define EFI_ACPI_5_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1
1323
1324 ///
1325 /// Boot Error Record Table (BERT)
1326 ///
1327 typedef struct {
1328 EFI_ACPI_DESCRIPTION_HEADER Header;
1329 UINT32 BootErrorRegionLength;
1330 UINT64 BootErrorRegion;
1331 } EFI_ACPI_5_0_BOOT_ERROR_RECORD_TABLE_HEADER;
1332
1333 ///
1334 /// BERT Version (as defined in ACPI 5.0 spec.)
1335 ///
1336 #define EFI_ACPI_5_0_BOOT_ERROR_RECORD_TABLE_REVISION 0x01
1337
1338 ///
1339 /// Boot Error Region Block Status Definition
1340 ///
1341 typedef struct {
1342 UINT32 UncorrectableErrorValid:1;
1343 UINT32 CorrectableErrorValid:1;
1344 UINT32 MultipleUncorrectableErrors:1;
1345 UINT32 MultipleCorrectableErrors:1;
1346 UINT32 ErrorDataEntryCount:10;
1347 UINT32 Reserved:18;
1348 } EFI_ACPI_5_0_ERROR_BLOCK_STATUS;
1349
1350 ///
1351 /// Boot Error Region Definition
1352 ///
1353 typedef struct {
1354 EFI_ACPI_5_0_ERROR_BLOCK_STATUS BlockStatus;
1355 UINT32 RawDataOffset;
1356 UINT32 RawDataLength;
1357 UINT32 DataLength;
1358 UINT32 ErrorSeverity;
1359 } EFI_ACPI_5_0_BOOT_ERROR_REGION_STRUCTURE;
1360
1361 //
1362 // Boot Error Severity types
1363 //
1364 #define EFI_ACPI_5_0_ERROR_SEVERITY_CORRECTABLE 0x00
1365 #define EFI_ACPI_5_0_ERROR_SEVERITY_FATAL 0x01
1366 #define EFI_ACPI_5_0_ERROR_SEVERITY_CORRECTED 0x02
1367 #define EFI_ACPI_5_0_ERROR_SEVERITY_NONE 0x03
1368
1369 ///
1370 /// Generic Error Data Entry Definition
1371 ///
1372 typedef struct {
1373 UINT8 SectionType[16];
1374 UINT32 ErrorSeverity;
1375 UINT16 Revision;
1376 UINT8 ValidationBits;
1377 UINT8 Flags;
1378 UINT32 ErrorDataLength;
1379 UINT8 FruId[16];
1380 UINT8 FruText[20];
1381 } EFI_ACPI_5_0_GENERIC_ERROR_DATA_ENTRY_STRUCTURE;
1382
1383 ///
1384 /// Generic Error Data Entry Version (as defined in ACPI 5.0 spec.)
1385 ///
1386 #define EFI_ACPI_5_0_GENERIC_ERROR_DATA_ENTRY_REVISION 0x0201
1387
1388 ///
1389 /// HEST - Hardware Error Source Table
1390 ///
1391 typedef struct {
1392 EFI_ACPI_DESCRIPTION_HEADER Header;
1393 UINT32 ErrorSourceCount;
1394 } EFI_ACPI_5_0_HARDWARE_ERROR_SOURCE_TABLE_HEADER;
1395
1396 ///
1397 /// HEST Version (as defined in ACPI 5.0 spec.)
1398 ///
1399 #define EFI_ACPI_5_0_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01
1400
1401 //
1402 // Error Source structure types.
1403 //
1404 #define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION 0x00
1405 #define EFI_ACPI_5_0_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK 0x01
1406 #define EFI_ACPI_5_0_IA32_ARCHITECTURE_NMI_ERROR 0x02
1407 #define EFI_ACPI_5_0_PCI_EXPRESS_ROOT_PORT_AER 0x06
1408 #define EFI_ACPI_5_0_PCI_EXPRESS_DEVICE_AER 0x07
1409 #define EFI_ACPI_5_0_PCI_EXPRESS_BRIDGE_AER 0x08
1410 #define EFI_ACPI_5_0_GENERIC_HARDWARE_ERROR 0x09
1411
1412 //
1413 // Error Source structure flags.
1414 //
1415 #define EFI_ACPI_5_0_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0)
1416 #define EFI_ACPI_5_0_ERROR_SOURCE_FLAG_GLOBAL (1 << 1)
1417
1418 ///
1419 /// IA-32 Architecture Machine Check Exception Structure Definition
1420 ///
1421 typedef struct {
1422 UINT16 Type;
1423 UINT16 SourceId;
1424 UINT8 Reserved0[2];
1425 UINT8 Flags;
1426 UINT8 Enabled;
1427 UINT32 NumberOfRecordsToPreAllocate;
1428 UINT32 MaxSectionsPerRecord;
1429 UINT64 GlobalCapabilityInitData;
1430 UINT64 GlobalControlInitData;
1431 UINT8 NumberOfHardwareBanks;
1432 UINT8 Reserved1[7];
1433 } EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE;
1434
1435 ///
1436 /// IA-32 Architecture Machine Check Bank Structure Definition
1437 ///
1438 typedef struct {
1439 UINT8 BankNumber;
1440 UINT8 ClearStatusOnInitialization;
1441 UINT8 StatusDataFormat;
1442 UINT8 Reserved0;
1443 UINT32 ControlRegisterMsrAddress;
1444 UINT64 ControlInitData;
1445 UINT32 StatusRegisterMsrAddress;
1446 UINT32 AddressRegisterMsrAddress;
1447 UINT32 MiscRegisterMsrAddress;
1448 } EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE;
1449
1450 ///
1451 /// IA-32 Architecture Machine Check Bank Structure MCA data format
1452 ///
1453 #define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00
1454 #define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01
1455 #define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02
1456
1457 //
1458 // Hardware Error Notification types. All other values are reserved
1459 //
1460 #define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00
1461 #define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01
1462 #define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02
1463 #define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_SCI 0x03
1464 #define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_NMI 0x04
1465
1466 ///
1467 /// Hardware Error Notification Configuration Write Enable Structure Definition
1468 ///
1469 typedef struct {
1470 UINT16 Type:1;
1471 UINT16 PollInterval:1;
1472 UINT16 SwitchToPollingThresholdValue:1;
1473 UINT16 SwitchToPollingThresholdWindow:1;
1474 UINT16 ErrorThresholdValue:1;
1475 UINT16 ErrorThresholdWindow:1;
1476 UINT16 Reserved:10;
1477 } EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE;
1478
1479 ///
1480 /// Hardware Error Notification Structure Definition
1481 ///
1482 typedef struct {
1483 UINT8 Type;
1484 UINT8 Length;
1485 EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable;
1486 UINT32 PollInterval;
1487 UINT32 Vector;
1488 UINT32 SwitchToPollingThresholdValue;
1489 UINT32 SwitchToPollingThresholdWindow;
1490 UINT32 ErrorThresholdValue;
1491 UINT32 ErrorThresholdWindow;
1492 } EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE;
1493
1494 ///
1495 /// IA-32 Architecture Corrected Machine Check Structure Definition
1496 ///
1497 typedef struct {
1498 UINT16 Type;
1499 UINT16 SourceId;
1500 UINT8 Reserved0[2];
1501 UINT8 Flags;
1502 UINT8 Enabled;
1503 UINT32 NumberOfRecordsToPreAllocate;
1504 UINT32 MaxSectionsPerRecord;
1505 EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
1506 UINT8 NumberOfHardwareBanks;
1507 UINT8 Reserved1[3];
1508 } EFI_ACPI_5_0_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE;
1509
1510 ///
1511 /// IA-32 Architecture NMI Error Structure Definition
1512 ///
1513 typedef struct {
1514 UINT16 Type;
1515 UINT16 SourceId;
1516 UINT8 Reserved0[2];
1517 UINT32 NumberOfRecordsToPreAllocate;
1518 UINT32 MaxSectionsPerRecord;
1519 UINT32 MaxRawDataLength;
1520 } EFI_ACPI_5_0_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE;
1521
1522 ///
1523 /// PCI Express Root Port AER Structure Definition
1524 ///
1525 typedef struct {
1526 UINT16 Type;
1527 UINT16 SourceId;
1528 UINT8 Reserved0[2];
1529 UINT8 Flags;
1530 UINT8 Enabled;
1531 UINT32 NumberOfRecordsToPreAllocate;
1532 UINT32 MaxSectionsPerRecord;
1533 UINT32 Bus;
1534 UINT16 Device;
1535 UINT16 Function;
1536 UINT16 DeviceControl;
1537 UINT8 Reserved1[2];
1538 UINT32 UncorrectableErrorMask;
1539 UINT32 UncorrectableErrorSeverity;
1540 UINT32 CorrectableErrorMask;
1541 UINT32 AdvancedErrorCapabilitiesAndControl;
1542 UINT32 RootErrorCommand;
1543 } EFI_ACPI_5_0_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE;
1544
1545 ///
1546 /// PCI Express Device AER Structure Definition
1547 ///
1548 typedef struct {
1549 UINT16 Type;
1550 UINT16 SourceId;
1551 UINT8 Reserved0[2];
1552 UINT8 Flags;
1553 UINT8 Enabled;
1554 UINT32 NumberOfRecordsToPreAllocate;
1555 UINT32 MaxSectionsPerRecord;
1556 UINT32 Bus;
1557 UINT16 Device;
1558 UINT16 Function;
1559 UINT16 DeviceControl;
1560 UINT8 Reserved1[2];
1561 UINT32 UncorrectableErrorMask;
1562 UINT32 UncorrectableErrorSeverity;
1563 UINT32 CorrectableErrorMask;
1564 UINT32 AdvancedErrorCapabilitiesAndControl;
1565 } EFI_ACPI_5_0_PCI_EXPRESS_DEVICE_AER_STRUCTURE;
1566
1567 ///
1568 /// PCI Express Bridge AER Structure Definition
1569 ///
1570 typedef struct {
1571 UINT16 Type;
1572 UINT16 SourceId;
1573 UINT8 Reserved0[2];
1574 UINT8 Flags;
1575 UINT8 Enabled;
1576 UINT32 NumberOfRecordsToPreAllocate;
1577 UINT32 MaxSectionsPerRecord;
1578 UINT32 Bus;
1579 UINT16 Device;
1580 UINT16 Function;
1581 UINT16 DeviceControl;
1582 UINT8 Reserved1[2];
1583 UINT32 UncorrectableErrorMask;
1584 UINT32 UncorrectableErrorSeverity;
1585 UINT32 CorrectableErrorMask;
1586 UINT32 AdvancedErrorCapabilitiesAndControl;
1587 UINT32 SecondaryUncorrectableErrorMask;
1588 UINT32 SecondaryUncorrectableErrorSeverity;
1589 UINT32 SecondaryAdvancedErrorCapabilitiesAndControl;
1590 } EFI_ACPI_5_0_PCI_EXPRESS_BRIDGE_AER_STRUCTURE;
1591
1592 ///
1593 /// Generic Hardware Error Source Structure Definition
1594 ///
1595 typedef struct {
1596 UINT16 Type;
1597 UINT16 SourceId;
1598 UINT16 RelatedSourceId;
1599 UINT8 Flags;
1600 UINT8 Enabled;
1601 UINT32 NumberOfRecordsToPreAllocate;
1602 UINT32 MaxSectionsPerRecord;
1603 UINT32 MaxRawDataLength;
1604 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;
1605 EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
1606 UINT32 ErrorStatusBlockLength;
1607 } EFI_ACPI_5_0_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE;
1608
1609 ///
1610 /// Generic Error Status Definition
1611 ///
1612 typedef struct {
1613 EFI_ACPI_5_0_ERROR_BLOCK_STATUS BlockStatus;
1614 UINT32 RawDataOffset;
1615 UINT32 RawDataLength;
1616 UINT32 DataLength;
1617 UINT32 ErrorSeverity;
1618 } EFI_ACPI_5_0_GENERIC_ERROR_STATUS_STRUCTURE;
1619
1620 ///
1621 /// ERST - Error Record Serialization Table
1622 ///
1623 typedef struct {
1624 EFI_ACPI_DESCRIPTION_HEADER Header;
1625 UINT32 SerializationHeaderSize;
1626 UINT8 Reserved0[4];
1627 UINT32 InstructionEntryCount;
1628 } EFI_ACPI_5_0_ERROR_RECORD_SERIALIZATION_TABLE_HEADER;
1629
1630 ///
1631 /// ERST Version (as defined in ACPI 5.0 spec.)
1632 ///
1633 #define EFI_ACPI_5_0_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01
1634
1635 ///
1636 /// ERST Serialization Actions
1637 ///
1638 #define EFI_ACPI_5_0_ERST_BEGIN_WRITE_OPERATION 0x00
1639 #define EFI_ACPI_5_0_ERST_BEGIN_READ_OPERATION 0x01
1640 #define EFI_ACPI_5_0_ERST_BEGIN_CLEAR_OPERATION 0x02
1641 #define EFI_ACPI_5_0_ERST_END_OPERATION 0x03
1642 #define EFI_ACPI_5_0_ERST_SET_RECORD_OFFSET 0x04
1643 #define EFI_ACPI_5_0_ERST_EXECUTE_OPERATION 0x05
1644 #define EFI_ACPI_5_0_ERST_CHECK_BUSY_STATUS 0x06
1645 #define EFI_ACPI_5_0_ERST_GET_COMMAND_STATUS 0x07
1646 #define EFI_ACPI_5_0_ERST_GET_RECORD_IDENTIFIER 0x08
1647 #define EFI_ACPI_5_0_ERST_SET_RECORD_IDENTIFIER 0x09
1648 #define EFI_ACPI_5_0_ERST_GET_RECORD_COUNT 0x0A
1649 #define EFI_ACPI_5_0_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B
1650 #define EFI_ACPI_5_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D
1651 #define EFI_ACPI_5_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E
1652 #define EFI_ACPI_5_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F
1653
1654 ///
1655 /// ERST Action Command Status
1656 ///
1657 #define EFI_ACPI_5_0_ERST_STATUS_SUCCESS 0x00
1658 #define EFI_ACPI_5_0_ERST_STATUS_NOT_ENOUGH_SPACE 0x01
1659 #define EFI_ACPI_5_0_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02
1660 #define EFI_ACPI_5_0_ERST_STATUS_FAILED 0x03
1661 #define EFI_ACPI_5_0_ERST_STATUS_RECORD_STORE_EMPTY 0x04
1662 #define EFI_ACPI_5_0_ERST_STATUS_RECORD_NOT_FOUND 0x05
1663
1664 ///
1665 /// ERST Serialization Instructions
1666 ///
1667 #define EFI_ACPI_5_0_ERST_READ_REGISTER 0x00
1668 #define EFI_ACPI_5_0_ERST_READ_REGISTER_VALUE 0x01
1669 #define EFI_ACPI_5_0_ERST_WRITE_REGISTER 0x02
1670 #define EFI_ACPI_5_0_ERST_WRITE_REGISTER_VALUE 0x03
1671 #define EFI_ACPI_5_0_ERST_NOOP 0x04
1672 #define EFI_ACPI_5_0_ERST_LOAD_VAR1 0x05
1673 #define EFI_ACPI_5_0_ERST_LOAD_VAR2 0x06
1674 #define EFI_ACPI_5_0_ERST_STORE_VAR1 0x07
1675 #define EFI_ACPI_5_0_ERST_ADD 0x08
1676 #define EFI_ACPI_5_0_ERST_SUBTRACT 0x09
1677 #define EFI_ACPI_5_0_ERST_ADD_VALUE 0x0A
1678 #define EFI_ACPI_5_0_ERST_SUBTRACT_VALUE 0x0B
1679 #define EFI_ACPI_5_0_ERST_STALL 0x0C
1680 #define EFI_ACPI_5_0_ERST_STALL_WHILE_TRUE 0x0D
1681 #define EFI_ACPI_5_0_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E
1682 #define EFI_ACPI_5_0_ERST_GOTO 0x0F
1683 #define EFI_ACPI_5_0_ERST_SET_SRC_ADDRESS_BASE 0x10
1684 #define EFI_ACPI_5_0_ERST_SET_DST_ADDRESS_BASE 0x11
1685 #define EFI_ACPI_5_0_ERST_MOVE_DATA 0x12
1686
1687 ///
1688 /// ERST Instruction Flags
1689 ///
1690 #define EFI_ACPI_5_0_ERST_PRESERVE_REGISTER 0x01
1691
1692 ///
1693 /// ERST Serialization Instruction Entry
1694 ///
1695 typedef struct {
1696 UINT8 SerializationAction;
1697 UINT8 Instruction;
1698 UINT8 Flags;
1699 UINT8 Reserved0;
1700 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
1701 UINT64 Value;
1702 UINT64 Mask;
1703 } EFI_ACPI_5_0_ERST_SERIALIZATION_INSTRUCTION_ENTRY;
1704
1705 ///
1706 /// EINJ - Error Injection Table
1707 ///
1708 typedef struct {
1709 EFI_ACPI_DESCRIPTION_HEADER Header;
1710 UINT32 InjectionHeaderSize;
1711 UINT8 InjectionFlags;
1712 UINT8 Reserved0[3];
1713 UINT32 InjectionEntryCount;
1714 } EFI_ACPI_5_0_ERROR_INJECTION_TABLE_HEADER;
1715
1716 ///
1717 /// EINJ Version (as defined in ACPI 5.0 spec.)
1718 ///
1719 #define EFI_ACPI_5_0_ERROR_INJECTION_TABLE_REVISION 0x01
1720
1721 ///
1722 /// EINJ Error Injection Actions
1723 ///
1724 #define EFI_ACPI_5_0_EINJ_BEGIN_INJECTION_OPERATION 0x00
1725 #define EFI_ACPI_5_0_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01
1726 #define EFI_ACPI_5_0_EINJ_SET_ERROR_TYPE 0x02
1727 #define EFI_ACPI_5_0_EINJ_GET_ERROR_TYPE 0x03
1728 #define EFI_ACPI_5_0_EINJ_END_OPERATION 0x04
1729 #define EFI_ACPI_5_0_EINJ_EXECUTE_OPERATION 0x05
1730 #define EFI_ACPI_5_0_EINJ_CHECK_BUSY_STATUS 0x06
1731 #define EFI_ACPI_5_0_EINJ_GET_COMMAND_STATUS 0x07
1732 #define EFI_ACPI_5_0_EINJ_TRIGGER_ERROR 0xFF
1733
1734 ///
1735 /// EINJ Action Command Status
1736 ///
1737 #define EFI_ACPI_5_0_EINJ_STATUS_SUCCESS 0x00
1738 #define EFI_ACPI_5_0_EINJ_STATUS_UNKNOWN_FAILURE 0x01
1739 #define EFI_ACPI_5_0_EINJ_STATUS_INVALID_ACCESS 0x02
1740
1741 ///
1742 /// EINJ Error Type Definition
1743 ///
1744 #define EFI_ACPI_5_0_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0)
1745 #define EFI_ACPI_5_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1)
1746 #define EFI_ACPI_5_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2)
1747 #define EFI_ACPI_5_0_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3)
1748 #define EFI_ACPI_5_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4)
1749 #define EFI_ACPI_5_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5)
1750 #define EFI_ACPI_5_0_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6)
1751 #define EFI_ACPI_5_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7)
1752 #define EFI_ACPI_5_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8)
1753 #define EFI_ACPI_5_0_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9)
1754 #define EFI_ACPI_5_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10)
1755 #define EFI_ACPI_5_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11)
1756
1757 ///
1758 /// EINJ Injection Instructions
1759 ///
1760 #define EFI_ACPI_5_0_EINJ_READ_REGISTER 0x00
1761 #define EFI_ACPI_5_0_EINJ_READ_REGISTER_VALUE 0x01
1762 #define EFI_ACPI_5_0_EINJ_WRITE_REGISTER 0x02
1763 #define EFI_ACPI_5_0_EINJ_WRITE_REGISTER_VALUE 0x03
1764 #define EFI_ACPI_5_0_EINJ_NOOP 0x04
1765
1766 ///
1767 /// EINJ Instruction Flags
1768 ///
1769 #define EFI_ACPI_5_0_EINJ_PRESERVE_REGISTER 0x01
1770
1771 ///
1772 /// EINJ Injection Instruction Entry
1773 ///
1774 typedef struct {
1775 UINT8 InjectionAction;
1776 UINT8 Instruction;
1777 UINT8 Flags;
1778 UINT8 Reserved0;
1779 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
1780 UINT64 Value;
1781 UINT64 Mask;
1782 } EFI_ACPI_5_0_EINJ_INJECTION_INSTRUCTION_ENTRY;
1783
1784 ///
1785 /// EINJ Trigger Action Table
1786 ///
1787 typedef struct {
1788 UINT32 HeaderSize;
1789 UINT32 Revision;
1790 UINT32 TableSize;
1791 UINT32 EntryCount;
1792 } EFI_ACPI_5_0_EINJ_TRIGGER_ACTION_TABLE;
1793
1794 ///
1795 /// Platform Communications Channel Table (PCCT)
1796 ///
1797 typedef struct {
1798 EFI_ACPI_DESCRIPTION_HEADER Header;
1799 UINT32 Flags;
1800 UINT64 Reserved;
1801 } EFI_ACPI_5_0_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER;
1802
1803 ///
1804 /// PCCT Version (as defined in ACPI 5.0 spec.)
1805 ///
1806 #define EFI_ACPI_5_0_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x01
1807
1808 ///
1809 /// PCCT Global Flags
1810 ///
1811 #define EFI_ACPI_5_0_PCCT_FLAGS_SCI_DOORBELL BIT0
1812
1813 //
1814 // PCCT Subspace type
1815 //
1816 #define EFI_ACPI_5_0_PCCT_SUBSPACE_TYPE_GENERIC 0x00
1817
1818 ///
1819 /// PCC Subspace Structure Header
1820 ///
1821 typedef struct {
1822 UINT8 Type;
1823 UINT8 Length;
1824 } EFI_ACPI_5_0_PCCT_SUBSPACE_HEADER;
1825
1826 ///
1827 /// Generic Communications Subspace Structure
1828 ///
1829 typedef struct {
1830 UINT8 Type;
1831 UINT8 Length;
1832 UINT8 Reserved[6];
1833 UINT64 BaseAddress;
1834 UINT64 AddressLength;
1835 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;
1836 UINT64 DoorbellPreserve;
1837 UINT64 DoorbellWrite;
1838 UINT32 NominalLatency;
1839 UINT32 MaximumPeriodicAccessRate;
1840 UINT16 MinimumRequestTurnaroundTime;
1841 } EFI_ACPI_5_0_PCCT_SUBSPACE_GENERIC;
1842
1843 ///
1844 /// Generic Communications Channel Shared Memory Region
1845 ///
1846
1847 typedef struct {
1848 UINT8 Command;
1849 UINT8 Reserved:7;
1850 UINT8 GenerateSci:1;
1851 } EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND;
1852
1853 typedef struct {
1854 UINT8 CommandComplete:1;
1855 UINT8 SciDoorbell:1;
1856 UINT8 Error:1;
1857 UINT8 Reserved:5;
1858 UINT8 Reserved1;
1859 } EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS;
1860
1861 typedef struct {
1862 UINT32 Signature;
1863 EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND Command;
1864 EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS Status;
1865 } EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER;
1866
1867 //
1868 // Known table signatures
1869 //
1870
1871 ///
1872 /// "RSD PTR " Root System Description Pointer
1873 ///
1874 #define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ')
1875
1876 ///
1877 /// "APIC" Multiple APIC Description Table
1878 ///
1879 #define EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C')
1880
1881 ///
1882 /// "BERT" Boot Error Record Table
1883 ///
1884 #define EFI_ACPI_5_0_BOOT_ERROR_RECORD_TABLE_SIGNATURE SIGNATURE_32('B', 'E', 'R', 'T')
1885
1886 ///
1887 /// "BGRT" Boot Graphics Resource Table
1888 ///
1889 #define EFI_ACPI_5_0_BOOT_GRAPHICS_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('B', 'G', 'R', 'T')
1890
1891 ///
1892 /// "CPEP" Corrected Platform Error Polling Table
1893 ///
1894 #define EFI_ACPI_5_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE SIGNATURE_32('C', 'P', 'E', 'P')
1895
1896 ///
1897 /// "DSDT" Differentiated System Description Table
1898 ///
1899 #define EFI_ACPI_5_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T')
1900
1901 ///
1902 /// "ECDT" Embedded Controller Boot Resources Table
1903 ///
1904 #define EFI_ACPI_5_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T')
1905
1906 ///
1907 /// "EINJ" Error Injection Table
1908 ///
1909 #define EFI_ACPI_5_0_ERROR_INJECTION_TABLE_SIGNATURE SIGNATURE_32('E', 'I', 'N', 'J')
1910
1911 ///
1912 /// "ERST" Error Record Serialization Table
1913 ///
1914 #define EFI_ACPI_5_0_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE SIGNATURE_32('E', 'R', 'S', 'T')
1915
1916 ///
1917 /// "FACP" Fixed ACPI Description Table
1918 ///
1919 #define EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P')
1920
1921 ///
1922 /// "FACS" Firmware ACPI Control Structure
1923 ///
1924 #define EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S')
1925
1926 ///
1927 /// "FPDT" Firmware Performance Data Table
1928 ///
1929 #define EFI_ACPI_5_0_FIRMWARE_PERFORMANCE_DATA_TABLE_SIGNATURE SIGNATURE_32('F', 'P', 'D', 'T')
1930
1931 ///
1932 /// "GTDT" Generic Timer Description Table
1933 ///
1934 #define EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('G', 'T', 'D', 'T')
1935
1936 ///
1937 /// "HEST" Hardware Error Source Table
1938 ///
1939 #define EFI_ACPI_5_0_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE SIGNATURE_32('H', 'E', 'S', 'T')
1940
1941 ///
1942 /// "MPST" Memory Power State Table
1943 ///
1944 #define EFI_ACPI_5_0_MEMORY_POWER_STATE_TABLE_SIGNATURE SIGNATURE_32('M', 'P', 'S', 'T')
1945
1946 ///
1947 /// "MSCT" Maximum System Characteristics Table
1948 ///
1949 #define EFI_ACPI_5_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'C', 'T')
1950
1951 ///
1952 /// "PMTT" Platform Memory Topology Table
1953 ///
1954 #define EFI_ACPI_5_0_PLATFORM_MEMORY_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'M', 'T', 'T')
1955
1956 ///
1957 /// "PSDT" Persistent System Description Table
1958 ///
1959 #define EFI_ACPI_5_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T')
1960
1961 ///
1962 /// "RASF" ACPI RAS Feature Table
1963 ///
1964 #define EFI_ACPI_5_0_ACPI_RAS_FEATURE_TABLE_SIGNATURE SIGNATURE_32('R', 'A', 'S', 'F')
1965
1966 ///
1967 /// "RSDT" Root System Description Table
1968 ///
1969 #define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T')
1970
1971 ///
1972 /// "SBST" Smart Battery Specification Table
1973 ///
1974 #define EFI_ACPI_5_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T')
1975
1976 ///
1977 /// "SLIT" System Locality Information Table
1978 ///
1979 #define EFI_ACPI_5_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T')
1980
1981 ///
1982 /// "SRAT" System Resource Affinity Table
1983 ///
1984 #define EFI_ACPI_5_0_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T')
1985
1986 ///
1987 /// "SSDT" Secondary System Description Table
1988 ///
1989 #define EFI_ACPI_5_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T')
1990
1991 ///
1992 /// "XSDT" Extended System Description Table
1993 ///
1994 #define EFI_ACPI_5_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T')
1995
1996 ///
1997 /// "BOOT" MS Simple Boot Spec
1998 ///
1999 #define EFI_ACPI_5_0_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T')
2000
2001 ///
2002 /// "CSRT" MS Core System Resource Table
2003 ///
2004 #define EFI_ACPI_5_0_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('C', 'S', 'R', 'T')
2005
2006 ///
2007 /// "DBG2" MS Debug Port 2 Spec
2008 ///
2009 #define EFI_ACPI_5_0_DEBUG_PORT_2_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', '2')
2010
2011 ///
2012 /// "DBGP" MS Debug Port Spec
2013 ///
2014 #define EFI_ACPI_5_0_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P')
2015
2016 ///
2017 /// "DMAR" DMA Remapping Table
2018 ///
2019 #define EFI_ACPI_5_0_DMA_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('D', 'M', 'A', 'R')
2020
2021 ///
2022 /// "ETDT" Event Timer Description Table
2023 ///
2024 #define EFI_ACPI_5_0_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T')
2025
2026 ///
2027 /// "HPET" IA-PC High Precision Event Timer Table
2028 ///
2029 #define EFI_ACPI_5_0_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE SIGNATURE_32('H', 'P', 'E', 'T')
2030
2031 ///
2032 /// "iBFT" iSCSI Boot Firmware Table
2033 ///
2034 #define EFI_ACPI_5_0_ISCSI_BOOT_FIRMWARE_TABLE_SIGNATURE SIGNATURE_32('i', 'B', 'F', 'T')
2035
2036 ///
2037 /// "IVRS" I/O Virtualization Reporting Structure
2038 ///
2039 #define EFI_ACPI_5_0_IO_VIRTUALIZATION_REPORTING_STRUCTURE_SIGNATURE SIGNATURE_32('I', 'V', 'R', 'S')
2040
2041 ///
2042 /// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table
2043 ///
2044 #define EFI_ACPI_5_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G')
2045
2046 ///
2047 /// "MCHI" Management Controller Host Interface Table
2048 ///
2049 #define EFI_ACPI_5_0_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'H', 'I')
2050
2051 ///
2052 /// "MSDM" MS Data Management Table
2053 ///
2054 #define EFI_ACPI_5_0_DATA_MANAGEMENT_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'D', 'M')
2055
2056 ///
2057 /// "SLIC" MS Software Licensing Table Specification
2058 ///
2059 #define EFI_ACPI_5_0_SOFTWARE_LICENSING_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'C')
2060
2061 ///
2062 /// "SPCR" Serial Port Concole Redirection Table
2063 ///
2064 #define EFI_ACPI_5_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')
2065
2066 ///
2067 /// "SPMI" Server Platform Management Interface Table
2068 ///
2069 #define EFI_ACPI_5_0_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I')
2070
2071 ///
2072 /// "TCPA" Trusted Computing Platform Alliance Capabilities Table
2073 ///
2074 #define EFI_ACPI_5_0_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE SIGNATURE_32('T', 'C', 'P', 'A')
2075
2076 ///
2077 /// "TPM2" Trusted Computing Platform 1 Table
2078 ///
2079 #define EFI_ACPI_5_0_TRUSTED_COMPUTING_PLATFORM_2_TABLE_SIGNATURE SIGNATURE_32('T', 'P', 'M', '2')
2080
2081 ///
2082 /// "UEFI" UEFI ACPI Data Table
2083 ///
2084 #define EFI_ACPI_5_0_UEFI_ACPI_DATA_TABLE_SIGNATURE SIGNATURE_32('U', 'E', 'F', 'I')
2085
2086 ///
2087 /// "WAET" Windows ACPI Enlightenment Table
2088 ///
2089 #define EFI_ACPI_5_0_WINDOWS_ACPI_ENLIGHTENMENT_TABLE_SIGNATURE SIGNATURE_32('W', 'A', 'E', 'T')
2090
2091 ///
2092 /// "WDAT" Watchdog Action Table
2093 ///
2094 #define EFI_ACPI_5_0_WATCHDOG_ACTION_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'A', 'T')
2095
2096 ///
2097 /// "WDRT" Watchdog Resource Table
2098 ///
2099 #define EFI_ACPI_5_0_WATCHDOG_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'R', 'T')
2100
2101 ///
2102 /// "WPBT" MS Platform Binary Table
2103 ///
2104 #define EFI_ACPI_5_0_PLATFORM_BINARY_TABLE_SIGNATURE SIGNATURE_32('W', 'P', 'B', 'T')
2105
2106 #pragma pack()
2107
2108 #endif