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clean up Atapi.h to follow ATA-ATAPI spec.
[mirror_edk2.git] / MdePkg / Include / IndustryStandard / Atapi.h
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8bdadcc8 1/** @file\r
37640ed3 2 This file contains just some basic definitions that are needed by drivers\r
3 that dealing with ATA/ATAPI interface.\r
8bdadcc8 4\r
37640ed3 5Copyright (c) 2007 - 2008, Intel Corporation\r
8bdadcc8 6All rights reserved. This program and the accompanying materials\r
7are licensed and made available under the terms and conditions of the BSD License\r
8which accompanies this distribution. The full text of the license may be found at\r
9http://opensource.org/licenses/bsd-license.php\r
10\r
11THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
12WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
13\r
14**/\r
15\r
42eedea9 16#ifndef _ATAPI_H_\r
17#define _ATAPI_H_\r
8bdadcc8 18\r
373b5cf9 19#pragma pack(1)\r
8bdadcc8 20\r
8bdadcc8 21\r
1bc5d021 22///\r
23/// ATAPI_IDENTIFY_DATA is defined in ATA-6\r
24///\r
8bdadcc8 25typedef struct {\r
37640ed3 26 UINT16 config; ///< General Configuration\r
8bdadcc8 27 UINT16 obsolete_1;\r
28 UINT16 specific_config;\r
29 UINT16 obsolete_3;\r
30 UINT16 retired_4_5[2];\r
31 UINT16 obsolete_6;\r
32 UINT16 cfa_reserved_7_8[2];\r
33 UINT16 retired_9;\r
37640ed3 34 CHAR8 SerialNo[20]; ///< ASCII\r
8bdadcc8 35 UINT16 retired_20_21[2];\r
36 UINT16 obsolete_22;\r
37640ed3 37 CHAR8 FirmwareVer[8]; ///< ASCII\r
38 CHAR8 ModelName[40]; ///< ASCII\r
8bdadcc8 39 UINT16 multi_sector_cmd_max_sct_cnt;\r
40 UINT16 reserved_48;\r
41 UINT16 capabilities_49;\r
42 UINT16 capabilities_50;\r
43 UINT16 obsolete_51_52[2];\r
44 UINT16 field_validity;\r
45 UINT16 obsolete_54_58[5];\r
46 UINT16 mutil_sector_setting;\r
47 UINT16 user_addressable_sectors_lo;\r
48 UINT16 user_addressable_sectors_hi;\r
49 UINT16 obsolete_62;\r
50 UINT16 multi_word_dma_mode;\r
51 UINT16 advanced_pio_modes;\r
52 UINT16 min_multi_word_dma_cycle_time;\r
53 UINT16 rec_multi_word_dma_cycle_time;\r
54 UINT16 min_pio_cycle_time_without_flow_control;\r
55 UINT16 min_pio_cycle_time_with_flow_control;\r
56 UINT16 reserved_69_74[6];\r
57 UINT16 queue_depth;\r
58 UINT16 reserved_76_79[4];\r
59 UINT16 major_version_no;\r
60 UINT16 minor_version_no;\r
61 UINT16 cmd_set_support_82;\r
62 UINT16 cmd_set_support_83;\r
63 UINT16 cmd_feature_support;\r
64 UINT16 cmd_feature_enable_85;\r
65 UINT16 cmd_feature_enable_86;\r
66 UINT16 cmd_feature_default;\r
67 UINT16 ultra_dma_select;\r
68 UINT16 time_required_for_sec_erase;\r
69 UINT16 time_required_for_enhanced_sec_erase;\r
70 UINT16 current_advanced_power_mgmt_value;\r
71 UINT16 master_pwd_revison_code;\r
72 UINT16 hardware_reset_result;\r
73 UINT16 current_auto_acoustic_mgmt_value;\r
74 UINT16 reserved_95_99[5];\r
75 UINT16 max_user_lba_for_48bit_addr[4];\r
76 UINT16 reserved_104_126[23];\r
77 UINT16 removable_media_status_notification_support;\r
78 UINT16 security_status;\r
79 UINT16 vendor_data_129_159[31];\r
80 UINT16 cfa_power_mode;\r
81 UINT16 cfa_reserved_161_175[15];\r
82 UINT16 current_media_serial_no[30];\r
83 UINT16 reserved_206_254[49];\r
84 UINT16 integrity_word;\r
85} ATAPI_IDENTIFY_DATA;\r
86\r
37640ed3 87///\r
88/// the front of part is defined in ATAPI Removable Rewritable Specification\r
89///\r
8bdadcc8 90typedef struct {\r
91 UINT8 peripheral_type;\r
92 UINT8 RMB;\r
93 UINT8 version;\r
94 UINT8 response_data_format;\r
95 UINT8 addnl_length;\r
96 UINT8 reserved_5;\r
97 UINT8 reserved_6;\r
98 UINT8 reserved_7;\r
99 UINT8 vendor_info[8];\r
100 UINT8 product_id[16];\r
101 UINT8 product_revision_level[4];\r
37640ed3 102 UINT8 vendor_specific_36_55[55 - 36 + 1];\r
103 UINT8 reserved_56_95[95 - 56 + 1];\r
104 ///\r
105 /// Some more fields, the sizeof (ATAPI_INQUIRY_DATA) is 255\r
106 /// since allocation_length is one byte in ATAPI_INQUIRY_CMD.\r
107 ///\r
108 UINT8 vendor_specific_96_255[254 - 96 + 1];\r
109} ATAPI_INQUIRY_DATA;\r
110\r
8bdadcc8 111\r
112\r
113typedef struct {\r
114 UINT8 error_code : 7;\r
115 UINT8 valid : 1;\r
116 UINT8 reserved_1;\r
117 UINT8 sense_key : 4;\r
37640ed3 118 UINT8 reserved_2 : 1;\r
119 UINT8 Vendor_specifc_1 : 3;\r
8bdadcc8 120 UINT8 vendor_specific_3;\r
121 UINT8 vendor_specific_4;\r
122 UINT8 vendor_specific_5;\r
123 UINT8 vendor_specific_6;\r
37640ed3 124 UINT8 addnl_sense_length; ///< n - 7\r
8bdadcc8 125 UINT8 vendor_specific_8;\r
126 UINT8 vendor_specific_9;\r
127 UINT8 vendor_specific_10;\r
128 UINT8 vendor_specific_11;\r
37640ed3 129 UINT8 addnl_sense_code; ///< mandatory\r
130 UINT8 addnl_sense_code_qualifier; ///< mandatory\r
131 UINT8 field_replaceable_unit_code; ///< optional\r
132 UINT8 sense_key_specific_15 : 7;\r
133 UINT8 SKSV : 1;\r
134 UINT8 sense_key_specific_16;\r
135 UINT8 sense_key_specific_17;\r
136 ///\r
137 /// Followed by additional sense bytes.\r
138 /// the sizeof (ATAPI_REQUEST_SENSE_DATA) is 255, \r
139 /// since allocation_length is one byte in ATAPI_INQUIRY_CMD.\r
140 ///\r
141 UINT8 additional_sense_bytes[254 - 18 + 1];\r
8bdadcc8 142} ATAPI_REQUEST_SENSE_DATA;\r
143\r
37640ed3 144///\r
145/// READ CAPACITY Data\r
146///\r
8bdadcc8 147typedef struct {\r
148 UINT8 LastLba3;\r
149 UINT8 LastLba2;\r
150 UINT8 LastLba1;\r
151 UINT8 LastLba0;\r
152 UINT8 BlockSize3;\r
153 UINT8 BlockSize2;\r
154 UINT8 BlockSize1;\r
155 UINT8 BlockSize0;\r
156} ATAPI_READ_CAPACITY_DATA;\r
157\r
37640ed3 158///\r
159/// Capacity List Header + Current/Maximum Capacity Descriptor\r
160///\r
8bdadcc8 161typedef struct {\r
162 UINT8 reserved_0;\r
163 UINT8 reserved_1;\r
164 UINT8 reserved_2;\r
165 UINT8 Capacity_Length;\r
166 UINT8 LastLba3;\r
167 UINT8 LastLba2;\r
168 UINT8 LastLba1;\r
169 UINT8 LastLba0;\r
170 UINT8 DesCode : 2;\r
171 UINT8 reserved_9 : 6;\r
172 UINT8 BlockSize2;\r
173 UINT8 BlockSize1;\r
174 UINT8 BlockSize0;\r
175} ATAPI_READ_FORMAT_CAPACITY_DATA;\r
176\r
37640ed3 177///\r
178/// Test Unit Ready Command\r
179///\r
8bdadcc8 180typedef struct {\r
181 UINT8 opcode;\r
182 UINT8 reserved_1;\r
183 UINT8 reserved_2;\r
184 UINT8 reserved_3;\r
185 UINT8 reserved_4;\r
186 UINT8 reserved_5;\r
187 UINT8 reserved_6;\r
188 UINT8 reserved_7;\r
189 UINT8 reserved_8;\r
190 UINT8 reserved_9;\r
191 UINT8 reserved_10;\r
192 UINT8 reserved_11;\r
193} ATAPI_TEST_UNIT_READY_CMD;\r
194\r
37640ed3 195///\r
196/// INQUIRY Command\r
197///\r
8bdadcc8 198typedef struct {\r
199 UINT8 opcode;\r
37640ed3 200 UINT8 reserved_1 : 5;\r
201 UINT8 lun : 3;\r
202 UINT8 page_code; ///< defined in SFF8090i, V6\r
8bdadcc8 203 UINT8 reserved_3;\r
204 UINT8 allocation_length;\r
205 UINT8 reserved_5;\r
206 UINT8 reserved_6;\r
207 UINT8 reserved_7;\r
208 UINT8 reserved_8;\r
209 UINT8 reserved_9;\r
210 UINT8 reserved_10;\r
211 UINT8 reserved_11;\r
212} ATAPI_INQUIRY_CMD;\r
213\r
37640ed3 214///\r
215/// REQUEST SENSE Command\r
216///\r
8bdadcc8 217typedef struct {\r
218 UINT8 opcode;\r
37640ed3 219 UINT8 reserved_1 : 5;\r
220 UINT8 lun : 3;\r
8bdadcc8 221 UINT8 reserved_2;\r
222 UINT8 reserved_3;\r
223 UINT8 allocation_length;\r
224 UINT8 reserved_5;\r
225 UINT8 reserved_6;\r
226 UINT8 reserved_7;\r
227 UINT8 reserved_8;\r
228 UINT8 reserved_9;\r
229 UINT8 reserved_10;\r
230 UINT8 reserved_11;\r
231} ATAPI_REQUEST_SENSE_CMD;\r
232\r
37640ed3 233///\r
234/// READ (10) Command\r
235///\r
8bdadcc8 236typedef struct {\r
237 UINT8 opcode;\r
238 UINT8 reserved_1 : 5;\r
239 UINT8 lun : 3;\r
240 UINT8 Lba0;\r
241 UINT8 Lba1;\r
242 UINT8 Lba2;\r
243 UINT8 Lba3;\r
244 UINT8 reserved_6;\r
245 UINT8 TranLen0;\r
246 UINT8 TranLen1;\r
247 UINT8 reserved_9;\r
248 UINT8 reserved_10;\r
249 UINT8 reserved_11;\r
250} ATAPI_READ10_CMD;\r
251\r
37640ed3 252///\r
253/// READ Format Capacity Command\r
254///\r
8bdadcc8 255typedef struct {\r
256 UINT8 opcode;\r
37640ed3 257 UINT8 reserved_1 : 5;\r
258 UINT8 lun : 3;\r
8bdadcc8 259 UINT8 reserved_2;\r
260 UINT8 reserved_3;\r
261 UINT8 reserved_4;\r
262 UINT8 reserved_5;\r
263 UINT8 reserved_6;\r
264 UINT8 allocation_length_hi;\r
265 UINT8 allocation_length_lo;\r
266 UINT8 reserved_9;\r
267 UINT8 reserved_10;\r
268 UINT8 reserved_11;\r
269} ATAPI_READ_FORMAT_CAP_CMD;\r
270\r
271typedef struct {\r
272 UINT8 peripheral_type;\r
273 UINT8 RMB;\r
274 UINT8 version;\r
275 UINT8 response_data_format;\r
276 UINT8 addnl_length;\r
277 UINT8 reserved_5;\r
278 UINT8 reserved_6;\r
279 UINT8 reserved_7;\r
280 UINT8 vendor_info[8];\r
281 UINT8 product_id[12];\r
282 UINT8 eeprom_product_code[4];\r
283 UINT8 firmware_rev_level[4];\r
284} ATAPI_USB_INQUIRY_DATA;\r
285\r
37640ed3 286///\r
287/// MODE SENSE Command\r
288///\r
8bdadcc8 289typedef struct {\r
290 UINT8 opcode;\r
37640ed3 291 UINT8 reserved_1 : 5;\r
292 UINT8 lun : 3;\r
293 UINT8 page_code : 6;\r
294 UINT8 page_control : 2;\r
8bdadcc8 295 UINT8 reserved_3;\r
296 UINT8 reserved_4;\r
297 UINT8 reserved_5;\r
298 UINT8 reserved_6;\r
299 UINT8 parameter_list_length_hi;\r
300 UINT8 parameter_list_length_lo;\r
301 UINT8 reserved_9;\r
302 UINT8 reserved_10;\r
303 UINT8 reserved_11;\r
304} ATAPI_MODE_SENSE_CMD;\r
305\r
1bc5d021 306///\r
307/// ATAPI_PACKET_COMMAND is not defined in ATA specification.\r
308/// We add it here for the convenience for ATA/ATAPI module writer. \r
309///\r
8bdadcc8 310typedef union {\r
311 UINT16 Data16[6];\r
312 ATAPI_TEST_UNIT_READY_CMD TestUnitReady;\r
313 ATAPI_READ10_CMD Read10;\r
314 ATAPI_REQUEST_SENSE_CMD RequestSence;\r
315 ATAPI_INQUIRY_CMD Inquiry;\r
316 ATAPI_MODE_SENSE_CMD ModeSense;\r
317 ATAPI_READ_FORMAT_CAP_CMD ReadFormatCapacity;\r
318} ATAPI_PACKET_COMMAND;\r
319\r
373b5cf9 320#pragma pack()\r
8bdadcc8 321\r
322\r
323#define ATAPI_MAX_DMA_EXT_CMD_SECTORS 0x10000\r
324#define ATAPI_MAX_DMA_CMD_SECTORS 0x100\r
325\r
326//\r
327// ATA Packet Command Code\r
328//\r
37640ed3 329#define ATA_CMD_SOFT_RESET 0x08 ///< defined in ATA-6\r
330#define ATA_CMD_PACKET 0xA0 ///< defined in ATA-6\r
331#define ATA_CMD_IDENTIFY_DEVICE 0xA1 ///< defined in ATA-6\r
332#define ATA_CMD_SERVICE 0xA2 ///< defined in ATA-6\r
333#define ATA_CMD_TEST_UNIT_READY 0x00 ///< defined in ATA-6\r
334#define ATA_CMD_REQUEST_SENSE 0x03 ///< defined in ATA-6\r
335#define ATA_CMD_INQUIRY 0x12 ///< defined in ATAPI Removable Rewritable Media Devcies\r
336#define ATA_CMD_READ_FORMAT_CAPACITY 0x23 ///< defined in ATAPI Removable Rewritable Media Devcies\r
337#define ATA_CMD_READ_CAPACITY 0x25 ///< defined in ATAPI Removable Rewritable Media Devcies\r
338#define ATA_CMD_READ_10 0x28 ///< defined in ATAPI Removable Rewritable Media Devcies\r
339#define ATA_CMD_WRITE_10 0x2A ///< defined in ATAPI Removable Rewritable Media Devcies\r
8bdadcc8 340\r
341//\r
342// ATA Commands Code\r
343//\r
344\r
345//\r
346// Class 1: PIO Data-In Commands\r
347//\r
348#define ATA_CMD_IDENTIFY_DRIVE 0xec\r
349#define ATA_CMD_READ_BUFFER 0xe4\r
37640ed3 350#define ATA_CMD_READ_SECTORS 0x20 ///< defined in ATA-5 \r
351#define ATA_CMD_READ_SECTORS_WITH_RETRY 0x21 ///< defined in ATA-5\r
352#define ATA_CMD_READ_LONG 0x22 ///< defined in ATA-5\r
353#define ATA_CMD_READ_LONG_WITH_RETRY 0x23 ///< defined in ATA-5\r
354#define ATA_CMD_READ_SECTORS_EXT 0x24 ///< defined in ATA-6\r
8bdadcc8 355\r
356\r
357//\r
358// Class 2: PIO Data-Out Commands\r
359//\r
37640ed3 360#define ATA_CMD_FORMAT_TRACK 0x50 ///< defined in ATA-3\r
361#define ATA_CMD_WRITE_BUFFER 0xe8 ///< defined in ATA-6 \r
362#define ATA_CMD_WRITE_SECTORS 0x30 ///< defined in ATA-6\r
363#define ATA_CMD_WRITE_SECTORS_WITH_RETRY 0x31 ///< defined in ATA-4\r
364#define ATA_CMD_WRITE_LONG 0x32 ///< defined in ATA-3\r
365#define ATA_CMD_WRITE_LONG_WITH_RETRY 0x33 ///< defined in ATA-3\r
366#define ATA_CMD_WRITE_VERIFY 0x3c ///< defined in ATA-3\r
367#define ATA_CMD_WRITE_SECTORS_EXT 0x34 ///< defined in ATA-6\r
8bdadcc8 368\r
369//\r
370// Class 3 No Data Command\r
371//\r
37640ed3 372#define ATA_CMD_ACK_MEDIA_CHANGE 0xdb ///< defined in ATA-2\r
373#define ATA_CMD_BOOT_POST_BOOT 0xdc ///< defined in ATA-2\r
374#define ATA_CMD_BOOT_PRE_BOOT 0xdd ///< defined in ATA-2\r
375#define ATA_CMD_CHECK_POWER_MODE 0x98 ///< defined in ATA-3\r
376#define ATA_CMD_CHECK_POWER_MODE_ALIAS 0xe5 ///< defined in ATA-6\r
377#define ATA_CMD_DOOR_LOCK 0xde ///< defined in ATA-6\r
378#define ATA_CMD_DOOR_UNLOCK 0xdf ///< defined in ATA-6\r
379#define ATA_CMD_EXEC_DRIVE_DIAG 0x90 ///< defined in ATA-6\r
380#define ATA_CMD_IDLE_ALIAS 0x97 ///< defined in ATA-3\r
381#define ATA_CMD_IDLE 0xe3 ///< defined in ATA-6\r
382#define ATA_CMD_IDLE_IMMEDIATE 0x95 ///< defined in ATA-3\r
383#define ATA_CMD_IDLE_IMMEDIATE_ALIAS 0xe1 ///< defined in ATA-6\r
384#define ATA_CMD_INIT_DRIVE_PARAM 0x91 ///< defined in ATA-5\r
385#define ATA_CMD_RECALIBRATE 0x10 ///< defined in ATA-3\r
386#define ATA_CMD_READ_DRIVE_STATE 0xe9 ///< defined in ATA-2\r
387#define ATA_CMD_SET_MULTIPLE_MODE 0xC6 ///< defined in ATA-6\r
388#define ATA_CMD_READ_VERIFY 0x40 ///< defined in ATA-6\r
389#define ATA_CMD_READ_VERIFY_WITH_RETRY 0x41 ///< defined in ATA-4\r
390#define ATA_CMD_SEEK 0x70 ///< defined in ATA-6\r
391#define ATA_CMD_SET_FEATURES 0xef ///< defined in ATA-6\r
392#define ATA_CMD_STANDBY 0x96 ///< defined in ATA-3\r
393#define ATA_CMD_STANDBY_ALIAS 0xe2 ///< defined in ATA-6\r
394#define ATA_CMD_STANDBY_IMMEDIATE 0x94 ///< defined in ATA-3\r
395#define ATA_CMD_STANDBY_IMMEDIATE_ALIAS 0xe0 ///< defined in ATA-6\r
396///\r
397/// S.M.A.R.T\r
398///\r
8bdadcc8 399#define ATA_CMD_SMART 0xb0\r
400#define ATA_CONSTANT_C2 0xc2\r
401#define ATA_CONSTANT_4F 0x4f\r
402#define ATA_SMART_ENABLE_OPERATION 0xd8\r
403#define ATA_SMART_RETURN_STATUS 0xda\r
404\r
405\r
37640ed3 406///\r
407/// Class 4: DMA Command\r
408///\r
409#define ATA_CMD_READ_DMA 0xc8 ///< defined in ATA-6\r
410#define ATA_CMD_READ_DMA_WITH_RETRY 0xc9 ///< defined in ATA-4\r
411#define ATA_CMD_READ_DMA_EXT 0x25 ///< defined in ATA-6\r
412#define ATA_CMD_WRITE_DMA 0xca ///< defined in ATA-6\r
413#define ATA_CMD_WRITE_DMA_WITH_RETRY 0xcb ///< defined in ATA-4\r
414#define ATA_CMD_WRITE_DMA_EXT 0x35 ///< defined in ATA-6\r
8bdadcc8 415\r
416\r
417\r
37640ed3 418///\r
419/// default content of device control register, disable INT,\r
420/// Bit3 is set to 1 according ATA-1\r
421///\r
422#define ATA_DEFAULT_CTL (0x0a) \r
423///\r
424/// default context of Device/Head Register,\r
425/// Bit7 and Bit5 are set to 1 for back-compatibilities\r
426///\r
8bdadcc8 427#define ATA_DEFAULT_CMD (0xa0)\r
428\r
429#define ATAPI_MAX_BYTE_COUNT (0xfffe)\r
430\r
37640ed3 431///\r
432/// Sense Key, Additional Sense Codes and Additional Sense Code Qualifier\r
433/// defined in MultiMedia Commands (MMC, MMC-2) \r
434///\r
435/// Sense Key \r
436///\r
8bdadcc8 437#define ATA_SK_NO_SENSE (0x0)\r
438#define ATA_SK_RECOVERY_ERROR (0x1)\r
439#define ATA_SK_NOT_READY (0x2)\r
440#define ATA_SK_MEDIUM_ERROR (0x3)\r
441#define ATA_SK_HARDWARE_ERROR (0x4)\r
442#define ATA_SK_ILLEGAL_REQUEST (0x5)\r
443#define ATA_SK_UNIT_ATTENTION (0x6)\r
444#define ATA_SK_DATA_PROTECT (0x7)\r
445#define ATA_SK_BLANK_CHECK (0x8)\r
446#define ATA_SK_VENDOR_SPECIFIC (0x9)\r
447#define ATA_SK_RESERVED_A (0xA)\r
448#define ATA_SK_ABORT (0xB)\r
449#define ATA_SK_RESERVED_C (0xC)\r
450#define ATA_SK_OVERFLOW (0xD)\r
451#define ATA_SK_MISCOMPARE (0xE)\r
452#define ATA_SK_RESERVED_F (0xF)\r
453\r
454//\r
455// Additional Sense Codes\r
456//\r
457#define ATA_ASC_NOT_READY (0x04)\r
458#define ATA_ASC_MEDIA_ERR1 (0x10)\r
459#define ATA_ASC_MEDIA_ERR2 (0x11)\r
460#define ATA_ASC_MEDIA_ERR3 (0x14)\r
461#define ATA_ASC_MEDIA_ERR4 (0x30)\r
462#define ATA_ASC_MEDIA_UPSIDE_DOWN (0x06)\r
463#define ATA_ASC_INVALID_CMD (0x20)\r
464#define ATA_ASC_LBA_OUT_OF_RANGE (0x21)\r
465#define ATA_ASC_INVALID_FIELD (0x24)\r
466#define ATA_ASC_WRITE_PROTECTED (0x27)\r
467#define ATA_ASC_MEDIA_CHANGE (0x28)\r
37640ed3 468#define ATA_ASC_RESET (0x29) ///< Power On Reset or Bus Reset occurred\r
8bdadcc8 469#define ATA_ASC_ILLEGAL_FIELD (0x26)\r
470#define ATA_ASC_NO_MEDIA (0x3A)\r
471#define ATA_ASC_ILLEGAL_MODE_FOR_THIS_TRACK (0x64)\r
472\r
473//\r
474// Additional Sense Code Qualifier\r
475//\r
476#define ATA_ASCQ_IN_PROGRESS (0x01)\r
477\r
37640ed3 478///\r
479/// Error Register\r
480///\r
481#define ATA_ERRREG_BBK BIT7 ///< Bad block detected defined in ATA-1\r
482#define ATA_ERRREG_UNC BIT6 ///< Uncorrectable Data defined in ATA-3\r
483#define ATA_ERRREG_MC BIT5 ///< Media Change defined in ATA-3\r
484#define ATA_ERRREG_IDNF BIT4 ///< ID Not Found defined in ATA-3\r
485#define ATA_ERRREG_MCR BIT3 ///< Media Change Requested defined in ATA-3\r
486#define ATA_ERRREG_ABRT BIT2 ///< Aborted Command defined in ATA-6\r
487#define ATA_ERRREG_TK0NF BIT1 ///< Track 0 Not Found defined in ATA-3\r
488#define ATA_ERRREG_AMNF BIT0 ///< Address Mark Not Found defined in ATA-3\r
8bdadcc8 489\r
37640ed3 490///\r
491/// Status Register\r
492///\r
493#define ATA_STSREG_BSY BIT7 ///< Controller Busy defined in ATA-6\r
494#define ATA_STSREG_DRDY BIT6 ///< Drive Ready defined in ATA-6\r
495#define ATA_STSREG_DWF BIT5 ///< Drive Write Fault defined in ATA-6\r
496#define ATA_STSREG_DSC BIT4 ///< Disk Seek Complete defined in ATA-3\r
497#define ATA_STSREG_DRQ BIT3 ///< Data Request defined in ATA-6\r
498#define ATA_STSREG_CORR BIT2 ///< Corrected Data defined in ATA-3\r
499#define ATA_STSREG_IDX BIT1 ///< Index defined in ATA-3\r
500#define ATA_STSREG_ERR BIT0 ///< Error defined in ATA-6\r
8bdadcc8 501\r
37640ed3 502///\r
503/// Device Control Register\r
504///\r
505#define ATA_CTLREG_SRST BIT2 ///< Software Reset\r
506#define ATA_CTLREG_IEN_L BIT1 ///< Interrupt Enable #\r
8bdadcc8 507\r
508#endif\r
509\r
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