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Fix incorrect array size
[mirror_edk2.git] / MdePkg / Include / IndustryStandard / SmBios.h
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a7ed1e2e 1/** @file\r
4135253b 2 Industry Standard Definitions of SMBIOS Table Specification v2.6\r
a7ed1e2e 3\r
98cb9ae8 4 Copyright (c) 2006 - 2009, Intel Corporation All rights\r
a7ed1e2e 5 reserved. This program and the accompanying materials are\r
6 licensed and made available under the terms and conditions of the BSD License\r
7 which accompanies this distribution. The full text of the license may be found at \r
8 http://opensource.org/licenses/bsd-license.php \r
9\r
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
12\r
a7ed1e2e 13**/\r
14\r
15#ifndef __SMBIOS_STANDARD_H__\r
16#define __SMBIOS_STANDARD_H__\r
98cb9ae8 17\r
f2d0889f 18///\r
19/// Reference SMBIOS 2.6, chapter 3.1.2.\r
20/// For v2.1 and later, handle values in the range 0FF00h to 0FFFFh are reserved for\r
21/// use by this specification.\r
22///\r
23#define SMBIOS_HANDLE_RESERVED_BEGIN 0xFF00\r
24\r
25///\r
26/// Reference SMBIOS 2.6, chapter 3.1.3\r
27/// Each text string is limited to 64 significant characters due to system MIF limitations\r
28///\r
29#define SMBIOS_STRING_MAX_LENGTH 64\r
30\r
31///\r
32/// Inactive type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter 3.3.43.\r
33/// Upper-level software that interprets the SMBIOS structure-table should bypass an \r
34/// Inactive structure just like a structure type that the software does not recognize.\r
35///\r
36#define SMBIOS_TYPE_INACTIVE 0x007E \r
37\r
38///\r
39/// End-of-table type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter 3.3.44.\r
40/// The end-of-table indicator is used in the last physical structure in a table\r
41///\r
42#define SMBIOS_TYPE_END_OF_TABLE 0x007F\r
43\r
4135253b 44///\r
45/// Smbios Table Entry Point Structure\r
46///\r
766f4bc1 47#pragma pack(1)\r
a7ed1e2e 48typedef struct {\r
49 UINT8 AnchorString[4];\r
50 UINT8 EntryPointStructureChecksum;\r
51 UINT8 EntryPointLength;\r
52 UINT8 MajorVersion;\r
53 UINT8 MinorVersion;\r
54 UINT16 MaxStructureSize;\r
55 UINT8 EntryPointRevision;\r
56 UINT8 FormattedArea[5];\r
57 UINT8 IntermediateAnchorString[5];\r
58 UINT8 IntermediateChecksum;\r
59 UINT16 TableLength;\r
60 UINT32 TableAddress;\r
61 UINT16 NumberOfSmbiosStructures;\r
62 UINT8 SmbiosBcdRevision;\r
63} SMBIOS_TABLE_ENTRY_POINT;\r
64\r
ec8432e5 65///\r
66/// The Smbios structure header\r
67///\r
a7ed1e2e 68typedef struct {\r
69 UINT8 Type;\r
70 UINT8 Length;\r
71 UINT16 Handle;\r
72} SMBIOS_STRUCTURE;\r
73\r
bf7ea009 74///\r
75/// String Number for a Null terminated string, 00h stands for no string available.\r
76///\r
61ce5861 77typedef UINT8 SMBIOS_TABLE_STRING;\r
78\r
98cb9ae8 79///\r
80/// BIOS Characteristics \r
81/// Defines which functions the BIOS supports. PCI, PCMCIA, Flash, etc. \r
82///\r
83typedef struct {\r
6800ac83 84 UINT32 Reserved :2; ///< Bits 0-1\r
98cb9ae8 85 UINT32 Unknown :1; \r
86 UINT32 BiosCharacteristicsNotSupported :1; \r
87 UINT32 IsaIsSupported :1; \r
88 UINT32 McaIsSupported :1;\r
89 UINT32 EisaIsSupported :1;\r
90 UINT32 PciIsSupported :1;\r
91 UINT32 PcmciaIsSupported :1;\r
92 UINT32 PlugAndPlayIsSupported :1;\r
93 UINT32 ApmIsSupported :1;\r
94 UINT32 BiosIsUpgradable :1;\r
95 UINT32 BiosShadowingAllowed :1;\r
96 UINT32 VlVesaIsSupported :1;\r
97 UINT32 EscdSupportIsAvailable :1;\r
98 UINT32 BootFromCdIsSupported :1;\r
99 UINT32 SelectableBootIsSupported :1;\r
100 UINT32 RomBiosIsSocketed :1;\r
101 UINT32 BootFromPcmciaIsSupported :1;\r
102 UINT32 EDDSpecificationIsSupported :1;\r
103 UINT32 JapaneseNecFloppyIsSupported :1;\r
104 UINT32 JapaneseToshibaFloppyIsSupported :1;\r
105 UINT32 Floppy525_360IsSupported :1;\r
106 UINT32 Floppy525_12IsSupported :1;\r
107 UINT32 Floppy35_720IsSupported :1;\r
108 UINT32 Floppy35_288IsSupported :1;\r
109 UINT32 PrintScreenIsSupported :1;\r
110 UINT32 Keyboard8042IsSupported :1;\r
111 UINT32 SerialIsSupported :1;\r
112 UINT32 PrinterIsSupported :1;\r
113 UINT32 CgaMonoIsSupported :1;\r
114 UINT32 NecPc98 :1;\r
6800ac83 115 UINT32 ReservedForVendor :32; ///< Bits 32-63. Bits 32-47 reserved for BIOS vendor \r
116 ///< and bits 48-63 reserved for System Vendor. \r
98cb9ae8 117} MISC_BIOS_CHARACTERISTICS;\r
118\r
119///\r
120/// BIOS Characteristics Extension Byte 1 \r
121/// This information, available for SMBIOS version 2.1 and later, appears at offset 12h \r
122/// within the BIOS Information structure.\r
123///\r
124typedef struct {\r
125 UINT8 AcpiIsSupported :1;\r
126 UINT8 UsbLegacyIsSupported :1; \r
127 UINT8 AgpIsSupported :1; \r
128 UINT8 I20BootIsSupported :1;\r
129 UINT8 Ls120BootIsSupported :1;\r
130 UINT8 AtapiZipDriveBootIsSupported :1;\r
131 UINT8 Boot1394IsSupported :1;\r
132 UINT8 SmartBatteryIsSupported :1;\r
133} MBCE_BIOS_RESERVED;\r
134\r
135///\r
136/// BIOS Characteristics Extension Byte 2\r
137/// This information, available for SMBIOS version 2.3 and later, appears at offset 13h \r
138/// within the BIOS Information structure.\r
139///\r
140typedef struct {\r
141 UINT8 BiosBootSpecIsSupported :1;\r
142 UINT8 FunctionKeyNetworkBootIsSupported :1; \r
143 UINT8 TargetContentDistributionEnabled :1; \r
6800ac83 144 UINT8 ExtensionByte2Reserved :1;\r
98cb9ae8 145} MBCE_SYSTEM_RESERVED;\r
146\r
147///\r
148/// BIOS Characteristics Extension Bytes\r
149///\r
150typedef struct {\r
151 MBCE_BIOS_RESERVED BiosReserved;\r
152 MBCE_SYSTEM_RESERVED SystemReserved;\r
153 UINT8 Reserved;\r
154} MISC_BIOS_CHARACTERISTICS_EXTENSION;\r
155\r
4135253b 156///\r
157/// BIOS Information (Type 0)\r
158///\r
61ce5861 159typedef struct {\r
98cb9ae8 160 SMBIOS_STRUCTURE Hdr;\r
161 SMBIOS_TABLE_STRING Vendor;\r
162 SMBIOS_TABLE_STRING BiosVersion;\r
163 UINT16 BiosSegment;\r
164 SMBIOS_TABLE_STRING BiosReleaseDate;\r
165 UINT8 BiosSize;\r
166 MISC_BIOS_CHARACTERISTICS BiosCharacteristics;\r
167 UINT8 BIOSCharacteristicsExtensionBytes[2];\r
168 UINT8 SystemBiosMajorRelease;\r
169 UINT8 SystemBiosMinorRelease;\r
170 UINT8 EmbeddedControllerFirmwareMajorRelease;\r
171 UINT8 EmbeddedControllerFirmwareMinorRelease;\r
61ce5861 172} SMBIOS_TABLE_TYPE0;\r
173\r
98cb9ae8 174///\r
175/// System Wake-up Type \r
176///\r
177typedef enum { \r
178 SystemWakeupTypeReserved = 0x00,\r
179 SystemWakeupTypeOther = 0x01,\r
180 SystemWakeupTypeUnknown = 0x02,\r
181 SystemWakeupTypeApmTimer = 0x03,\r
182 SystemWakeupTypeModemRing = 0x04,\r
183 SystemWakeupTypeLanRemote = 0x05,\r
184 SystemWakeupTypePowerSwitch = 0x06,\r
185 SystemWakeupTypePciPme = 0x07,\r
186 SystemWakeupTypeAcPowerRestored = 0x08\r
187} MISC_SYSTEM_WAKEUP_TYPE;\r
188\r
4135253b 189///\r
190/// System Information (Type 1)\r
98cb9ae8 191/// \r
192/// The information in this structure defines attributes of the overall system and is \r
193/// intended to be associated with the Component ID group of the system's MIF.\r
194/// An SMBIOS implementation is associated with a single system instance and contains \r
195/// one and only one System Information (Type 1) structure.\r
4135253b 196///\r
61ce5861 197typedef struct {\r
98cb9ae8 198 SMBIOS_STRUCTURE Hdr;\r
199 SMBIOS_TABLE_STRING Manufacturer;\r
200 SMBIOS_TABLE_STRING ProductName;\r
201 SMBIOS_TABLE_STRING Version;\r
202 SMBIOS_TABLE_STRING SerialNumber;\r
203 GUID Uuid;\r
2d5e30ef 204 UINT8 WakeUpType; ///< enumeration value from MISC_SYSTEM_WAKEUP_TYPE\r
98cb9ae8 205 SMBIOS_TABLE_STRING SKUNumber;\r
206 SMBIOS_TABLE_STRING Family;\r
61ce5861 207} SMBIOS_TABLE_TYPE1;\r
208\r
98cb9ae8 209///\r
1f9f8414 210/// Base Board - Feature Flags \r
98cb9ae8 211///\r
212typedef struct {\r
213 UINT8 Motherboard :1;\r
214 UINT8 RequiresDaughterCard :1;\r
215 UINT8 Removable :1;\r
216 UINT8 Replaceable :1;\r
217 UINT8 HotSwappable :1;\r
218 UINT8 Reserved :3;\r
219} BASE_BOARD_FEATURE_FLAGS;\r
220\r
221///\r
1f9f8414 222/// Base Board - Board Type\r
98cb9ae8 223///\r
224typedef enum { \r
225 BaseBoardTypeUnknown = 0x1,\r
226 BaseBoardTypeOther = 0x2,\r
227 BaseBoardTypeServerBlade = 0x3,\r
228 BaseBoardTypeConnectivitySwitch = 0x4,\r
229 BaseBoardTypeSystemManagementModule = 0x5,\r
230 BaseBoardTypeProcessorModule = 0x6,\r
231 BaseBoardTypeIOModule = 0x7,\r
232 BaseBoardTypeMemoryModule = 0x8,\r
233 BaseBoardTypeDaughterBoard = 0x9,\r
234 BaseBoardTypeMotherBoard = 0xA,\r
235 BaseBoardTypeProcessorMemoryModule = 0xB,\r
236 BaseBoardTypeProcessorIOModule = 0xC,\r
237 BaseBoardTypeInterconnectBoard = 0xD\r
238} BASE_BOARD_TYPE;\r
239\r
4135253b 240///\r
241/// Base Board (or Module) Information (Type 2)\r
242///\r
1f9f8414 243/// The information in this structure defines attributes of a system baseboard - \r
98cb9ae8 244/// for example a motherboard, planar, or server blade or other standard system module.\r
245///\r
61ce5861 246typedef struct {\r
98cb9ae8 247 SMBIOS_STRUCTURE Hdr;\r
248 SMBIOS_TABLE_STRING Manufacturer;\r
249 SMBIOS_TABLE_STRING ProductName;\r
250 SMBIOS_TABLE_STRING Version;\r
251 SMBIOS_TABLE_STRING SerialNumber;\r
252 SMBIOS_TABLE_STRING AssetTag;\r
253 BASE_BOARD_FEATURE_FLAGS FeatureFlag;\r
254 SMBIOS_TABLE_STRING LocationInChassis;\r
255 UINT16 ChassisHandle;\r
2d5e30ef 256 UINT8 BoardType; ///< enumeration value from BASE_BOARD_TYPE\r
98cb9ae8 257 UINT8 NumberOfContainedObjectHandles;\r
258 UINT16 ContainedObjectHandles[1];\r
61ce5861 259} SMBIOS_TABLE_TYPE2;\r
260\r
98cb9ae8 261///\r
262/// System Enclosure or Chassis Types\r
263///\r
264typedef enum { \r
265 MiscChassisTypeOther = 0x01,\r
266 MiscChassisTypeUnknown = 0x02,\r
267 MiscChassisTypeDeskTop = 0x03,\r
268 MiscChassisTypeLowProfileDesktop = 0x04,\r
269 MiscChassisTypePizzaBox = 0x05,\r
270 MiscChassisTypeMiniTower = 0x06,\r
271 MiscChassisTypeTower = 0x07,\r
272 MiscChassisTypePortable = 0x08,\r
273 MiscChassisTypeLapTop = 0x09,\r
274 MiscChassisTypeNotebook = 0x0A,\r
275 MiscChassisTypeHandHeld = 0x0B,\r
276 MiscChassisTypeDockingStation = 0x0C,\r
277 MiscChassisTypeAllInOne = 0x0D,\r
278 MiscChassisTypeSubNotebook = 0x0E,\r
279 MiscChassisTypeSpaceSaving = 0x0F,\r
280 MiscChassisTypeLunchBox = 0x10,\r
281 MiscChassisTypeMainServerChassis = 0x11,\r
282 MiscChassisTypeExpansionChassis = 0x12,\r
283 MiscChassisTypeSubChassis = 0x13,\r
284 MiscChassisTypeBusExpansionChassis = 0x14,\r
285 MiscChassisTypePeripheralChassis = 0x15,\r
286 MiscChassisTypeRaidChassis = 0x16,\r
287 MiscChassisTypeRackMountChassis = 0x17,\r
288 MiscChassisTypeSealedCasePc = 0x18,\r
289 MiscChassisMultiSystemChassis = 0x19,\r
290 MiscChassisCompactPCI = 0x1A,\r
291 MiscChassisAdvancedTCA = 0x1B,\r
292 MiscChassisBlade = 0x1C,\r
293 MiscChassisBladeEnclosure = 0x1D\r
294} MISC_CHASSIS_TYPE;\r
295\r
296///\r
297/// System Enclosure or Chassis States \r
298///\r
299typedef enum { \r
300 ChassisStateOther = 0x01,\r
301 ChassisStateUnknown = 0x02,\r
302 ChassisStateSafe = 0x03,\r
303 ChassisStateWarning = 0x04,\r
304 ChassisStateCritical = 0x05,\r
305 ChassisStateNonRecoverable = 0x06\r
306} MISC_CHASSIS_STATE;\r
307\r
308///\r
309/// System Enclosure or Chassis Security Status \r
310///\r
311typedef enum { \r
312 ChassisSecurityStatusOther = 0x01,\r
313 ChassisSecurityStatusUnknown = 0x02,\r
314 ChassisSecurityStatusNone = 0x03,\r
315 ChassisSecurityStatusExternalInterfaceLockedOut = 0x04,\r
316 ChassisSecurityStatusExternalInterfaceLockedEnabled = 0x05\r
317} MISC_CHASSIS_SECURITY_STATE;\r
318\r
bf7ea009 319///\r
320/// Contained Element record\r
321///\r
61ce5861 322typedef struct {\r
323 UINT8 ContainedElementType;\r
324 UINT8 ContainedElementMinimum;\r
325 UINT8 ContainedElementMaximum;\r
326} CONTAINED_ELEMENT;\r
327\r
98cb9ae8 328\r
4135253b 329///\r
330/// System Enclosure or Chassis (Type 3)\r
331///\r
98cb9ae8 332/// The information in this structure defines attributes of the system's mechanical enclosure(s). \r
333/// For example, if a system included a separate enclosure for its peripheral devices, \r
334/// two structures would be returned: one for the main, system enclosure and the second for\r
335/// the peripheral device enclosure. The additions to this structure in v2.1 of this specification\r
336/// support the population of the CIM_Chassis class. \r
337///\r
61ce5861 338typedef struct {\r
98cb9ae8 339 SMBIOS_STRUCTURE Hdr;\r
340 SMBIOS_TABLE_STRING Manufacturer;\r
341 UINT8 Type;\r
342 SMBIOS_TABLE_STRING Version;\r
343 SMBIOS_TABLE_STRING SerialNumber;\r
344 SMBIOS_TABLE_STRING AssetTag;\r
2d5e30ef 345 UINT8 BootupState; ///< enumeration value from MISC_CHASSIS_STATE\r
346 UINT8 PowerSupplyState; ///< enumeration value from MISC_CHASSIS_STATE\r
347 UINT8 ThermalState; ///< enumeration value from MISC_CHASSIS_STATE\r
348 UINT8 SecurityStatus; ///< enumeration value from MISC_CHASSIS_SECURITY_STATE\r
98cb9ae8 349 UINT8 OemDefined[4];\r
350 UINT8 Height;\r
351 UINT8 NumberofPowerCords;\r
352 UINT8 ContainedElementCount;\r
353 UINT8 ContainedElementRecordLength;\r
354 CONTAINED_ELEMENT ContainedElements[1];\r
61ce5861 355} SMBIOS_TABLE_TYPE3;\r
356\r
98cb9ae8 357///\r
358/// Processor Information - Processor Type\r
359///\r
360typedef enum {\r
361 ProcessorOther = 0x01,\r
362 ProcessorUnknown = 0x02,\r
363 CentralProcessor = 0x03,\r
364 MathProcessor = 0x04,\r
365 DspProcessor = 0x05,\r
366 VideoProcessor = 0x06\r
367} PROCESSOR_TYPE_DATA;\r
368\r
369///\r
370/// Processor Information - Processor Family\r
371///\r
372typedef enum {\r
373 ProcessorFamilyOther = 0x01, \r
374 ProcessorFamilyUnknown = 0x02,\r
375 ProcessorFamily8086 = 0x03, \r
376 ProcessorFamily80286 = 0x04,\r
377 ProcessorFamilyIntel386 = 0x05, \r
378 ProcessorFamilyIntel486 = 0x06,\r
379 ProcessorFamily8087 = 0x07,\r
380 ProcessorFamily80287 = 0x08,\r
381 ProcessorFamily80387 = 0x09, \r
382 ProcessorFamily80487 = 0x0A,\r
383 ProcessorFamilyPentium = 0x0B, \r
384 ProcessorFamilyPentiumPro = 0x0C,\r
385 ProcessorFamilyPentiumII = 0x0D,\r
386 ProcessorFamilyPentiumMMX = 0x0E,\r
387 ProcessorFamilyCeleron = 0x0F,\r
388 ProcessorFamilyPentiumIIXeon = 0x10,\r
389 ProcessorFamilyPentiumIII = 0x11, \r
390 ProcessorFamilyM1 = 0x12,\r
391 ProcessorFamilyM2 = 0x13,\r
392 ProcessorFamilyM1Reserved2 = 0x14,\r
393 ProcessorFamilyM1Reserved3 = 0x15,\r
394 ProcessorFamilyM1Reserved4 = 0x16,\r
395 ProcessorFamilyM1Reserved5 = 0x17,\r
396 ProcessorFamilyAmdDuron = 0x18,\r
397 ProcessorFamilyK5 = 0x19, \r
398 ProcessorFamilyK6 = 0x1A,\r
399 ProcessorFamilyK6_2 = 0x1B,\r
400 ProcessorFamilyK6_3 = 0x1C,\r
401 ProcessorFamilyAmdAthlon = 0x1D,\r
402 ProcessorFamilyAmd29000 = 0x1E,\r
403 ProcessorFamilyK6_2Plus = 0x1F,\r
404 ProcessorFamilyPowerPC = 0x20,\r
405 ProcessorFamilyPowerPC601 = 0x21,\r
406 ProcessorFamilyPowerPC603 = 0x22,\r
407 ProcessorFamilyPowerPC603Plus = 0x23,\r
408 ProcessorFamilyPowerPC604 = 0x24,\r
409 ProcessorFamilyPowerPC620 = 0x25,\r
410 ProcessorFamilyPowerPCx704 = 0x26,\r
411 ProcessorFamilyPowerPC750 = 0x27,\r
412 ProcessorFamilyAlpha3 = 0x30,\r
413 ProcessorFamilyAlpha21064 = 0x31,\r
414 ProcessorFamilyAlpha21066 = 0x32,\r
415 ProcessorFamilyAlpha21164 = 0x33,\r
416 ProcessorFamilyAlpha21164PC = 0x34,\r
417 ProcessorFamilyAlpha21164a = 0x35,\r
418 ProcessorFamilyAlpha21264 = 0x36,\r
419 ProcessorFamilyAlpha21364 = 0x37,\r
420 ProcessorFamilyMips = 0x40,\r
421 ProcessorFamilyMIPSR4000 = 0x41,\r
422 ProcessorFamilyMIPSR4200 = 0x42,\r
423 ProcessorFamilyMIPSR4400 = 0x43,\r
424 ProcessorFamilyMIPSR4600 = 0x44,\r
425 ProcessorFamilyMIPSR10000 = 0x45,\r
426 ProcessorFamilySparc = 0x50,\r
427 ProcessorFamilySuperSparc = 0x51,\r
428 ProcessorFamilymicroSparcII = 0x52,\r
429 ProcessorFamilymicroSparcIIep = 0x53,\r
430 ProcessorFamilyUltraSparc = 0x54,\r
431 ProcessorFamilyUltraSparcII = 0x55,\r
432 ProcessorFamilyUltraSparcIIi = 0x56,\r
433 ProcessorFamilyUltraSparcIII = 0x57,\r
434 ProcessorFamilyUltraSparcIIIi = 0x58,\r
435 ProcessorFamily68040 = 0x60,\r
436 ProcessorFamily68xxx = 0x61,\r
437 ProcessorFamily68000 = 0x62,\r
438 ProcessorFamily68010 = 0x63,\r
439 ProcessorFamily68020 = 0x64,\r
440 ProcessorFamily68030 = 0x65,\r
441 ProcessorFamilyHobbit = 0x70,\r
442 ProcessorFamilyCrusoeTM5000 = 0x78,\r
443 ProcessorFamilyCrusoeTM3000 = 0x79,\r
444 ProcessorFamilyEfficeonTM8000 = 0x7A,\r
445 ProcessorFamilyWeitek = 0x80,\r
446 ProcessorFamilyItanium = 0x82,\r
447 ProcessorFamilyAmdAthlon64 = 0x83,\r
448 ProcessorFamilyAmdOpteron = 0x84,\r
449 ProcessorFamilyAmdSempron = 0x85,\r
450 ProcessorFamilyAmdTurion64Mobile = 0x86,\r
451 ProcessorFamilyDualCoreAmdOpteron = 0x87,\r
452 ProcessorFamilyAmdAthlon64X2DualCore = 0x88,\r
453 ProcessorFamilyAmdTurion64X2Mobile = 0x89,\r
454 ProcessorFamilyPARISC = 0x90,\r
455 ProcessorFamilyPaRisc8500 = 0x91,\r
456 ProcessorFamilyPaRisc8000 = 0x92,\r
457 ProcessorFamilyPaRisc7300LC = 0x93,\r
458 ProcessorFamilyPaRisc7200 = 0x94,\r
459 ProcessorFamilyPaRisc7100LC = 0x95,\r
460 ProcessorFamilyPaRisc7100 = 0x96,\r
461 ProcessorFamilyV30 = 0xA0,\r
462 ProcessorFamilyPentiumIIIXeon = 0xB0,\r
463 ProcessorFamilyPentiumIIISpeedStep = 0xB1,\r
464 ProcessorFamilyPentium4 = 0xB2,\r
465 ProcessorFamilyIntelXeon = 0xB3,\r
466 ProcessorFamilyAS400 = 0xB4,\r
467 ProcessorFamilyIntelXeonMP = 0xB5,\r
468 ProcessorFamilyAMDAthlonXP = 0xB6,\r
469 ProcessorFamilyAMDAthlonMP = 0xB7,\r
470 ProcessorFamilyIntelItanium2 = 0xB8,\r
471 ProcessorFamilyIntelPentiumM = 0xB9,\r
472 ProcessorFamilyIntelCeleronD = 0xBA,\r
473 ProcessorFamilyIntelPentiumD = 0xBB,\r
474 ProcessorFamilyIntelPentiumEx = 0xBC,\r
6800ac83 475 ProcessorFamilyIntelCoreSolo = 0xBD, ///< SMBIOS spec 2.6 correct this value\r
98cb9ae8 476 ProcessorFamilyReserved = 0xBE,\r
477 ProcessorFamilyIntelCore2 = 0xBF,\r
478 ProcessorFamilyIBM390 = 0xC8,\r
479 ProcessorFamilyG4 = 0xC9,\r
480 ProcessorFamilyG5 = 0xCA,\r
481 ProcessorFamilyG6 = 0xCB,\r
482 ProcessorFamilyzArchitectur = 0xCC,\r
483 ProcessorFamilyViaC7M = 0xD2,\r
484 ProcessorFamilyViaC7D = 0xD3,\r
485 ProcessorFamilyViaC7 = 0xD4,\r
486 ProcessorFamilyViaEden = 0xD5,\r
487 ProcessorFamilyi860 = 0xFA,\r
488 ProcessorFamilyi960 = 0xFB,\r
489 ProcessorFamilyIndicatorFamily2 = 0xFE,\r
490 ProcessorFamilyReserved1 = 0xFF\r
491} PROCESSOR_FAMILY_DATA;\r
492\r
493///\r
1f9f8414 494/// Processor Information - Voltage \r
98cb9ae8 495///\r
496typedef struct {\r
6800ac83 497 UINT8 ProcessorVoltageCapability5V :1; \r
498 UINT8 ProcessorVoltageCapability3_3V :1; \r
499 UINT8 ProcessorVoltageCapability2_9V :1; \r
500 UINT8 ProcessorVoltageCapabilityReserved :1; ///< Bit 3, must be zero.\r
501 UINT8 ProcessorVoltageReserved :3; ///< Bits 4-6, must be zero.\r
502 UINT8 ProcessorVoltageIndicateLegacy :1;\r
98cb9ae8 503} PROCESSOR_VOLTAGE;\r
504\r
505///\r
506/// Processor Information - Processor Upgrade \r
507///\r
508typedef enum {\r
509 ProcessorUpgradeOther = 0x01,\r
510 ProcessorUpgradeUnknown = 0x02,\r
511 ProcessorUpgradeDaughterBoard = 0x03,\r
512 ProcessorUpgradeZIFSocket = 0x04,\r
6800ac83 513 ProcessorUpgradePiggyBack = 0x05, ///< Replaceable\r
98cb9ae8 514 ProcessorUpgradeNone = 0x06,\r
515 ProcessorUpgradeLIFSocket = 0x07,\r
516 ProcessorUpgradeSlot1 = 0x08,\r
517 ProcessorUpgradeSlot2 = 0x09,\r
518 ProcessorUpgrade370PinSocket = 0x0A,\r
519 ProcessorUpgradeSlotA = 0x0B,\r
520 ProcessorUpgradeSlotM = 0x0C,\r
521 ProcessorUpgradeSocket423 = 0x0D,\r
6800ac83 522 ProcessorUpgradeSocketA = 0x0E, ///< Socket 462\r
98cb9ae8 523 ProcessorUpgradeSocket478 = 0x0F,\r
524 ProcessorUpgradeSocket754 = 0x10,\r
525 ProcessorUpgradeSocket940 = 0x11,\r
526 ProcessorUpgradeSocket939 = 0x12,\r
527 ProcessorUpgradeSocketmPGA604 = 0x13,\r
528 ProcessorUpgradeSocketLGA771 = 0x14,\r
529 ProcessorUpgradeSocketLGA775 = 0x15,\r
530 ProcessorUpgradeSocketS1 = 0x16,\r
531 ProcessorUpgradeAM2 = 0x17,\r
532 ProcessorUpgradeF1207 = 0x18\r
533} PROCESSOR_UPGRADE;\r
534\r
535///\r
536/// Processor ID Field Description\r
537///\r
538typedef struct {\r
539 UINT32 ProcessorSteppingId:4;\r
540 UINT32 ProcessorModel: 4;\r
541 UINT32 ProcessorFamily: 4;\r
542 UINT32 ProcessorType: 2;\r
543 UINT32 ProcessorReserved1: 2;\r
544 UINT32 ProcessorXModel: 4;\r
545 UINT32 ProcessorXFamily: 8;\r
546 UINT32 ProcessorReserved2: 4;\r
547} PROCESSOR_SIGNATURE;\r
548\r
98cb9ae8 549typedef struct {\r
550 UINT32 ProcessorFpu :1;\r
551 UINT32 ProcessorVme :1;\r
552 UINT32 ProcessorDe :1;\r
553 UINT32 ProcessorPse :1;\r
554 UINT32 ProcessorTsc :1;\r
555 UINT32 ProcessorMsr :1;\r
556 UINT32 ProcessorPae :1;\r
557 UINT32 ProcessorMce :1;\r
558 UINT32 ProcessorCx8 :1;\r
559 UINT32 ProcessorApic :1;\r
560 UINT32 ProcessorReserved1 :1;\r
561 UINT32 ProcessorSep :1;\r
562 UINT32 ProcessorMtrr :1;\r
563 UINT32 ProcessorPge :1;\r
564 UINT32 ProcessorMca :1;\r
565 UINT32 ProcessorCmov :1;\r
566 UINT32 ProcessorPat :1;\r
567 UINT32 ProcessorPse36 :1;\r
568 UINT32 ProcessorPsn :1;\r
569 UINT32 ProcessorClfsh :1;\r
570 UINT32 ProcessorReserved2 :1;\r
571 UINT32 ProcessorDs :1;\r
572 UINT32 ProcessorAcpi :1;\r
573 UINT32 ProcessorMmx :1;\r
574 UINT32 ProcessorFxsr :1;\r
575 UINT32 ProcessorSse :1;\r
576 UINT32 ProcessorSse2 :1;\r
577 UINT32 ProcessorSs :1;\r
578 UINT32 ProcessorReserved3 :1;\r
579 UINT32 ProcessorTm :1;\r
580 UINT32 ProcessorReserved4 :2;\r
581} PROCESSOR_FEATURE_FLAGS;\r
582\r
583typedef struct {\r
584 PROCESSOR_SIGNATURE Signature;\r
98cb9ae8 585 PROCESSOR_FEATURE_FLAGS FeatureFlags;\r
6800ac83 586} PROCESSOR_ID_DATA;\r
98cb9ae8 587\r
4135253b 588///\r
589/// Processor Information (Type 4)\r
590///\r
98cb9ae8 591/// The information in this structure defines the attributes of a single processor; \r
592/// a separate structure instance is provided for each system processor socket/slot. \r
593/// For example, a system with an IntelDX2 processor would have a single \r
594/// structure instance while a system with an IntelSX2 processor would have a structure\r
595/// to describe the main CPU and a second structure to describe the 80487 co-processor. \r
596///\r
61ce5861 597typedef struct { \r
598 SMBIOS_STRUCTURE Hdr;\r
2d5e30ef 599 SMBIOS_TABLE_STRING Socket;\r
600 UINT8 ProcessorType; ///< enumeration value from PROCESSOR_TYPE_DATA\r
601 UINT8 ProcessorFamily; ///< enumeration value from PROCESSOR_FAMILY_DATA\r
61ce5861 602 SMBIOS_TABLE_STRING ProcessorManufacture;\r
98cb9ae8 603 PROCESSOR_ID_DATA ProcessorId;\r
61ce5861 604 SMBIOS_TABLE_STRING ProcessorVersion;\r
98cb9ae8 605 PROCESSOR_VOLTAGE Voltage;\r
61ce5861 606 UINT16 ExternalClock;\r
607 UINT16 MaxSpeed;\r
608 UINT16 CurrentSpeed;\r
609 UINT8 Status;\r
2d5e30ef 610 UINT8 ProcessorUpgrade; ///< enumeration value from PROCESSOR_UPGRADE\r
61ce5861 611 UINT16 L1CacheHandle;\r
612 UINT16 L2CacheHandle;\r
613 UINT16 L3CacheHandle;\r
614 SMBIOS_TABLE_STRING SerialNumber;\r
615 SMBIOS_TABLE_STRING AssetTag;\r
616 SMBIOS_TABLE_STRING PartNumber;\r
617 //\r
618 // Add for smbios 2.5\r
619 //\r
620 UINT8 CoreCount;\r
621 UINT8 EnabledCoreCount;\r
622 UINT8 ThreadCount;\r
623 UINT16 ProcessorCharacteristics;\r
624 //\r
625 // Add for smbios 2.6\r
626 //\r
627 UINT16 ProcessorFamily2;\r
628} SMBIOS_TABLE_TYPE4;\r
629\r
98cb9ae8 630///\r
631/// Memory Controller Error Detecting Method \r
632///\r
633typedef enum { \r
634 ErrorDetectingMethodOther = 0x01,\r
635 ErrorDetectingMethodUnknown = 0x02,\r
636 ErrorDetectingMethodNone = 0x03,\r
637 ErrorDetectingMethodParity = 0x04,\r
638 ErrorDetectingMethod32Ecc = 0x05,\r
639 ErrorDetectingMethod64Ecc = 0x06,\r
640 ErrorDetectingMethod128Ecc = 0x07,\r
641 ErrorDetectingMethodCrc = 0x08\r
642} MEMORY_ERROR_DETECT_METHOD;\r
643\r
644///\r
645/// Memory Controller Error Correcting Capability\r
646///\r
647typedef struct {\r
648 UINT8 Other :1;\r
649 UINT8 Unknown :1;\r
650 UINT8 None :1;\r
651 UINT8 SingleBitErrorCorrect :1;\r
652 UINT8 DoubleBitErrorCorrect :1;\r
653 UINT8 ErrorScrubbing :1;\r
654 UINT8 Reserved :2;\r
655} MEMORY_ERROR_CORRECT_CAPABILITY;\r
656\r
657///\r
658/// Memory Controller Information - Interleave Support\r
659///\r
660typedef enum { \r
661 MemoryInterleaveOther = 0x01,\r
662 MemoryInterleaveUnknown = 0x02,\r
663 MemoryInterleaveOneWay = 0x03,\r
664 MemoryInterleaveTwoWay = 0x04,\r
665 MemoryInterleaveFourWay = 0x05,\r
666 MemoryInterleaveEightWay = 0x06,\r
667 MemoryInterleaveSixteenWay = 0x07\r
668} MEMORY_SUPPORT_INTERLEAVE_TYPE;\r
669\r
670///\r
671/// Memory Controller Information - Memory Speeds\r
672///\r
673typedef struct {\r
674 UINT16 Other :1;\r
675 UINT16 Unknown :1;\r
676 UINT16 SeventyNs:1;\r
677 UINT16 SixtyNs :1;\r
678 UINT16 FiftyNs :1;\r
679 UINT16 Reserved :11;\r
680} MEMORY_SPEED_TYPE;\r
681\r
4135253b 682///\r
683/// Memory Controller Information (Type 5, Obsolete)\r
684///\r
98cb9ae8 685/// The information in this structure defines the attributes of the system's memory controller(s) \r
686/// and the supported attributes of any memory-modules present in the sockets controlled by \r
687/// this controller. \r
688/// Note: This structure, and its companion Memory Module Information (Type 6, Obsolete), \r
689/// are obsolete starting with version 2.1 of this specification; the Physical Memory Array (Type 16)\r
690/// and Memory Device (Type 17) structures should be used instead. BIOS providers might\r
691/// choose to implement both memory description types to allow existing DMI browsers\r
692/// to properly display the system's memory attributes.\r
693///\r
61ce5861 694typedef struct {\r
98cb9ae8 695 SMBIOS_STRUCTURE Hdr;\r
2d5e30ef 696 UINT8 ErrDetectMethod; ///< enumeration value from MEMORY_ERROR_DETECT_METHOD\r
98cb9ae8 697 MEMORY_ERROR_CORRECT_CAPABILITY ErrCorrectCapability;\r
2d5e30ef 698 UINT8 SupportInterleave; ///< enumeration value from MEMORY_SUPPORT_INTERLEAVE_TYPE\r
699 UINT8 CurrentInterleave; ///< enumeration value from MEMORY_SUPPORT_INTERLEAVE_TYPE \r
98cb9ae8 700 UINT8 MaxMemoryModuleSize;\r
701 MEMORY_SPEED_TYPE SupportSpeed;\r
702 UINT16 SupportMemoryType;\r
703 UINT8 MemoryModuleVoltage;\r
704 UINT8 AssociatedMemorySlotNum;\r
705 UINT16 MemoryModuleConfigHandles[1];\r
61ce5861 706} SMBIOS_TABLE_TYPE5;\r
707\r
98cb9ae8 708///\r
709/// Memory Module Information - Memory Types\r
710///\r
711typedef struct {\r
712 UINT16 Other :1;\r
713 UINT16 Unknown :1;\r
714 UINT16 Standard :1;\r
715 UINT16 FastPageMode:1;\r
b4ab47ec 716 UINT16 Edo :1;\r
98cb9ae8 717 UINT16 Parity :1;\r
b4ab47ec 718 UINT16 Ecc :1;\r
719 UINT16 Simm :1;\r
720 UINT16 Dimm :1;\r
98cb9ae8 721 UINT16 BurstEdo :1;\r
b4ab47ec 722 UINT16 Sdram :1;\r
98cb9ae8 723 UINT16 Reserved :5;\r
724} MEMORY_CURRENT_TYPE;\r
725\r
726///\r
727/// Memory Module Information - Memory Size\r
728///\r
729typedef struct {\r
6800ac83 730 UINT8 InstalledOrEnabledSize :7; ///< Size (n), where 2**n is the size in MB.\r
98cb9ae8 731 UINT8 SingleOrDoubleBank :1;\r
732} MEMORY_INSTALLED_ENABLED_SIZE;\r
733\r
4135253b 734///\r
735/// Memory Module Information (Type 6, Obsolete)\r
736///\r
98cb9ae8 737/// One Memory Module Information structure is included for each memory-module socket \r
738/// in the system. The structure describes the speed, type, size, and error status\r
739/// of each system memory module. The supported attributes of each module are described \r
740/// by the "owning" Memory Controller Information structure. \r
741/// Note: This structure, and its companion Memory Controller Information (Type 5, Obsolete), \r
742/// are obsolete starting with version 2.1 of this specification; the Physical Memory Array (Type 16)\r
743/// and Memory Device (Type 17) structures should be used instead.\r
744///\r
61ce5861 745typedef struct {\r
98cb9ae8 746 SMBIOS_STRUCTURE Hdr;\r
747 SMBIOS_TABLE_STRING SocketDesignation;\r
748 UINT8 BankConnections;\r
749 UINT8 CurrentSpeed;\r
750 MEMORY_CURRENT_TYPE CurrentMemoryType;\r
751 MEMORY_INSTALLED_ENABLED_SIZE InstalledSize;\r
752 MEMORY_INSTALLED_ENABLED_SIZE EnabledSize;\r
753 UINT8 ErrorStatus;\r
61ce5861 754} SMBIOS_TABLE_TYPE6;\r
755\r
98cb9ae8 756///\r
757/// Cache Information - SRAM Type\r
758///\r
759typedef struct {\r
760 UINT16 Other :1;\r
761 UINT16 Unknown :1;\r
762 UINT16 NonBurst :1;\r
763 UINT16 Burst :1;\r
764 UINT16 PipelineBurst :1;\r
765 UINT16 Asynchronous :1;\r
766 UINT16 Synchronous :1;\r
767 UINT16 Reserved :9;\r
768} CACHE_SRAM_TYPE_DATA;\r
769\r
770///\r
771/// Cache Information - Error Correction Type \r
772///\r
773typedef enum {\r
774 CacheErrorOther = 0x01,\r
775 CacheErrorUnknown = 0x02,\r
776 CacheErrorNone = 0x03,\r
777 CacheErrorParity = 0x04,\r
6800ac83 778 CacheErrorSingleBit = 0x05, ///< ECC\r
779 CacheErrorMultiBit = 0x06 ///< ECC\r
98cb9ae8 780} CACHE_ERROR_TYPE_DATA;\r
781\r
782///\r
783/// Cache Information - System Cache Type \r
784///\r
785typedef enum {\r
786 CacheTypeOther = 0x01,\r
787 CacheTypeUnknown = 0x02,\r
788 CacheTypeInstruction = 0x03,\r
789 CacheTypeData = 0x04,\r
790 CacheTypeUnified = 0x05\r
791} CACHE_TYPE_DATA;\r
792\r
793///\r
794/// Cache Information - Associativity \r
795///\r
796typedef enum {\r
797 CacheAssociativityOther = 0x01,\r
798 CacheAssociativityUnknown = 0x02,\r
799 CacheAssociativityDirectMapped = 0x03,\r
800 CacheAssociativity2Way = 0x04,\r
801 CacheAssociativity4Way = 0x05,\r
802 CacheAssociativityFully = 0x06,\r
803 CacheAssociativity8Way = 0x07,\r
804 CacheAssociativity16Way = 0x08,\r
805 CacheAssociativity24Way = 0x09\r
806} CACHE_ASSOCIATIVITY_DATA;\r
807\r
4135253b 808///\r
809/// Cache Information (Type 7)\r
810///\r
98cb9ae8 811/// he information in this structure defines the attributes of CPU cache device in the system. \r
812/// One structure is specified for each such device, whether the device is internal to\r
813/// or external to the CPU module. Cache modules can be associated with a processor structure\r
814/// in one or two ways depending on the SMBIOS version.\r
815///\r
61ce5861 816typedef struct {\r
98cb9ae8 817 SMBIOS_STRUCTURE Hdr;\r
818 SMBIOS_TABLE_STRING SocketDesignation;\r
819 UINT16 CacheConfiguration;\r
820 UINT16 MaximumCacheSize;\r
821 UINT16 InstalledSize;\r
822 CACHE_SRAM_TYPE_DATA SupportedSRAMType;\r
823 CACHE_SRAM_TYPE_DATA CurrentSRAMType;\r
824 UINT8 CacheSpeed;\r
2d5e30ef 825 UINT8 ErrorCorrectionType; ///< enumeration value from CACHE_ERROR_TYPE_DATA\r
826 UINT8 SystemCacheType; ///< enumeration value from CACHE_TYPE_DATA\r
827 UINT8 Associativity; ///< enumeration value from CACHE_ASSOCIATIVITY_DATA\r
61ce5861 828} SMBIOS_TABLE_TYPE7;\r
829\r
98cb9ae8 830///\r
831/// Port Connector Information - Connector Types \r
832///\r
833typedef enum {\r
834 PortConnectorTypeNone = 0x00,\r
835 PortConnectorTypeCentronics = 0x01,\r
836 PortConnectorTypeMiniCentronics = 0x02,\r
837 PortConnectorTypeProprietary = 0x03,\r
838 PortConnectorTypeDB25Male = 0x04,\r
839 PortConnectorTypeDB25Female = 0x05,\r
840 PortConnectorTypeDB15Male = 0x06,\r
841 PortConnectorTypeDB15Female = 0x07,\r
842 PortConnectorTypeDB9Male = 0x08,\r
843 PortConnectorTypeDB9Female = 0x09,\r
844 PortConnectorTypeRJ11 = 0x0A,\r
845 PortConnectorTypeRJ45 = 0x0B,\r
846 PortConnectorType50PinMiniScsi = 0x0C,\r
847 PortConnectorTypeMiniDin = 0x0D,\r
848 PortConnectorTypeMicriDin = 0x0E,\r
849 PortConnectorTypePS2 = 0x0F,\r
850 PortConnectorTypeInfrared = 0x10,\r
851 PortConnectorTypeHpHil = 0x11,\r
852 PortConnectorTypeUsb = 0x12,\r
853 PortConnectorTypeSsaScsi = 0x13,\r
854 PortConnectorTypeCircularDin8Male = 0x14,\r
855 PortConnectorTypeCircularDin8Female = 0x15,\r
856 PortConnectorTypeOnboardIde = 0x16,\r
857 PortConnectorTypeOnboardFloppy = 0x17,\r
858 PortConnectorType9PinDualInline = 0x18,\r
859 PortConnectorType25PinDualInline = 0x19,\r
860 PortConnectorType50PinDualInline = 0x1A,\r
861 PortConnectorType68PinDualInline = 0x1B,\r
862 PortConnectorTypeOnboardSoundInput = 0x1C,\r
863 PortConnectorTypeMiniCentronicsType14 = 0x1D,\r
864 PortConnectorTypeMiniCentronicsType26 = 0x1E,\r
865 PortConnectorTypeHeadPhoneMiniJack = 0x1F,\r
866 PortConnectorTypeBNC = 0x20,\r
867 PortConnectorType1394 = 0x21,\r
868 PortConnectorTypePC98 = 0xA0,\r
869 PortConnectorTypePC98Hireso = 0xA1,\r
870 PortConnectorTypePCH98 = 0xA2,\r
871 PortConnectorTypePC98Note = 0xA3,\r
872 PortConnectorTypePC98Full = 0xA4,\r
873 PortConnectorTypeOther = 0xFF\r
874} MISC_PORT_CONNECTOR_TYPE;\r
875\r
876///\r
877/// Port Connector Information - Port Types \r
878///\r
879typedef enum {\r
880 PortTypeNone = 0x00,\r
881 PortTypeParallelXtAtCompatible = 0x01,\r
882 PortTypeParallelPortPs2 = 0x02,\r
883 PortTypeParallelPortEcp = 0x03,\r
884 PortTypeParallelPortEpp = 0x04,\r
885 PortTypeParallelPortEcpEpp = 0x05,\r
886 PortTypeSerialXtAtCompatible = 0x06,\r
887 PortTypeSerial16450Compatible = 0x07,\r
888 PortTypeSerial16550Compatible = 0x08,\r
889 PortTypeSerial16550ACompatible = 0x09,\r
890 PortTypeScsi = 0x0A,\r
891 PortTypeMidi = 0x0B,\r
892 PortTypeJoyStick = 0x0C,\r
893 PortTypeKeyboard = 0x0D,\r
894 PortTypeMouse = 0x0E,\r
895 PortTypeSsaScsi = 0x0F,\r
896 PortTypeUsb = 0x10,\r
897 PortTypeFireWire = 0x11,\r
898 PortTypePcmciaTypeI = 0x12,\r
899 PortTypePcmciaTypeII = 0x13,\r
900 PortTypePcmciaTypeIII = 0x14,\r
901 PortTypeCardBus = 0x15,\r
902 PortTypeAccessBusPort = 0x16,\r
903 PortTypeScsiII = 0x17,\r
904 PortTypeScsiWide = 0x18,\r
905 PortTypePC98 = 0x19,\r
906 PortTypePC98Hireso = 0x1A,\r
907 PortTypePCH98 = 0x1B,\r
908 PortTypeVideoPort = 0x1C,\r
909 PortTypeAudioPort = 0x1D,\r
910 PortTypeModemPort = 0x1E,\r
911 PortTypeNetworkPort = 0x1F,\r
912 PortType8251Compatible = 0xA0,\r
913 PortType8251FifoCompatible = 0xA1,\r
914 PortTypeOther = 0xFF\r
915} MISC_PORT_TYPE;\r
916\r
4135253b 917///\r
918/// Port Connector Information (Type 8)\r
919///\r
98cb9ae8 920/// The information in this structure defines the attributes of a system port connector, \r
1f9f8414 921/// e.g. parallel, serial, keyboard, or mouse ports. The port's type and connector information \r
98cb9ae8 922/// are provided. One structure is present for each port provided by the system.\r
923///\r
61ce5861 924typedef struct {\r
98cb9ae8 925 SMBIOS_STRUCTURE Hdr;\r
926 SMBIOS_TABLE_STRING InternalReferenceDesignator;\r
2d5e30ef 927 UINT8 InternalConnectorType; ///< enumeration value from MISC_PORT_CONNECTOR_TYPE\r
98cb9ae8 928 SMBIOS_TABLE_STRING ExternalReferenceDesignator;\r
2d5e30ef 929 UINT8 ExternalConnectorType; ///< enumeration value from MISC_PORT_CONNECTOR_TYPE\r
930 UINT8 PortType; ///< enumeration value from MISC_PORT_TYPE\r
61ce5861 931} SMBIOS_TABLE_TYPE8;\r
932\r
98cb9ae8 933///\r
934/// System Slots - Slot Type\r
935///\r
936typedef enum {\r
937 SlotTypeOther = 0x01,\r
938 SlotTypeUnknown = 0x02,\r
939 SlotTypeIsa = 0x03,\r
940 SlotTypeMca = 0x04,\r
941 SlotTypeEisa = 0x05,\r
942 SlotTypePci = 0x06,\r
943 SlotTypePcmcia = 0x07,\r
944 SlotTypeVlVesa = 0x08,\r
945 SlotTypeProprietary = 0x09,\r
946 SlotTypeProcessorCardSlot = 0x0A,\r
947 SlotTypeProprietaryMemoryCardSlot = 0x0B,\r
948 SlotTypeIORiserCardSlot = 0x0C,\r
949 SlotTypeNuBus = 0x0D,\r
950 SlotTypePci66MhzCapable = 0x0E,\r
951 SlotTypeAgp = 0x0F,\r
952 SlotTypeApg2X = 0x10,\r
953 SlotTypeAgp4X = 0x11,\r
954 SlotTypePciX = 0x12,\r
955 SlotTypeAgp4x = 0x13,\r
956 SlotTypePC98C20 = 0xA0,\r
957 SlotTypePC98C24 = 0xA1,\r
958 SlotTypePC98E = 0xA2,\r
959 SlotTypePC98LocalBus = 0xA3,\r
960 SlotTypePC98Card = 0xA4,\r
961 SlotTypePciExpress = 0xA5,\r
962 SlotTypePciExpressX1 = 0xA6,\r
963 SlotTypePciExpressX2 = 0xA7,\r
964 SlotTypePciExpressX4 = 0xA8,\r
965 SlotTypePciExpressX8 = 0xA9,\r
966 SlotTypePciExpressX16 = 0xAA\r
967} MISC_SLOT_TYPE;\r
968\r
969///\r
970/// System Slots - Slot Data Bus Width\r
971///\r
972typedef enum {\r
973 SlotDataBusWidthOther = 0x01,\r
974 SlotDataBusWidthUnknown = 0x02,\r
975 SlotDataBusWidth8Bit = 0x03,\r
976 SlotDataBusWidth16Bit = 0x04,\r
977 SlotDataBusWidth32Bit = 0x05,\r
978 SlotDataBusWidth64Bit = 0x06,\r
979 SlotDataBusWidth128Bit = 0x07,\r
6800ac83 980 SlotDataBusWidth1X = 0x08, ///< Or X1\r
981 SlotDataBusWidth2X = 0x09, ///< Or X2\r
982 SlotDataBusWidth4X = 0x0A, ///< Or X4\r
983 SlotDataBusWidth8X = 0x0B, ///< Or X8\r
984 SlotDataBusWidth12X = 0x0C, ///< Or X12\r
985 SlotDataBusWidth16X = 0x0D, ///< Or X16\r
986 SlotDataBusWidth32X = 0x0E ///< Or X32\r
98cb9ae8 987} MISC_SLOT_DATA_BUS_WIDTH;\r
988\r
989///\r
990/// System Slots - Current Usage\r
991///\r
992typedef enum {\r
993 SlotUsageOther = 0x01,\r
994 SlotUsageUnknown = 0x02,\r
995 SlotUsageAvailable = 0x03,\r
996 SlotUsageInUse = 0x04\r
997} MISC_SLOT_USAGE;\r
998\r
999///\r
1000/// System Slots - Slot Length \r
1001///\r
1002typedef enum {\r
1003 SlotLengthOther = 0x01,\r
1004 SlotLengthUnknown = 0x02,\r
1005 SlotLengthShort = 0x03,\r
1006 SlotLengthLong = 0x04\r
1007} MISC_SLOT_LENGTH;\r
1008\r
1009///\r
1010/// System Slots - Slot Characteristics 1 \r
1011///\r
1012typedef struct {\r
1013 UINT8 CharacteristicsUnknown :1;\r
1014 UINT8 Provides50Volts :1;\r
1015 UINT8 Provides33Volts :1;\r
1016 UINT8 SharedSlot :1;\r
1017 UINT8 PcCard16Supported :1;\r
1018 UINT8 CardBusSupported :1;\r
1019 UINT8 ZoomVideoSupported :1;\r
1020 UINT8 ModemRingResumeSupported:1;\r
1021} MISC_SLOT_CHARACTERISTICS1;\r
1022///\r
1023/// System Slots - Slot Characteristics 2 \r
1024///\r
1025typedef struct {\r
1026 UINT8 PmeSignalSupported :1;\r
1027 UINT8 HotPlugDevicesSupported :1;\r
1028 UINT8 SmbusSignalSupported :1;\r
6800ac83 1029 UINT8 Reserved :5; ///< Set to 0.\r
98cb9ae8 1030} MISC_SLOT_CHARACTERISTICS2;\r
1031\r
4135253b 1032///\r
1033/// System Slots (Type 9)\r
1034///\r
98cb9ae8 1035/// The information in this structure defines the attributes of a system slot. \r
1036/// One structure is provided for each slot in the system.\r
1037///\r
1038///\r
61ce5861 1039typedef struct {\r
98cb9ae8 1040 SMBIOS_STRUCTURE Hdr;\r
1041 SMBIOS_TABLE_STRING SlotDesignation;\r
2d5e30ef 1042 UINT8 SlotType; ///< enumeration value from MISC_SLOT_TYPE\r
1043 UINT8 SlotDataBusWidth; ///< enumeration value from MISC_SLOT_DATA_BUS_WIDTH\r
1044 UINT8 CurrentUsage; ///< enumeration value from MISC_SLOT_USAGE\r
1045 UINT8 SlotLength; ///< enumeration value from MISC_SLOT_LENGTH\r
98cb9ae8 1046 UINT16 SlotID;\r
1047 MISC_SLOT_CHARACTERISTICS1 SlotCharacteristics1;\r
1048 MISC_SLOT_CHARACTERISTICS2 SlotCharacteristics2;\r
61ce5861 1049 //\r
1050 // Add for smbios 2.6\r
1051 //\r
98cb9ae8 1052 UINT16 SegmentGroupNum;\r
1053 UINT8 BusNum;\r
1054 UINT8 DevFuncNum;\r
61ce5861 1055} SMBIOS_TABLE_TYPE9;\r
1056\r
98cb9ae8 1057///\r
1058/// On Board Devices Information - Device Types \r
1059///\r
1060typedef enum {\r
1061 OnBoardDeviceTypeOther = 0x01,\r
1062 OnBoardDeviceTypeUnknown = 0x02,\r
1063 OnBoardDeviceTypeVideo = 0x03,\r
1064 OnBoardDeviceTypeScsiController = 0x04,\r
1065 OnBoardDeviceTypeEthernet = 0x05,\r
1066 OnBoardDeviceTypeTokenRing = 0x06,\r
1067 OnBoardDeviceTypeSound = 0x07\r
1068} MISC_ONBOARD_DEVICE_TYPE;\r
1069\r
bf7ea009 1070///\r
1071/// Device Item Entry\r
1072///\r
61ce5861 1073typedef struct {\r
2d5e30ef 1074 UINT8 DeviceType; ///< Bit [6:0] - enumeration type of device from MISC_ONBOARD_DEVICE_TYPE\r
1075 ///< Bit 7 - 1 : device enabled, 0 : device disabled\r
98cb9ae8 1076 SMBIOS_TABLE_STRING DescriptionString;\r
61ce5861 1077} DEVICE_STRUCT;\r
1078\r
4135253b 1079///\r
1080/// On Board Devices Information (Type 10, obsolete)\r
1081///\r
98cb9ae8 1082/// Note: This structure is obsolete starting with version 2.6 specification; the Onboard Devices Extended \r
1083/// Information (Type 41) structure should be used instead . BIOS providers can choose to implement both \r
1084/// types to allow existing SMBIOS browsers to properly display the system's onboard devices information. \r
1085/// The information in this structure defines the attributes of devices that are onboard (soldered onto) \r
1086/// a system element, usually the baseboard. In general, an entry in this table implies that the BIOS\r
1087/// has some level of control over the enabling of the associated device for use by the system.\r
1088///\r
61ce5861 1089typedef struct {\r
1090 SMBIOS_STRUCTURE Hdr;\r
1091 DEVICE_STRUCT Device[1];\r
1092} SMBIOS_TABLE_TYPE10;\r
1093\r
4135253b 1094///\r
1095/// OEM Strings (Type 11)\r
98cb9ae8 1096/// This structure contains free form strings defined by the OEM. Examples of this are: \r
1097/// Part Numbers for Reference Documents for the system, contact information for the manufacturer, etc. \r
4135253b 1098///\r
61ce5861 1099typedef struct {\r
1100 SMBIOS_STRUCTURE Hdr;\r
1101 UINT8 StringCount;\r
1102} SMBIOS_TABLE_TYPE11;\r
1103\r
4135253b 1104///\r
1105/// System Configuration Options (Type 12)\r
1106///\r
98cb9ae8 1107/// This structure contains information required to configure the base board's Jumpers and Switches. \r
1108///\r
61ce5861 1109typedef struct {\r
1110 SMBIOS_STRUCTURE Hdr;\r
1111 UINT8 StringCount;\r
1112} SMBIOS_TABLE_TYPE12;\r
1113\r
98cb9ae8 1114\r
4135253b 1115///\r
1116/// BIOS Language Information (Type 13)\r
1117///\r
98cb9ae8 1118/// The information in this structure defines the installable language attributes of the BIOS. \r
1119/// \r
61ce5861 1120typedef struct {\r
1121 SMBIOS_STRUCTURE Hdr;\r
1122 UINT8 InstallableLanguages;\r
1123 UINT8 Flags;\r
fbfa4a1d 1124 UINT8 Reserved[15];\r
61ce5861 1125 SMBIOS_TABLE_STRING CurrentLanguages;\r
1126} SMBIOS_TABLE_TYPE13;\r
1127\r
98cb9ae8 1128///\r
1129/// System Event Log - Event Log Types \r
1130/// \r
1131typedef enum {\r
1132 EventLogTypeReserved = 0x00,\r
1133 EventLogTypeSingleBitECC = 0x01,\r
1134 EventLogTypeMultiBitECC = 0x02,\r
1135 EventLogTypeParityMemErr = 0x03,\r
1136 EventLogTypeBusTimeOut = 0x04,\r
1137 EventLogTypeIOChannelCheck = 0x05,\r
1138 EventLogTypeSoftwareNMI = 0x06,\r
1139 EventLogTypePOSTMemResize = 0x07,\r
1140 EventLogTypePOSTErr = 0x08,\r
1141 EventLogTypePCIParityErr = 0x09,\r
1142 EventLogTypePCISystemErr = 0x0A,\r
1143 EventLogTypeCPUFailure = 0x0B,\r
1144 EventLogTypeEISATimeOut = 0x0C,\r
1145 EventLogTypeMemLogDisabled = 0x0D,\r
1146 EventLogTypeLoggingDisabled = 0x0E,\r
1147 EventLogTypeSysLimitExce = 0x10,\r
1148 EventLogTypeAsyncHWTimer = 0x11,\r
1149 EventLogTypeSysConfigInfo = 0x12,\r
1150 EventLogTypeHDInfo = 0x13,\r
1151 EventLogTypeSysReconfig = 0x14,\r
1152 EventLogTypeUncorrectCPUErr = 0x15,\r
1153 EventLogTypeAreaResetAndClr = 0x16,\r
1154 EventLogTypeSystemBoot = 0x17,\r
6800ac83 1155 EventLogTypeUnused = 0x18, ///< 0x18 - 0x7F\r
1156 EventLogTypeAvailForSys = 0x80, ///< 0x80 - 0xFE\r
98cb9ae8 1157 EventLogTypeEndOfLog = 0xFF\r
1158} EVENT_LOG_TYPE_DATA;\r
1159\r
1160///\r
1161/// System Event Log - Variable Data Format Types \r
1162/// \r
1163typedef enum {\r
1164 EventLogVariableNone = 0x00,\r
1165 EventLogVariableHandle = 0x01,\r
1166 EventLogVariableMutilEvent = 0x02,\r
1167 EventLogVariableMutilEventHandle = 0x03,\r
1168 EventLogVariablePOSTResultBitmap = 0x04,\r
1169 EventLogVariableSysManagementType = 0x05,\r
1170 EventLogVariableMutliEventSysManagmentType = 0x06, \r
1171 EventLogVariableUnused = 0x07,\r
1172 EventLogVariableOEMAssigned = 0x80\r
55deb978 1173} EVENT_LOG_VARIABLE_DATA;\r
98cb9ae8 1174\r
bf7ea009 1175///\r
1176/// Group Item Entry\r
1177///\r
61ce5861 1178typedef struct {\r
1179 UINT8 ItemType;\r
1180 UINT16 ItemHandle;\r
1181} GROUP_STRUCT;\r
1182\r
98cb9ae8 1183///\r
1184/// Event Log Type Descriptors\r
1185///\r
1186typedef struct {\r
2d5e30ef 1187 UINT8 LogType; ///< enumeration value from EVENT_LOG_TYPE_DATA\r
98cb9ae8 1188 UINT8 DataFormatType;\r
1189} EVENT_LOG_TYPE;\r
1190\r
4135253b 1191///\r
1192/// Group Associations (Type 14)\r
1193///\r
98cb9ae8 1194/// The Group Associations structure is provided for OEMs who want to specify \r
1195/// the arrangement or hierarchy of certain components (including other Group Associations) \r
1196/// within the system. \r
1197///\r
61ce5861 1198typedef struct {\r
1199 SMBIOS_STRUCTURE Hdr;\r
1200 SMBIOS_TABLE_STRING GroupName;\r
1201 GROUP_STRUCT Group[1];\r
1202} SMBIOS_TABLE_TYPE14;\r
1203\r
4135253b 1204///\r
1205/// System Event Log (Type 15)\r
1206///\r
98cb9ae8 1207/// The presence of this structure within the SMBIOS data returned for a system indicates \r
1208/// that the system supports an event log. An event log is a fixed-length area within a \r
1209/// non-volatile storage element, starting with a fixed-length (and vendor-specific) header \r
1210/// record, followed by one or more variable-length log records. \r
1211///\r
61ce5861 1212typedef struct {\r
1213 SMBIOS_STRUCTURE Hdr;\r
1214 UINT16 LogAreaLength;\r
1215 UINT16 LogHeaderStartOffset;\r
1216 UINT16 LogDataStartOffset;\r
1217 UINT8 AccessMethod;\r
1218 UINT8 LogStatus;\r
1219 UINT32 LogChangeToken;\r
1220 UINT32 AccessMethodAddress;\r
1221 UINT8 LogHeaderFormat;\r
1222 UINT8 NumberOfSupportedLogTypeDescriptors;\r
1223 UINT8 LengthOfLogTypeDescriptor;\r
1224 EVENT_LOG_TYPE EventLogTypeDescriptors[1];\r
1225} SMBIOS_TABLE_TYPE15;\r
1226\r
98cb9ae8 1227///\r
1228/// Physical Memory Array - Location\r
1229///\r
1230typedef enum {\r
1231 MemoryArrayLocationOther = 0x01,\r
1232 MemoryArrayLocationUnknown = 0x02,\r
1233 MemoryArrayLocationSystemBoard = 0x03,\r
1234 MemoryArrayLocationIsaAddonCard = 0x04,\r
1235 MemoryArrayLocationEisaAddonCard = 0x05,\r
1236 MemoryArrayLocationPciAddonCard = 0x06,\r
1237 MemoryArrayLocationMcaAddonCard = 0x07,\r
1238 MemoryArrayLocationPcmciaAddonCard = 0x08,\r
1239 MemoryArrayLocationProprietaryAddonCard = 0x09,\r
1240 MemoryArrayLocationNuBus = 0x0A,\r
1241 MemoryArrayLocationPc98C20AddonCard = 0xA0,\r
1242 MemoryArrayLocationPc98C24AddonCard = 0xA1,\r
1243 MemoryArrayLocationPc98EAddonCard = 0xA2,\r
1244 MemoryArrayLocationPc98LocalBusAddonCard = 0xA3\r
1245} MEMORY_ARRAY_LOCATION;\r
1246\r
1247///\r
1248/// Physical Memory Array - Use\r
1249///\r
1250typedef enum {\r
1251 MemoryArrayUseOther = 0x01,\r
1252 MemoryArrayUseUnknown = 0x02,\r
1253 MemoryArrayUseSystemMemory = 0x03,\r
1254 MemoryArrayUseVideoMemory = 0x04,\r
1255 MemoryArrayUseFlashMemory = 0x05,\r
1256 MemoryArrayUseNonVolatileRam = 0x06,\r
1257 MemoryArrayUseCacheMemory = 0x07\r
1258} MEMORY_ARRAY_USE;\r
1259\r
1260///\r
1261/// Physical Memory Array - Error Correction Types \r
1262///\r
1263typedef enum {\r
1264 MemoryErrorCorrectionOther = 0x01,\r
1265 MemoryErrorCorrectionUnknown = 0x02,\r
1266 MemoryErrorCorrectionNone = 0x03,\r
1267 MemoryErrorCorrectionParity = 0x04,\r
1268 MemoryErrorCorrectionSingleBitEcc = 0x05,\r
1269 MemoryErrorCorrectionMultiBitEcc = 0x06,\r
1270 MemoryErrorCorrectionCrc = 0x07\r
1271} MEMORY_ERROR_CORRECTION;\r
1272\r
4135253b 1273///\r
1274/// Physical Memory Array (Type 16)\r
1275///\r
98cb9ae8 1276/// This structure describes a collection of memory devices that operate \r
1277/// together to form a memory address space. \r
1278///\r
61ce5861 1279typedef struct {\r
98cb9ae8 1280 SMBIOS_STRUCTURE Hdr;\r
2d5e30ef 1281 UINT8 Location; ///< enumeration value from MEMORY_ARRAY_LOCATION\r
1282 UINT8 Use; ///< enumeration value from MEMORY_ARRAY_USE\r
1283 UINT8 MemoryErrorCorrection; ///< enumeration value from MEMORY_ERROR_CORRECTION\r
98cb9ae8 1284 UINT32 MaximumCapacity;\r
1285 UINT16 MemoryErrorInformationHandle;\r
1286 UINT16 NumberOfMemoryDevices;\r
61ce5861 1287} SMBIOS_TABLE_TYPE16;\r
1288\r
98cb9ae8 1289///\r
1290/// Memory Device - Form Factor\r
1291///\r
1292typedef enum {\r
1293 MemoryFormFactorOther = 0x01,\r
1294 MemoryFormFactorUnknown = 0x02,\r
1295 MemoryFormFactorSimm = 0x03,\r
1296 MemoryFormFactorSip = 0x04,\r
1297 MemoryFormFactorChip = 0x05,\r
1298 MemoryFormFactorDip = 0x06,\r
1299 MemoryFormFactorZip = 0x07,\r
1300 MemoryFormFactorProprietaryCard = 0x08,\r
1301 MemoryFormFactorDimm = 0x09,\r
1302 MemoryFormFactorTsop = 0x0A,\r
1303 MemoryFormFactorRowOfChips = 0x0B,\r
1304 MemoryFormFactorRimm = 0x0C,\r
1305 MemoryFormFactorSodimm = 0x0D,\r
1306 MemoryFormFactorSrimm = 0x0E,\r
1307 MemoryFormFactorFbDimm = 0x0F\r
1308} MEMORY_FORM_FACTOR;\r
1309\r
1310///\r
1311/// Memory Device - Type\r
1312///\r
1313typedef enum {\r
1314 MemoryTypeOther = 0x01,\r
1315 MemoryTypeUnknown = 0x02,\r
1316 MemoryTypeDram = 0x03,\r
1317 MemoryTypeEdram = 0x04,\r
1318 MemoryTypeVram = 0x05,\r
1319 MemoryTypeSram = 0x06,\r
1320 MemoryTypeRam = 0x07,\r
1321 MemoryTypeRom = 0x08,\r
1322 MemoryTypeFlash = 0x09,\r
1323 MemoryTypeEeprom = 0x0A,\r
1324 MemoryTypeFeprom = 0x0B,\r
1325 MemoryTypeEprom = 0x0C,\r
1326 MemoryTypeCdram = 0x0D,\r
1327 MemoryType3Dram = 0x0E,\r
1328 MemoryTypeSdram = 0x0F,\r
1329 MemoryTypeSgram = 0x10,\r
1330 MemoryTypeRdram = 0x11,\r
1331 MemoryTypeDdr = 0x12,\r
1332 MemoryTypeDdr2 = 0x13,\r
1333 MemoryTypeDdr2FbDimm = 0x14\r
1334} MEMORY_DEVICE_TYPE;\r
1335\r
1336typedef struct {\r
1337 UINT16 Reserved :1;\r
1338 UINT16 Other :1;\r
1339 UINT16 Unknown :1;\r
1340 UINT16 FastPaged :1;\r
1341 UINT16 StaticColumn :1;\r
1342 UINT16 PseudoStatic :1;\r
1343 UINT16 Rambus :1;\r
1344 UINT16 Synchronous :1;\r
1345 UINT16 Cmos :1;\r
1346 UINT16 Edo :1;\r
1347 UINT16 WindowDram :1;\r
1348 UINT16 CacheDram :1;\r
1349 UINT16 Nonvolatile :1;\r
1350 UINT16 Reserved1 :3;\r
1351} MEMORY_DEVICE_TYPE_DETAIL;\r
1352\r
4135253b 1353///\r
1354/// Memory Device (Type 17)\r
1355///\r
98cb9ae8 1356/// This structure describes a single memory device that is part of \r
1357/// a larger Physical Memory Array (Type 16).\r
1358/// Note: If a system includes memory-device sockets, the SMBIOS implementation \r
1359/// includes a Memory Device structure instance for each slot whether or not the \r
1360/// socket is currently populated.\r
1361///\r
61ce5861 1362typedef struct {\r
98cb9ae8 1363 SMBIOS_STRUCTURE Hdr;\r
1364 UINT16 MemoryArrayHandle;\r
1365 UINT16 MemoryErrorInformationHandle;\r
1366 UINT16 TotalWidth;\r
1367 UINT16 DataWidth;\r
1368 UINT16 Size;\r
2d5e30ef 1369 UINT8 FormFactor; ///< enumeration value from MEMORY_FORM_FACTOR\r
98cb9ae8 1370 UINT8 DeviceSet;\r
1371 SMBIOS_TABLE_STRING DeviceLocator;\r
1372 SMBIOS_TABLE_STRING BankLocator;\r
2d5e30ef 1373 UINT8 MemoryType; ///< enumeration value from MEMORY_DEVICE_TYPE\r
98cb9ae8 1374 MEMORY_DEVICE_TYPE_DETAIL TypeDetail;\r
1375 UINT16 Speed;\r
1376 SMBIOS_TABLE_STRING Manufacturer;\r
1377 SMBIOS_TABLE_STRING SerialNumber;\r
1378 SMBIOS_TABLE_STRING AssetTag;\r
1379 SMBIOS_TABLE_STRING PartNumber;\r
61ce5861 1380 //\r
1381 // Add for smbios 2.6\r
1382 // \r
1383 UINT8 Attributes;\r
1384} SMBIOS_TABLE_TYPE17;\r
1385\r
98cb9ae8 1386///\r
1387/// 32-bit Memory Error Information - Error Type \r
1388///\r
1389typedef enum { \r
1390 MemoryErrorOther = 0x01,\r
1391 MemoryErrorUnknown = 0x02,\r
1392 MemoryErrorOk = 0x03,\r
1393 MemoryErrorBadRead = 0x04,\r
1394 MemoryErrorParity = 0x05,\r
1395 MemoryErrorSigleBit = 0x06,\r
1396 MemoryErrorDoubleBit = 0x07,\r
1397 MemoryErrorMultiBit = 0x08,\r
1398 MemoryErrorNibble = 0x09,\r
1399 MemoryErrorChecksum = 0x0A,\r
1400 MemoryErrorCrc = 0x0B,\r
1401 MemoryErrorCorrectSingleBit = 0x0C,\r
1402 MemoryErrorCorrected = 0x0D,\r
1403 MemoryErrorUnCorrectable = 0x0E\r
1404} MEMORY_ERROR_TYPE;\r
1405\r
1406///\r
1407/// 32-bit Memory Error Information - Error Granularity \r
1408///\r
1409typedef enum { \r
1410 MemoryGranularityOther = 0x01,\r
1411 MemoryGranularityOtherUnknown = 0x02,\r
1412 MemoryGranularityDeviceLevel = 0x03,\r
1413 MemoryGranularityMemPartitionLevel = 0x04\r
1414} MEMORY_ERROR_GRANULARITY;\r
1415\r
1416///\r
1417/// 32-bit Memory Error Information - Error Operation \r
1418///\r
1419typedef enum { \r
1420 MemoryErrorOperationOther = 0x01,\r
1421 MemoryErrorOperationUnknown = 0x02,\r
1422 MemoryErrorOperationRead = 0x03,\r
1423 MemoryErrorOperationWrite = 0x04,\r
1424 MemoryErrorOperationPartialWrite = 0x05\r
1425} MEMORY_ERROR_OPERATION;\r
1426\r
4135253b 1427///\r
1428/// 32-bit Memory Error Information (Type 18)\r
98cb9ae8 1429/// \r
1430/// This structure identifies the specifics of an error that might be detected \r
1431/// within a Physical Memory Array.\r
4135253b 1432///\r
61ce5861 1433typedef struct {\r
98cb9ae8 1434 SMBIOS_STRUCTURE Hdr;\r
2d5e30ef 1435 UINT8 ErrorType; ///< enumeration value from MEMORY_ERROR_TYPE\r
1436 UINT8 ErrorGranularity; ///< enumeration value from MEMORY_ERROR_GRANULARITY\r
1437 UINT8 ErrorOperation; ///< enumeration value from MEMORY_ERROR_OPERATION\r
98cb9ae8 1438 UINT32 VendorSyndrome;\r
1439 UINT32 MemoryArrayErrorAddress;\r
1440 UINT32 DeviceErrorAddress;\r
1441 UINT32 ErrorResolution;\r
61ce5861 1442} SMBIOS_TABLE_TYPE18;\r
1443\r
4135253b 1444///\r
1445/// Memory Array Mapped Address (Type 19)\r
1446///\r
98cb9ae8 1447/// This structure provides the address mapping for a Physical Memory Array. \r
1448/// One structure is present for each contiguous address range described.\r
1449///\r
61ce5861 1450typedef struct {\r
1451 SMBIOS_STRUCTURE Hdr;\r
1452 UINT32 StartingAddress;\r
1453 UINT32 EndingAddress;\r
1454 UINT16 MemoryArrayHandle;\r
1455 UINT8 PartitionWidth;\r
1456} SMBIOS_TABLE_TYPE19;\r
1457\r
4135253b 1458///\r
1459/// Memory Device Mapped Address (Type 20)\r
1460///\r
98cb9ae8 1461/// This structure maps memory address space usually to a device-level granularity. \r
1462/// One structure is present for each contiguous address range described. \r
1463///\r
61ce5861 1464typedef struct {\r
1465 SMBIOS_STRUCTURE Hdr;\r
1466 UINT32 StartingAddress;\r
1467 UINT32 EndingAddress;\r
1468 UINT16 MemoryDeviceHandle;\r
1469 UINT16 MemoryArrayMappedAddressHandle;\r
1470 UINT8 PartitionRowPosition;\r
1471 UINT8 InterleavePosition;\r
1472 UINT8 InterleavedDataDepth;\r
1473} SMBIOS_TABLE_TYPE20;\r
1474\r
98cb9ae8 1475///\r
1476/// Built-in Pointing Device - Type\r
1477///\r
1478typedef enum {\r
1479 PointingDeviceTypeOther = 0x01,\r
1480 PointingDeviceTypeUnknown = 0x02,\r
1481 PointingDeviceTypeMouse = 0x03,\r
1482 PointingDeviceTypeTrackBall = 0x04,\r
1483 PointingDeviceTypeTrackPoint = 0x05,\r
1484 PointingDeviceTypeGlidePoint = 0x06,\r
1485 PointingDeviceTouchPad = 0x07,\r
1486 PointingDeviceTouchScreen = 0x08,\r
1487 PointingDeviceOpticalSensor = 0x09\r
1488} BUILTIN_POINTING_DEVICE_TYPE;\r
1489\r
1490///\r
1491/// Built-in Pointing Device - Interface\r
1492///\r
1493typedef enum {\r
1494 PointingDeviceInterfaceOther = 0x01,\r
1495 PointingDeviceInterfaceUnknown = 0x02,\r
1496 PointingDeviceInterfaceSerial = 0x03,\r
1497 PointingDeviceInterfacePs2 = 0x04,\r
1498 PointingDeviceInterfaceInfrared = 0x05,\r
1499 PointingDeviceInterfaceHpHil = 0x06,\r
1500 PointingDeviceInterfaceBusMouse = 0x07,\r
1501 PointingDeviceInterfaceADB = 0x08,\r
1502 PointingDeviceInterfaceBusMouseDB9 = 0xA0,\r
1503 PointingDeviceInterfaceBusMouseMicroDin = 0xA1,\r
1504 PointingDeviceInterfaceUsb = 0xA2\r
1505} BUILTIN_POINTING_DEVICE_INTERFACE;\r
1506\r
4135253b 1507///\r
1508/// Built-in Pointing Device (Type 21)\r
1509///\r
98cb9ae8 1510/// This structure describes the attributes of the built-in pointing device for the \r
1f9f8414 1511/// system - the presence of this structure does not imply that the built-in\r
98cb9ae8 1512/// pointing device is active for the system's use! \r
1513///\r
61ce5861 1514typedef struct {\r
98cb9ae8 1515 SMBIOS_STRUCTURE Hdr;\r
2d5e30ef 1516 UINT8 Type; ///< enumeration value from BUILTIN_POINTING_DEVICE_TYPE\r
1517 UINT8 Interface; ///< enumeration value from BUILTIN_POINTING_DEVICE_INTERFACE\r
98cb9ae8 1518 UINT8 NumberOfButtons;\r
61ce5861 1519} SMBIOS_TABLE_TYPE21;\r
1520\r
98cb9ae8 1521///\r
1522/// Portable Battery - Device Chemistry\r
1523///\r
1524typedef enum { \r
1525 PortableBatteryDeviceChemistryOther = 0x01,\r
1526 PortableBatteryDeviceChemistryUnknown = 0x02,\r
1527 PortableBatteryDeviceChemistryLeadAcid = 0x03,\r
1528 PortableBatteryDeviceChemistryNickelCadmium = 0x04,\r
1529 PortableBatteryDeviceChemistryNickelMetalHydride = 0x05,\r
1530 PortableBatteryDeviceChemistryLithiumIon = 0x06,\r
1531 PortableBatteryDeviceChemistryZincAir = 0x07,\r
1532 PortableBatteryDeviceChemistryLithiumPolymer = 0x08\r
1533} PORTABLE_BATTERY_DEVICE_CHEMISTRY;\r
1534\r
4135253b 1535///\r
1536/// Portable Battery (Type 22)\r
1537///\r
98cb9ae8 1538/// This structure describes the attributes of the portable battery(s) for the system. \r
1539/// The structure contains the static attributes for the group. Each structure describes \r
1f9f8414 1540/// a single battery pack's attributes.\r
98cb9ae8 1541///\r
61ce5861 1542typedef struct {\r
98cb9ae8 1543 SMBIOS_STRUCTURE Hdr;\r
1544 SMBIOS_TABLE_STRING Location;\r
1545 SMBIOS_TABLE_STRING Manufacturer;\r
1546 SMBIOS_TABLE_STRING ManufactureDate;\r
1547 SMBIOS_TABLE_STRING SerialNumber;\r
1548 SMBIOS_TABLE_STRING DeviceName;\r
2d5e30ef 1549 UINT8 DeviceChemistry; ///< enumeration value from PORTABLE_BATTERY_DEVICE_CHEMISTRY\r
98cb9ae8 1550 UINT16 DeviceCapacity;\r
1551 UINT16 DesignVoltage;\r
1552 SMBIOS_TABLE_STRING SBDSVersionNumber;\r
1553 UINT8 MaximumErrorInBatteryData;\r
1554 UINT16 SBDSSerialNumber;\r
1555 UINT16 SBDSManufactureDate;\r
1556 SMBIOS_TABLE_STRING SBDSDeviceChemistry;\r
1557 UINT8 DesignCapacityMultiplier;\r
1558 UINT32 OEMSpecific;\r
61ce5861 1559} SMBIOS_TABLE_TYPE22;\r
1560\r
4135253b 1561///\r
1562/// System Reset (Type 23)\r
1563///\r
98cb9ae8 1564/// This structure describes whether Automatic System Reset functions enabled (Status). \r
1565/// If the system has a watchdog Timer and the timer is not reset (Timer Reset)\r
1566/// before the Interval elapses, an automatic system reset will occur. The system will re-boot \r
1567/// according to the Boot Option. This function may repeat until the Limit is reached, at which time \r
1568/// the system will re-boot according to the Boot Option at Limit. \r
1569///\r
61ce5861 1570typedef struct {\r
1571 SMBIOS_STRUCTURE Hdr;\r
1572 UINT8 Capabilities;\r
1573 UINT16 ResetCount;\r
1574 UINT16 ResetLimit;\r
1575 UINT16 TimerInterval;\r
1576 UINT16 Timeout;\r
1577} SMBIOS_TABLE_TYPE23;\r
1578\r
4135253b 1579///\r
1580/// Hardware Security (Type 24)\r
1581///\r
98cb9ae8 1582/// This structure describes the system-wide hardware security settings. \r
1583///\r
61ce5861 1584typedef struct {\r
1585 SMBIOS_STRUCTURE Hdr;\r
1586 UINT8 HardwareSecuritySettings;\r
1587} SMBIOS_TABLE_TYPE24;\r
1588\r
4135253b 1589///\r
1590/// System Power Controls (Type 25)\r
1591///\r
98cb9ae8 1592/// This structure describes the attributes for controlling the main power supply to the system. \r
1593/// Software that interprets this structure uses the month, day, hour, minute, and second values \r
1594/// to determine the number of seconds until the next power-on of the system. The presence of \r
1595/// this structure implies that a timed power-on facility is available for the system. \r
1596///\r
61ce5861 1597typedef struct {\r
1598 SMBIOS_STRUCTURE Hdr;\r
1599 UINT8 NextScheduledPowerOnMonth;\r
1600 UINT8 NextScheduledPowerOnDayOfMonth;\r
1601 UINT8 NextScheduledPowerOnHour;\r
1602 UINT8 NextScheduledPowerOnMinute;\r
1603 UINT8 NextScheduledPowerOnSecond;\r
1604} SMBIOS_TABLE_TYPE25;\r
1605\r
98cb9ae8 1606///\r
1607/// Voltage Probe - Location and Status\r
1608///\r
1609typedef struct {\r
1610 UINT8 VoltageProbeSite :5;\r
1611 UINT8 VoltageProbeStatus :3;\r
1612} MISC_VOLTAGE_PROBE_LOCATION;\r
1613\r
4135253b 1614///\r
1615/// Voltage Probe (Type 26)\r
1616///\r
98cb9ae8 1617/// This describes the attributes for a voltage probe in the system. \r
1618/// Each structure describes a single voltage probe.\r
1619///\r
61ce5861 1620typedef struct {\r
98cb9ae8 1621 SMBIOS_STRUCTURE Hdr;\r
1622 SMBIOS_TABLE_STRING Description;\r
1623 MISC_VOLTAGE_PROBE_LOCATION LocationAndStatus;\r
1624 UINT16 MaximumValue;\r
1625 UINT16 MinimumValue;\r
1626 UINT16 Resolution;\r
1627 UINT16 Tolerance;\r
1628 UINT16 Accuracy;\r
1629 UINT32 OEMDefined;\r
1630 UINT16 NominalValue;\r
61ce5861 1631} SMBIOS_TABLE_TYPE26;\r
1632\r
98cb9ae8 1633///\r
1634/// Cooling Device - Device Type and Status\r
1635///\r
1636typedef struct {\r
1637 UINT8 CoolingDevice :5;\r
1638 UINT8 CoolingDeviceStatus :3;\r
1639} MISC_COOLING_DEVICE_TYPE;\r
1640\r
4135253b 1641///\r
1642/// Cooling Device (Type 27)\r
1643///\r
98cb9ae8 1644/// This structure describes the attributes for a cooling device in the system. \r
1645/// Each structure describes a single cooling device. \r
1646/// \r
61ce5861 1647typedef struct {\r
98cb9ae8 1648 SMBIOS_STRUCTURE Hdr;\r
1649 UINT16 TemperatureProbeHandle;\r
1650 MISC_COOLING_DEVICE_TYPE DeviceTypeAndStatus;\r
1651 UINT8 CoolingUnitGroup;\r
1652 UINT32 OEMDefined;\r
1653 UINT16 NominalSpeed;\r
61ce5861 1654} SMBIOS_TABLE_TYPE27;\r
1655\r
98cb9ae8 1656///\r
1657/// Temperature Probe - Location and Status\r
1658///\r
1659typedef struct {\r
1660 UINT8 TemperatureProbeSite :5;\r
1661 UINT8 TemperatureProbeStatus :3;\r
1662} MISC_TEMPERATURE_PROBE_LOCATION;\r
1663\r
4135253b 1664///\r
1665/// Temperature Probe (Type 28)\r
1666///\r
98cb9ae8 1667/// This structure describes the attributes for a temperature probe in the system. \r
1668/// Each structure describes a single temperature probe. \r
1669///\r
61ce5861 1670typedef struct {\r
98cb9ae8 1671 SMBIOS_STRUCTURE Hdr;\r
1672 SMBIOS_TABLE_STRING Description;\r
1673 MISC_TEMPERATURE_PROBE_LOCATION LocationAndStatus;\r
1674 UINT16 MaximumValue;\r
1675 UINT16 MinimumValue;\r
1676 UINT16 Resolution;\r
1677 UINT16 Tolerance;\r
1678 UINT16 Accuracy;\r
1679 UINT32 OEMDefined;\r
1680 UINT16 NominalValue;\r
61ce5861 1681} SMBIOS_TABLE_TYPE28;\r
1682\r
98cb9ae8 1683///\r
1684/// Electrical Current Probe - Location and Status\r
1685///\r
1686typedef struct {\r
1687 UINT8 ElectricalCurrentProbeSite :5;\r
1688 UINT8 ElectricalCurrentProbeStatus :3;\r
1689} MISC_ELECTRICAL_CURRENT_PROBE_LOCATION;\r
1690\r
4135253b 1691///\r
1692/// Electrical Current Probe (Type 29)\r
1693///\r
98cb9ae8 1694/// This structure describes the attributes for an electrical current probe in the system.\r
1695/// Each structure describes a single electrical current probe. \r
1696///\r
61ce5861 1697typedef struct {\r
98cb9ae8 1698 SMBIOS_STRUCTURE Hdr;\r
1699 SMBIOS_TABLE_STRING Description;\r
1700 MISC_ELECTRICAL_CURRENT_PROBE_LOCATION LocationAndStatus;\r
1701 UINT16 MaximumValue;\r
1702 UINT16 MinimumValue;\r
1703 UINT16 Resolution;\r
1704 UINT16 Tolerance;\r
1705 UINT16 Accuracy;\r
1706 UINT32 OEMDefined;\r
1707 UINT16 NominalValue;\r
61ce5861 1708} SMBIOS_TABLE_TYPE29;\r
1709\r
4135253b 1710///\r
1711/// Out-of-Band Remote Access (Type 30)\r
1712///\r
98cb9ae8 1713/// This structure describes the attributes and policy settings of a hardware facility \r
1714/// that may be used to gain remote access to a hardware system when the operating system \r
1715/// is not available due to power-down status, hardware failures, or boot failures. \r
1716///\r
61ce5861 1717typedef struct {\r
1718 SMBIOS_STRUCTURE Hdr;\r
1719 SMBIOS_TABLE_STRING ManufacturerName;\r
1720 UINT8 Connections;\r
1721} SMBIOS_TABLE_TYPE30;\r
1722\r
4135253b 1723///\r
1724/// Boot Integrity Services (BIS) Entry Point (Type 31)\r
1725///\r
98cb9ae8 1726/// Structure type 31 (decimal) is reserved for use by the Boot Integrity Services (BIS). \r
1727/// \r
61ce5861 1728typedef struct {\r
1729 SMBIOS_STRUCTURE Hdr;\r
1730 UINT8 Checksum;\r
1731 UINT8 Reserved1;\r
1732 UINT16 Reserved2;\r
1733 UINT32 BisEntry16;\r
1734 UINT32 BisEntry32;\r
1735 UINT64 Reserved3;\r
1736 UINT32 Reserved4;\r
1737} SMBIOS_TABLE_TYPE31;\r
1738\r
98cb9ae8 1739///\r
1740/// System Boot Information - System Boot Status\r
1741///\r
1742typedef enum {\r
1743 BootInformationStatusNoError = 0x00,\r
1744 BootInformationStatusNoBootableMedia = 0x01,\r
1745 BootInformationStatusNormalOSFailedLoading = 0x02,\r
1746 BootInformationStatusFirmwareDetectedFailure = 0x03,\r
1747 BootInformationStatusOSDetectedFailure = 0x04,\r
1748 BootInformationStatusUserRequestedBoot = 0x05,\r
1749 BootInformationStatusSystemSecurityViolation = 0x06,\r
1750 BootInformationStatusPreviousRequestedImage = 0x07,\r
1751 BootInformationStatusWatchdogTimerExpired = 0x08,\r
1752 BootInformationStatusStartReserved = 0x09,\r
1753 BootInformationStatusStartOemSpecific = 0x80,\r
1754 BootInformationStatusStartProductSpecific = 0xC0\r
1755} MISC_BOOT_INFORMATION_STATUS_DATA_TYPE;\r
1756\r
4135253b 1757///\r
1758/// System Boot Information (Type 32)\r
1759///\r
98cb9ae8 1760/// The client system firmware, e.g. BIOS, communicates the System Boot Status to the \r
1761/// client's Pre-boot Execution Environment (PXE) boot image or OS-present management \r
1762/// application via this structure. When used in the PXE environment, for example, \r
1763/// this code identifies the reason the PXE was initiated and can be used by boot-image \r
1f9f8414 1764/// software to further automate an enterprise's PXE sessions. For example, an enterprise \r
98cb9ae8 1765/// could choose to automatically download a hardware-diagnostic image to a client whose \r
1766/// reason code indicated either a firmware- or operating system-detected hardware failure.\r
1767///\r
61ce5861 1768typedef struct {\r
98cb9ae8 1769 SMBIOS_STRUCTURE Hdr;\r
1770 UINT8 Reserved[6];\r
2d5e30ef 1771 UINT8 BootStatus; ///< enumeration value from MISC_BOOT_INFORMATION_STATUS_DATA_TYPE\r
61ce5861 1772} SMBIOS_TABLE_TYPE32;\r
1773\r
4135253b 1774///\r
1775/// 64-bit Memory Error Information (Type 33)\r
1776///\r
98cb9ae8 1777/// This structure describes an error within a Physical Memory Array, \r
1778/// when the error address is above 4G (0xFFFFFFFF).\r
1779/// \r
61ce5861 1780typedef struct {\r
98cb9ae8 1781 SMBIOS_STRUCTURE Hdr;\r
2d5e30ef 1782 UINT8 ErrorType; ///< enumeration value from MEMORY_ERROR_TYPE\r
1783 UINT8 ErrorGranularity; ///< enumeration value from MEMORY_ERROR_GRANULARITY\r
1784 UINT8 ErrorOperation; ///< enumeration value from MEMORY_ERROR_OPERATION\r
98cb9ae8 1785 UINT32 VendorSyndrome;\r
1786 UINT64 MemoryArrayErrorAddress;\r
1787 UINT64 DeviceErrorAddress;\r
1788 UINT32 ErrorResolution;\r
61ce5861 1789} SMBIOS_TABLE_TYPE33;\r
1790\r
98cb9ae8 1791///\r
1792/// Management Device - Type \r
1793///\r
1794typedef enum {\r
1795 ManagementDeviceTypeOther = 0x01,\r
1796 ManagementDeviceTypeUnknown = 0x02,\r
1797 ManagementDeviceTypeLm75 = 0x03,\r
1798 ManagementDeviceTypeLm78 = 0x04,\r
1799 ManagementDeviceTypeLm79 = 0x05,\r
1800 ManagementDeviceTypeLm80 = 0x06,\r
1801 ManagementDeviceTypeLm81 = 0x07,\r
1802 ManagementDeviceTypeAdm9240 = 0x08,\r
1803 ManagementDeviceTypeDs1780 = 0x09,\r
1804 ManagementDeviceTypeMaxim1617 = 0x0A,\r
1805 ManagementDeviceTypeGl518Sm = 0x0B,\r
1806 ManagementDeviceTypeW83781D = 0x0C,\r
1807 ManagementDeviceTypeHt82H791 = 0x0D\r
1808} MISC_MANAGEMENT_DEVICE_TYPE;\r
1809\r
1810///\r
1811/// Management Device - Address Type \r
1812///\r
1813typedef enum {\r
1814 ManagementDeviceAddressTypeOther = 0x01,\r
1815 ManagementDeviceAddressTypeUnknown = 0x02,\r
1816 ManagementDeviceAddressTypeIOPort = 0x03,\r
1817 ManagementDeviceAddressTypeMemory = 0x04,\r
1818 ManagementDeviceAddressTypeSmbus = 0x05\r
1819} MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE;\r
1820\r
4135253b 1821///\r
1822/// Management Device (Type 34)\r
1823///\r
98cb9ae8 1824/// The information in this structure defines the attributes of a Management Device. \r
1825/// A Management Device might control one or more fans or voltage, current, or temperature\r
1826/// probes as defined by one or more Management Device Component structures.\r
1827///\r
61ce5861 1828typedef struct {\r
98cb9ae8 1829 SMBIOS_STRUCTURE Hdr;\r
1830 SMBIOS_TABLE_STRING Description;\r
2d5e30ef 1831 UINT8 Type; ///< enumeration value from MISC_MANAGEMENT_DEVICE_TYPE\r
98cb9ae8 1832 UINT32 Address;\r
2d5e30ef 1833 UINT8 AddressType; ///< enumeration value from MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE\r
61ce5861 1834} SMBIOS_TABLE_TYPE34;\r
1835\r
4135253b 1836///\r
1837/// Management Device Component (Type 35)\r
1838///\r
98cb9ae8 1839/// This structure associates a cooling device or environmental probe with structures \r
1840/// that define the controlling hardware device and (optionally) the component's thresholds. \r
1841///\r
61ce5861 1842typedef struct {\r
1843 SMBIOS_STRUCTURE Hdr;\r
1844 SMBIOS_TABLE_STRING Description;\r
1845 UINT16 ManagementDeviceHandle;\r
1846 UINT16 ComponentHandle;\r
1847 UINT16 ThresholdHandle;\r
1848} SMBIOS_TABLE_TYPE35;\r
1849\r
4135253b 1850///\r
1851/// Management Device Threshold Data (Type 36)\r
1852///\r
98cb9ae8 1853/// The information in this structure defines threshold information for \r
1854/// a component (probe or cooling-unit) contained within a Management Device. \r
1855///\r
61ce5861 1856typedef struct {\r
1857 SMBIOS_STRUCTURE Hdr;\r
1858 UINT16 LowerThresholdNonCritical;\r
1859 UINT16 UpperThresholdNonCritical;\r
1860 UINT16 LowerThresholdCritical;\r
1861 UINT16 UpperThresholdCritical;\r
1862 UINT16 LowerThresholdNonRecoverable;\r
1863 UINT16 UpperThresholdNonRecoverable;\r
1864} SMBIOS_TABLE_TYPE36;\r
1865\r
bf7ea009 1866///\r
1867/// Memory Channel Entry\r
1868///\r
61ce5861 1869typedef struct {\r
1870 UINT8 DeviceLoad;\r
1871 UINT16 DeviceHandle;\r
1872} MEMORY_DEVICE;\r
1873\r
98cb9ae8 1874///\r
1875/// Memory Channel - Channel Type\r
1876///\r
1877typedef enum {\r
1878 MemoryChannelTypeOther = 0x01,\r
1879 MemoryChannelTypeUnknown = 0x02,\r
1880 MemoryChannelTypeRambus = 0x03,\r
1881 MemoryChannelTypeSyncLink = 0x04\r
1882} MEMORY_CHANNEL_TYPE;\r
1883\r
4135253b 1884///\r
1885/// Memory Channel (Type 37)\r
1886///\r
98cb9ae8 1887/// The information in this structure provides the correlation between a Memory Channel\r
1888/// and its associated Memory Devices. Each device presents one or more loads to the channel; \r
1889/// the sum of all device loads cannot exceed the channel's defined maximum.\r
1890///\r
61ce5861 1891typedef struct {\r
1892 SMBIOS_STRUCTURE Hdr;\r
1893 UINT8 ChannelType;\r
1894 UINT8 MaximumChannelLoad;\r
1895 UINT8 MemoryDeviceCount;\r
1896 MEMORY_DEVICE MemoryDevice[1];\r
1897} SMBIOS_TABLE_TYPE37;\r
1898\r
98cb9ae8 1899///\r
1900/// IPMI Device Information - BMC Interface Type\r
1901///\r
1902typedef enum {\r
1903 IPMIDeviceInfoInterfaceTypeUnknown = 0x00,\r
6800ac83 1904 IPMIDeviceInfoInterfaceTypeKCS = 0x01, ///< Keyboard Controller Style\r
1905 IPMIDeviceInfoInterfaceTypeSMIC = 0x02, ///< Server Management Interface Chip\r
1906 IPMIDeviceInfoInterfaceTypeBT = 0x03, ///< Block Transfer\r
98cb9ae8 1907 IPMIDeviceInfoInterfaceTypeReserved = 0x04\r
1908} BMC_INTERFACE_TYPE;\r
1909\r
4135253b 1910///\r
1911/// IPMI Device Information (Type 38)\r
1912///\r
98cb9ae8 1913/// The information in this structure defines the attributes of an \r
1914/// Intelligent Platform Management Interface (IPMI) Baseboard Management Controller (BMC).\r
1915/// \r
61ce5861 1916typedef struct {\r
1917 SMBIOS_STRUCTURE Hdr;\r
2d5e30ef 1918 UINT8 InterfaceType; ///< enumeration value from BMC_INTERFACE_TYPE\r
61ce5861 1919 UINT8 IPMISpecificationRevision;\r
1920 UINT8 I2CSlaveAddress;\r
1921 UINT8 NVStorageDeviceAddress;\r
1922 UINT64 BaseAddress;\r
1923 UINT8 BaseAddressModifier_InterruptInfo;\r
1924 UINT8 InterruptNumber;\r
1925} SMBIOS_TABLE_TYPE38;\r
1926\r
98cb9ae8 1927///\r
1928/// System Power Supply - Power Supply Characteristics\r
1929///\r
1930typedef struct {\r
1931 UINT16 PowerSupplyHotReplaceable:1;\r
1932 UINT16 PowerSupplyPresent :1;\r
1933 UINT16 PowerSupplyUnplugged :1;\r
1934 UINT16 InputVoltageRangeSwitch :4;\r
1935 UINT16 PowerSupplyStatus :3;\r
1936 UINT16 PowerSupplyType :4;\r
1937 UINT16 Reserved :2;\r
1938} SYS_POWER_SUPPLY_CHARACTERISTICS;\r
1939\r
4135253b 1940///\r
1941/// System Power Supply (Type 39)\r
1942///\r
98cb9ae8 1943/// This structure identifies attributes of a system power supply. One instance\r
1944/// of this record is present for each possible power supply in a system. \r
1945///\r
61ce5861 1946typedef struct {\r
98cb9ae8 1947 SMBIOS_STRUCTURE Hdr;\r
1948 UINT8 PowerUnitGroup;\r
1949 SMBIOS_TABLE_STRING Location;\r
1950 SMBIOS_TABLE_STRING DeviceName;\r
1951 SMBIOS_TABLE_STRING Manufacturer;\r
1952 SMBIOS_TABLE_STRING SerialNumber;\r
1953 SMBIOS_TABLE_STRING AssetTagNumber;\r
1954 SMBIOS_TABLE_STRING ModelPartNumber;\r
1955 SMBIOS_TABLE_STRING RevisionLevel;\r
1956 UINT16 MaxPowerCapacity;\r
1957 SYS_POWER_SUPPLY_CHARACTERISTICS PowerSupplyCharacteristics;\r
1958 UINT16 InputVoltageProbeHandle;\r
1959 UINT16 CoolingDeviceHandle;\r
1960 UINT16 InputCurrentProbeHandle;\r
61ce5861 1961} SMBIOS_TABLE_TYPE39;\r
1962\r
bf7ea009 1963///\r
1964/// Additional Information Entry Format \r
1965///\r
61ce5861 1966typedef struct { \r
1967 UINT8 EntryLength; \r
1968 UINT16 ReferencedHandle;\r
1969 UINT8 ReferencedOffset;\r
1970 SMBIOS_TABLE_STRING EntryString;\r
1971 UINT8 Value[1];\r
1972}ADDITIONAL_INFORMATION_ENTRY;\r
1973\r
4135253b 1974///\r
1975/// Additional Information (Type 40)\r
1976///\r
98cb9ae8 1977/// This structure is intended to provide additional information for handling unspecified \r
1978/// enumerated values and interim field updates in another structure. \r
1979///\r
61ce5861 1980typedef struct {\r
1981 SMBIOS_STRUCTURE Hdr;\r
1982 UINT8 NumberOfAdditionalInformationEntries;\r
1983 ADDITIONAL_INFORMATION_ENTRY AdditionalInfoEntries[1]; \r
1984} SMBIOS_TABLE_TYPE40;\r
1985\r
98cb9ae8 1986///\r
1987/// Onboard Devices Extended Information - Onboard Device Types\r
1988///\r
1989typedef enum{\r
1990 OnBoardDeviceExtendedTypeOther = 0x01,\r
1991 OnBoardDeviceExtendedTypeUnknown = 0x02,\r
1992 OnBoardDeviceExtendedTypeVideo = 0x03,\r
1993 OnBoardDeviceExtendedTypeScsiController = 0x04,\r
1994 OnBoardDeviceExtendedTypeEthernet = 0x05,\r
1995 OnBoardDeviceExtendedTypeTokenRing = 0x06,\r
1996 OnBoardDeviceExtendedTypeSound = 0x07,\r
1997 OnBoardDeviceExtendedTypePATAController = 0x08,\r
1998 OnBoardDeviceExtendedTypeSATAController = 0x09,\r
1999 OnBoardDeviceExtendedTypeSASController = 0x0A\r
2000} ONBOARD_DEVICE_EXTENDED_INFO_TYPE;\r
2001\r
4135253b 2002///\r
2003/// Onboard Devices Extended Information (Type 41)\r
2004///\r
98cb9ae8 2005/// The information in this structure defines the attributes of devices that \r
2006/// are onboard (soldered onto) a system element, usually the baseboard. \r
2007/// In general, an entry in this table implies that the BIOS has some level of \r
2008/// control over the enabling of the associated device for use by the system. \r
2009///\r
61ce5861 2010typedef struct {\r
98cb9ae8 2011 SMBIOS_STRUCTURE Hdr;\r
2012 SMBIOS_TABLE_STRING ReferenceDesignation;\r
2d5e30ef 2013 UINT8 DeviceType; ///< enumeration value from ONBOARD_DEVICE_EXTENDED_INFO_TYPE\r
98cb9ae8 2014 UINT8 DeviceTypeInstance;\r
2015 UINT16 SegmentGroupNum;\r
2016 UINT8 BusNum;\r
2017 UINT8 DevFuncNum; \r
61ce5861 2018} SMBIOS_TABLE_TYPE41;\r
2019\r
4135253b 2020///\r
2021/// Inactive (Type 126)\r
2022///\r
61ce5861 2023typedef struct {\r
2024 SMBIOS_STRUCTURE Hdr;\r
2025} SMBIOS_TABLE_TYPE126;\r
2026\r
4135253b 2027///\r
2028/// End-of-Table (Type 127)\r
2029///\r
61ce5861 2030typedef struct {\r
2031 SMBIOS_STRUCTURE Hdr;\r
2032} SMBIOS_TABLE_TYPE127;\r
2033\r
4135253b 2034///\r
2035/// Union of all the possible SMBIOS record types\r
2036///\r
61ce5861 2037typedef union {\r
2038 SMBIOS_STRUCTURE *Hdr;\r
2039 SMBIOS_TABLE_TYPE0 *Type0;\r
2040 SMBIOS_TABLE_TYPE1 *Type1;\r
2041 SMBIOS_TABLE_TYPE2 *Type2;\r
2042 SMBIOS_TABLE_TYPE3 *Type3;\r
2043 SMBIOS_TABLE_TYPE4 *Type4;\r
2044 SMBIOS_TABLE_TYPE5 *Type5;\r
2045 SMBIOS_TABLE_TYPE6 *Type6;\r
2046 SMBIOS_TABLE_TYPE7 *Type7;\r
2047 SMBIOS_TABLE_TYPE8 *Type8;\r
2048 SMBIOS_TABLE_TYPE9 *Type9;\r
2049 SMBIOS_TABLE_TYPE10 *Type10;\r
2050 SMBIOS_TABLE_TYPE11 *Type11;\r
2051 SMBIOS_TABLE_TYPE12 *Type12;\r
2052 SMBIOS_TABLE_TYPE13 *Type13;\r
2053 SMBIOS_TABLE_TYPE14 *Type14;\r
2054 SMBIOS_TABLE_TYPE15 *Type15;\r
2055 SMBIOS_TABLE_TYPE16 *Type16;\r
2056 SMBIOS_TABLE_TYPE17 *Type17;\r
2057 SMBIOS_TABLE_TYPE18 *Type18;\r
2058 SMBIOS_TABLE_TYPE19 *Type19;\r
2059 SMBIOS_TABLE_TYPE20 *Type20;\r
2060 SMBIOS_TABLE_TYPE21 *Type21;\r
2061 SMBIOS_TABLE_TYPE22 *Type22;\r
2062 SMBIOS_TABLE_TYPE23 *Type23;\r
2063 SMBIOS_TABLE_TYPE24 *Type24;\r
2064 SMBIOS_TABLE_TYPE25 *Type25;\r
2065 SMBIOS_TABLE_TYPE26 *Type26;\r
2066 SMBIOS_TABLE_TYPE27 *Type27;\r
2067 SMBIOS_TABLE_TYPE28 *Type28;\r
2068 SMBIOS_TABLE_TYPE29 *Type29;\r
2069 SMBIOS_TABLE_TYPE30 *Type30;\r
2070 SMBIOS_TABLE_TYPE31 *Type31;\r
2071 SMBIOS_TABLE_TYPE32 *Type32;\r
2072 SMBIOS_TABLE_TYPE33 *Type33;\r
2073 SMBIOS_TABLE_TYPE34 *Type34;\r
2074 SMBIOS_TABLE_TYPE35 *Type35;\r
2075 SMBIOS_TABLE_TYPE36 *Type36;\r
2076 SMBIOS_TABLE_TYPE37 *Type37;\r
2077 SMBIOS_TABLE_TYPE38 *Type38;\r
2078 SMBIOS_TABLE_TYPE39 *Type39;\r
2079 SMBIOS_TABLE_TYPE40 *Type40;\r
2080 SMBIOS_TABLE_TYPE41 *Type41;\r
2081 SMBIOS_TABLE_TYPE126 *Type126;\r
2082 SMBIOS_TABLE_TYPE127 *Type127;\r
2083 UINT8 *Raw;\r
2084} SMBIOS_STRUCTURE_POINTER;\r
2085\r
766f4bc1 2086#pragma pack()\r
2087\r
a7ed1e2e 2088#endif\r
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