]> git.proxmox.com Git - mirror_edk2.git/blame - MdePkg/Include/IndustryStandard/SmBios.h
projects / mirror_edk2.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
MdePkg: Fix ACPI NFIT GUID definitions
[mirror_edk2.git] / MdePkg / Include / IndustryStandard / SmBios.h
CommitLineData
a7ed1e2e 1/** @file\r
6cd35c62 2 Industry Standard Definitions of SMBIOS Table Specification v3.0.0.\r
a7ed1e2e 3\r
6cd35c62 4Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>\r
23df19a7 5(C) Copyright 2015 Hewlett Packard Enterprise Development LP<BR>\r
af2dc6a7 6This program and the accompanying materials are licensed and made available under \r
7the terms and conditions of the BSD License that accompanies this distribution. \r
8The full text of the license may be found at\r
9http://opensource.org/licenses/bsd-license.php. \r
10 \r
11THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
12WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
a7ed1e2e 13\r
a7ed1e2e 14**/\r
15\r
16#ifndef __SMBIOS_STANDARD_H__\r
17#define __SMBIOS_STANDARD_H__\r
98cb9ae8 18\r
f2d0889f 19///\r
20/// Reference SMBIOS 2.6, chapter 3.1.2.\r
21/// For v2.1 and later, handle values in the range 0FF00h to 0FFFFh are reserved for\r
22/// use by this specification.\r
23///\r
24#define SMBIOS_HANDLE_RESERVED_BEGIN 0xFF00\r
25\r
7ddba202
SZ		 26///\r
27/// Reference SMBIOS 2.7, chapter 6.1.2.\r
28/// The UEFI Platform Initialization Specification reserves handle number FFFEh for its\r
29/// EFI_SMBIOS_PROTOCOL.Add() function to mean "assign an unused handle number automatically."\r
30/// This number is not used for any other purpose by the SMBIOS specification.\r
31///\r
32#define SMBIOS_HANDLE_PI_RESERVED 0xFFFE\r
33\r
f2d0889f 34///\r
af2dc6a7 35/// Reference SMBIOS 2.6, chapter 3.1.3.\r
36/// Each text string is limited to 64 significant characters due to system MIF limitations.\r
7ddba202
SZ		 37/// Reference SMBIOS 2.7, chapter 6.1.3.\r
38/// It will have no limit on the length of each individual text string.\r
f2d0889f 39///\r
40#define SMBIOS_STRING_MAX_LENGTH 64\r
41\r
7254d134
JY		 42//\r
43// The length of the entire structure table (including all strings) must be reported\r
44// in the Structure Table Length field of the SMBIOS Structure Table Entry Point,\r
45// which is a WORD field limited to 65,535 bytes.\r
46//\r
47#define SMBIOS_TABLE_MAX_LENGTH 0xFFFF\r
48\r
49//\r
50// For SMBIOS 3.0, Structure table maximum size in Entry Point structure is DWORD field limited to 0xFFFFFFFF bytes.\r
51//\r
52#define SMBIOS_3_0_TABLE_MAX_LENGTH 0xFFFFFFFF\r
53\r
f2d0889f 54///\r
55/// Inactive type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter 3.3.43.\r
56/// Upper-level software that interprets the SMBIOS structure-table should bypass an \r
57/// Inactive structure just like a structure type that the software does not recognize.\r
58///\r
59#define SMBIOS_TYPE_INACTIVE 0x007E \r
60\r
61///\r
62/// End-of-table type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter 3.3.44.\r
63/// The end-of-table indicator is used in the last physical structure in a table\r
64///\r
65#define SMBIOS_TYPE_END_OF_TABLE 0x007F\r
66\r
4135253b 67///\r
af2dc6a7 68/// Smbios Table Entry Point Structure.\r
4135253b 69///\r
766f4bc1 70#pragma pack(1)\r
a7ed1e2e 71typedef struct {\r
72 UINT8 AnchorString[4];\r
73 UINT8 EntryPointStructureChecksum;\r
74 UINT8 EntryPointLength;\r
75 UINT8 MajorVersion;\r
76 UINT8 MinorVersion;\r
77 UINT16 MaxStructureSize;\r
78 UINT8 EntryPointRevision;\r
79 UINT8 FormattedArea[5];\r
80 UINT8 IntermediateAnchorString[5];\r
81 UINT8 IntermediateChecksum;\r
82 UINT16 TableLength;\r
83 UINT32 TableAddress;\r
84 UINT16 NumberOfSmbiosStructures;\r
85 UINT8 SmbiosBcdRevision;\r
86} SMBIOS_TABLE_ENTRY_POINT;\r
87\r
6cd35c62
EL		 88typedef struct {\r
89 UINT8 AnchorString[5];\r
90 UINT8 EntryPointStructureChecksum;\r
91 UINT8 EntryPointLength;\r
92 UINT8 MajorVersion;\r
93 UINT8 MinorVersion;\r
94 UINT8 DocRev;\r
95 UINT8 EntryPointRevision;\r
96 UINT8 Reserved;\r
97 UINT32 TableMaximumSize;\r
98 UINT64 TableAddress;\r
99} SMBIOS_TABLE_3_0_ENTRY_POINT;\r
100\r
ec8432e5 101///\r
af2dc6a7 102/// The Smbios structure header.\r
ec8432e5 103///\r
a7ed1e2e 104typedef struct {\r
105 UINT8 Type;\r
106 UINT8 Length;\r
107 UINT16 Handle;\r
108} SMBIOS_STRUCTURE;\r
109\r
bf7ea009 110///\r
111/// String Number for a Null terminated string, 00h stands for no string available.\r
112///\r
61ce5861 113typedef UINT8 SMBIOS_TABLE_STRING;\r
114\r
98cb9ae8 115///\r
7ddba202
SZ		 116/// BIOS Characteristics\r
117/// Defines which functions the BIOS supports. PCI, PCMCIA, Flash, etc.\r
98cb9ae8 118///\r
119typedef struct {\r
af2dc6a7 120 UINT32 Reserved :2; ///< Bits 0-1.\r
7ddba202
SZ		 121 UINT32 Unknown :1;\r
122 UINT32 BiosCharacteristicsNotSupported :1;\r
123 UINT32 IsaIsSupported :1;\r
98cb9ae8 124 UINT32 McaIsSupported :1;\r
125 UINT32 EisaIsSupported :1;\r
126 UINT32 PciIsSupported :1;\r
127 UINT32 PcmciaIsSupported :1;\r
128 UINT32 PlugAndPlayIsSupported :1;\r
129 UINT32 ApmIsSupported :1;\r
130 UINT32 BiosIsUpgradable :1;\r
131 UINT32 BiosShadowingAllowed :1;\r
132 UINT32 VlVesaIsSupported :1;\r
133 UINT32 EscdSupportIsAvailable :1;\r
134 UINT32 BootFromCdIsSupported :1;\r
135 UINT32 SelectableBootIsSupported :1;\r
136 UINT32 RomBiosIsSocketed :1;\r
137 UINT32 BootFromPcmciaIsSupported :1;\r
138 UINT32 EDDSpecificationIsSupported :1;\r
139 UINT32 JapaneseNecFloppyIsSupported :1;\r
140 UINT32 JapaneseToshibaFloppyIsSupported :1;\r
141 UINT32 Floppy525_360IsSupported :1;\r
142 UINT32 Floppy525_12IsSupported :1;\r
143 UINT32 Floppy35_720IsSupported :1;\r
144 UINT32 Floppy35_288IsSupported :1;\r
145 UINT32 PrintScreenIsSupported :1;\r
146 UINT32 Keyboard8042IsSupported :1;\r
147 UINT32 SerialIsSupported :1;\r
148 UINT32 PrinterIsSupported :1;\r
149 UINT32 CgaMonoIsSupported :1;\r
150 UINT32 NecPc98 :1;\r
6800ac83 151 UINT32 ReservedForVendor :32; ///< Bits 32-63. Bits 32-47 reserved for BIOS vendor \r
152 ///< and bits 48-63 reserved for System Vendor. \r
98cb9ae8 153} MISC_BIOS_CHARACTERISTICS;\r
154\r
155///\r
7ddba202
SZ		 156/// BIOS Characteristics Extension Byte 1.\r
157/// This information, available for SMBIOS version 2.1 and later, appears at offset 12h\r
158/// within the BIOS Information structure.\r
98cb9ae8 159///\r
160typedef struct {\r
161 UINT8 AcpiIsSupported :1;\r
7ddba202
SZ		 162 UINT8 UsbLegacyIsSupported :1;\r
163 UINT8 AgpIsSupported :1;\r
119c1688 164 UINT8 I2OBootIsSupported :1;\r
98cb9ae8 165 UINT8 Ls120BootIsSupported :1;\r
166 UINT8 AtapiZipDriveBootIsSupported :1;\r
167 UINT8 Boot1394IsSupported :1;\r
168 UINT8 SmartBatteryIsSupported :1;\r
169} MBCE_BIOS_RESERVED;\r
170\r
171///\r
af2dc6a7 172/// BIOS Characteristics Extension Byte 2.\r
7ddba202 173/// This information, available for SMBIOS version 2.3 and later, appears at offset 13h\r
98cb9ae8 174/// within the BIOS Information structure.\r
175///\r
176typedef struct {\r
177 UINT8 BiosBootSpecIsSupported :1;\r
7ddba202
SZ		 178 UINT8 FunctionKeyNetworkBootIsSupported :1;\r
179 UINT8 TargetContentDistributionEnabled :1;\r
180 UINT8 UefiSpecificationSupported :1;\r
181 UINT8 VirtualMachineSupported :1;\r
182 UINT8 ExtensionByte2Reserved :3;\r
98cb9ae8 183} MBCE_SYSTEM_RESERVED;\r
184\r
185///\r
af2dc6a7 186/// BIOS Characteristics Extension Bytes.\r
98cb9ae8 187///\r
188typedef struct {\r
189 MBCE_BIOS_RESERVED BiosReserved;\r
190 MBCE_SYSTEM_RESERVED SystemReserved;\r
98cb9ae8 191} MISC_BIOS_CHARACTERISTICS_EXTENSION;\r
192\r
4135253b 193///\r
af2dc6a7 194/// BIOS Information (Type 0).\r
4135253b 195///\r
61ce5861 196typedef struct {\r
98cb9ae8 197 SMBIOS_STRUCTURE Hdr;\r
198 SMBIOS_TABLE_STRING Vendor;\r
199 SMBIOS_TABLE_STRING BiosVersion;\r
200 UINT16 BiosSegment;\r
201 SMBIOS_TABLE_STRING BiosReleaseDate;\r
202 UINT8 BiosSize;\r
203 MISC_BIOS_CHARACTERISTICS BiosCharacteristics;\r
204 UINT8 BIOSCharacteristicsExtensionBytes[2];\r
205 UINT8 SystemBiosMajorRelease;\r
206 UINT8 SystemBiosMinorRelease;\r
207 UINT8 EmbeddedControllerFirmwareMajorRelease;\r
208 UINT8 EmbeddedControllerFirmwareMinorRelease;\r
61ce5861 209} SMBIOS_TABLE_TYPE0;\r
210\r
98cb9ae8 211///\r
af2dc6a7 212/// System Wake-up Type.\r
98cb9ae8 213///\r
214typedef enum { \r
215 SystemWakeupTypeReserved = 0x00,\r
216 SystemWakeupTypeOther = 0x01,\r
217 SystemWakeupTypeUnknown = 0x02,\r
218 SystemWakeupTypeApmTimer = 0x03,\r
219 SystemWakeupTypeModemRing = 0x04,\r
220 SystemWakeupTypeLanRemote = 0x05,\r
221 SystemWakeupTypePowerSwitch = 0x06,\r
222 SystemWakeupTypePciPme = 0x07,\r
223 SystemWakeupTypeAcPowerRestored = 0x08\r
224} MISC_SYSTEM_WAKEUP_TYPE;\r
225\r
4135253b 226///\r
af2dc6a7 227/// System Information (Type 1).\r
98cb9ae8 228/// \r
229/// The information in this structure defines attributes of the overall system and is \r
230/// intended to be associated with the Component ID group of the system's MIF.\r
231/// An SMBIOS implementation is associated with a single system instance and contains \r
232/// one and only one System Information (Type 1) structure.\r
4135253b 233///\r
61ce5861 234typedef struct {\r
98cb9ae8 235 SMBIOS_STRUCTURE Hdr;\r
236 SMBIOS_TABLE_STRING Manufacturer;\r
237 SMBIOS_TABLE_STRING ProductName;\r
238 SMBIOS_TABLE_STRING Version;\r
239 SMBIOS_TABLE_STRING SerialNumber;\r
240 GUID Uuid;\r
af2dc6a7 241 UINT8 WakeUpType; ///< The enumeration value from MISC_SYSTEM_WAKEUP_TYPE.\r
98cb9ae8 242 SMBIOS_TABLE_STRING SKUNumber;\r
243 SMBIOS_TABLE_STRING Family;\r
61ce5861 244} SMBIOS_TABLE_TYPE1;\r
245\r
98cb9ae8 246///\r
af2dc6a7 247/// Base Board - Feature Flags. \r
98cb9ae8 248///\r
249typedef struct {\r
250 UINT8 Motherboard :1;\r
251 UINT8 RequiresDaughterCard :1;\r
252 UINT8 Removable :1;\r
253 UINT8 Replaceable :1;\r
254 UINT8 HotSwappable :1;\r
255 UINT8 Reserved :3;\r
256} BASE_BOARD_FEATURE_FLAGS;\r
257\r
258///\r
af2dc6a7 259/// Base Board - Board Type.\r
98cb9ae8 260///\r
261typedef enum { \r
262 BaseBoardTypeUnknown = 0x1,\r
263 BaseBoardTypeOther = 0x2,\r
264 BaseBoardTypeServerBlade = 0x3,\r
265 BaseBoardTypeConnectivitySwitch = 0x4,\r
266 BaseBoardTypeSystemManagementModule = 0x5,\r
267 BaseBoardTypeProcessorModule = 0x6,\r
268 BaseBoardTypeIOModule = 0x7,\r
269 BaseBoardTypeMemoryModule = 0x8,\r
270 BaseBoardTypeDaughterBoard = 0x9,\r
271 BaseBoardTypeMotherBoard = 0xA,\r
272 BaseBoardTypeProcessorMemoryModule = 0xB,\r
273 BaseBoardTypeProcessorIOModule = 0xC,\r
274 BaseBoardTypeInterconnectBoard = 0xD\r
275} BASE_BOARD_TYPE;\r
276\r
4135253b 277///\r
af2dc6a7 278/// Base Board (or Module) Information (Type 2).\r
4135253b 279///\r
1f9f8414 280/// The information in this structure defines attributes of a system baseboard - \r
98cb9ae8 281/// for example a motherboard, planar, or server blade or other standard system module.\r
282///\r
61ce5861 283typedef struct {\r
98cb9ae8 284 SMBIOS_STRUCTURE Hdr;\r
285 SMBIOS_TABLE_STRING Manufacturer;\r
286 SMBIOS_TABLE_STRING ProductName;\r
287 SMBIOS_TABLE_STRING Version;\r
288 SMBIOS_TABLE_STRING SerialNumber;\r
289 SMBIOS_TABLE_STRING AssetTag;\r
290 BASE_BOARD_FEATURE_FLAGS FeatureFlag;\r
291 SMBIOS_TABLE_STRING LocationInChassis;\r
292 UINT16 ChassisHandle;\r
af2dc6a7 293 UINT8 BoardType; ///< The enumeration value from BASE_BOARD_TYPE.\r
98cb9ae8 294 UINT8 NumberOfContainedObjectHandles;\r
295 UINT16 ContainedObjectHandles[1];\r
61ce5861 296} SMBIOS_TABLE_TYPE2;\r
297\r
98cb9ae8 298///\r
299/// System Enclosure or Chassis Types\r
300///\r
301typedef enum { \r
302 MiscChassisTypeOther = 0x01,\r
303 MiscChassisTypeUnknown = 0x02,\r
304 MiscChassisTypeDeskTop = 0x03,\r
305 MiscChassisTypeLowProfileDesktop = 0x04,\r
306 MiscChassisTypePizzaBox = 0x05,\r
307 MiscChassisTypeMiniTower = 0x06,\r
308 MiscChassisTypeTower = 0x07,\r
309 MiscChassisTypePortable = 0x08,\r
310 MiscChassisTypeLapTop = 0x09,\r
311 MiscChassisTypeNotebook = 0x0A,\r
312 MiscChassisTypeHandHeld = 0x0B,\r
313 MiscChassisTypeDockingStation = 0x0C,\r
314 MiscChassisTypeAllInOne = 0x0D,\r
315 MiscChassisTypeSubNotebook = 0x0E,\r
316 MiscChassisTypeSpaceSaving = 0x0F,\r
317 MiscChassisTypeLunchBox = 0x10,\r
318 MiscChassisTypeMainServerChassis = 0x11,\r
319 MiscChassisTypeExpansionChassis = 0x12,\r
320 MiscChassisTypeSubChassis = 0x13,\r
321 MiscChassisTypeBusExpansionChassis = 0x14,\r
322 MiscChassisTypePeripheralChassis = 0x15,\r
323 MiscChassisTypeRaidChassis = 0x16,\r
324 MiscChassisTypeRackMountChassis = 0x17,\r
325 MiscChassisTypeSealedCasePc = 0x18,\r
326 MiscChassisMultiSystemChassis = 0x19,\r
327 MiscChassisCompactPCI = 0x1A,\r
328 MiscChassisAdvancedTCA = 0x1B,\r
329 MiscChassisBlade = 0x1C,\r
6cd35c62
EL		 330 MiscChassisBladeEnclosure = 0x1D,\r
331 MiscChassisTablet = 0x1E,\r
332 MiscChassisConvertible = 0x1F,\r
333 MiscChassisDetachable = 0x20\r
98cb9ae8 334} MISC_CHASSIS_TYPE;\r
335\r
336///\r
af2dc6a7 337/// System Enclosure or Chassis States .\r
98cb9ae8 338///\r
339typedef enum { \r
340 ChassisStateOther = 0x01,\r
341 ChassisStateUnknown = 0x02,\r
342 ChassisStateSafe = 0x03,\r
343 ChassisStateWarning = 0x04,\r
344 ChassisStateCritical = 0x05,\r
345 ChassisStateNonRecoverable = 0x06\r
346} MISC_CHASSIS_STATE;\r
347\r
348///\r
af2dc6a7 349/// System Enclosure or Chassis Security Status.\r
98cb9ae8 350///\r
351typedef enum { \r
352 ChassisSecurityStatusOther = 0x01,\r
353 ChassisSecurityStatusUnknown = 0x02,\r
354 ChassisSecurityStatusNone = 0x03,\r
355 ChassisSecurityStatusExternalInterfaceLockedOut = 0x04,\r
356 ChassisSecurityStatusExternalInterfaceLockedEnabled = 0x05\r
357} MISC_CHASSIS_SECURITY_STATE;\r
358\r
bf7ea009 359///\r
360/// Contained Element record\r
361///\r
61ce5861 362typedef struct {\r
363 UINT8 ContainedElementType;\r
364 UINT8 ContainedElementMinimum;\r
365 UINT8 ContainedElementMaximum;\r
366} CONTAINED_ELEMENT;\r
367\r
98cb9ae8 368\r
4135253b 369///\r
af2dc6a7 370/// System Enclosure or Chassis (Type 3).\r
4135253b 371///\r
98cb9ae8 372/// The information in this structure defines attributes of the system's mechanical enclosure(s). \r
373/// For example, if a system included a separate enclosure for its peripheral devices, \r
374/// two structures would be returned: one for the main, system enclosure and the second for\r
375/// the peripheral device enclosure. The additions to this structure in v2.1 of this specification\r
376/// support the population of the CIM_Chassis class. \r
377///\r
61ce5861 378typedef struct {\r
98cb9ae8 379 SMBIOS_STRUCTURE Hdr;\r
380 SMBIOS_TABLE_STRING Manufacturer;\r
381 UINT8 Type;\r
382 SMBIOS_TABLE_STRING Version;\r
383 SMBIOS_TABLE_STRING SerialNumber;\r
384 SMBIOS_TABLE_STRING AssetTag;\r
af2dc6a7 385 UINT8 BootupState; ///< The enumeration value from MISC_CHASSIS_STATE.\r
386 UINT8 PowerSupplyState; ///< The enumeration value from MISC_CHASSIS_STATE.\r
387 UINT8 ThermalState; ///< The enumeration value from MISC_CHASSIS_STATE.\r
388 UINT8 SecurityStatus; ///< The enumeration value from MISC_CHASSIS_SECURITY_STATE.\r
98cb9ae8 389 UINT8 OemDefined[4];\r
390 UINT8 Height;\r
391 UINT8 NumberofPowerCords;\r
392 UINT8 ContainedElementCount;\r
393 UINT8 ContainedElementRecordLength;\r
394 CONTAINED_ELEMENT ContainedElements[1];\r
61ce5861 395} SMBIOS_TABLE_TYPE3;\r
396\r
98cb9ae8 397///\r
af2dc6a7 398/// Processor Information - Processor Type.\r
98cb9ae8 399///\r
400typedef enum {\r
401 ProcessorOther = 0x01,\r
402 ProcessorUnknown = 0x02,\r
403 CentralProcessor = 0x03,\r
404 MathProcessor = 0x04,\r
405 DspProcessor = 0x05,\r
406 VideoProcessor = 0x06\r
407} PROCESSOR_TYPE_DATA;\r
408\r
409///\r
af2dc6a7 410/// Processor Information - Processor Family.\r
98cb9ae8 411///\r
412typedef enum {\r
413 ProcessorFamilyOther = 0x01, \r
414 ProcessorFamilyUnknown = 0x02,\r
415 ProcessorFamily8086 = 0x03, \r
416 ProcessorFamily80286 = 0x04,\r
417 ProcessorFamilyIntel386 = 0x05, \r
418 ProcessorFamilyIntel486 = 0x06,\r
419 ProcessorFamily8087 = 0x07,\r
420 ProcessorFamily80287 = 0x08,\r
421 ProcessorFamily80387 = 0x09, \r
422 ProcessorFamily80487 = 0x0A,\r
423 ProcessorFamilyPentium = 0x0B, \r
424 ProcessorFamilyPentiumPro = 0x0C,\r
425 ProcessorFamilyPentiumII = 0x0D,\r
426 ProcessorFamilyPentiumMMX = 0x0E,\r
427 ProcessorFamilyCeleron = 0x0F,\r
428 ProcessorFamilyPentiumIIXeon = 0x10,\r
429 ProcessorFamilyPentiumIII = 0x11, \r
430 ProcessorFamilyM1 = 0x12,\r
431 ProcessorFamilyM2 = 0x13,\r
119c1688
SZ		 432 ProcessorFamilyIntelCeleronM = 0x14,\r
433 ProcessorFamilyIntelPentium4Ht = 0x15,\r
98cb9ae8 434 ProcessorFamilyAmdDuron = 0x18,\r
435 ProcessorFamilyK5 = 0x19, \r
436 ProcessorFamilyK6 = 0x1A,\r
437 ProcessorFamilyK6_2 = 0x1B,\r
438 ProcessorFamilyK6_3 = 0x1C,\r
439 ProcessorFamilyAmdAthlon = 0x1D,\r
440 ProcessorFamilyAmd29000 = 0x1E,\r
441 ProcessorFamilyK6_2Plus = 0x1F,\r
442 ProcessorFamilyPowerPC = 0x20,\r
443 ProcessorFamilyPowerPC601 = 0x21,\r
444 ProcessorFamilyPowerPC603 = 0x22,\r
445 ProcessorFamilyPowerPC603Plus = 0x23,\r
446 ProcessorFamilyPowerPC604 = 0x24,\r
447 ProcessorFamilyPowerPC620 = 0x25,\r
448 ProcessorFamilyPowerPCx704 = 0x26,\r
449 ProcessorFamilyPowerPC750 = 0x27,\r
3507ab19 450 ProcessorFamilyIntelCoreDuo = 0x28,\r
451 ProcessorFamilyIntelCoreDuoMobile = 0x29,\r
452 ProcessorFamilyIntelCoreSoloMobile = 0x2A,\r
453 ProcessorFamilyIntelAtom = 0x2B,\r
6cd35c62 454 ProcessorFamilyIntelCoreM = 0x2C,\r
4a228334 455 ProcessorFamilyAlpha = 0x30,\r
98cb9ae8 456 ProcessorFamilyAlpha21064 = 0x31,\r
457 ProcessorFamilyAlpha21066 = 0x32,\r
458 ProcessorFamilyAlpha21164 = 0x33,\r
459 ProcessorFamilyAlpha21164PC = 0x34,\r
460 ProcessorFamilyAlpha21164a = 0x35,\r
461 ProcessorFamilyAlpha21264 = 0x36,\r
462 ProcessorFamilyAlpha21364 = 0x37,\r
7ddba202
SZ		 463 ProcessorFamilyAmdTurionIIUltraDualCoreMobileM = 0x38,\r
464 ProcessorFamilyAmdTurionIIDualCoreMobileM = 0x39,\r
465 ProcessorFamilyAmdAthlonIIDualCoreM = 0x3A,\r
466 ProcessorFamilyAmdOpteron6100Series = 0x3B,\r
467 ProcessorFamilyAmdOpteron4100Series = 0x3C,\r
468 ProcessorFamilyAmdOpteron6200Series = 0x3D,\r
469 ProcessorFamilyAmdOpteron4200Series = 0x3E,\r
4a228334 470 ProcessorFamilyAmdFxSeries = 0x3F,\r
98cb9ae8 471 ProcessorFamilyMips = 0x40,\r
472 ProcessorFamilyMIPSR4000 = 0x41,\r
473 ProcessorFamilyMIPSR4200 = 0x42,\r
474 ProcessorFamilyMIPSR4400 = 0x43,\r
475 ProcessorFamilyMIPSR4600 = 0x44,\r
476 ProcessorFamilyMIPSR10000 = 0x45,\r
7ddba202
SZ		 477 ProcessorFamilyAmdCSeries = 0x46,\r
478 ProcessorFamilyAmdESeries = 0x47,\r
4a228334 479 ProcessorFamilyAmdASeries = 0x48, ///< SMBIOS spec 2.8.0 updated the name\r
7ddba202 480 ProcessorFamilyAmdGSeries = 0x49,\r
4a228334
EL		 481 ProcessorFamilyAmdZSeries = 0x4A,\r
482 ProcessorFamilyAmdRSeries = 0x4B,\r
483 ProcessorFamilyAmdOpteron4300 = 0x4C,\r
484 ProcessorFamilyAmdOpteron6300 = 0x4D,\r
485 ProcessorFamilyAmdOpteron3300 = 0x4E,\r
486 ProcessorFamilyAmdFireProSeries = 0x4F,\r
98cb9ae8 487 ProcessorFamilySparc = 0x50,\r
488 ProcessorFamilySuperSparc = 0x51,\r
489 ProcessorFamilymicroSparcII = 0x52,\r
490 ProcessorFamilymicroSparcIIep = 0x53,\r
491 ProcessorFamilyUltraSparc = 0x54,\r
492 ProcessorFamilyUltraSparcII = 0x55,\r
4a228334 493 ProcessorFamilyUltraSparcIii = 0x56,\r
98cb9ae8 494 ProcessorFamilyUltraSparcIII = 0x57,\r
495 ProcessorFamilyUltraSparcIIIi = 0x58,\r
496 ProcessorFamily68040 = 0x60,\r
497 ProcessorFamily68xxx = 0x61,\r
498 ProcessorFamily68000 = 0x62,\r
499 ProcessorFamily68010 = 0x63,\r
500 ProcessorFamily68020 = 0x64,\r
501 ProcessorFamily68030 = 0x65,\r
6cd35c62
EL		 502 ProcessorFamilyAmdAthlonX4QuadCore = 0x66,\r
503 ProcessorFamilyAmdOpteronX1000Series = 0x67,\r
504 ProcessorFamilyAmdOpteronX2000Series = 0x68,\r
98cb9ae8 505 ProcessorFamilyHobbit = 0x70,\r
506 ProcessorFamilyCrusoeTM5000 = 0x78,\r
507 ProcessorFamilyCrusoeTM3000 = 0x79,\r
508 ProcessorFamilyEfficeonTM8000 = 0x7A,\r
509 ProcessorFamilyWeitek = 0x80,\r
510 ProcessorFamilyItanium = 0x82,\r
511 ProcessorFamilyAmdAthlon64 = 0x83,\r
512 ProcessorFamilyAmdOpteron = 0x84,\r
513 ProcessorFamilyAmdSempron = 0x85,\r
514 ProcessorFamilyAmdTurion64Mobile = 0x86,\r
515 ProcessorFamilyDualCoreAmdOpteron = 0x87,\r
516 ProcessorFamilyAmdAthlon64X2DualCore = 0x88,\r
517 ProcessorFamilyAmdTurion64X2Mobile = 0x89,\r
3507ab19 518 ProcessorFamilyQuadCoreAmdOpteron = 0x8A,\r
519 ProcessorFamilyThirdGenerationAmdOpteron = 0x8B,\r
520 ProcessorFamilyAmdPhenomFxQuadCore = 0x8C,\r
521 ProcessorFamilyAmdPhenomX4QuadCore = 0x8D,\r
522 ProcessorFamilyAmdPhenomX2DualCore = 0x8E,\r
523 ProcessorFamilyAmdAthlonX2DualCore = 0x8F, \r
98cb9ae8 524 ProcessorFamilyPARISC = 0x90,\r
525 ProcessorFamilyPaRisc8500 = 0x91,\r
526 ProcessorFamilyPaRisc8000 = 0x92,\r
527 ProcessorFamilyPaRisc7300LC = 0x93,\r
528 ProcessorFamilyPaRisc7200 = 0x94,\r
529 ProcessorFamilyPaRisc7100LC = 0x95,\r
530 ProcessorFamilyPaRisc7100 = 0x96,\r
531 ProcessorFamilyV30 = 0xA0,\r
3507ab19 532 ProcessorFamilyQuadCoreIntelXeon3200Series = 0xA1,\r
533 ProcessorFamilyDualCoreIntelXeon3000Series = 0xA2,\r
534 ProcessorFamilyQuadCoreIntelXeon5300Series = 0xA3,\r
535 ProcessorFamilyDualCoreIntelXeon5100Series = 0xA4,\r
536 ProcessorFamilyDualCoreIntelXeon5000Series = 0xA5,\r
537 ProcessorFamilyDualCoreIntelXeonLV = 0xA6,\r
538 ProcessorFamilyDualCoreIntelXeonULV = 0xA7,\r
539 ProcessorFamilyDualCoreIntelXeon7100Series = 0xA8,\r
540 ProcessorFamilyQuadCoreIntelXeon5400Series = 0xA9,\r
541 ProcessorFamilyQuadCoreIntelXeon = 0xAA,\r
542 ProcessorFamilyDualCoreIntelXeon5200Series = 0xAB,\r
543 ProcessorFamilyDualCoreIntelXeon7200Series = 0xAC,\r
544 ProcessorFamilyQuadCoreIntelXeon7300Series = 0xAD,\r
545 ProcessorFamilyQuadCoreIntelXeon7400Series = 0xAE,\r
546 ProcessorFamilyMultiCoreIntelXeon7400Series = 0xAF,\r
98cb9ae8 547 ProcessorFamilyPentiumIIIXeon = 0xB0,\r
548 ProcessorFamilyPentiumIIISpeedStep = 0xB1,\r
549 ProcessorFamilyPentium4 = 0xB2,\r
550 ProcessorFamilyIntelXeon = 0xB3,\r
551 ProcessorFamilyAS400 = 0xB4,\r
552 ProcessorFamilyIntelXeonMP = 0xB5,\r
553 ProcessorFamilyAMDAthlonXP = 0xB6,\r
554 ProcessorFamilyAMDAthlonMP = 0xB7,\r
555 ProcessorFamilyIntelItanium2 = 0xB8,\r
556 ProcessorFamilyIntelPentiumM = 0xB9,\r
557 ProcessorFamilyIntelCeleronD = 0xBA,\r
558 ProcessorFamilyIntelPentiumD = 0xBB,\r
559 ProcessorFamilyIntelPentiumEx = 0xBC,\r
4a228334 560 ProcessorFamilyIntelCoreSolo = 0xBD, ///< SMBIOS spec 2.6 updated this value\r
98cb9ae8 561 ProcessorFamilyReserved = 0xBE,\r
562 ProcessorFamilyIntelCore2 = 0xBF,\r
3507ab19 563 ProcessorFamilyIntelCore2Solo = 0xC0,\r
564 ProcessorFamilyIntelCore2Extreme = 0xC1,\r
565 ProcessorFamilyIntelCore2Quad = 0xC2,\r
566 ProcessorFamilyIntelCore2ExtremeMobile = 0xC3,\r
567 ProcessorFamilyIntelCore2DuoMobile = 0xC4,\r
568 ProcessorFamilyIntelCore2SoloMobile = 0xC5,\r
569 ProcessorFamilyIntelCoreI7 = 0xC6,\r
570 ProcessorFamilyDualCoreIntelCeleron = 0xC7, \r
98cb9ae8 571 ProcessorFamilyIBM390 = 0xC8,\r
572 ProcessorFamilyG4 = 0xC9,\r
573 ProcessorFamilyG5 = 0xCA,\r
574 ProcessorFamilyG6 = 0xCB,\r
4a228334 575 ProcessorFamilyzArchitecture = 0xCC,\r
7ddba202
SZ		 576 ProcessorFamilyIntelCoreI5 = 0xCD,\r
577 ProcessorFamilyIntelCoreI3 = 0xCE,\r
98cb9ae8 578 ProcessorFamilyViaC7M = 0xD2,\r
579 ProcessorFamilyViaC7D = 0xD3,\r
580 ProcessorFamilyViaC7 = 0xD4,\r
581 ProcessorFamilyViaEden = 0xD5,\r
3507ab19 582 ProcessorFamilyMultiCoreIntelXeon = 0xD6,\r
583 ProcessorFamilyDualCoreIntelXeon3Series = 0xD7,\r
584 ProcessorFamilyQuadCoreIntelXeon3Series = 0xD8,\r
7ddba202 585 ProcessorFamilyViaNano = 0xD9,\r
3507ab19 586 ProcessorFamilyDualCoreIntelXeon5Series = 0xDA,\r
587 ProcessorFamilyQuadCoreIntelXeon5Series = 0xDB,\r
588 ProcessorFamilyDualCoreIntelXeon7Series = 0xDD,\r
589 ProcessorFamilyQuadCoreIntelXeon7Series = 0xDE,\r
590 ProcessorFamilyMultiCoreIntelXeon7Series = 0xDF,\r
7ddba202 591 ProcessorFamilyMultiCoreIntelXeon3400Series = 0xE0,\r
4a228334
EL		 592 ProcessorFamilyAmdOpteron3000Series = 0xE4,\r
593 ProcessorFamilyAmdSempronII = 0xE5,\r
3507ab19 594 ProcessorFamilyEmbeddedAmdOpteronQuadCore = 0xE6,\r
595 ProcessorFamilyAmdPhenomTripleCore = 0xE7,\r
596 ProcessorFamilyAmdTurionUltraDualCoreMobile = 0xE8,\r
597 ProcessorFamilyAmdTurionDualCoreMobile = 0xE9,\r
598 ProcessorFamilyAmdAthlonDualCore = 0xEA,\r
599 ProcessorFamilyAmdSempronSI = 0xEB,\r
7ddba202
SZ		 600 ProcessorFamilyAmdPhenomII = 0xEC,\r
601 ProcessorFamilyAmdAthlonII = 0xED,\r
602 ProcessorFamilySixCoreAmdOpteron = 0xEE,\r
603 ProcessorFamilyAmdSempronM = 0xEF,\r
98cb9ae8 604 ProcessorFamilyi860 = 0xFA,\r
605 ProcessorFamilyi960 = 0xFB,\r
606 ProcessorFamilyIndicatorFamily2 = 0xFE,\r
607 ProcessorFamilyReserved1 = 0xFF\r
608} PROCESSOR_FAMILY_DATA;\r
609\r
f9ed6c93
YL		 610///\r
611/// Processor Information2 - Processor Family2.\r
612///\r
613typedef enum {\r
614 ProcessorFamilySH3 = 0x0104,\r
615 ProcessorFamilySH4 = 0x0105,\r
616 ProcessorFamilyARM = 0x0118,\r
617 ProcessorFamilyStrongARM = 0x0119,\r
618 ProcessorFamily6x86 = 0x012C,\r
619 ProcessorFamilyMediaGX = 0x012D,\r
620 ProcessorFamilyMII = 0x012E,\r
621 ProcessorFamilyWinChip = 0x0140,\r
622 ProcessorFamilyDSP = 0x015E,\r
623 ProcessorFamilyVideoProcessor = 0x01F4\r
624} PROCESSOR_FAMILY2_DATA;\r
625\r
98cb9ae8 626///\r
af2dc6a7 627/// Processor Information - Voltage. \r
98cb9ae8 628///\r
629typedef struct {\r
6800ac83 630 UINT8 ProcessorVoltageCapability5V :1; \r
631 UINT8 ProcessorVoltageCapability3_3V :1; \r
632 UINT8 ProcessorVoltageCapability2_9V :1; \r
633 UINT8 ProcessorVoltageCapabilityReserved :1; ///< Bit 3, must be zero.\r
634 UINT8 ProcessorVoltageReserved :3; ///< Bits 4-6, must be zero.\r
635 UINT8 ProcessorVoltageIndicateLegacy :1;\r
98cb9ae8 636} PROCESSOR_VOLTAGE;\r
637\r
638///\r
af2dc6a7 639/// Processor Information - Processor Upgrade.\r
98cb9ae8 640///\r
641typedef enum {\r
642 ProcessorUpgradeOther = 0x01,\r
643 ProcessorUpgradeUnknown = 0x02,\r
644 ProcessorUpgradeDaughterBoard = 0x03,\r
645 ProcessorUpgradeZIFSocket = 0x04,\r
af2dc6a7 646 ProcessorUpgradePiggyBack = 0x05, ///< Replaceable.\r
98cb9ae8 647 ProcessorUpgradeNone = 0x06,\r
648 ProcessorUpgradeLIFSocket = 0x07,\r
649 ProcessorUpgradeSlot1 = 0x08,\r
650 ProcessorUpgradeSlot2 = 0x09,\r
651 ProcessorUpgrade370PinSocket = 0x0A,\r
652 ProcessorUpgradeSlotA = 0x0B,\r
653 ProcessorUpgradeSlotM = 0x0C,\r
654 ProcessorUpgradeSocket423 = 0x0D,\r
af2dc6a7 655 ProcessorUpgradeSocketA = 0x0E, ///< Socket 462.\r
98cb9ae8 656 ProcessorUpgradeSocket478 = 0x0F,\r
657 ProcessorUpgradeSocket754 = 0x10,\r
658 ProcessorUpgradeSocket940 = 0x11,\r
659 ProcessorUpgradeSocket939 = 0x12,\r
660 ProcessorUpgradeSocketmPGA604 = 0x13,\r
661 ProcessorUpgradeSocketLGA771 = 0x14,\r
662 ProcessorUpgradeSocketLGA775 = 0x15,\r
663 ProcessorUpgradeSocketS1 = 0x16,\r
664 ProcessorUpgradeAM2 = 0x17,\r
3507ab19 665 ProcessorUpgradeF1207 = 0x18,\r
7ddba202
SZ		 666 ProcessorSocketLGA1366 = 0x19,\r
667 ProcessorUpgradeSocketG34 = 0x1A,\r
668 ProcessorUpgradeSocketAM3 = 0x1B,\r
669 ProcessorUpgradeSocketC32 = 0x1C,\r
670 ProcessorUpgradeSocketLGA1156 = 0x1D,\r
671 ProcessorUpgradeSocketLGA1567 = 0x1E,\r
672 ProcessorUpgradeSocketPGA988A = 0x1F,\r
673 ProcessorUpgradeSocketBGA1288 = 0x20,\r
674 ProcessorUpgradeSocketrPGA988B = 0x21,\r
675 ProcessorUpgradeSocketBGA1023 = 0x22,\r
676 ProcessorUpgradeSocketBGA1224 = 0x23,\r
4a228334 677 ProcessorUpgradeSocketLGA1155 = 0x24, ///< SMBIOS spec 2.8.0 updated the name\r
7ddba202
SZ		 678 ProcessorUpgradeSocketLGA1356 = 0x25,\r
679 ProcessorUpgradeSocketLGA2011 = 0x26,\r
680 ProcessorUpgradeSocketFS1 = 0x27,\r
681 ProcessorUpgradeSocketFS2 = 0x28,\r
682 ProcessorUpgradeSocketFM1 = 0x29,\r
4a228334
EL		 683 ProcessorUpgradeSocketFM2 = 0x2A,\r
684 ProcessorUpgradeSocketLGA2011_3 = 0x2B,\r
6cd35c62
EL		 685 ProcessorUpgradeSocketLGA1356_3 = 0x2C,\r
686 ProcessorUpgradeSocketLGA1150 = 0x2D,\r
687 ProcessorUpgradeSocketBGA1168 = 0x2E,\r
688 ProcessorUpgradeSocketBGA1234 = 0x2F,\r
689 ProcessorUpgradeSocketBGA1364 = 0x30\r
98cb9ae8 690} PROCESSOR_UPGRADE;\r
691\r
692///\r
693/// Processor ID Field Description\r
694///\r
695typedef struct {\r
696 UINT32 ProcessorSteppingId:4;\r
697 UINT32 ProcessorModel: 4;\r
698 UINT32 ProcessorFamily: 4;\r
699 UINT32 ProcessorType: 2;\r
700 UINT32 ProcessorReserved1: 2;\r
701 UINT32 ProcessorXModel: 4;\r
702 UINT32 ProcessorXFamily: 8;\r
703 UINT32 ProcessorReserved2: 4;\r
704} PROCESSOR_SIGNATURE;\r
705\r
98cb9ae8 706typedef struct {\r
707 UINT32 ProcessorFpu :1;\r
708 UINT32 ProcessorVme :1;\r
709 UINT32 ProcessorDe :1;\r
710 UINT32 ProcessorPse :1;\r
711 UINT32 ProcessorTsc :1;\r
712 UINT32 ProcessorMsr :1;\r
713 UINT32 ProcessorPae :1;\r
714 UINT32 ProcessorMce :1;\r
715 UINT32 ProcessorCx8 :1;\r
716 UINT32 ProcessorApic :1;\r
717 UINT32 ProcessorReserved1 :1;\r
718 UINT32 ProcessorSep :1;\r
719 UINT32 ProcessorMtrr :1;\r
720 UINT32 ProcessorPge :1;\r
721 UINT32 ProcessorMca :1;\r
722 UINT32 ProcessorCmov :1;\r
723 UINT32 ProcessorPat :1;\r
724 UINT32 ProcessorPse36 :1;\r
725 UINT32 ProcessorPsn :1;\r
726 UINT32 ProcessorClfsh :1;\r
727 UINT32 ProcessorReserved2 :1;\r
728 UINT32 ProcessorDs :1;\r
729 UINT32 ProcessorAcpi :1;\r
730 UINT32 ProcessorMmx :1;\r
731 UINT32 ProcessorFxsr :1;\r
732 UINT32 ProcessorSse :1;\r
733 UINT32 ProcessorSse2 :1;\r
734 UINT32 ProcessorSs :1;\r
735 UINT32 ProcessorReserved3 :1;\r
736 UINT32 ProcessorTm :1;\r
737 UINT32 ProcessorReserved4 :2;\r
738} PROCESSOR_FEATURE_FLAGS;\r
739\r
740typedef struct {\r
741 PROCESSOR_SIGNATURE Signature;\r
98cb9ae8 742 PROCESSOR_FEATURE_FLAGS FeatureFlags;\r
6800ac83 743} PROCESSOR_ID_DATA;\r
98cb9ae8 744\r
4135253b 745///\r
af2dc6a7 746/// Processor Information (Type 4).\r
4135253b 747///\r
98cb9ae8 748/// The information in this structure defines the attributes of a single processor; \r
749/// a separate structure instance is provided for each system processor socket/slot. \r
750/// For example, a system with an IntelDX2 processor would have a single \r
af2dc6a7 751/// structure instance, while a system with an IntelSX2 processor would have a structure\r
752/// to describe the main CPU, and a second structure to describe the 80487 co-processor. \r
98cb9ae8 753///\r
61ce5861 754typedef struct { \r
755 SMBIOS_STRUCTURE Hdr;\r
2d5e30ef 756 SMBIOS_TABLE_STRING Socket;\r
af2dc6a7 757 UINT8 ProcessorType; ///< The enumeration value from PROCESSOR_TYPE_DATA.\r
758 UINT8 ProcessorFamily; ///< The enumeration value from PROCESSOR_FAMILY_DATA.\r
61ce5861 759 SMBIOS_TABLE_STRING ProcessorManufacture;\r
98cb9ae8 760 PROCESSOR_ID_DATA ProcessorId;\r
61ce5861 761 SMBIOS_TABLE_STRING ProcessorVersion;\r
98cb9ae8 762 PROCESSOR_VOLTAGE Voltage;\r
61ce5861 763 UINT16 ExternalClock;\r
764 UINT16 MaxSpeed;\r
765 UINT16 CurrentSpeed;\r
766 UINT8 Status;\r
af2dc6a7 767 UINT8 ProcessorUpgrade; ///< The enumeration value from PROCESSOR_UPGRADE.\r
61ce5861 768 UINT16 L1CacheHandle;\r
769 UINT16 L2CacheHandle;\r
770 UINT16 L3CacheHandle;\r
771 SMBIOS_TABLE_STRING SerialNumber;\r
772 SMBIOS_TABLE_STRING AssetTag;\r
773 SMBIOS_TABLE_STRING PartNumber;\r
774 //\r
775 // Add for smbios 2.5\r
776 //\r
777 UINT8 CoreCount;\r
778 UINT8 EnabledCoreCount;\r
779 UINT8 ThreadCount;\r
780 UINT16 ProcessorCharacteristics;\r
781 //\r
782 // Add for smbios 2.6\r
783 //\r
784 UINT16 ProcessorFamily2;\r
6cd35c62
EL		 785 //\r
786 // Add for smbios 3.0\r
787 //\r
788 UINT16 CoreCount2;\r
789 UINT16 EnabledCoreCount2;\r
790 UINT16 ThreadCount2;\r
61ce5861 791} SMBIOS_TABLE_TYPE4;\r
792\r
98cb9ae8 793///\r
af2dc6a7 794/// Memory Controller Error Detecting Method.\r
98cb9ae8 795///\r
796typedef enum { \r
797 ErrorDetectingMethodOther = 0x01,\r
798 ErrorDetectingMethodUnknown = 0x02,\r
799 ErrorDetectingMethodNone = 0x03,\r
800 ErrorDetectingMethodParity = 0x04,\r
801 ErrorDetectingMethod32Ecc = 0x05,\r
802 ErrorDetectingMethod64Ecc = 0x06,\r
803 ErrorDetectingMethod128Ecc = 0x07,\r
804 ErrorDetectingMethodCrc = 0x08\r
805} MEMORY_ERROR_DETECT_METHOD;\r
806\r
807///\r
af2dc6a7 808/// Memory Controller Error Correcting Capability.\r
98cb9ae8 809///\r
810typedef struct {\r
811 UINT8 Other :1;\r
812 UINT8 Unknown :1;\r
813 UINT8 None :1;\r
814 UINT8 SingleBitErrorCorrect :1;\r
815 UINT8 DoubleBitErrorCorrect :1;\r
816 UINT8 ErrorScrubbing :1;\r
817 UINT8 Reserved :2;\r
818} MEMORY_ERROR_CORRECT_CAPABILITY;\r
819\r
820///\r
af2dc6a7 821/// Memory Controller Information - Interleave Support.\r
98cb9ae8 822///\r
823typedef enum { \r
824 MemoryInterleaveOther = 0x01,\r
825 MemoryInterleaveUnknown = 0x02,\r
826 MemoryInterleaveOneWay = 0x03,\r
827 MemoryInterleaveTwoWay = 0x04,\r
828 MemoryInterleaveFourWay = 0x05,\r
829 MemoryInterleaveEightWay = 0x06,\r
830 MemoryInterleaveSixteenWay = 0x07\r
831} MEMORY_SUPPORT_INTERLEAVE_TYPE;\r
832\r
833///\r
af2dc6a7 834/// Memory Controller Information - Memory Speeds.\r
98cb9ae8 835///\r
836typedef struct {\r
837 UINT16 Other :1;\r
838 UINT16 Unknown :1;\r
839 UINT16 SeventyNs:1;\r
840 UINT16 SixtyNs :1;\r
841 UINT16 FiftyNs :1;\r
842 UINT16 Reserved :11;\r
843} MEMORY_SPEED_TYPE;\r
844\r
4135253b 845///\r
af2dc6a7 846/// Memory Controller Information (Type 5, Obsolete).\r
4135253b 847///\r
98cb9ae8 848/// The information in this structure defines the attributes of the system's memory controller(s) \r
849/// and the supported attributes of any memory-modules present in the sockets controlled by \r
850/// this controller. \r
851/// Note: This structure, and its companion Memory Module Information (Type 6, Obsolete), \r
af2dc6a7 852/// are obsolete starting with version 2.1 of this specification. The Physical Memory Array (Type 16)\r
98cb9ae8 853/// and Memory Device (Type 17) structures should be used instead. BIOS providers might\r
854/// choose to implement both memory description types to allow existing DMI browsers\r
855/// to properly display the system's memory attributes.\r
856///\r
61ce5861 857typedef struct {\r
98cb9ae8 858 SMBIOS_STRUCTURE Hdr;\r
af2dc6a7 859 UINT8 ErrDetectMethod; ///< The enumeration value from MEMORY_ERROR_DETECT_METHOD.\r
98cb9ae8 860 MEMORY_ERROR_CORRECT_CAPABILITY ErrCorrectCapability;\r
af2dc6a7 861 UINT8 SupportInterleave; ///< The enumeration value from MEMORY_SUPPORT_INTERLEAVE_TYPE.\r
862 UINT8 CurrentInterleave; ///< The enumeration value from MEMORY_SUPPORT_INTERLEAVE_TYPE . \r
98cb9ae8 863 UINT8 MaxMemoryModuleSize;\r
864 MEMORY_SPEED_TYPE SupportSpeed;\r
865 UINT16 SupportMemoryType;\r
866 UINT8 MemoryModuleVoltage;\r
867 UINT8 AssociatedMemorySlotNum;\r
868 UINT16 MemoryModuleConfigHandles[1];\r
61ce5861 869} SMBIOS_TABLE_TYPE5;\r
870\r
98cb9ae8 871///\r
872/// Memory Module Information - Memory Types\r
873///\r
874typedef struct {\r
875 UINT16 Other :1;\r
876 UINT16 Unknown :1;\r
877 UINT16 Standard :1;\r
878 UINT16 FastPageMode:1;\r
b4ab47ec 879 UINT16 Edo :1;\r
98cb9ae8 880 UINT16 Parity :1;\r
b4ab47ec 881 UINT16 Ecc :1;\r
882 UINT16 Simm :1;\r
883 UINT16 Dimm :1;\r
98cb9ae8 884 UINT16 BurstEdo :1;\r
b4ab47ec 885 UINT16 Sdram :1;\r
98cb9ae8 886 UINT16 Reserved :5;\r
887} MEMORY_CURRENT_TYPE;\r
888\r
889///\r
af2dc6a7 890/// Memory Module Information - Memory Size.\r
98cb9ae8 891///\r
892typedef struct {\r
6800ac83 893 UINT8 InstalledOrEnabledSize :7; ///< Size (n), where 2**n is the size in MB.\r
98cb9ae8 894 UINT8 SingleOrDoubleBank :1;\r
895} MEMORY_INSTALLED_ENABLED_SIZE;\r
896\r
4135253b 897///\r
898/// Memory Module Information (Type 6, Obsolete)\r
899///\r
98cb9ae8 900/// One Memory Module Information structure is included for each memory-module socket \r
901/// in the system. The structure describes the speed, type, size, and error status\r
902/// of each system memory module. The supported attributes of each module are described \r
903/// by the "owning" Memory Controller Information structure. \r
904/// Note: This structure, and its companion Memory Controller Information (Type 5, Obsolete), \r
af2dc6a7 905/// are obsolete starting with version 2.1 of this specification. The Physical Memory Array (Type 16)\r
98cb9ae8 906/// and Memory Device (Type 17) structures should be used instead.\r
907///\r
61ce5861 908typedef struct {\r
98cb9ae8 909 SMBIOS_STRUCTURE Hdr;\r
910 SMBIOS_TABLE_STRING SocketDesignation;\r
911 UINT8 BankConnections;\r
912 UINT8 CurrentSpeed;\r
913 MEMORY_CURRENT_TYPE CurrentMemoryType;\r
914 MEMORY_INSTALLED_ENABLED_SIZE InstalledSize;\r
915 MEMORY_INSTALLED_ENABLED_SIZE EnabledSize;\r
916 UINT8 ErrorStatus;\r
61ce5861 917} SMBIOS_TABLE_TYPE6;\r
918\r
98cb9ae8 919///\r
af2dc6a7 920/// Cache Information - SRAM Type.\r
98cb9ae8 921///\r
922typedef struct {\r
923 UINT16 Other :1;\r
924 UINT16 Unknown :1;\r
925 UINT16 NonBurst :1;\r
926 UINT16 Burst :1;\r
927 UINT16 PipelineBurst :1;\r
98cb9ae8 928 UINT16 Synchronous :1;\r
53d90f04 929 UINT16 Asynchronous :1;\r
98cb9ae8 930 UINT16 Reserved :9;\r
931} CACHE_SRAM_TYPE_DATA;\r
932\r
933///\r
af2dc6a7 934/// Cache Information - Error Correction Type.\r
98cb9ae8 935///\r
936typedef enum {\r
937 CacheErrorOther = 0x01,\r
938 CacheErrorUnknown = 0x02,\r
939 CacheErrorNone = 0x03,\r
940 CacheErrorParity = 0x04,\r
6800ac83 941 CacheErrorSingleBit = 0x05, ///< ECC\r
942 CacheErrorMultiBit = 0x06 ///< ECC\r
98cb9ae8 943} CACHE_ERROR_TYPE_DATA;\r
944\r
945///\r
af2dc6a7 946/// Cache Information - System Cache Type. \r
98cb9ae8 947///\r
948typedef enum {\r
949 CacheTypeOther = 0x01,\r
950 CacheTypeUnknown = 0x02,\r
951 CacheTypeInstruction = 0x03,\r
952 CacheTypeData = 0x04,\r
953 CacheTypeUnified = 0x05\r
954} CACHE_TYPE_DATA;\r
955\r
956///\r
af2dc6a7 957/// Cache Information - Associativity. \r
98cb9ae8 958///\r
959typedef enum {\r
960 CacheAssociativityOther = 0x01,\r
961 CacheAssociativityUnknown = 0x02,\r
962 CacheAssociativityDirectMapped = 0x03,\r
963 CacheAssociativity2Way = 0x04,\r
964 CacheAssociativity4Way = 0x05,\r
965 CacheAssociativityFully = 0x06,\r
966 CacheAssociativity8Way = 0x07,\r
967 CacheAssociativity16Way = 0x08,\r
3507ab19 968 CacheAssociativity12Way = 0x09,\r
969 CacheAssociativity24Way = 0x0A,\r
970 CacheAssociativity32Way = 0x0B,\r
971 CacheAssociativity48Way = 0x0C,\r
7ddba202
SZ		 972 CacheAssociativity64Way = 0x0D,\r
973 CacheAssociativity20Way = 0x0E\r
98cb9ae8 974} CACHE_ASSOCIATIVITY_DATA;\r
975\r
4135253b 976///\r
af2dc6a7 977/// Cache Information (Type 7).\r
4135253b 978///\r
af2dc6a7 979/// The information in this structure defines the attributes of CPU cache device in the system. \r
98cb9ae8 980/// One structure is specified for each such device, whether the device is internal to\r
981/// or external to the CPU module. Cache modules can be associated with a processor structure\r
af2dc6a7 982/// in one or two ways, depending on the SMBIOS version.\r
98cb9ae8 983///\r
61ce5861 984typedef struct {\r
98cb9ae8 985 SMBIOS_STRUCTURE Hdr;\r
986 SMBIOS_TABLE_STRING SocketDesignation;\r
987 UINT16 CacheConfiguration;\r
988 UINT16 MaximumCacheSize;\r
989 UINT16 InstalledSize;\r
990 CACHE_SRAM_TYPE_DATA SupportedSRAMType;\r
991 CACHE_SRAM_TYPE_DATA CurrentSRAMType;\r
992 UINT8 CacheSpeed;\r
af2dc6a7 993 UINT8 ErrorCorrectionType; ///< The enumeration value from CACHE_ERROR_TYPE_DATA.\r
994 UINT8 SystemCacheType; ///< The enumeration value from CACHE_TYPE_DATA.\r
995 UINT8 Associativity; ///< The enumeration value from CACHE_ASSOCIATIVITY_DATA.\r
61ce5861 996} SMBIOS_TABLE_TYPE7;\r
997\r
98cb9ae8 998///\r
af2dc6a7 999/// Port Connector Information - Connector Types. \r
98cb9ae8 1000///\r
1001typedef enum {\r
1002 PortConnectorTypeNone = 0x00,\r
1003 PortConnectorTypeCentronics = 0x01,\r
1004 PortConnectorTypeMiniCentronics = 0x02,\r
1005 PortConnectorTypeProprietary = 0x03,\r
1006 PortConnectorTypeDB25Male = 0x04,\r
1007 PortConnectorTypeDB25Female = 0x05,\r
1008 PortConnectorTypeDB15Male = 0x06,\r
1009 PortConnectorTypeDB15Female = 0x07,\r
1010 PortConnectorTypeDB9Male = 0x08,\r
1011 PortConnectorTypeDB9Female = 0x09,\r
1012 PortConnectorTypeRJ11 = 0x0A,\r
1013 PortConnectorTypeRJ45 = 0x0B,\r
1014 PortConnectorType50PinMiniScsi = 0x0C,\r
1015 PortConnectorTypeMiniDin = 0x0D,\r
119c1688 1016 PortConnectorTypeMicroDin = 0x0E,\r
98cb9ae8 1017 PortConnectorTypePS2 = 0x0F,\r
1018 PortConnectorTypeInfrared = 0x10,\r
1019 PortConnectorTypeHpHil = 0x11,\r
1020 PortConnectorTypeUsb = 0x12,\r
1021 PortConnectorTypeSsaScsi = 0x13,\r
1022 PortConnectorTypeCircularDin8Male = 0x14,\r
1023 PortConnectorTypeCircularDin8Female = 0x15,\r
1024 PortConnectorTypeOnboardIde = 0x16,\r
1025 PortConnectorTypeOnboardFloppy = 0x17,\r
1026 PortConnectorType9PinDualInline = 0x18,\r
1027 PortConnectorType25PinDualInline = 0x19,\r
1028 PortConnectorType50PinDualInline = 0x1A,\r
1029 PortConnectorType68PinDualInline = 0x1B,\r
1030 PortConnectorTypeOnboardSoundInput = 0x1C,\r
1031 PortConnectorTypeMiniCentronicsType14 = 0x1D,\r
1032 PortConnectorTypeMiniCentronicsType26 = 0x1E,\r
1033 PortConnectorTypeHeadPhoneMiniJack = 0x1F,\r
1034 PortConnectorTypeBNC = 0x20,\r
1035 PortConnectorType1394 = 0x21,\r
119c1688 1036 PortConnectorTypeSasSata = 0x22,\r
98cb9ae8 1037 PortConnectorTypePC98 = 0xA0,\r
1038 PortConnectorTypePC98Hireso = 0xA1,\r
1039 PortConnectorTypePCH98 = 0xA2,\r
1040 PortConnectorTypePC98Note = 0xA3,\r
1041 PortConnectorTypePC98Full = 0xA4,\r
1042 PortConnectorTypeOther = 0xFF\r
1043} MISC_PORT_CONNECTOR_TYPE;\r
1044\r
1045///\r
1046/// Port Connector Information - Port Types \r
1047///\r
1048typedef enum {\r
1049 PortTypeNone = 0x00,\r
1050 PortTypeParallelXtAtCompatible = 0x01,\r
1051 PortTypeParallelPortPs2 = 0x02,\r
1052 PortTypeParallelPortEcp = 0x03,\r
1053 PortTypeParallelPortEpp = 0x04,\r
1054 PortTypeParallelPortEcpEpp = 0x05,\r
1055 PortTypeSerialXtAtCompatible = 0x06,\r
1056 PortTypeSerial16450Compatible = 0x07,\r
1057 PortTypeSerial16550Compatible = 0x08,\r
1058 PortTypeSerial16550ACompatible = 0x09,\r
1059 PortTypeScsi = 0x0A,\r
1060 PortTypeMidi = 0x0B,\r
1061 PortTypeJoyStick = 0x0C,\r
1062 PortTypeKeyboard = 0x0D,\r
1063 PortTypeMouse = 0x0E,\r
1064 PortTypeSsaScsi = 0x0F,\r
1065 PortTypeUsb = 0x10,\r
1066 PortTypeFireWire = 0x11,\r
1067 PortTypePcmciaTypeI = 0x12,\r
1068 PortTypePcmciaTypeII = 0x13,\r
1069 PortTypePcmciaTypeIII = 0x14,\r
1070 PortTypeCardBus = 0x15,\r
1071 PortTypeAccessBusPort = 0x16,\r
1072 PortTypeScsiII = 0x17,\r
1073 PortTypeScsiWide = 0x18,\r
1074 PortTypePC98 = 0x19,\r
1075 PortTypePC98Hireso = 0x1A,\r
1076 PortTypePCH98 = 0x1B,\r
1077 PortTypeVideoPort = 0x1C,\r
1078 PortTypeAudioPort = 0x1D,\r
1079 PortTypeModemPort = 0x1E,\r
1080 PortTypeNetworkPort = 0x1F,\r
23df19a7
SEHM		 1081 PortTypeSata = 0x20,\r
1082 PortTypeSas = 0x21,\r
98cb9ae8 1083 PortType8251Compatible = 0xA0,\r
1084 PortType8251FifoCompatible = 0xA1,\r
1085 PortTypeOther = 0xFF\r
1086} MISC_PORT_TYPE;\r
1087\r
4135253b 1088///\r
af2dc6a7 1089/// Port Connector Information (Type 8).\r
4135253b 1090///\r
98cb9ae8 1091/// The information in this structure defines the attributes of a system port connector, \r
1f9f8414 1092/// e.g. parallel, serial, keyboard, or mouse ports. The port's type and connector information \r
98cb9ae8 1093/// are provided. One structure is present for each port provided by the system.\r
1094///\r
61ce5861 1095typedef struct {\r
98cb9ae8 1096 SMBIOS_STRUCTURE Hdr;\r
1097 SMBIOS_TABLE_STRING InternalReferenceDesignator;\r
af2dc6a7 1098 UINT8 InternalConnectorType; ///< The enumeration value from MISC_PORT_CONNECTOR_TYPE.\r
98cb9ae8 1099 SMBIOS_TABLE_STRING ExternalReferenceDesignator;\r
af2dc6a7 1100 UINT8 ExternalConnectorType; ///< The enumeration value from MISC_PORT_CONNECTOR_TYPE.\r
1101 UINT8 PortType; ///< The enumeration value from MISC_PORT_TYPE.\r
61ce5861 1102} SMBIOS_TABLE_TYPE8;\r
1103\r
98cb9ae8 1104///\r
1105/// System Slots - Slot Type\r
1106///\r
1107typedef enum {\r
1108 SlotTypeOther = 0x01,\r
1109 SlotTypeUnknown = 0x02,\r
1110 SlotTypeIsa = 0x03,\r
1111 SlotTypeMca = 0x04,\r
1112 SlotTypeEisa = 0x05,\r
1113 SlotTypePci = 0x06,\r
1114 SlotTypePcmcia = 0x07,\r
1115 SlotTypeVlVesa = 0x08,\r
1116 SlotTypeProprietary = 0x09,\r
1117 SlotTypeProcessorCardSlot = 0x0A,\r
1118 SlotTypeProprietaryMemoryCardSlot = 0x0B,\r
1119 SlotTypeIORiserCardSlot = 0x0C,\r
1120 SlotTypeNuBus = 0x0D,\r
1121 SlotTypePci66MhzCapable = 0x0E,\r
1122 SlotTypeAgp = 0x0F,\r
1123 SlotTypeApg2X = 0x10,\r
1124 SlotTypeAgp4X = 0x11,\r
1125 SlotTypePciX = 0x12,\r
0c8cd067 1126 SlotTypeAgp8X = 0x13,\r
6cd35c62
EL		 1127 SlotTypeM2Socket1_DP = 0x14,\r
1128 SlotTypeM2Socket1_SD = 0x15,\r
1129 SlotTypeM2Socket2 = 0x16,\r
1130 SlotTypeM2Socket3 = 0x17,\r
1131 SlotTypeMxmTypeI = 0x18,\r
1132 SlotTypeMxmTypeII = 0x19,\r
1133 SlotTypeMxmTypeIIIStandard = 0x1A,\r
1134 SlotTypeMxmTypeIIIHe = 0x1B,\r
1135 SlotTypeMxmTypeIV = 0x1C,\r
1136 SlotTypeMxm30TypeA = 0x1D,\r
1137 SlotTypeMxm30TypeB = 0x1E,\r
1138 SlotTypePciExpressGen2Sff_8639 = 0x1F,\r
1139 SlotTypePciExpressGen3Sff_8639 = 0x20,\r
98cb9ae8 1140 SlotTypePC98C20 = 0xA0,\r
1141 SlotTypePC98C24 = 0xA1,\r
1142 SlotTypePC98E = 0xA2,\r
1143 SlotTypePC98LocalBus = 0xA3,\r
1144 SlotTypePC98Card = 0xA4,\r
1145 SlotTypePciExpress = 0xA5,\r
1146 SlotTypePciExpressX1 = 0xA6,\r
1147 SlotTypePciExpressX2 = 0xA7,\r
1148 SlotTypePciExpressX4 = 0xA8,\r
1149 SlotTypePciExpressX8 = 0xA9,\r
3507ab19 1150 SlotTypePciExpressX16 = 0xAA,\r
1151 SlotTypePciExpressGen2 = 0xAB,\r
1152 SlotTypePciExpressGen2X1 = 0xAC,\r
1153 SlotTypePciExpressGen2X2 = 0xAD,\r
1154 SlotTypePciExpressGen2X4 = 0xAE,\r
1155 SlotTypePciExpressGen2X8 = 0xAF,\r
7ddba202
SZ		 1156 SlotTypePciExpressGen2X16 = 0xB0,\r
1157 SlotTypePciExpressGen3 = 0xB1,\r
1158 SlotTypePciExpressGen3X1 = 0xB2,\r
1159 SlotTypePciExpressGen3X2 = 0xB3,\r
1160 SlotTypePciExpressGen3X4 = 0xB4,\r
1161 SlotTypePciExpressGen3X8 = 0xB5,\r
1162 SlotTypePciExpressGen3X16 = 0xB6\r
98cb9ae8 1163} MISC_SLOT_TYPE;\r
1164\r
1165///\r
af2dc6a7 1166/// System Slots - Slot Data Bus Width.\r
98cb9ae8 1167///\r
1168typedef enum {\r
1169 SlotDataBusWidthOther = 0x01,\r
1170 SlotDataBusWidthUnknown = 0x02,\r
1171 SlotDataBusWidth8Bit = 0x03,\r
1172 SlotDataBusWidth16Bit = 0x04,\r
1173 SlotDataBusWidth32Bit = 0x05,\r
1174 SlotDataBusWidth64Bit = 0x06,\r
1175 SlotDataBusWidth128Bit = 0x07,\r
6800ac83 1176 SlotDataBusWidth1X = 0x08, ///< Or X1\r
1177 SlotDataBusWidth2X = 0x09, ///< Or X2\r
1178 SlotDataBusWidth4X = 0x0A, ///< Or X4\r
1179 SlotDataBusWidth8X = 0x0B, ///< Or X8\r
1180 SlotDataBusWidth12X = 0x0C, ///< Or X12\r
1181 SlotDataBusWidth16X = 0x0D, ///< Or X16\r
1182 SlotDataBusWidth32X = 0x0E ///< Or X32\r
98cb9ae8 1183} MISC_SLOT_DATA_BUS_WIDTH;\r
1184\r
1185///\r
af2dc6a7 1186/// System Slots - Current Usage.\r
98cb9ae8 1187///\r
1188typedef enum {\r
1189 SlotUsageOther = 0x01,\r
1190 SlotUsageUnknown = 0x02,\r
1191 SlotUsageAvailable = 0x03,\r
1192 SlotUsageInUse = 0x04\r
1193} MISC_SLOT_USAGE;\r
1194\r
1195///\r
af2dc6a7 1196/// System Slots - Slot Length. \r
98cb9ae8 1197///\r
1198typedef enum {\r
1199 SlotLengthOther = 0x01,\r
1200 SlotLengthUnknown = 0x02,\r
1201 SlotLengthShort = 0x03,\r
1202 SlotLengthLong = 0x04\r
1203} MISC_SLOT_LENGTH;\r
1204\r
1205///\r
af2dc6a7 1206/// System Slots - Slot Characteristics 1. \r
98cb9ae8 1207///\r
1208typedef struct {\r
1209 UINT8 CharacteristicsUnknown :1;\r
1210 UINT8 Provides50Volts :1;\r
1211 UINT8 Provides33Volts :1;\r
1212 UINT8 SharedSlot :1;\r
1213 UINT8 PcCard16Supported :1;\r
1214 UINT8 CardBusSupported :1;\r
1215 UINT8 ZoomVideoSupported :1;\r
1216 UINT8 ModemRingResumeSupported:1;\r
1217} MISC_SLOT_CHARACTERISTICS1;\r
1218///\r
af2dc6a7 1219/// System Slots - Slot Characteristics 2. \r
98cb9ae8 1220///\r
1221typedef struct {\r
1222 UINT8 PmeSignalSupported :1;\r
1223 UINT8 HotPlugDevicesSupported :1;\r
1224 UINT8 SmbusSignalSupported :1;\r
6800ac83 1225 UINT8 Reserved :5; ///< Set to 0.\r
98cb9ae8 1226} MISC_SLOT_CHARACTERISTICS2;\r
1227\r
4135253b 1228///\r
1229/// System Slots (Type 9)\r
1230///\r
98cb9ae8 1231/// The information in this structure defines the attributes of a system slot. \r
1232/// One structure is provided for each slot in the system.\r
1233///\r
1234///\r
61ce5861 1235typedef struct {\r
98cb9ae8 1236 SMBIOS_STRUCTURE Hdr;\r
1237 SMBIOS_TABLE_STRING SlotDesignation;\r
af2dc6a7 1238 UINT8 SlotType; ///< The enumeration value from MISC_SLOT_TYPE.\r
1239 UINT8 SlotDataBusWidth; ///< The enumeration value from MISC_SLOT_DATA_BUS_WIDTH.\r
1240 UINT8 CurrentUsage; ///< The enumeration value from MISC_SLOT_USAGE.\r
1241 UINT8 SlotLength; ///< The enumeration value from MISC_SLOT_LENGTH.\r
98cb9ae8 1242 UINT16 SlotID;\r
1243 MISC_SLOT_CHARACTERISTICS1 SlotCharacteristics1;\r
1244 MISC_SLOT_CHARACTERISTICS2 SlotCharacteristics2;\r
61ce5861 1245 //\r
1246 // Add for smbios 2.6\r
1247 //\r
98cb9ae8 1248 UINT16 SegmentGroupNum;\r
1249 UINT8 BusNum;\r
1250 UINT8 DevFuncNum;\r
61ce5861 1251} SMBIOS_TABLE_TYPE9;\r
1252\r
98cb9ae8 1253///\r
af2dc6a7 1254/// On Board Devices Information - Device Types. \r
98cb9ae8 1255///\r
1256typedef enum {\r
1257 OnBoardDeviceTypeOther = 0x01,\r
1258 OnBoardDeviceTypeUnknown = 0x02,\r
1259 OnBoardDeviceTypeVideo = 0x03,\r
1260 OnBoardDeviceTypeScsiController = 0x04,\r
1261 OnBoardDeviceTypeEthernet = 0x05,\r
1262 OnBoardDeviceTypeTokenRing = 0x06,\r
119c1688
SZ		 1263 OnBoardDeviceTypeSound = 0x07,\r
1264 OnBoardDeviceTypePATAController = 0x08,\r
1265 OnBoardDeviceTypeSATAController = 0x09,\r
1266 OnBoardDeviceTypeSASController = 0x0A\r
98cb9ae8 1267} MISC_ONBOARD_DEVICE_TYPE;\r
1268\r
bf7ea009 1269///\r
1270/// Device Item Entry\r
1271///\r
61ce5861 1272typedef struct {\r
af2dc6a7 1273 UINT8 DeviceType; ///< Bit [6:0] - enumeration type of device from MISC_ONBOARD_DEVICE_TYPE.\r
1274 ///< Bit 7 - 1 : device enabled, 0 : device disabled.\r
98cb9ae8 1275 SMBIOS_TABLE_STRING DescriptionString;\r
61ce5861 1276} DEVICE_STRUCT;\r
1277\r
4135253b 1278///\r
af2dc6a7 1279/// On Board Devices Information (Type 10, obsolete).\r
4135253b 1280///\r
98cb9ae8 1281/// Note: This structure is obsolete starting with version 2.6 specification; the Onboard Devices Extended \r
1282/// Information (Type 41) structure should be used instead . BIOS providers can choose to implement both \r
1283/// types to allow existing SMBIOS browsers to properly display the system's onboard devices information. \r
1284/// The information in this structure defines the attributes of devices that are onboard (soldered onto) \r
1285/// a system element, usually the baseboard. In general, an entry in this table implies that the BIOS\r
1286/// has some level of control over the enabling of the associated device for use by the system.\r
1287///\r
61ce5861 1288typedef struct {\r
1289 SMBIOS_STRUCTURE Hdr;\r
1290 DEVICE_STRUCT Device[1];\r
1291} SMBIOS_TABLE_TYPE10;\r
1292\r
4135253b 1293///\r
af2dc6a7 1294/// OEM Strings (Type 11).\r
98cb9ae8 1295/// This structure contains free form strings defined by the OEM. Examples of this are: \r
1296/// Part Numbers for Reference Documents for the system, contact information for the manufacturer, etc. \r
4135253b 1297///\r
61ce5861 1298typedef struct {\r
1299 SMBIOS_STRUCTURE Hdr;\r
1300 UINT8 StringCount;\r
1301} SMBIOS_TABLE_TYPE11;\r
1302\r
4135253b 1303///\r
af2dc6a7 1304/// System Configuration Options (Type 12).\r
4135253b 1305///\r
98cb9ae8 1306/// This structure contains information required to configure the base board's Jumpers and Switches. \r
1307///\r
61ce5861 1308typedef struct {\r
1309 SMBIOS_STRUCTURE Hdr;\r
1310 UINT8 StringCount;\r
1311} SMBIOS_TABLE_TYPE12;\r
1312\r
98cb9ae8 1313\r
4135253b 1314///\r
af2dc6a7 1315/// BIOS Language Information (Type 13).\r
4135253b 1316///\r
98cb9ae8 1317/// The information in this structure defines the installable language attributes of the BIOS. \r
1318/// \r
61ce5861 1319typedef struct {\r
1320 SMBIOS_STRUCTURE Hdr;\r
1321 UINT8 InstallableLanguages;\r
1322 UINT8 Flags;\r
fbfa4a1d 1323 UINT8 Reserved[15];\r
61ce5861 1324 SMBIOS_TABLE_STRING CurrentLanguages;\r
1325} SMBIOS_TABLE_TYPE13;\r
1326\r
119c1688
SZ		 1327///\r
1328/// Group Item Entry\r
1329///\r
1330typedef struct {\r
1331 UINT8 ItemType;\r
1332 UINT16 ItemHandle;\r
1333} GROUP_STRUCT;\r
1334\r
1335///\r
1336/// Group Associations (Type 14).\r
1337///\r
1338/// The Group Associations structure is provided for OEMs who want to specify \r
1339/// the arrangement or hierarchy of certain components (including other Group Associations) \r
1340/// within the system. \r
1341///\r
1342typedef struct {\r
1343 SMBIOS_STRUCTURE Hdr;\r
1344 SMBIOS_TABLE_STRING GroupName;\r
1345 GROUP_STRUCT Group[1];\r
1346} SMBIOS_TABLE_TYPE14;\r
1347\r
98cb9ae8 1348///\r
af2dc6a7 1349/// System Event Log - Event Log Types.\r
98cb9ae8 1350/// \r
1351typedef enum {\r
1352 EventLogTypeReserved = 0x00,\r
1353 EventLogTypeSingleBitECC = 0x01,\r
1354 EventLogTypeMultiBitECC = 0x02,\r
1355 EventLogTypeParityMemErr = 0x03,\r
1356 EventLogTypeBusTimeOut = 0x04,\r
1357 EventLogTypeIOChannelCheck = 0x05,\r
1358 EventLogTypeSoftwareNMI = 0x06,\r
1359 EventLogTypePOSTMemResize = 0x07,\r
1360 EventLogTypePOSTErr = 0x08,\r
1361 EventLogTypePCIParityErr = 0x09,\r
1362 EventLogTypePCISystemErr = 0x0A,\r
1363 EventLogTypeCPUFailure = 0x0B,\r
1364 EventLogTypeEISATimeOut = 0x0C,\r
1365 EventLogTypeMemLogDisabled = 0x0D,\r
1366 EventLogTypeLoggingDisabled = 0x0E,\r
1367 EventLogTypeSysLimitExce = 0x10,\r
1368 EventLogTypeAsyncHWTimer = 0x11,\r
1369 EventLogTypeSysConfigInfo = 0x12,\r
1370 EventLogTypeHDInfo = 0x13,\r
1371 EventLogTypeSysReconfig = 0x14,\r
1372 EventLogTypeUncorrectCPUErr = 0x15,\r
1373 EventLogTypeAreaResetAndClr = 0x16,\r
1374 EventLogTypeSystemBoot = 0x17,\r
6800ac83 1375 EventLogTypeUnused = 0x18, ///< 0x18 - 0x7F\r
1376 EventLogTypeAvailForSys = 0x80, ///< 0x80 - 0xFE\r
98cb9ae8 1377 EventLogTypeEndOfLog = 0xFF\r
1378} EVENT_LOG_TYPE_DATA;\r
1379\r
1380///\r
af2dc6a7 1381/// System Event Log - Variable Data Format Types. \r
98cb9ae8 1382/// \r
1383typedef enum {\r
1384 EventLogVariableNone = 0x00,\r
1385 EventLogVariableHandle = 0x01,\r
1386 EventLogVariableMutilEvent = 0x02,\r
1387 EventLogVariableMutilEventHandle = 0x03,\r
1388 EventLogVariablePOSTResultBitmap = 0x04,\r
1389 EventLogVariableSysManagementType = 0x05,\r
1390 EventLogVariableMutliEventSysManagmentType = 0x06, \r
1391 EventLogVariableUnused = 0x07,\r
1392 EventLogVariableOEMAssigned = 0x80\r
55deb978 1393} EVENT_LOG_VARIABLE_DATA;\r
98cb9ae8 1394\r
98cb9ae8 1395///\r
1396/// Event Log Type Descriptors\r
1397///\r
1398typedef struct {\r
af2dc6a7 1399 UINT8 LogType; ///< The enumeration value from EVENT_LOG_TYPE_DATA.\r
98cb9ae8 1400 UINT8 DataFormatType;\r
1401} EVENT_LOG_TYPE;\r
1402\r
4135253b 1403///\r
af2dc6a7 1404/// System Event Log (Type 15).\r
4135253b 1405///\r
98cb9ae8 1406/// The presence of this structure within the SMBIOS data returned for a system indicates \r
1407/// that the system supports an event log. An event log is a fixed-length area within a \r
1408/// non-volatile storage element, starting with a fixed-length (and vendor-specific) header \r
1409/// record, followed by one or more variable-length log records. \r
1410///\r
61ce5861 1411typedef struct {\r
1412 SMBIOS_STRUCTURE Hdr;\r
1413 UINT16 LogAreaLength;\r
1414 UINT16 LogHeaderStartOffset;\r
1415 UINT16 LogDataStartOffset;\r
1416 UINT8 AccessMethod;\r
1417 UINT8 LogStatus;\r
1418 UINT32 LogChangeToken;\r
1419 UINT32 AccessMethodAddress;\r
1420 UINT8 LogHeaderFormat;\r
1421 UINT8 NumberOfSupportedLogTypeDescriptors;\r
1422 UINT8 LengthOfLogTypeDescriptor;\r
1423 EVENT_LOG_TYPE EventLogTypeDescriptors[1];\r
1424} SMBIOS_TABLE_TYPE15;\r
1425\r
98cb9ae8 1426///\r
af2dc6a7 1427/// Physical Memory Array - Location.\r
98cb9ae8 1428///\r
1429typedef enum {\r
1430 MemoryArrayLocationOther = 0x01,\r
1431 MemoryArrayLocationUnknown = 0x02,\r
1432 MemoryArrayLocationSystemBoard = 0x03,\r
1433 MemoryArrayLocationIsaAddonCard = 0x04,\r
1434 MemoryArrayLocationEisaAddonCard = 0x05,\r
1435 MemoryArrayLocationPciAddonCard = 0x06,\r
1436 MemoryArrayLocationMcaAddonCard = 0x07,\r
1437 MemoryArrayLocationPcmciaAddonCard = 0x08,\r
1438 MemoryArrayLocationProprietaryAddonCard = 0x09,\r
1439 MemoryArrayLocationNuBus = 0x0A,\r
1440 MemoryArrayLocationPc98C20AddonCard = 0xA0,\r
1441 MemoryArrayLocationPc98C24AddonCard = 0xA1,\r
1442 MemoryArrayLocationPc98EAddonCard = 0xA2,\r
1443 MemoryArrayLocationPc98LocalBusAddonCard = 0xA3\r
1444} MEMORY_ARRAY_LOCATION;\r
1445\r
1446///\r
af2dc6a7 1447/// Physical Memory Array - Use.\r
98cb9ae8 1448///\r
1449typedef enum {\r
1450 MemoryArrayUseOther = 0x01,\r
1451 MemoryArrayUseUnknown = 0x02,\r
1452 MemoryArrayUseSystemMemory = 0x03,\r
1453 MemoryArrayUseVideoMemory = 0x04,\r
1454 MemoryArrayUseFlashMemory = 0x05,\r
1455 MemoryArrayUseNonVolatileRam = 0x06,\r
1456 MemoryArrayUseCacheMemory = 0x07\r
1457} MEMORY_ARRAY_USE;\r
1458\r
1459///\r
af2dc6a7 1460/// Physical Memory Array - Error Correction Types. \r
98cb9ae8 1461///\r
1462typedef enum {\r
1463 MemoryErrorCorrectionOther = 0x01,\r
1464 MemoryErrorCorrectionUnknown = 0x02,\r
1465 MemoryErrorCorrectionNone = 0x03,\r
1466 MemoryErrorCorrectionParity = 0x04,\r
1467 MemoryErrorCorrectionSingleBitEcc = 0x05,\r
1468 MemoryErrorCorrectionMultiBitEcc = 0x06,\r
1469 MemoryErrorCorrectionCrc = 0x07\r
1470} MEMORY_ERROR_CORRECTION;\r
1471\r
4135253b 1472///\r
af2dc6a7 1473/// Physical Memory Array (Type 16).\r
4135253b 1474///\r
98cb9ae8 1475/// This structure describes a collection of memory devices that operate \r
1476/// together to form a memory address space. \r
1477///\r
61ce5861 1478typedef struct {\r
98cb9ae8 1479 SMBIOS_STRUCTURE Hdr;\r
af2dc6a7 1480 UINT8 Location; ///< The enumeration value from MEMORY_ARRAY_LOCATION.\r
1481 UINT8 Use; ///< The enumeration value from MEMORY_ARRAY_USE.\r
1482 UINT8 MemoryErrorCorrection; ///< The enumeration value from MEMORY_ERROR_CORRECTION.\r
98cb9ae8 1483 UINT32 MaximumCapacity;\r
1484 UINT16 MemoryErrorInformationHandle;\r
1485 UINT16 NumberOfMemoryDevices;\r
7ddba202
SZ		 1486 //\r
1487 // Add for smbios 2.7\r
1488 //\r
1489 UINT64 ExtendedMaximumCapacity;\r
61ce5861 1490} SMBIOS_TABLE_TYPE16;\r
1491\r
98cb9ae8 1492///\r
af2dc6a7 1493/// Memory Device - Form Factor.\r
98cb9ae8 1494///\r
1495typedef enum {\r
1496 MemoryFormFactorOther = 0x01,\r
1497 MemoryFormFactorUnknown = 0x02,\r
1498 MemoryFormFactorSimm = 0x03,\r
1499 MemoryFormFactorSip = 0x04,\r
1500 MemoryFormFactorChip = 0x05,\r
1501 MemoryFormFactorDip = 0x06,\r
1502 MemoryFormFactorZip = 0x07,\r
1503 MemoryFormFactorProprietaryCard = 0x08,\r
1504 MemoryFormFactorDimm = 0x09,\r
1505 MemoryFormFactorTsop = 0x0A,\r
1506 MemoryFormFactorRowOfChips = 0x0B,\r
1507 MemoryFormFactorRimm = 0x0C,\r
1508 MemoryFormFactorSodimm = 0x0D,\r
1509 MemoryFormFactorSrimm = 0x0E,\r
1510 MemoryFormFactorFbDimm = 0x0F\r
1511} MEMORY_FORM_FACTOR;\r
1512\r
1513///\r
1514/// Memory Device - Type\r
1515///\r
1516typedef enum {\r
1517 MemoryTypeOther = 0x01,\r
1518 MemoryTypeUnknown = 0x02,\r
1519 MemoryTypeDram = 0x03,\r
1520 MemoryTypeEdram = 0x04,\r
1521 MemoryTypeVram = 0x05,\r
1522 MemoryTypeSram = 0x06,\r
1523 MemoryTypeRam = 0x07,\r
1524 MemoryTypeRom = 0x08,\r
1525 MemoryTypeFlash = 0x09,\r
1526 MemoryTypeEeprom = 0x0A,\r
1527 MemoryTypeFeprom = 0x0B,\r
1528 MemoryTypeEprom = 0x0C,\r
1529 MemoryTypeCdram = 0x0D,\r
1530 MemoryType3Dram = 0x0E,\r
1531 MemoryTypeSdram = 0x0F,\r
1532 MemoryTypeSgram = 0x10,\r
1533 MemoryTypeRdram = 0x11,\r
1534 MemoryTypeDdr = 0x12,\r
1535 MemoryTypeDdr2 = 0x13,\r
3507ab19 1536 MemoryTypeDdr2FbDimm = 0x14,\r
1537 MemoryTypeDdr3 = 0x18,\r
6cd35c62
EL		 1538 MemoryTypeFbd2 = 0x19,\r
1539 MemoryTypeDdr4 = 0x1A,\r
1540 MemoryTypeLpddr = 0x1B,\r
1541 MemoryTypeLpddr2 = 0x1C,\r
1542 MemoryTypeLpddr3 = 0x1D,\r
1543 MemoryTypeLpddr4 = 0x1E\r
98cb9ae8 1544} MEMORY_DEVICE_TYPE;\r
1545\r
1546typedef struct {\r
1547 UINT16 Reserved :1;\r
1548 UINT16 Other :1;\r
1549 UINT16 Unknown :1;\r
1550 UINT16 FastPaged :1;\r
1551 UINT16 StaticColumn :1;\r
1552 UINT16 PseudoStatic :1;\r
1553 UINT16 Rambus :1;\r
1554 UINT16 Synchronous :1;\r
1555 UINT16 Cmos :1;\r
1556 UINT16 Edo :1;\r
1557 UINT16 WindowDram :1;\r
1558 UINT16 CacheDram :1;\r
1559 UINT16 Nonvolatile :1;\r
7ddba202
SZ		 1560 UINT16 Registered :1;\r
1561 UINT16 Unbuffered :1;\r
4a228334 1562 UINT16 LrDimm :1;\r
98cb9ae8 1563} MEMORY_DEVICE_TYPE_DETAIL;\r
1564\r
4135253b 1565///\r
af2dc6a7 1566/// Memory Device (Type 17).\r
4135253b 1567///\r
98cb9ae8 1568/// This structure describes a single memory device that is part of \r
1569/// a larger Physical Memory Array (Type 16).\r
1570/// Note: If a system includes memory-device sockets, the SMBIOS implementation \r
af2dc6a7 1571/// includes a Memory Device structure instance for each slot, whether or not the \r
98cb9ae8 1572/// socket is currently populated.\r
1573///\r
61ce5861 1574typedef struct {\r
98cb9ae8 1575 SMBIOS_STRUCTURE Hdr;\r
1576 UINT16 MemoryArrayHandle;\r
1577 UINT16 MemoryErrorInformationHandle;\r
1578 UINT16 TotalWidth;\r
1579 UINT16 DataWidth;\r
1580 UINT16 Size;\r
af2dc6a7 1581 UINT8 FormFactor; ///< The enumeration value from MEMORY_FORM_FACTOR.\r
98cb9ae8 1582 UINT8 DeviceSet;\r
1583 SMBIOS_TABLE_STRING DeviceLocator;\r
1584 SMBIOS_TABLE_STRING BankLocator;\r
af2dc6a7 1585 UINT8 MemoryType; ///< The enumeration value from MEMORY_DEVICE_TYPE.\r
98cb9ae8 1586 MEMORY_DEVICE_TYPE_DETAIL TypeDetail;\r
1587 UINT16 Speed;\r
1588 SMBIOS_TABLE_STRING Manufacturer;\r
1589 SMBIOS_TABLE_STRING SerialNumber;\r
1590 SMBIOS_TABLE_STRING AssetTag;\r
1591 SMBIOS_TABLE_STRING PartNumber;\r
61ce5861 1592 //\r
1593 // Add for smbios 2.6\r
1594 // \r
7ddba202
SZ		 1595 UINT8 Attributes;\r
1596 //\r
1597 // Add for smbios 2.7\r
1598 //\r
1599 UINT32 ExtendedSize;\r
1600 UINT16 ConfiguredMemoryClockSpeed;\r
4a228334
EL		 1601 //\r
1602 // Add for smbios 2.8.0\r
1603 //\r
1604 UINT16 MinimumVoltage;\r
1605 UINT16 MaximumVoltage;\r
1606 UINT16 ConfiguredVoltage;\r
61ce5861 1607} SMBIOS_TABLE_TYPE17;\r
1608\r
98cb9ae8 1609///\r
af2dc6a7 1610/// 32-bit Memory Error Information - Error Type. \r
98cb9ae8 1611///\r
1612typedef enum { \r
1613 MemoryErrorOther = 0x01,\r
1614 MemoryErrorUnknown = 0x02,\r
1615 MemoryErrorOk = 0x03,\r
1616 MemoryErrorBadRead = 0x04,\r
1617 MemoryErrorParity = 0x05,\r
1618 MemoryErrorSigleBit = 0x06,\r
1619 MemoryErrorDoubleBit = 0x07,\r
1620 MemoryErrorMultiBit = 0x08,\r
1621 MemoryErrorNibble = 0x09,\r
1622 MemoryErrorChecksum = 0x0A,\r
1623 MemoryErrorCrc = 0x0B,\r
1624 MemoryErrorCorrectSingleBit = 0x0C,\r
1625 MemoryErrorCorrected = 0x0D,\r
1626 MemoryErrorUnCorrectable = 0x0E\r
1627} MEMORY_ERROR_TYPE;\r
1628\r
1629///\r
af2dc6a7 1630/// 32-bit Memory Error Information - Error Granularity. \r
98cb9ae8 1631///\r
1632typedef enum { \r
1633 MemoryGranularityOther = 0x01,\r
1634 MemoryGranularityOtherUnknown = 0x02,\r
1635 MemoryGranularityDeviceLevel = 0x03,\r
1636 MemoryGranularityMemPartitionLevel = 0x04\r
1637} MEMORY_ERROR_GRANULARITY;\r
1638\r
1639///\r
af2dc6a7 1640/// 32-bit Memory Error Information - Error Operation. \r
98cb9ae8 1641///\r
1642typedef enum { \r
1643 MemoryErrorOperationOther = 0x01,\r
1644 MemoryErrorOperationUnknown = 0x02,\r
1645 MemoryErrorOperationRead = 0x03,\r
1646 MemoryErrorOperationWrite = 0x04,\r
1647 MemoryErrorOperationPartialWrite = 0x05\r
1648} MEMORY_ERROR_OPERATION;\r
1649\r
4135253b 1650///\r
af2dc6a7 1651/// 32-bit Memory Error Information (Type 18).\r
98cb9ae8 1652/// \r
1653/// This structure identifies the specifics of an error that might be detected \r
1654/// within a Physical Memory Array.\r
4135253b 1655///\r
61ce5861 1656typedef struct {\r
98cb9ae8 1657 SMBIOS_STRUCTURE Hdr;\r
af2dc6a7 1658 UINT8 ErrorType; ///< The enumeration value from MEMORY_ERROR_TYPE.\r
1659 UINT8 ErrorGranularity; ///< The enumeration value from MEMORY_ERROR_GRANULARITY.\r
1660 UINT8 ErrorOperation; ///< The enumeration value from MEMORY_ERROR_OPERATION.\r
98cb9ae8 1661 UINT32 VendorSyndrome;\r
1662 UINT32 MemoryArrayErrorAddress;\r
1663 UINT32 DeviceErrorAddress;\r
1664 UINT32 ErrorResolution;\r
61ce5861 1665} SMBIOS_TABLE_TYPE18;\r
1666\r
4135253b 1667///\r
af2dc6a7 1668/// Memory Array Mapped Address (Type 19).\r
4135253b 1669///\r
98cb9ae8 1670/// This structure provides the address mapping for a Physical Memory Array. \r
1671/// One structure is present for each contiguous address range described.\r
1672///\r
61ce5861 1673typedef struct {\r
1674 SMBIOS_STRUCTURE Hdr;\r
1675 UINT32 StartingAddress;\r
1676 UINT32 EndingAddress;\r
1677 UINT16 MemoryArrayHandle;\r
1678 UINT8 PartitionWidth;\r
7ddba202
SZ		 1679 //\r
1680 // Add for smbios 2.7\r
1681 //\r
1682 UINT64 ExtendedStartingAddress;\r
1683 UINT64 ExtendedEndingAddress;\r
61ce5861 1684} SMBIOS_TABLE_TYPE19;\r
1685\r
4135253b 1686///\r
af2dc6a7 1687/// Memory Device Mapped Address (Type 20).\r
4135253b 1688///\r
98cb9ae8 1689/// This structure maps memory address space usually to a device-level granularity. \r
1690/// One structure is present for each contiguous address range described. \r
1691///\r
61ce5861 1692typedef struct {\r
1693 SMBIOS_STRUCTURE Hdr;\r
1694 UINT32 StartingAddress;\r
1695 UINT32 EndingAddress;\r
1696 UINT16 MemoryDeviceHandle;\r
1697 UINT16 MemoryArrayMappedAddressHandle;\r
1698 UINT8 PartitionRowPosition;\r
1699 UINT8 InterleavePosition;\r
1700 UINT8 InterleavedDataDepth;\r
7ddba202
SZ		 1701 //\r
1702 // Add for smbios 2.7\r
1703 //\r
1704 UINT64 ExtendedStartingAddress;\r
1705 UINT64 ExtendedEndingAddress;\r
61ce5861 1706} SMBIOS_TABLE_TYPE20;\r
1707\r
98cb9ae8 1708///\r
1709/// Built-in Pointing Device - Type\r
1710///\r
1711typedef enum {\r
1712 PointingDeviceTypeOther = 0x01,\r
1713 PointingDeviceTypeUnknown = 0x02,\r
1714 PointingDeviceTypeMouse = 0x03,\r
1715 PointingDeviceTypeTrackBall = 0x04,\r
1716 PointingDeviceTypeTrackPoint = 0x05,\r
1717 PointingDeviceTypeGlidePoint = 0x06,\r
1718 PointingDeviceTouchPad = 0x07,\r
1719 PointingDeviceTouchScreen = 0x08,\r
1720 PointingDeviceOpticalSensor = 0x09\r
1721} BUILTIN_POINTING_DEVICE_TYPE;\r
1722\r
1723///\r
af2dc6a7 1724/// Built-in Pointing Device - Interface.\r
98cb9ae8 1725///\r
1726typedef enum {\r
1727 PointingDeviceInterfaceOther = 0x01,\r
1728 PointingDeviceInterfaceUnknown = 0x02,\r
1729 PointingDeviceInterfaceSerial = 0x03,\r
1730 PointingDeviceInterfacePs2 = 0x04,\r
1731 PointingDeviceInterfaceInfrared = 0x05,\r
1732 PointingDeviceInterfaceHpHil = 0x06,\r
1733 PointingDeviceInterfaceBusMouse = 0x07,\r
1734 PointingDeviceInterfaceADB = 0x08,\r
1735 PointingDeviceInterfaceBusMouseDB9 = 0xA0,\r
1736 PointingDeviceInterfaceBusMouseMicroDin = 0xA1,\r
1737 PointingDeviceInterfaceUsb = 0xA2\r
1738} BUILTIN_POINTING_DEVICE_INTERFACE;\r
1739\r
4135253b 1740///\r
af2dc6a7 1741/// Built-in Pointing Device (Type 21).\r
4135253b 1742///\r
98cb9ae8 1743/// This structure describes the attributes of the built-in pointing device for the \r
af2dc6a7 1744/// system. The presence of this structure does not imply that the built-in\r
98cb9ae8 1745/// pointing device is active for the system's use! \r
1746///\r
61ce5861 1747typedef struct {\r
98cb9ae8 1748 SMBIOS_STRUCTURE Hdr;\r
af2dc6a7 1749 UINT8 Type; ///< The enumeration value from BUILTIN_POINTING_DEVICE_TYPE.\r
1750 UINT8 Interface; ///< The enumeration value from BUILTIN_POINTING_DEVICE_INTERFACE.\r
98cb9ae8 1751 UINT8 NumberOfButtons;\r
61ce5861 1752} SMBIOS_TABLE_TYPE21;\r
1753\r
98cb9ae8 1754///\r
1755/// Portable Battery - Device Chemistry\r
1756///\r
1757typedef enum { \r
1758 PortableBatteryDeviceChemistryOther = 0x01,\r
1759 PortableBatteryDeviceChemistryUnknown = 0x02,\r
1760 PortableBatteryDeviceChemistryLeadAcid = 0x03,\r
1761 PortableBatteryDeviceChemistryNickelCadmium = 0x04,\r
1762 PortableBatteryDeviceChemistryNickelMetalHydride = 0x05,\r
1763 PortableBatteryDeviceChemistryLithiumIon = 0x06,\r
1764 PortableBatteryDeviceChemistryZincAir = 0x07,\r
1765 PortableBatteryDeviceChemistryLithiumPolymer = 0x08\r
1766} PORTABLE_BATTERY_DEVICE_CHEMISTRY;\r
1767\r
4135253b 1768///\r
af2dc6a7 1769/// Portable Battery (Type 22).\r
4135253b 1770///\r
98cb9ae8 1771/// This structure describes the attributes of the portable battery(s) for the system. \r
1772/// The structure contains the static attributes for the group. Each structure describes \r
1f9f8414 1773/// a single battery pack's attributes.\r
98cb9ae8 1774///\r
61ce5861 1775typedef struct {\r
98cb9ae8 1776 SMBIOS_STRUCTURE Hdr;\r
1777 SMBIOS_TABLE_STRING Location;\r
1778 SMBIOS_TABLE_STRING Manufacturer;\r
1779 SMBIOS_TABLE_STRING ManufactureDate;\r
1780 SMBIOS_TABLE_STRING SerialNumber;\r
1781 SMBIOS_TABLE_STRING DeviceName;\r
af2dc6a7 1782 UINT8 DeviceChemistry; ///< The enumeration value from PORTABLE_BATTERY_DEVICE_CHEMISTRY.\r
98cb9ae8 1783 UINT16 DeviceCapacity;\r
1784 UINT16 DesignVoltage;\r
1785 SMBIOS_TABLE_STRING SBDSVersionNumber;\r
1786 UINT8 MaximumErrorInBatteryData;\r
1787 UINT16 SBDSSerialNumber;\r
1788 UINT16 SBDSManufactureDate;\r
1789 SMBIOS_TABLE_STRING SBDSDeviceChemistry;\r
1790 UINT8 DesignCapacityMultiplier;\r
1791 UINT32 OEMSpecific;\r
61ce5861 1792} SMBIOS_TABLE_TYPE22;\r
1793\r
4135253b 1794///\r
1795/// System Reset (Type 23)\r
1796///\r
98cb9ae8 1797/// This structure describes whether Automatic System Reset functions enabled (Status). \r
1798/// If the system has a watchdog Timer and the timer is not reset (Timer Reset)\r
1799/// before the Interval elapses, an automatic system reset will occur. The system will re-boot \r
1800/// according to the Boot Option. This function may repeat until the Limit is reached, at which time \r
1801/// the system will re-boot according to the Boot Option at Limit. \r
1802///\r
61ce5861 1803typedef struct {\r
1804 SMBIOS_STRUCTURE Hdr;\r
1805 UINT8 Capabilities;\r
1806 UINT16 ResetCount;\r
1807 UINT16 ResetLimit;\r
1808 UINT16 TimerInterval;\r
1809 UINT16 Timeout;\r
1810} SMBIOS_TABLE_TYPE23;\r
1811\r
4135253b 1812///\r
af2dc6a7 1813/// Hardware Security (Type 24).\r
4135253b 1814///\r
98cb9ae8 1815/// This structure describes the system-wide hardware security settings. \r
1816///\r
61ce5861 1817typedef struct {\r
1818 SMBIOS_STRUCTURE Hdr;\r
1819 UINT8 HardwareSecuritySettings;\r
1820} SMBIOS_TABLE_TYPE24;\r
1821\r
4135253b 1822///\r
af2dc6a7 1823/// System Power Controls (Type 25).\r
4135253b 1824///\r
98cb9ae8 1825/// This structure describes the attributes for controlling the main power supply to the system. \r
1826/// Software that interprets this structure uses the month, day, hour, minute, and second values \r
1827/// to determine the number of seconds until the next power-on of the system. The presence of \r
1828/// this structure implies that a timed power-on facility is available for the system. \r
1829///\r
61ce5861 1830typedef struct {\r
1831 SMBIOS_STRUCTURE Hdr;\r
1832 UINT8 NextScheduledPowerOnMonth;\r
1833 UINT8 NextScheduledPowerOnDayOfMonth;\r
1834 UINT8 NextScheduledPowerOnHour;\r
1835 UINT8 NextScheduledPowerOnMinute;\r
1836 UINT8 NextScheduledPowerOnSecond;\r
1837} SMBIOS_TABLE_TYPE25;\r
1838\r
98cb9ae8 1839///\r
af2dc6a7 1840/// Voltage Probe - Location and Status.\r
98cb9ae8 1841///\r
1842typedef struct {\r
1843 UINT8 VoltageProbeSite :5;\r
1844 UINT8 VoltageProbeStatus :3;\r
1845} MISC_VOLTAGE_PROBE_LOCATION;\r
1846\r
4135253b 1847///\r
1848/// Voltage Probe (Type 26)\r
1849///\r
98cb9ae8 1850/// This describes the attributes for a voltage probe in the system. \r
1851/// Each structure describes a single voltage probe.\r
1852///\r
61ce5861 1853typedef struct {\r
98cb9ae8 1854 SMBIOS_STRUCTURE Hdr;\r
1855 SMBIOS_TABLE_STRING Description;\r
1856 MISC_VOLTAGE_PROBE_LOCATION LocationAndStatus;\r
1857 UINT16 MaximumValue;\r
1858 UINT16 MinimumValue;\r
1859 UINT16 Resolution;\r
1860 UINT16 Tolerance;\r
1861 UINT16 Accuracy;\r
1862 UINT32 OEMDefined;\r
1863 UINT16 NominalValue;\r
61ce5861 1864} SMBIOS_TABLE_TYPE26;\r
1865\r
98cb9ae8 1866///\r
af2dc6a7 1867/// Cooling Device - Device Type and Status.\r
98cb9ae8 1868///\r
1869typedef struct {\r
1870 UINT8 CoolingDevice :5;\r
1871 UINT8 CoolingDeviceStatus :3;\r
1872} MISC_COOLING_DEVICE_TYPE;\r
1873\r
4135253b 1874///\r
1875/// Cooling Device (Type 27)\r
1876///\r
98cb9ae8 1877/// This structure describes the attributes for a cooling device in the system. \r
1878/// Each structure describes a single cooling device. \r
1879/// \r
61ce5861 1880typedef struct {\r
98cb9ae8 1881 SMBIOS_STRUCTURE Hdr;\r
1882 UINT16 TemperatureProbeHandle;\r
1883 MISC_COOLING_DEVICE_TYPE DeviceTypeAndStatus;\r
1884 UINT8 CoolingUnitGroup;\r
1885 UINT32 OEMDefined;\r
1886 UINT16 NominalSpeed;\r
7ddba202
SZ		 1887 //\r
1888 // Add for smbios 2.7\r
1889 //\r
1890 SMBIOS_TABLE_STRING Description;\r
61ce5861 1891} SMBIOS_TABLE_TYPE27;\r
1892\r
98cb9ae8 1893///\r
af2dc6a7 1894/// Temperature Probe - Location and Status.\r
98cb9ae8 1895///\r
1896typedef struct {\r
1897 UINT8 TemperatureProbeSite :5;\r
1898 UINT8 TemperatureProbeStatus :3;\r
1899} MISC_TEMPERATURE_PROBE_LOCATION;\r
1900\r
4135253b 1901///\r
af2dc6a7 1902/// Temperature Probe (Type 28).\r
4135253b 1903///\r
98cb9ae8 1904/// This structure describes the attributes for a temperature probe in the system. \r
1905/// Each structure describes a single temperature probe. \r
1906///\r
61ce5861 1907typedef struct {\r
98cb9ae8 1908 SMBIOS_STRUCTURE Hdr;\r
1909 SMBIOS_TABLE_STRING Description;\r
1910 MISC_TEMPERATURE_PROBE_LOCATION LocationAndStatus;\r
1911 UINT16 MaximumValue;\r
1912 UINT16 MinimumValue;\r
1913 UINT16 Resolution;\r
1914 UINT16 Tolerance;\r
1915 UINT16 Accuracy;\r
1916 UINT32 OEMDefined;\r
1917 UINT16 NominalValue;\r
61ce5861 1918} SMBIOS_TABLE_TYPE28;\r
1919\r
98cb9ae8 1920///\r
af2dc6a7 1921/// Electrical Current Probe - Location and Status.\r
98cb9ae8 1922///\r
1923typedef struct {\r
1924 UINT8 ElectricalCurrentProbeSite :5;\r
1925 UINT8 ElectricalCurrentProbeStatus :3;\r
1926} MISC_ELECTRICAL_CURRENT_PROBE_LOCATION;\r
1927\r
4135253b 1928///\r
af2dc6a7 1929/// Electrical Current Probe (Type 29).\r
4135253b 1930///\r
98cb9ae8 1931/// This structure describes the attributes for an electrical current probe in the system.\r
1932/// Each structure describes a single electrical current probe. \r
1933///\r
61ce5861 1934typedef struct {\r
98cb9ae8 1935 SMBIOS_STRUCTURE Hdr;\r
1936 SMBIOS_TABLE_STRING Description;\r
1937 MISC_ELECTRICAL_CURRENT_PROBE_LOCATION LocationAndStatus;\r
1938 UINT16 MaximumValue;\r
1939 UINT16 MinimumValue;\r
1940 UINT16 Resolution;\r
1941 UINT16 Tolerance;\r
1942 UINT16 Accuracy;\r
1943 UINT32 OEMDefined;\r
1944 UINT16 NominalValue;\r
61ce5861 1945} SMBIOS_TABLE_TYPE29;\r
1946\r
4135253b 1947///\r
af2dc6a7 1948/// Out-of-Band Remote Access (Type 30).\r
4135253b 1949///\r
98cb9ae8 1950/// This structure describes the attributes and policy settings of a hardware facility \r
1951/// that may be used to gain remote access to a hardware system when the operating system \r
1952/// is not available due to power-down status, hardware failures, or boot failures. \r
1953///\r
61ce5861 1954typedef struct {\r
1955 SMBIOS_STRUCTURE Hdr;\r
1956 SMBIOS_TABLE_STRING ManufacturerName;\r
1957 UINT8 Connections;\r
1958} SMBIOS_TABLE_TYPE30;\r
1959\r
4135253b 1960///\r
af2dc6a7 1961/// Boot Integrity Services (BIS) Entry Point (Type 31).\r
4135253b 1962///\r
98cb9ae8 1963/// Structure type 31 (decimal) is reserved for use by the Boot Integrity Services (BIS). \r
1964/// \r
61ce5861 1965typedef struct {\r
1966 SMBIOS_STRUCTURE Hdr;\r
1967 UINT8 Checksum;\r
1968 UINT8 Reserved1;\r
1969 UINT16 Reserved2;\r
1970 UINT32 BisEntry16;\r
1971 UINT32 BisEntry32;\r
1972 UINT64 Reserved3;\r
1973 UINT32 Reserved4;\r
1974} SMBIOS_TABLE_TYPE31;\r
1975\r
98cb9ae8 1976///\r
af2dc6a7 1977/// System Boot Information - System Boot Status.\r
98cb9ae8 1978///\r
1979typedef enum {\r
1980 BootInformationStatusNoError = 0x00,\r
1981 BootInformationStatusNoBootableMedia = 0x01,\r
1982 BootInformationStatusNormalOSFailedLoading = 0x02,\r
1983 BootInformationStatusFirmwareDetectedFailure = 0x03,\r
1984 BootInformationStatusOSDetectedFailure = 0x04,\r
1985 BootInformationStatusUserRequestedBoot = 0x05,\r
1986 BootInformationStatusSystemSecurityViolation = 0x06,\r
1987 BootInformationStatusPreviousRequestedImage = 0x07,\r
1988 BootInformationStatusWatchdogTimerExpired = 0x08,\r
1989 BootInformationStatusStartReserved = 0x09,\r
1990 BootInformationStatusStartOemSpecific = 0x80,\r
1991 BootInformationStatusStartProductSpecific = 0xC0\r
1992} MISC_BOOT_INFORMATION_STATUS_DATA_TYPE;\r
1993\r
4135253b 1994///\r
af2dc6a7 1995/// System Boot Information (Type 32).\r
4135253b 1996///\r
98cb9ae8 1997/// The client system firmware, e.g. BIOS, communicates the System Boot Status to the \r
1998/// client's Pre-boot Execution Environment (PXE) boot image or OS-present management \r
1999/// application via this structure. When used in the PXE environment, for example, \r
2000/// this code identifies the reason the PXE was initiated and can be used by boot-image \r
1f9f8414 2001/// software to further automate an enterprise's PXE sessions. For example, an enterprise \r
98cb9ae8 2002/// could choose to automatically download a hardware-diagnostic image to a client whose \r
2003/// reason code indicated either a firmware- or operating system-detected hardware failure.\r
2004///\r
61ce5861 2005typedef struct {\r
98cb9ae8 2006 SMBIOS_STRUCTURE Hdr;\r
2007 UINT8 Reserved[6];\r
af2dc6a7 2008 UINT8 BootStatus; ///< The enumeration value from MISC_BOOT_INFORMATION_STATUS_DATA_TYPE.\r
61ce5861 2009} SMBIOS_TABLE_TYPE32;\r
2010\r
4135253b 2011///\r
af2dc6a7 2012/// 64-bit Memory Error Information (Type 33).\r
4135253b 2013///\r
98cb9ae8 2014/// This structure describes an error within a Physical Memory Array, \r
2015/// when the error address is above 4G (0xFFFFFFFF).\r
2016/// \r
61ce5861 2017typedef struct {\r
98cb9ae8 2018 SMBIOS_STRUCTURE Hdr;\r
af2dc6a7 2019 UINT8 ErrorType; ///< The enumeration value from MEMORY_ERROR_TYPE.\r
2020 UINT8 ErrorGranularity; ///< The enumeration value from MEMORY_ERROR_GRANULARITY.\r
2021 UINT8 ErrorOperation; ///< The enumeration value from MEMORY_ERROR_OPERATION.\r
98cb9ae8 2022 UINT32 VendorSyndrome;\r
2023 UINT64 MemoryArrayErrorAddress;\r
2024 UINT64 DeviceErrorAddress;\r
2025 UINT32 ErrorResolution;\r
61ce5861 2026} SMBIOS_TABLE_TYPE33;\r
2027\r
98cb9ae8 2028///\r
af2dc6a7 2029/// Management Device - Type. \r
98cb9ae8 2030///\r
2031typedef enum {\r
2032 ManagementDeviceTypeOther = 0x01,\r
2033 ManagementDeviceTypeUnknown = 0x02,\r
2034 ManagementDeviceTypeLm75 = 0x03,\r
2035 ManagementDeviceTypeLm78 = 0x04,\r
2036 ManagementDeviceTypeLm79 = 0x05,\r
2037 ManagementDeviceTypeLm80 = 0x06,\r
2038 ManagementDeviceTypeLm81 = 0x07,\r
2039 ManagementDeviceTypeAdm9240 = 0x08,\r
2040 ManagementDeviceTypeDs1780 = 0x09,\r
2041 ManagementDeviceTypeMaxim1617 = 0x0A,\r
2042 ManagementDeviceTypeGl518Sm = 0x0B,\r
2043 ManagementDeviceTypeW83781D = 0x0C,\r
2044 ManagementDeviceTypeHt82H791 = 0x0D\r
2045} MISC_MANAGEMENT_DEVICE_TYPE;\r
2046\r
2047///\r
af2dc6a7 2048/// Management Device - Address Type. \r
98cb9ae8 2049///\r
2050typedef enum {\r
2051 ManagementDeviceAddressTypeOther = 0x01,\r
2052 ManagementDeviceAddressTypeUnknown = 0x02,\r
2053 ManagementDeviceAddressTypeIOPort = 0x03,\r
2054 ManagementDeviceAddressTypeMemory = 0x04,\r
2055 ManagementDeviceAddressTypeSmbus = 0x05\r
2056} MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE;\r
2057\r
4135253b 2058///\r
af2dc6a7 2059/// Management Device (Type 34).\r
4135253b 2060///\r
98cb9ae8 2061/// The information in this structure defines the attributes of a Management Device. \r
2062/// A Management Device might control one or more fans or voltage, current, or temperature\r
2063/// probes as defined by one or more Management Device Component structures.\r
2064///\r
61ce5861 2065typedef struct {\r
98cb9ae8 2066 SMBIOS_STRUCTURE Hdr;\r
2067 SMBIOS_TABLE_STRING Description;\r
af2dc6a7 2068 UINT8 Type; ///< The enumeration value from MISC_MANAGEMENT_DEVICE_TYPE.\r
98cb9ae8 2069 UINT32 Address;\r
af2dc6a7 2070 UINT8 AddressType; ///< The enumeration value from MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE.\r
61ce5861 2071} SMBIOS_TABLE_TYPE34;\r
2072\r
4135253b 2073///\r
2074/// Management Device Component (Type 35)\r
2075///\r
98cb9ae8 2076/// This structure associates a cooling device or environmental probe with structures \r
2077/// that define the controlling hardware device and (optionally) the component's thresholds. \r
2078///\r
61ce5861 2079typedef struct {\r
2080 SMBIOS_STRUCTURE Hdr;\r
2081 SMBIOS_TABLE_STRING Description;\r
2082 UINT16 ManagementDeviceHandle;\r
2083 UINT16 ComponentHandle;\r
2084 UINT16 ThresholdHandle;\r
2085} SMBIOS_TABLE_TYPE35;\r
2086\r
4135253b 2087///\r
af2dc6a7 2088/// Management Device Threshold Data (Type 36).\r
4135253b 2089///\r
98cb9ae8 2090/// The information in this structure defines threshold information for \r
2091/// a component (probe or cooling-unit) contained within a Management Device. \r
2092///\r
61ce5861 2093typedef struct {\r
2094 SMBIOS_STRUCTURE Hdr;\r
2095 UINT16 LowerThresholdNonCritical;\r
2096 UINT16 UpperThresholdNonCritical;\r
2097 UINT16 LowerThresholdCritical;\r
2098 UINT16 UpperThresholdCritical;\r
2099 UINT16 LowerThresholdNonRecoverable;\r
2100 UINT16 UpperThresholdNonRecoverable;\r
2101} SMBIOS_TABLE_TYPE36;\r
2102\r
bf7ea009 2103///\r
af2dc6a7 2104/// Memory Channel Entry.\r
bf7ea009 2105///\r
61ce5861 2106typedef struct {\r
2107 UINT8 DeviceLoad;\r
2108 UINT16 DeviceHandle;\r
2109} MEMORY_DEVICE;\r
2110\r
98cb9ae8 2111///\r
af2dc6a7 2112/// Memory Channel - Channel Type.\r
98cb9ae8 2113///\r
2114typedef enum {\r
2115 MemoryChannelTypeOther = 0x01,\r
2116 MemoryChannelTypeUnknown = 0x02,\r
2117 MemoryChannelTypeRambus = 0x03,\r
2118 MemoryChannelTypeSyncLink = 0x04\r
2119} MEMORY_CHANNEL_TYPE;\r
2120\r
4135253b 2121///\r
2122/// Memory Channel (Type 37)\r
2123///\r
98cb9ae8 2124/// The information in this structure provides the correlation between a Memory Channel\r
af2dc6a7 2125/// and its associated Memory Devices. Each device presents one or more loads to the channel. \r
2126/// The sum of all device loads cannot exceed the channel's defined maximum.\r
98cb9ae8 2127///\r
61ce5861 2128typedef struct {\r
2129 SMBIOS_STRUCTURE Hdr;\r
2130 UINT8 ChannelType;\r
2131 UINT8 MaximumChannelLoad;\r
2132 UINT8 MemoryDeviceCount;\r
2133 MEMORY_DEVICE MemoryDevice[1];\r
2134} SMBIOS_TABLE_TYPE37;\r
2135\r
98cb9ae8 2136///\r
2137/// IPMI Device Information - BMC Interface Type\r
2138///\r
2139typedef enum {\r
2140 IPMIDeviceInfoInterfaceTypeUnknown = 0x00,\r
af2dc6a7 2141 IPMIDeviceInfoInterfaceTypeKCS = 0x01, ///< The Keyboard Controller Style.\r
2142 IPMIDeviceInfoInterfaceTypeSMIC = 0x02, ///< The Server Management Interface Chip.\r
2143 IPMIDeviceInfoInterfaceTypeBT = 0x03, ///< The Block Transfer\r
98cb9ae8 2144 IPMIDeviceInfoInterfaceTypeReserved = 0x04\r
2145} BMC_INTERFACE_TYPE;\r
2146\r
4135253b 2147///\r
af2dc6a7 2148/// IPMI Device Information (Type 38).\r
4135253b 2149///\r
7ddba202 2150/// The information in this structure defines the attributes of an\r
98cb9ae8 2151/// Intelligent Platform Management Interface (IPMI) Baseboard Management Controller (BMC).\r
7ddba202
SZ		 2152///\r
2153/// The Type 42 structure can also be used to describe a physical management controller\r
2154/// host interface and one or more protocols that share that interface. If IPMI is not\r
2155/// shared with other protocols, either the Type 38 or Type 42 structures can be used.\r
2156/// Providing Type 38 is recommended for backward compatibility.\r
2157///\r
61ce5861 2158typedef struct {\r
2159 SMBIOS_STRUCTURE Hdr;\r
af2dc6a7 2160 UINT8 InterfaceType; ///< The enumeration value from BMC_INTERFACE_TYPE.\r
61ce5861 2161 UINT8 IPMISpecificationRevision;\r
2162 UINT8 I2CSlaveAddress;\r
2163 UINT8 NVStorageDeviceAddress;\r
2164 UINT64 BaseAddress;\r
2165 UINT8 BaseAddressModifier_InterruptInfo;\r
2166 UINT8 InterruptNumber;\r
2167} SMBIOS_TABLE_TYPE38;\r
2168\r
98cb9ae8 2169///\r
af2dc6a7 2170/// System Power Supply - Power Supply Characteristics.\r
98cb9ae8 2171///\r
2172typedef struct {\r
2173 UINT16 PowerSupplyHotReplaceable:1;\r
2174 UINT16 PowerSupplyPresent :1;\r
2175 UINT16 PowerSupplyUnplugged :1;\r
2176 UINT16 InputVoltageRangeSwitch :4;\r
2177 UINT16 PowerSupplyStatus :3;\r
2178 UINT16 PowerSupplyType :4;\r
2179 UINT16 Reserved :2;\r
2180} SYS_POWER_SUPPLY_CHARACTERISTICS;\r
2181\r
4135253b 2182///\r
af2dc6a7 2183/// System Power Supply (Type 39).\r
4135253b 2184///\r
7ddba202
SZ		 2185/// This structure identifies attributes of a system power supply. One instance\r
2186/// of this record is present for each possible power supply in a system.\r
98cb9ae8 2187///\r
61ce5861 2188typedef struct {\r
98cb9ae8 2189 SMBIOS_STRUCTURE Hdr;\r
2190 UINT8 PowerUnitGroup;\r
2191 SMBIOS_TABLE_STRING Location;\r
2192 SMBIOS_TABLE_STRING DeviceName;\r
2193 SMBIOS_TABLE_STRING Manufacturer;\r
2194 SMBIOS_TABLE_STRING SerialNumber;\r
2195 SMBIOS_TABLE_STRING AssetTagNumber;\r
2196 SMBIOS_TABLE_STRING ModelPartNumber;\r
2197 SMBIOS_TABLE_STRING RevisionLevel;\r
2198 UINT16 MaxPowerCapacity;\r
2199 SYS_POWER_SUPPLY_CHARACTERISTICS PowerSupplyCharacteristics;\r
2200 UINT16 InputVoltageProbeHandle;\r
2201 UINT16 CoolingDeviceHandle;\r
2202 UINT16 InputCurrentProbeHandle;\r
61ce5861 2203} SMBIOS_TABLE_TYPE39;\r
2204\r
bf7ea009 2205///\r
af2dc6a7 2206/// Additional Information Entry Format. \r
bf7ea009 2207///\r
61ce5861 2208typedef struct { \r
2209 UINT8 EntryLength; \r
2210 UINT16 ReferencedHandle;\r
2211 UINT8 ReferencedOffset;\r
2212 SMBIOS_TABLE_STRING EntryString;\r
2213 UINT8 Value[1];\r
2214}ADDITIONAL_INFORMATION_ENTRY;\r
2215\r
4135253b 2216///\r
af2dc6a7 2217/// Additional Information (Type 40).\r
4135253b 2218///\r
98cb9ae8 2219/// This structure is intended to provide additional information for handling unspecified \r
2220/// enumerated values and interim field updates in another structure. \r
2221///\r
61ce5861 2222typedef struct {\r
2223 SMBIOS_STRUCTURE Hdr;\r
2224 UINT8 NumberOfAdditionalInformationEntries;\r
2225 ADDITIONAL_INFORMATION_ENTRY AdditionalInfoEntries[1]; \r
2226} SMBIOS_TABLE_TYPE40;\r
2227\r
98cb9ae8 2228///\r
af2dc6a7 2229/// Onboard Devices Extended Information - Onboard Device Types.\r
98cb9ae8 2230///\r
2231typedef enum{\r
2232 OnBoardDeviceExtendedTypeOther = 0x01,\r
2233 OnBoardDeviceExtendedTypeUnknown = 0x02,\r
2234 OnBoardDeviceExtendedTypeVideo = 0x03,\r
2235 OnBoardDeviceExtendedTypeScsiController = 0x04,\r
2236 OnBoardDeviceExtendedTypeEthernet = 0x05,\r
2237 OnBoardDeviceExtendedTypeTokenRing = 0x06,\r
2238 OnBoardDeviceExtendedTypeSound = 0x07,\r
2239 OnBoardDeviceExtendedTypePATAController = 0x08,\r
2240 OnBoardDeviceExtendedTypeSATAController = 0x09,\r
2241 OnBoardDeviceExtendedTypeSASController = 0x0A\r
2242} ONBOARD_DEVICE_EXTENDED_INFO_TYPE;\r
2243\r
4135253b 2244///\r
af2dc6a7 2245/// Onboard Devices Extended Information (Type 41).\r
4135253b 2246///\r
98cb9ae8 2247/// The information in this structure defines the attributes of devices that \r
2248/// are onboard (soldered onto) a system element, usually the baseboard. \r
2249/// In general, an entry in this table implies that the BIOS has some level of \r
2250/// control over the enabling of the associated device for use by the system. \r
2251///\r
61ce5861 2252typedef struct {\r
98cb9ae8 2253 SMBIOS_STRUCTURE Hdr;\r
2254 SMBIOS_TABLE_STRING ReferenceDesignation;\r
af2dc6a7 2255 UINT8 DeviceType; ///< The enumeration value from ONBOARD_DEVICE_EXTENDED_INFO_TYPE\r
98cb9ae8 2256 UINT8 DeviceTypeInstance;\r
2257 UINT16 SegmentGroupNum;\r
2258 UINT8 BusNum;\r
7ddba202 2259 UINT8 DevFuncNum;\r
61ce5861 2260} SMBIOS_TABLE_TYPE41;\r
2261\r
7ddba202
SZ		 2262///\r
2263/// Management Controller Host Interface (Type 42).\r
2264///\r
2265/// The information in this structure defines the attributes of a Management\r
2266/// Controller Host Interface that is not discoverable by "Plug and Play" mechanisms.\r
2267///\r
2268/// Type 42 should be used for management controller host interfaces that use protocols\r
2269/// other than IPMI or that use multiple protocols on a single host interface type.\r
2270///\r
2271/// This structure should also be provided if IPMI is shared with other protocols\r
2272/// over the same interface hardware. If IPMI is not shared with other protocols,\r
2273/// either the Type 38 or Type 42 structures can be used. Providing Type 38 is\r
2274/// recommended for backward compatibility. The structures are not required to\r
2275/// be mutually exclusive. Type 38 and Type 42 structures may be implemented\r
2276/// simultaneously to provide backward compatibility with IPMI applications or drivers\r
2277/// that do not yet recognize the Type 42 structure.\r
2278///\r
2279typedef struct {\r
2280 SMBIOS_STRUCTURE Hdr;\r
2281 UINT8 InterfaceType;\r
2282 UINT8 MCHostInterfaceData[1]; ///< This field has a minimum of four bytes\r
2283} SMBIOS_TABLE_TYPE42;\r
2284\r
4135253b 2285///\r
2286/// Inactive (Type 126)\r
2287///\r
61ce5861 2288typedef struct {\r
2289 SMBIOS_STRUCTURE Hdr;\r
2290} SMBIOS_TABLE_TYPE126;\r
2291\r
4135253b 2292///\r
2293/// End-of-Table (Type 127)\r
2294///\r
61ce5861 2295typedef struct {\r
2296 SMBIOS_STRUCTURE Hdr;\r
2297} SMBIOS_TABLE_TYPE127;\r
2298\r
4135253b 2299///\r
af2dc6a7 2300/// Union of all the possible SMBIOS record types.\r
4135253b 2301///\r
61ce5861 2302typedef union {\r
2303 SMBIOS_STRUCTURE *Hdr;\r
2304 SMBIOS_TABLE_TYPE0 *Type0;\r
2305 SMBIOS_TABLE_TYPE1 *Type1;\r
2306 SMBIOS_TABLE_TYPE2 *Type2;\r
2307 SMBIOS_TABLE_TYPE3 *Type3;\r
2308 SMBIOS_TABLE_TYPE4 *Type4;\r
2309 SMBIOS_TABLE_TYPE5 *Type5;\r
2310 SMBIOS_TABLE_TYPE6 *Type6;\r
2311 SMBIOS_TABLE_TYPE7 *Type7;\r
2312 SMBIOS_TABLE_TYPE8 *Type8;\r
2313 SMBIOS_TABLE_TYPE9 *Type9;\r
2314 SMBIOS_TABLE_TYPE10 *Type10;\r
2315 SMBIOS_TABLE_TYPE11 *Type11;\r
2316 SMBIOS_TABLE_TYPE12 *Type12;\r
2317 SMBIOS_TABLE_TYPE13 *Type13;\r
2318 SMBIOS_TABLE_TYPE14 *Type14;\r
2319 SMBIOS_TABLE_TYPE15 *Type15;\r
2320 SMBIOS_TABLE_TYPE16 *Type16;\r
2321 SMBIOS_TABLE_TYPE17 *Type17;\r
2322 SMBIOS_TABLE_TYPE18 *Type18;\r
2323 SMBIOS_TABLE_TYPE19 *Type19;\r
2324 SMBIOS_TABLE_TYPE20 *Type20;\r
2325 SMBIOS_TABLE_TYPE21 *Type21;\r
2326 SMBIOS_TABLE_TYPE22 *Type22;\r
2327 SMBIOS_TABLE_TYPE23 *Type23;\r
2328 SMBIOS_TABLE_TYPE24 *Type24;\r
2329 SMBIOS_TABLE_TYPE25 *Type25;\r
2330 SMBIOS_TABLE_TYPE26 *Type26;\r
2331 SMBIOS_TABLE_TYPE27 *Type27;\r
2332 SMBIOS_TABLE_TYPE28 *Type28;\r
2333 SMBIOS_TABLE_TYPE29 *Type29;\r
2334 SMBIOS_TABLE_TYPE30 *Type30;\r
2335 SMBIOS_TABLE_TYPE31 *Type31;\r
2336 SMBIOS_TABLE_TYPE32 *Type32;\r
2337 SMBIOS_TABLE_TYPE33 *Type33;\r
2338 SMBIOS_TABLE_TYPE34 *Type34;\r
2339 SMBIOS_TABLE_TYPE35 *Type35;\r
2340 SMBIOS_TABLE_TYPE36 *Type36;\r
2341 SMBIOS_TABLE_TYPE37 *Type37;\r
2342 SMBIOS_TABLE_TYPE38 *Type38;\r
2343 SMBIOS_TABLE_TYPE39 *Type39;\r
2344 SMBIOS_TABLE_TYPE40 *Type40;\r
2345 SMBIOS_TABLE_TYPE41 *Type41;\r
884f9295 2346 SMBIOS_TABLE_TYPE42 *Type42;\r
61ce5861 2347 SMBIOS_TABLE_TYPE126 *Type126;\r
2348 SMBIOS_TABLE_TYPE127 *Type127;\r
2349 UINT8 *Raw;\r
2350} SMBIOS_STRUCTURE_POINTER;\r
2351\r
766f4bc1 2352#pragma pack()\r
2353\r
a7ed1e2e 2354#endif\r
EFI Development Kit II mirror for PVE