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a7ed1e2e 1/** @file\r
28eeb08d 2 Industry Standard Definitions of SMBIOS Table Specification v3.5.0.\r
a7ed1e2e 3\r
782d0187 4Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.<BR>\r
713e4b00 5(C) Copyright 2015-2017 Hewlett Packard Enterprise Development LP<BR>\r
f06c92a6 6(C) Copyright 2015 - 2019 Hewlett Packard Enterprise Development LP<BR>\r
28eeb08d 7Copyright (c) 2022, AMD Incorporated. All rights reserved.<BR>\r
9344f092 8SPDX-License-Identifier: BSD-2-Clause-Patent\r
a7ed1e2e 9\r
a7ed1e2e 10**/\r
11\r
12#ifndef __SMBIOS_STANDARD_H__\r
13#define __SMBIOS_STANDARD_H__\r
98cb9ae8 14\r
f2d0889f 15///\r
16/// Reference SMBIOS 2.6, chapter 3.1.2.\r
17/// For v2.1 and later, handle values in the range 0FF00h to 0FFFFh are reserved for\r
18/// use by this specification.\r
19///\r
2f88bd3a 20#define SMBIOS_HANDLE_RESERVED_BEGIN 0xFF00\r
f2d0889f 21\r
7ddba202
SZ		 22///\r
23/// Reference SMBIOS 2.7, chapter 6.1.2.\r
24/// The UEFI Platform Initialization Specification reserves handle number FFFEh for its\r
25/// EFI_SMBIOS_PROTOCOL.Add() function to mean "assign an unused handle number automatically."\r
26/// This number is not used for any other purpose by the SMBIOS specification.\r
27///\r
2f88bd3a 28#define SMBIOS_HANDLE_PI_RESERVED 0xFFFE\r
7ddba202 29\r
f2d0889f 30///\r
af2dc6a7 31/// Reference SMBIOS 2.6, chapter 3.1.3.\r
32/// Each text string is limited to 64 significant characters due to system MIF limitations.\r
7ddba202
SZ		 33/// Reference SMBIOS 2.7, chapter 6.1.3.\r
34/// It will have no limit on the length of each individual text string.\r
f2d0889f 35///\r
2f88bd3a 36#define SMBIOS_STRING_MAX_LENGTH 64\r
f2d0889f 37\r
7254d134
JY		 38//\r
39// The length of the entire structure table (including all strings) must be reported\r
40// in the Structure Table Length field of the SMBIOS Structure Table Entry Point,\r
41// which is a WORD field limited to 65,535 bytes.\r
42//\r
2f88bd3a 43#define SMBIOS_TABLE_MAX_LENGTH 0xFFFF\r
7254d134
JY		 44\r
45//\r
46// For SMBIOS 3.0, Structure table maximum size in Entry Point structure is DWORD field limited to 0xFFFFFFFF bytes.\r
47//\r
2f88bd3a 48#define SMBIOS_3_0_TABLE_MAX_LENGTH 0xFFFFFFFF\r
7254d134 49\r
bb7051eb 50//\r
f06c92a6 51// SMBIOS type macros which is according to SMBIOS 3.3.0 specification.\r
bb7051eb 52//\r
2f88bd3a
MK		 53#define SMBIOS_TYPE_BIOS_INFORMATION 0\r
54#define SMBIOS_TYPE_SYSTEM_INFORMATION 1\r
55#define SMBIOS_TYPE_BASEBOARD_INFORMATION 2\r
56#define SMBIOS_TYPE_SYSTEM_ENCLOSURE 3\r
57#define SMBIOS_TYPE_PROCESSOR_INFORMATION 4\r
58#define SMBIOS_TYPE_MEMORY_CONTROLLER_INFORMATION 5\r
59#define SMBIOS_TYPE_MEMORY_MODULE_INFORMATON 6\r
60#define SMBIOS_TYPE_CACHE_INFORMATION 7\r
61#define SMBIOS_TYPE_PORT_CONNECTOR_INFORMATION 8\r
62#define SMBIOS_TYPE_SYSTEM_SLOTS 9\r
63#define SMBIOS_TYPE_ONBOARD_DEVICE_INFORMATION 10\r
64#define SMBIOS_TYPE_OEM_STRINGS 11\r
65#define SMBIOS_TYPE_SYSTEM_CONFIGURATION_OPTIONS 12\r
66#define SMBIOS_TYPE_BIOS_LANGUAGE_INFORMATION 13\r
67#define SMBIOS_TYPE_GROUP_ASSOCIATIONS 14\r
68#define SMBIOS_TYPE_SYSTEM_EVENT_LOG 15\r
69#define SMBIOS_TYPE_PHYSICAL_MEMORY_ARRAY 16\r
70#define SMBIOS_TYPE_MEMORY_DEVICE 17\r
71#define SMBIOS_TYPE_32BIT_MEMORY_ERROR_INFORMATION 18\r
72#define SMBIOS_TYPE_MEMORY_ARRAY_MAPPED_ADDRESS 19\r
73#define SMBIOS_TYPE_MEMORY_DEVICE_MAPPED_ADDRESS 20\r
74#define SMBIOS_TYPE_BUILT_IN_POINTING_DEVICE 21\r
75#define SMBIOS_TYPE_PORTABLE_BATTERY 22\r
76#define SMBIOS_TYPE_SYSTEM_RESET 23\r
77#define SMBIOS_TYPE_HARDWARE_SECURITY 24\r
78#define SMBIOS_TYPE_SYSTEM_POWER_CONTROLS 25\r
79#define SMBIOS_TYPE_VOLTAGE_PROBE 26\r
80#define SMBIOS_TYPE_COOLING_DEVICE 27\r
81#define SMBIOS_TYPE_TEMPERATURE_PROBE 28\r
82#define SMBIOS_TYPE_ELECTRICAL_CURRENT_PROBE 29\r
83#define SMBIOS_TYPE_OUT_OF_BAND_REMOTE_ACCESS 30\r
84#define SMBIOS_TYPE_BOOT_INTEGRITY_SERVICE 31\r
85#define SMBIOS_TYPE_SYSTEM_BOOT_INFORMATION 32\r
86#define SMBIOS_TYPE_64BIT_MEMORY_ERROR_INFORMATION 33\r
87#define SMBIOS_TYPE_MANAGEMENT_DEVICE 34\r
88#define SMBIOS_TYPE_MANAGEMENT_DEVICE_COMPONENT 35\r
89#define SMBIOS_TYPE_MANAGEMENT_DEVICE_THRESHOLD_DATA 36\r
90#define SMBIOS_TYPE_MEMORY_CHANNEL 37\r
91#define SMBIOS_TYPE_IPMI_DEVICE_INFORMATION 38\r
92#define SMBIOS_TYPE_SYSTEM_POWER_SUPPLY 39\r
93#define SMBIOS_TYPE_ADDITIONAL_INFORMATION 40\r
94#define SMBIOS_TYPE_ONBOARD_DEVICES_EXTENDED_INFORMATION 41\r
95#define SMBIOS_TYPE_MANAGEMENT_CONTROLLER_HOST_INTERFACE 42\r
96#define SMBIOS_TYPE_TPM_DEVICE 43\r
97#define SMBIOS_TYPE_PROCESSOR_ADDITIONAL_INFORMATION 44\r
28eeb08d
ALA		 98#define SMBIOS_TYPE_FIRMWARE_INVENTORY_INFORMATION 45\r
99#define SMBIOS_TYPE_STRING_PROPERTY_INFORMATION 46\r
bb7051eb 100\r
f2d0889f 101///\r
102/// Inactive type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter 3.3.43.\r
9095d37b 103/// Upper-level software that interprets the SMBIOS structure-table should bypass an\r
f2d0889f 104/// Inactive structure just like a structure type that the software does not recognize.\r
105///\r
2f88bd3a 106#define SMBIOS_TYPE_INACTIVE 0x007E\r
f2d0889f 107\r
108///\r
109/// End-of-table type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter 3.3.44.\r
110/// The end-of-table indicator is used in the last physical structure in a table\r
111///\r
2f88bd3a 112#define SMBIOS_TYPE_END_OF_TABLE 0x007F\r
f2d0889f 113\r
2f88bd3a
MK		 114#define SMBIOS_OEM_BEGIN 128\r
115#define SMBIOS_OEM_END 255\r
bb7051eb
MH		 116\r
117///\r
118/// Types 0 through 127 (7Fh) are reserved for and defined by this\r
9095d37b 119/// specification. Types 128 through 256 (80h to FFh) are available for system- and OEM-specific information.\r
bb7051eb 120///\r
2f88bd3a 121typedef UINT8 SMBIOS_TYPE;\r
bb7051eb
MH		 122\r
123///\r
124/// Specifies the structure's handle, a unique 16-bit number in the range 0 to 0FFFEh (for version\r
125/// 2.0) or 0 to 0FEFFh (for version 2.1 and later). The handle can be used with the Get SMBIOS\r
126/// Structure function to retrieve a specific structure; the handle numbers are not required to be\r
127/// contiguous. For v2.1 and later, handle values in the range 0FF00h to 0FFFFh are reserved for\r
128/// use by this specification.\r
129/// If the system configuration changes, a previously assigned handle might no longer exist.\r
130/// However once a handle has been assigned by the BIOS, the BIOS cannot re-assign that handle\r
131/// number to another structure.\r
132///\r
133typedef UINT16 SMBIOS_HANDLE;\r
134\r
4135253b 135///\r
af2dc6a7 136/// Smbios Table Entry Point Structure.\r
4135253b 137///\r
766f4bc1 138#pragma pack(1)\r
a7ed1e2e 139typedef struct {\r
2f88bd3a
MK		 140 UINT8 AnchorString[4];\r
141 UINT8 EntryPointStructureChecksum;\r
142 UINT8 EntryPointLength;\r
143 UINT8 MajorVersion;\r
144 UINT8 MinorVersion;\r
145 UINT16 MaxStructureSize;\r
146 UINT8 EntryPointRevision;\r
147 UINT8 FormattedArea[5];\r
148 UINT8 IntermediateAnchorString[5];\r
149 UINT8 IntermediateChecksum;\r
150 UINT16 TableLength;\r
151 UINT32 TableAddress;\r
152 UINT16 NumberOfSmbiosStructures;\r
153 UINT8 SmbiosBcdRevision;\r
a7ed1e2e 154} SMBIOS_TABLE_ENTRY_POINT;\r
155\r
6cd35c62 156typedef struct {\r
2f88bd3a
MK		 157 UINT8 AnchorString[5];\r
158 UINT8 EntryPointStructureChecksum;\r
159 UINT8 EntryPointLength;\r
160 UINT8 MajorVersion;\r
161 UINT8 MinorVersion;\r
162 UINT8 DocRev;\r
163 UINT8 EntryPointRevision;\r
164 UINT8 Reserved;\r
165 UINT32 TableMaximumSize;\r
166 UINT64 TableAddress;\r
6cd35c62
EL		 167} SMBIOS_TABLE_3_0_ENTRY_POINT;\r
168\r
ec8432e5 169///\r
af2dc6a7 170/// The Smbios structure header.\r
ec8432e5 171///\r
a7ed1e2e 172typedef struct {\r
2f88bd3a
MK		 173 SMBIOS_TYPE Type;\r
174 UINT8 Length;\r
175 SMBIOS_HANDLE Handle;\r
a7ed1e2e 176} SMBIOS_STRUCTURE;\r
177\r
bf7ea009 178///\r
bb7051eb
MH		 179/// Text strings associated with a given SMBIOS structure are returned in the dmiStrucBuffer, appended directly after\r
180/// the formatted portion of the structure. This method of returning string information eliminates the need for\r
181/// application software to deal with pointers embedded in the SMBIOS structure. Each string is terminated with a null\r
182/// (00h) BYTE and the set of strings is terminated with an additional null (00h) BYTE. When the formatted portion of\r
183/// a SMBIOS structure references a string, it does so by specifying a non-zero string number within the structure's\r
184/// string-set. For example, if a string field contains 02h, it references the second string following the formatted portion\r
185/// of the SMBIOS structure. If a string field references no string, a null (0) is placed in that string field. If the\r
186/// formatted portion of the structure contains string-reference fields and all the string fields are set to 0 (no string\r
187/// references), the formatted section of the structure is followed by two null (00h) BYTES.\r
bf7ea009 188///\r
61ce5861 189typedef UINT8 SMBIOS_TABLE_STRING;\r
190\r
98cb9ae8 191///\r
7ddba202
SZ		 192/// BIOS Characteristics\r
193/// Defines which functions the BIOS supports. PCI, PCMCIA, Flash, etc.\r
98cb9ae8 194///\r
195typedef struct {\r
2f88bd3a
MK		 196 UINT32 Reserved : 2; ///< Bits 0-1.\r
197 UINT32 Unknown : 1;\r
198 UINT32 BiosCharacteristicsNotSupported : 1;\r
199 UINT32 IsaIsSupported : 1;\r
200 UINT32 McaIsSupported : 1;\r
201 UINT32 EisaIsSupported : 1;\r
202 UINT32 PciIsSupported : 1;\r
203 UINT32 PcmciaIsSupported : 1;\r
204 UINT32 PlugAndPlayIsSupported : 1;\r
205 UINT32 ApmIsSupported : 1;\r
206 UINT32 BiosIsUpgradable : 1;\r
207 UINT32 BiosShadowingAllowed : 1;\r
208 UINT32 VlVesaIsSupported : 1;\r
209 UINT32 EscdSupportIsAvailable : 1;\r
210 UINT32 BootFromCdIsSupported : 1;\r
211 UINT32 SelectableBootIsSupported : 1;\r
212 UINT32 RomBiosIsSocketed : 1;\r
213 UINT32 BootFromPcmciaIsSupported : 1;\r
214 UINT32 EDDSpecificationIsSupported : 1;\r
215 UINT32 JapaneseNecFloppyIsSupported : 1;\r
216 UINT32 JapaneseToshibaFloppyIsSupported : 1;\r
217 UINT32 Floppy525_360IsSupported : 1;\r
218 UINT32 Floppy525_12IsSupported : 1;\r
219 UINT32 Floppy35_720IsSupported : 1;\r
220 UINT32 Floppy35_288IsSupported : 1;\r
221 UINT32 PrintScreenIsSupported : 1;\r
222 UINT32 Keyboard8042IsSupported : 1;\r
223 UINT32 SerialIsSupported : 1;\r
224 UINT32 PrinterIsSupported : 1;\r
225 UINT32 CgaMonoIsSupported : 1;\r
226 UINT32 NecPc98 : 1;\r
227 UINT32 ReservedForVendor : 32; ///< Bits 32-63. Bits 32-47 reserved for BIOS vendor\r
228 ///< and bits 48-63 reserved for System Vendor.\r
98cb9ae8 229} MISC_BIOS_CHARACTERISTICS;\r
230\r
231///\r
7ddba202
SZ		 232/// BIOS Characteristics Extension Byte 1.\r
233/// This information, available for SMBIOS version 2.1 and later, appears at offset 12h\r
234/// within the BIOS Information structure.\r
98cb9ae8 235///\r
236typedef struct {\r
2f88bd3a
MK		 237 UINT8 AcpiIsSupported : 1;\r
238 UINT8 UsbLegacyIsSupported : 1;\r
239 UINT8 AgpIsSupported : 1;\r
240 UINT8 I2OBootIsSupported : 1;\r
241 UINT8 Ls120BootIsSupported : 1;\r
242 UINT8 AtapiZipDriveBootIsSupported : 1;\r
243 UINT8 Boot1394IsSupported : 1;\r
244 UINT8 SmartBatteryIsSupported : 1;\r
98cb9ae8 245} MBCE_BIOS_RESERVED;\r
246\r
247///\r
af2dc6a7 248/// BIOS Characteristics Extension Byte 2.\r
7ddba202 249/// This information, available for SMBIOS version 2.3 and later, appears at offset 13h\r
98cb9ae8 250/// within the BIOS Information structure.\r
251///\r
252typedef struct {\r
2f88bd3a
MK		 253 UINT8 BiosBootSpecIsSupported : 1;\r
254 UINT8 FunctionKeyNetworkBootIsSupported : 1;\r
255 UINT8 TargetContentDistributionEnabled : 1;\r
256 UINT8 UefiSpecificationSupported : 1;\r
257 UINT8 VirtualMachineSupported : 1;\r
28eeb08d
ALA		 258 UINT8 ManufacturingModeSupported : 1;\r
259 UINT8 ManufacturingModeEnabled : 1;\r
260 UINT8 ExtensionByte2Reserved : 1;\r
98cb9ae8 261} MBCE_SYSTEM_RESERVED;\r
262\r
263///\r
af2dc6a7 264/// BIOS Characteristics Extension Bytes.\r
98cb9ae8 265///\r
266typedef struct {\r
2f88bd3a
MK		 267 MBCE_BIOS_RESERVED BiosReserved;\r
268 MBCE_SYSTEM_RESERVED SystemReserved;\r
98cb9ae8 269} MISC_BIOS_CHARACTERISTICS_EXTENSION;\r
270\r
ff6a1f32
SZ		 271///\r
272/// Extended BIOS ROM size.\r
273///\r
274typedef struct {\r
2f88bd3a
MK		 275 UINT16 Size : 14;\r
276 UINT16 Unit : 2;\r
ff6a1f32
SZ		 277} EXTENDED_BIOS_ROM_SIZE;\r
278\r
4135253b 279///\r
af2dc6a7 280/// BIOS Information (Type 0).\r
4135253b 281///\r
61ce5861 282typedef struct {\r
2f88bd3a
MK		 283 SMBIOS_STRUCTURE Hdr;\r
284 SMBIOS_TABLE_STRING Vendor;\r
285 SMBIOS_TABLE_STRING BiosVersion;\r
286 UINT16 BiosSegment;\r
287 SMBIOS_TABLE_STRING BiosReleaseDate;\r
288 UINT8 BiosSize;\r
289 MISC_BIOS_CHARACTERISTICS BiosCharacteristics;\r
290 UINT8 BIOSCharacteristicsExtensionBytes[2];\r
291 UINT8 SystemBiosMajorRelease;\r
292 UINT8 SystemBiosMinorRelease;\r
293 UINT8 EmbeddedControllerFirmwareMajorRelease;\r
294 UINT8 EmbeddedControllerFirmwareMinorRelease;\r
ff6a1f32
SZ		 295 //\r
296 // Add for smbios 3.1.0\r
297 //\r
2f88bd3a 298 EXTENDED_BIOS_ROM_SIZE ExtendedBiosSize;\r
61ce5861 299} SMBIOS_TABLE_TYPE0;\r
300\r
98cb9ae8 301///\r
af2dc6a7 302/// System Wake-up Type.\r
98cb9ae8 303///\r
9095d37b 304typedef enum {\r
2f88bd3a
MK		 305 SystemWakeupTypeReserved = 0x00,\r
306 SystemWakeupTypeOther = 0x01,\r
307 SystemWakeupTypeUnknown = 0x02,\r
308 SystemWakeupTypeApmTimer = 0x03,\r
309 SystemWakeupTypeModemRing = 0x04,\r
310 SystemWakeupTypeLanRemote = 0x05,\r
311 SystemWakeupTypePowerSwitch = 0x06,\r
312 SystemWakeupTypePciPme = 0x07,\r
313 SystemWakeupTypeAcPowerRestored = 0x08\r
98cb9ae8 314} MISC_SYSTEM_WAKEUP_TYPE;\r
315\r
4135253b 316///\r
af2dc6a7 317/// System Information (Type 1).\r
9095d37b
LG		 318///\r
319/// The information in this structure defines attributes of the overall system and is\r
98cb9ae8 320/// intended to be associated with the Component ID group of the system's MIF.\r
9095d37b 321/// An SMBIOS implementation is associated with a single system instance and contains\r
98cb9ae8 322/// one and only one System Information (Type 1) structure.\r
4135253b 323///\r
61ce5861 324typedef struct {\r
2f88bd3a
MK		 325 SMBIOS_STRUCTURE Hdr;\r
326 SMBIOS_TABLE_STRING Manufacturer;\r
327 SMBIOS_TABLE_STRING ProductName;\r
328 SMBIOS_TABLE_STRING Version;\r
329 SMBIOS_TABLE_STRING SerialNumber;\r
330 GUID Uuid;\r
331 UINT8 WakeUpType; ///< The enumeration value from MISC_SYSTEM_WAKEUP_TYPE.\r
332 SMBIOS_TABLE_STRING SKUNumber;\r
333 SMBIOS_TABLE_STRING Family;\r
61ce5861 334} SMBIOS_TABLE_TYPE1;\r
335\r
98cb9ae8 336///\r
9095d37b 337/// Base Board - Feature Flags.\r
98cb9ae8 338///\r
339typedef struct {\r
2f88bd3a
MK		 340 UINT8 Motherboard : 1;\r
341 UINT8 RequiresDaughterCard : 1;\r
342 UINT8 Removable : 1;\r
343 UINT8 Replaceable : 1;\r
344 UINT8 HotSwappable : 1;\r
345 UINT8 Reserved : 3;\r
98cb9ae8 346} BASE_BOARD_FEATURE_FLAGS;\r
347\r
348///\r
af2dc6a7 349/// Base Board - Board Type.\r
98cb9ae8 350///\r
9095d37b 351typedef enum {\r
2f88bd3a
MK		 352 BaseBoardTypeUnknown = 0x1,\r
353 BaseBoardTypeOther = 0x2,\r
354 BaseBoardTypeServerBlade = 0x3,\r
355 BaseBoardTypeConnectivitySwitch = 0x4,\r
356 BaseBoardTypeSystemManagementModule = 0x5,\r
357 BaseBoardTypeProcessorModule = 0x6,\r
358 BaseBoardTypeIOModule = 0x7,\r
359 BaseBoardTypeMemoryModule = 0x8,\r
360 BaseBoardTypeDaughterBoard = 0x9,\r
361 BaseBoardTypeMotherBoard = 0xA,\r
362 BaseBoardTypeProcessorMemoryModule = 0xB,\r
363 BaseBoardTypeProcessorIOModule = 0xC,\r
364 BaseBoardTypeInterconnectBoard = 0xD\r
98cb9ae8 365} BASE_BOARD_TYPE;\r
366\r
4135253b 367///\r
af2dc6a7 368/// Base Board (or Module) Information (Type 2).\r
4135253b 369///\r
9095d37b 370/// The information in this structure defines attributes of a system baseboard -\r
98cb9ae8 371/// for example a motherboard, planar, or server blade or other standard system module.\r
372///\r
61ce5861 373typedef struct {\r
2f88bd3a
MK		 374 SMBIOS_STRUCTURE Hdr;\r
375 SMBIOS_TABLE_STRING Manufacturer;\r
376 SMBIOS_TABLE_STRING ProductName;\r
377 SMBIOS_TABLE_STRING Version;\r
378 SMBIOS_TABLE_STRING SerialNumber;\r
379 SMBIOS_TABLE_STRING AssetTag;\r
380 BASE_BOARD_FEATURE_FLAGS FeatureFlag;\r
381 SMBIOS_TABLE_STRING LocationInChassis;\r
382 UINT16 ChassisHandle;\r
383 UINT8 BoardType; ///< The enumeration value from BASE_BOARD_TYPE.\r
384 UINT8 NumberOfContainedObjectHandles;\r
385 UINT16 ContainedObjectHandles[1];\r
61ce5861 386} SMBIOS_TABLE_TYPE2;\r
387\r
98cb9ae8 388///\r
389/// System Enclosure or Chassis Types\r
390///\r
9095d37b 391typedef enum {\r
2f88bd3a
MK		 392 MiscChassisTypeOther = 0x01,\r
393 MiscChassisTypeUnknown = 0x02,\r
394 MiscChassisTypeDeskTop = 0x03,\r
395 MiscChassisTypeLowProfileDesktop = 0x04,\r
396 MiscChassisTypePizzaBox = 0x05,\r
397 MiscChassisTypeMiniTower = 0x06,\r
398 MiscChassisTypeTower = 0x07,\r
399 MiscChassisTypePortable = 0x08,\r
400 MiscChassisTypeLapTop = 0x09,\r
401 MiscChassisTypeNotebook = 0x0A,\r
402 MiscChassisTypeHandHeld = 0x0B,\r
403 MiscChassisTypeDockingStation = 0x0C,\r
404 MiscChassisTypeAllInOne = 0x0D,\r
405 MiscChassisTypeSubNotebook = 0x0E,\r
406 MiscChassisTypeSpaceSaving = 0x0F,\r
407 MiscChassisTypeLunchBox = 0x10,\r
408 MiscChassisTypeMainServerChassis = 0x11,\r
409 MiscChassisTypeExpansionChassis = 0x12,\r
410 MiscChassisTypeSubChassis = 0x13,\r
411 MiscChassisTypeBusExpansionChassis = 0x14,\r
412 MiscChassisTypePeripheralChassis = 0x15,\r
413 MiscChassisTypeRaidChassis = 0x16,\r
414 MiscChassisTypeRackMountChassis = 0x17,\r
415 MiscChassisTypeSealedCasePc = 0x18,\r
416 MiscChassisMultiSystemChassis = 0x19,\r
417 MiscChassisCompactPCI = 0x1A,\r
418 MiscChassisAdvancedTCA = 0x1B,\r
419 MiscChassisBlade = 0x1C,\r
420 MiscChassisBladeEnclosure = 0x1D,\r
421 MiscChassisTablet = 0x1E,\r
422 MiscChassisConvertible = 0x1F,\r
423 MiscChassisDetachable = 0x20,\r
424 MiscChassisIoTGateway = 0x21,\r
425 MiscChassisEmbeddedPc = 0x22,\r
426 MiscChassisMiniPc = 0x23,\r
427 MiscChassisStickPc = 0x24\r
98cb9ae8 428} MISC_CHASSIS_TYPE;\r
429\r
430///\r
af2dc6a7 431/// System Enclosure or Chassis States .\r
98cb9ae8 432///\r
9095d37b 433typedef enum {\r
2f88bd3a
MK		 434 ChassisStateOther = 0x01,\r
435 ChassisStateUnknown = 0x02,\r
436 ChassisStateSafe = 0x03,\r
437 ChassisStateWarning = 0x04,\r
438 ChassisStateCritical = 0x05,\r
439 ChassisStateNonRecoverable = 0x06\r
98cb9ae8 440} MISC_CHASSIS_STATE;\r
441\r
442///\r
af2dc6a7 443/// System Enclosure or Chassis Security Status.\r
98cb9ae8 444///\r
9095d37b 445typedef enum {\r
98cb9ae8 446 ChassisSecurityStatusOther = 0x01,\r
447 ChassisSecurityStatusUnknown = 0x02,\r
448 ChassisSecurityStatusNone = 0x03,\r
449 ChassisSecurityStatusExternalInterfaceLockedOut = 0x04,\r
450 ChassisSecurityStatusExternalInterfaceLockedEnabled = 0x05\r
451} MISC_CHASSIS_SECURITY_STATE;\r
452\r
bf7ea009 453///\r
454/// Contained Element record\r
455///\r
61ce5861 456typedef struct {\r
2f88bd3a
MK		 457 UINT8 ContainedElementType;\r
458 UINT8 ContainedElementMinimum;\r
459 UINT8 ContainedElementMaximum;\r
61ce5861 460} CONTAINED_ELEMENT;\r
461\r
4135253b 462///\r
af2dc6a7 463/// System Enclosure or Chassis (Type 3).\r
4135253b 464///\r
9095d37b
LG		 465/// The information in this structure defines attributes of the system's mechanical enclosure(s).\r
466/// For example, if a system included a separate enclosure for its peripheral devices,\r
98cb9ae8 467/// two structures would be returned: one for the main, system enclosure and the second for\r
468/// the peripheral device enclosure. The additions to this structure in v2.1 of this specification\r
9095d37b 469/// support the population of the CIM_Chassis class.\r
98cb9ae8 470///\r
61ce5861 471typedef struct {\r
2f88bd3a
MK		 472 SMBIOS_STRUCTURE Hdr;\r
473 SMBIOS_TABLE_STRING Manufacturer;\r
474 UINT8 Type;\r
475 SMBIOS_TABLE_STRING Version;\r
476 SMBIOS_TABLE_STRING SerialNumber;\r
477 SMBIOS_TABLE_STRING AssetTag;\r
478 UINT8 BootupState; ///< The enumeration value from MISC_CHASSIS_STATE.\r
479 UINT8 PowerSupplyState; ///< The enumeration value from MISC_CHASSIS_STATE.\r
480 UINT8 ThermalState; ///< The enumeration value from MISC_CHASSIS_STATE.\r
481 UINT8 SecurityStatus; ///< The enumeration value from MISC_CHASSIS_SECURITY_STATE.\r
482 UINT8 OemDefined[4];\r
483 UINT8 Height;\r
484 UINT8 NumberofPowerCords;\r
485 UINT8 ContainedElementCount;\r
486 UINT8 ContainedElementRecordLength;\r
f15908aa
CP		 487 //\r
488 // Can have 0 to (ContainedElementCount * ContainedElementRecordLength) contained elements\r
489 //\r
2f88bd3a 490 CONTAINED_ELEMENT ContainedElements[1];\r
f15908aa
CP		 491 //\r
492 // Add for smbios 2.7\r
493 //\r
494 // Since ContainedElements has a variable number of entries, must not define SKUNumber in\r
495 // the structure. Need to reference it by starting at offset 0x15 and adding\r
496 // (ContainedElementCount * ContainedElementRecordLength) bytes.\r
497 //\r
498 // SMBIOS_TABLE_STRING SKUNumber;\r
61ce5861 499} SMBIOS_TABLE_TYPE3;\r
500\r
98cb9ae8 501///\r
af2dc6a7 502/// Processor Information - Processor Type.\r
98cb9ae8 503///\r
504typedef enum {\r
505 ProcessorOther = 0x01,\r
506 ProcessorUnknown = 0x02,\r
507 CentralProcessor = 0x03,\r
508 MathProcessor = 0x04,\r
509 DspProcessor = 0x05,\r
510 VideoProcessor = 0x06\r
511} PROCESSOR_TYPE_DATA;\r
512\r
513///\r
af2dc6a7 514/// Processor Information - Processor Family.\r
98cb9ae8 515///\r
516typedef enum {\r
2f88bd3a
MK		 517 ProcessorFamilyOther = 0x01,\r
518 ProcessorFamilyUnknown = 0x02,\r
519 ProcessorFamily8086 = 0x03,\r
520 ProcessorFamily80286 = 0x04,\r
521 ProcessorFamilyIntel386 = 0x05,\r
522 ProcessorFamilyIntel486 = 0x06,\r
523 ProcessorFamily8087 = 0x07,\r
524 ProcessorFamily80287 = 0x08,\r
525 ProcessorFamily80387 = 0x09,\r
526 ProcessorFamily80487 = 0x0A,\r
527 ProcessorFamilyPentium = 0x0B,\r
528 ProcessorFamilyPentiumPro = 0x0C,\r
529 ProcessorFamilyPentiumII = 0x0D,\r
530 ProcessorFamilyPentiumMMX = 0x0E,\r
531 ProcessorFamilyCeleron = 0x0F,\r
532 ProcessorFamilyPentiumIIXeon = 0x10,\r
533 ProcessorFamilyPentiumIII = 0x11,\r
534 ProcessorFamilyM1 = 0x12,\r
535 ProcessorFamilyM2 = 0x13,\r
536 ProcessorFamilyIntelCeleronM = 0x14,\r
537 ProcessorFamilyIntelPentium4Ht = 0x15,\r
538 ProcessorFamilyAmdDuron = 0x18,\r
539 ProcessorFamilyK5 = 0x19,\r
540 ProcessorFamilyK6 = 0x1A,\r
541 ProcessorFamilyK6_2 = 0x1B,\r
542 ProcessorFamilyK6_3 = 0x1C,\r
543 ProcessorFamilyAmdAthlon = 0x1D,\r
544 ProcessorFamilyAmd29000 = 0x1E,\r
545 ProcessorFamilyK6_2Plus = 0x1F,\r
546 ProcessorFamilyPowerPC = 0x20,\r
547 ProcessorFamilyPowerPC601 = 0x21,\r
548 ProcessorFamilyPowerPC603 = 0x22,\r
549 ProcessorFamilyPowerPC603Plus = 0x23,\r
550 ProcessorFamilyPowerPC604 = 0x24,\r
551 ProcessorFamilyPowerPC620 = 0x25,\r
552 ProcessorFamilyPowerPCx704 = 0x26,\r
553 ProcessorFamilyPowerPC750 = 0x27,\r
554 ProcessorFamilyIntelCoreDuo = 0x28,\r
555 ProcessorFamilyIntelCoreDuoMobile = 0x29,\r
556 ProcessorFamilyIntelCoreSoloMobile = 0x2A,\r
557 ProcessorFamilyIntelAtom = 0x2B,\r
558 ProcessorFamilyIntelCoreM = 0x2C,\r
559 ProcessorFamilyIntelCorem3 = 0x2D,\r
560 ProcessorFamilyIntelCorem5 = 0x2E,\r
561 ProcessorFamilyIntelCorem7 = 0x2F,\r
562 ProcessorFamilyAlpha = 0x30,\r
563 ProcessorFamilyAlpha21064 = 0x31,\r
564 ProcessorFamilyAlpha21066 = 0x32,\r
565 ProcessorFamilyAlpha21164 = 0x33,\r
566 ProcessorFamilyAlpha21164PC = 0x34,\r
567 ProcessorFamilyAlpha21164a = 0x35,\r
568 ProcessorFamilyAlpha21264 = 0x36,\r
569 ProcessorFamilyAlpha21364 = 0x37,\r
570 ProcessorFamilyAmdTurionIIUltraDualCoreMobileM = 0x38,\r
571 ProcessorFamilyAmdTurionIIDualCoreMobileM = 0x39,\r
572 ProcessorFamilyAmdAthlonIIDualCoreM = 0x3A,\r
573 ProcessorFamilyAmdOpteron6100Series = 0x3B,\r
574 ProcessorFamilyAmdOpteron4100Series = 0x3C,\r
575 ProcessorFamilyAmdOpteron6200Series = 0x3D,\r
576 ProcessorFamilyAmdOpteron4200Series = 0x3E,\r
577 ProcessorFamilyAmdFxSeries = 0x3F,\r
578 ProcessorFamilyMips = 0x40,\r
579 ProcessorFamilyMIPSR4000 = 0x41,\r
580 ProcessorFamilyMIPSR4200 = 0x42,\r
581 ProcessorFamilyMIPSR4400 = 0x43,\r
582 ProcessorFamilyMIPSR4600 = 0x44,\r
583 ProcessorFamilyMIPSR10000 = 0x45,\r
584 ProcessorFamilyAmdCSeries = 0x46,\r
585 ProcessorFamilyAmdESeries = 0x47,\r
586 ProcessorFamilyAmdASeries = 0x48, ///< SMBIOS spec 2.8.0 updated the name\r
587 ProcessorFamilyAmdGSeries = 0x49,\r
588 ProcessorFamilyAmdZSeries = 0x4A,\r
589 ProcessorFamilyAmdRSeries = 0x4B,\r
590 ProcessorFamilyAmdOpteron4300 = 0x4C,\r
591 ProcessorFamilyAmdOpteron6300 = 0x4D,\r
592 ProcessorFamilyAmdOpteron3300 = 0x4E,\r
593 ProcessorFamilyAmdFireProSeries = 0x4F,\r
594 ProcessorFamilySparc = 0x50,\r
595 ProcessorFamilySuperSparc = 0x51,\r
596 ProcessorFamilymicroSparcII = 0x52,\r
597 ProcessorFamilymicroSparcIIep = 0x53,\r
598 ProcessorFamilyUltraSparc = 0x54,\r
599 ProcessorFamilyUltraSparcII = 0x55,\r
600 ProcessorFamilyUltraSparcIii = 0x56,\r
601 ProcessorFamilyUltraSparcIII = 0x57,\r
602 ProcessorFamilyUltraSparcIIIi = 0x58,\r
603 ProcessorFamily68040 = 0x60,\r
604 ProcessorFamily68xxx = 0x61,\r
605 ProcessorFamily68000 = 0x62,\r
606 ProcessorFamily68010 = 0x63,\r
607 ProcessorFamily68020 = 0x64,\r
608 ProcessorFamily68030 = 0x65,\r
609 ProcessorFamilyAmdAthlonX4QuadCore = 0x66,\r
610 ProcessorFamilyAmdOpteronX1000Series = 0x67,\r
611 ProcessorFamilyAmdOpteronX2000Series = 0x68,\r
612 ProcessorFamilyAmdOpteronASeries = 0x69,\r
613 ProcessorFamilyAmdOpteronX3000Series = 0x6A,\r
614 ProcessorFamilyAmdZen = 0x6B,\r
615 ProcessorFamilyHobbit = 0x70,\r
616 ProcessorFamilyCrusoeTM5000 = 0x78,\r
617 ProcessorFamilyCrusoeTM3000 = 0x79,\r
618 ProcessorFamilyEfficeonTM8000 = 0x7A,\r
619 ProcessorFamilyWeitek = 0x80,\r
620 ProcessorFamilyItanium = 0x82,\r
621 ProcessorFamilyAmdAthlon64 = 0x83,\r
622 ProcessorFamilyAmdOpteron = 0x84,\r
623 ProcessorFamilyAmdSempron = 0x85,\r
624 ProcessorFamilyAmdTurion64Mobile = 0x86,\r
625 ProcessorFamilyDualCoreAmdOpteron = 0x87,\r
626 ProcessorFamilyAmdAthlon64X2DualCore = 0x88,\r
627 ProcessorFamilyAmdTurion64X2Mobile = 0x89,\r
628 ProcessorFamilyQuadCoreAmdOpteron = 0x8A,\r
629 ProcessorFamilyThirdGenerationAmdOpteron = 0x8B,\r
630 ProcessorFamilyAmdPhenomFxQuadCore = 0x8C,\r
631 ProcessorFamilyAmdPhenomX4QuadCore = 0x8D,\r
632 ProcessorFamilyAmdPhenomX2DualCore = 0x8E,\r
633 ProcessorFamilyAmdAthlonX2DualCore = 0x8F,\r
634 ProcessorFamilyPARISC = 0x90,\r
635 ProcessorFamilyPaRisc8500 = 0x91,\r
636 ProcessorFamilyPaRisc8000 = 0x92,\r
637 ProcessorFamilyPaRisc7300LC = 0x93,\r
638 ProcessorFamilyPaRisc7200 = 0x94,\r
639 ProcessorFamilyPaRisc7100LC = 0x95,\r
640 ProcessorFamilyPaRisc7100 = 0x96,\r
641 ProcessorFamilyV30 = 0xA0,\r
642 ProcessorFamilyQuadCoreIntelXeon3200Series = 0xA1,\r
643 ProcessorFamilyDualCoreIntelXeon3000Series = 0xA2,\r
644 ProcessorFamilyQuadCoreIntelXeon5300Series = 0xA3,\r
645 ProcessorFamilyDualCoreIntelXeon5100Series = 0xA4,\r
646 ProcessorFamilyDualCoreIntelXeon5000Series = 0xA5,\r
647 ProcessorFamilyDualCoreIntelXeonLV = 0xA6,\r
648 ProcessorFamilyDualCoreIntelXeonULV = 0xA7,\r
649 ProcessorFamilyDualCoreIntelXeon7100Series = 0xA8,\r
650 ProcessorFamilyQuadCoreIntelXeon5400Series = 0xA9,\r
651 ProcessorFamilyQuadCoreIntelXeon = 0xAA,\r
652 ProcessorFamilyDualCoreIntelXeon5200Series = 0xAB,\r
653 ProcessorFamilyDualCoreIntelXeon7200Series = 0xAC,\r
654 ProcessorFamilyQuadCoreIntelXeon7300Series = 0xAD,\r
655 ProcessorFamilyQuadCoreIntelXeon7400Series = 0xAE,\r
656 ProcessorFamilyMultiCoreIntelXeon7400Series = 0xAF,\r
657 ProcessorFamilyPentiumIIIXeon = 0xB0,\r
658 ProcessorFamilyPentiumIIISpeedStep = 0xB1,\r
659 ProcessorFamilyPentium4 = 0xB2,\r
660 ProcessorFamilyIntelXeon = 0xB3,\r
661 ProcessorFamilyAS400 = 0xB4,\r
662 ProcessorFamilyIntelXeonMP = 0xB5,\r
663 ProcessorFamilyAMDAthlonXP = 0xB6,\r
664 ProcessorFamilyAMDAthlonMP = 0xB7,\r
665 ProcessorFamilyIntelItanium2 = 0xB8,\r
666 ProcessorFamilyIntelPentiumM = 0xB9,\r
667 ProcessorFamilyIntelCeleronD = 0xBA,\r
668 ProcessorFamilyIntelPentiumD = 0xBB,\r
669 ProcessorFamilyIntelPentiumEx = 0xBC,\r
670 ProcessorFamilyIntelCoreSolo = 0xBD, ///< SMBIOS spec 2.6 updated this value\r
671 ProcessorFamilyReserved = 0xBE,\r
672 ProcessorFamilyIntelCore2 = 0xBF,\r
673 ProcessorFamilyIntelCore2Solo = 0xC0,\r
674 ProcessorFamilyIntelCore2Extreme = 0xC1,\r
675 ProcessorFamilyIntelCore2Quad = 0xC2,\r
676 ProcessorFamilyIntelCore2ExtremeMobile = 0xC3,\r
677 ProcessorFamilyIntelCore2DuoMobile = 0xC4,\r
678 ProcessorFamilyIntelCore2SoloMobile = 0xC5,\r
679 ProcessorFamilyIntelCoreI7 = 0xC6,\r
680 ProcessorFamilyDualCoreIntelCeleron = 0xC7,\r
681 ProcessorFamilyIBM390 = 0xC8,\r
682 ProcessorFamilyG4 = 0xC9,\r
683 ProcessorFamilyG5 = 0xCA,\r
684 ProcessorFamilyG6 = 0xCB,\r
685 ProcessorFamilyzArchitecture = 0xCC,\r
686 ProcessorFamilyIntelCoreI5 = 0xCD,\r
687 ProcessorFamilyIntelCoreI3 = 0xCE,\r
688 ProcessorFamilyIntelCoreI9 = 0xCF,\r
689 ProcessorFamilyViaC7M = 0xD2,\r
690 ProcessorFamilyViaC7D = 0xD3,\r
691 ProcessorFamilyViaC7 = 0xD4,\r
692 ProcessorFamilyViaEden = 0xD5,\r
693 ProcessorFamilyMultiCoreIntelXeon = 0xD6,\r
694 ProcessorFamilyDualCoreIntelXeon3Series = 0xD7,\r
695 ProcessorFamilyQuadCoreIntelXeon3Series = 0xD8,\r
696 ProcessorFamilyViaNano = 0xD9,\r
697 ProcessorFamilyDualCoreIntelXeon5Series = 0xDA,\r
698 ProcessorFamilyQuadCoreIntelXeon5Series = 0xDB,\r
699 ProcessorFamilyDualCoreIntelXeon7Series = 0xDD,\r
700 ProcessorFamilyQuadCoreIntelXeon7Series = 0xDE,\r
701 ProcessorFamilyMultiCoreIntelXeon7Series = 0xDF,\r
702 ProcessorFamilyMultiCoreIntelXeon3400Series = 0xE0,\r
703 ProcessorFamilyAmdOpteron3000Series = 0xE4,\r
704 ProcessorFamilyAmdSempronII = 0xE5,\r
705 ProcessorFamilyEmbeddedAmdOpteronQuadCore = 0xE6,\r
706 ProcessorFamilyAmdPhenomTripleCore = 0xE7,\r
707 ProcessorFamilyAmdTurionUltraDualCoreMobile = 0xE8,\r
708 ProcessorFamilyAmdTurionDualCoreMobile = 0xE9,\r
709 ProcessorFamilyAmdAthlonDualCore = 0xEA,\r
710 ProcessorFamilyAmdSempronSI = 0xEB,\r
711 ProcessorFamilyAmdPhenomII = 0xEC,\r
712 ProcessorFamilyAmdAthlonII = 0xED,\r
713 ProcessorFamilySixCoreAmdOpteron = 0xEE,\r
714 ProcessorFamilyAmdSempronM = 0xEF,\r
715 ProcessorFamilyi860 = 0xFA,\r
716 ProcessorFamilyi960 = 0xFB,\r
717 ProcessorFamilyIndicatorFamily2 = 0xFE,\r
718 ProcessorFamilyReserved1 = 0xFF\r
98cb9ae8 719} PROCESSOR_FAMILY_DATA;\r
720\r
f9ed6c93
YL		 721///\r
722/// Processor Information2 - Processor Family2.\r
723///\r
724typedef enum {\r
2f88bd3a
MK		 725 ProcessorFamilyARMv7 = 0x0100,\r
726 ProcessorFamilyARMv8 = 0x0101,\r
727 ProcessorFamilySH3 = 0x0104,\r
728 ProcessorFamilySH4 = 0x0105,\r
729 ProcessorFamilyARM = 0x0118,\r
730 ProcessorFamilyStrongARM = 0x0119,\r
731 ProcessorFamily6x86 = 0x012C,\r
732 ProcessorFamilyMediaGX = 0x012D,\r
733 ProcessorFamilyMII = 0x012E,\r
734 ProcessorFamilyWinChip = 0x0140,\r
735 ProcessorFamilyDSP = 0x015E,\r
736 ProcessorFamilyVideoProcessor = 0x01F4,\r
737 ProcessorFamilyRiscvRV32 = 0x0200,\r
738 ProcessorFamilyRiscVRV64 = 0x0201,\r
739 ProcessorFamilyRiscVRV128 = 0x0202\r
f9ed6c93
YL		 740} PROCESSOR_FAMILY2_DATA;\r
741\r
98cb9ae8 742///\r
9095d37b 743/// Processor Information - Voltage.\r
98cb9ae8 744///\r
745typedef struct {\r
2f88bd3a
MK		 746 UINT8 ProcessorVoltageCapability5V : 1;\r
747 UINT8 ProcessorVoltageCapability3_3V : 1;\r
748 UINT8 ProcessorVoltageCapability2_9V : 1;\r
749 UINT8 ProcessorVoltageCapabilityReserved : 1; ///< Bit 3, must be zero.\r
750 UINT8 ProcessorVoltageReserved : 3; ///< Bits 4-6, must be zero.\r
751 UINT8 ProcessorVoltageIndicateLegacy : 1;\r
98cb9ae8 752} PROCESSOR_VOLTAGE;\r
753\r
754///\r
af2dc6a7 755/// Processor Information - Processor Upgrade.\r
98cb9ae8 756///\r
757typedef enum {\r
2f88bd3a
MK		 758 ProcessorUpgradeOther = 0x01,\r
759 ProcessorUpgradeUnknown = 0x02,\r
760 ProcessorUpgradeDaughterBoard = 0x03,\r
761 ProcessorUpgradeZIFSocket = 0x04,\r
762 ProcessorUpgradePiggyBack = 0x05, ///< Replaceable.\r
763 ProcessorUpgradeNone = 0x06,\r
764 ProcessorUpgradeLIFSocket = 0x07,\r
765 ProcessorUpgradeSlot1 = 0x08,\r
766 ProcessorUpgradeSlot2 = 0x09,\r
767 ProcessorUpgrade370PinSocket = 0x0A,\r
768 ProcessorUpgradeSlotA = 0x0B,\r
769 ProcessorUpgradeSlotM = 0x0C,\r
770 ProcessorUpgradeSocket423 = 0x0D,\r
771 ProcessorUpgradeSocketA = 0x0E, ///< Socket 462.\r
772 ProcessorUpgradeSocket478 = 0x0F,\r
773 ProcessorUpgradeSocket754 = 0x10,\r
774 ProcessorUpgradeSocket940 = 0x11,\r
775 ProcessorUpgradeSocket939 = 0x12,\r
776 ProcessorUpgradeSocketmPGA604 = 0x13,\r
777 ProcessorUpgradeSocketLGA771 = 0x14,\r
778 ProcessorUpgradeSocketLGA775 = 0x15,\r
779 ProcessorUpgradeSocketS1 = 0x16,\r
780 ProcessorUpgradeAM2 = 0x17,\r
781 ProcessorUpgradeF1207 = 0x18,\r
782 ProcessorSocketLGA1366 = 0x19,\r
783 ProcessorUpgradeSocketG34 = 0x1A,\r
784 ProcessorUpgradeSocketAM3 = 0x1B,\r
785 ProcessorUpgradeSocketC32 = 0x1C,\r
786 ProcessorUpgradeSocketLGA1156 = 0x1D,\r
787 ProcessorUpgradeSocketLGA1567 = 0x1E,\r
788 ProcessorUpgradeSocketPGA988A = 0x1F,\r
789 ProcessorUpgradeSocketBGA1288 = 0x20,\r
790 ProcessorUpgradeSocketrPGA988B = 0x21,\r
791 ProcessorUpgradeSocketBGA1023 = 0x22,\r
792 ProcessorUpgradeSocketBGA1224 = 0x23,\r
793 ProcessorUpgradeSocketLGA1155 = 0x24, ///< SMBIOS spec 2.8.0 updated the name\r
794 ProcessorUpgradeSocketLGA1356 = 0x25,\r
795 ProcessorUpgradeSocketLGA2011 = 0x26,\r
796 ProcessorUpgradeSocketFS1 = 0x27,\r
797 ProcessorUpgradeSocketFS2 = 0x28,\r
798 ProcessorUpgradeSocketFM1 = 0x29,\r
799 ProcessorUpgradeSocketFM2 = 0x2A,\r
4a228334 800 ProcessorUpgradeSocketLGA2011_3 = 0x2B,\r
6cd35c62
EL		 801 ProcessorUpgradeSocketLGA1356_3 = 0x2C,\r
802 ProcessorUpgradeSocketLGA1150 = 0x2D,\r
803 ProcessorUpgradeSocketBGA1168 = 0x2E,\r
804 ProcessorUpgradeSocketBGA1234 = 0x2F,\r
ff6a1f32
SZ		 805 ProcessorUpgradeSocketBGA1364 = 0x30,\r
806 ProcessorUpgradeSocketAM4 = 0x31,\r
807 ProcessorUpgradeSocketLGA1151 = 0x32,\r
808 ProcessorUpgradeSocketBGA1356 = 0x33,\r
809 ProcessorUpgradeSocketBGA1440 = 0x34,\r
810 ProcessorUpgradeSocketBGA1515 = 0x35,\r
811 ProcessorUpgradeSocketLGA3647_1 = 0x36,\r
043026ac 812 ProcessorUpgradeSocketSP3 = 0x37,\r
cfcca3c2
SZ		 813 ProcessorUpgradeSocketSP3r2 = 0x38,\r
814 ProcessorUpgradeSocketLGA2066 = 0x39,\r
815 ProcessorUpgradeSocketBGA1392 = 0x3A,\r
816 ProcessorUpgradeSocketBGA1510 = 0x3B,\r
782d0187
SZ		 817 ProcessorUpgradeSocketBGA1528 = 0x3C,\r
818 ProcessorUpgradeSocketLGA4189 = 0x3D,\r
819 ProcessorUpgradeSocketLGA1200 = 0x3E,\r
820 ProcessorUpgradeSocketLGA4677 = 0x3F\r
98cb9ae8 821} PROCESSOR_UPGRADE;\r
822\r
823///\r
824/// Processor ID Field Description\r
825///\r
826typedef struct {\r
2f88bd3a
MK		 827 UINT32 ProcessorSteppingId : 4;\r
828 UINT32 ProcessorModel : 4;\r
829 UINT32 ProcessorFamily : 4;\r
830 UINT32 ProcessorType : 2;\r
831 UINT32 ProcessorReserved1 : 2;\r
832 UINT32 ProcessorXModel : 4;\r
833 UINT32 ProcessorXFamily : 8;\r
834 UINT32 ProcessorReserved2 : 4;\r
98cb9ae8 835} PROCESSOR_SIGNATURE;\r
836\r
98cb9ae8 837typedef struct {\r
2f88bd3a
MK		 838 UINT32 ProcessorFpu : 1;\r
839 UINT32 ProcessorVme : 1;\r
840 UINT32 ProcessorDe : 1;\r
841 UINT32 ProcessorPse : 1;\r
842 UINT32 ProcessorTsc : 1;\r
843 UINT32 ProcessorMsr : 1;\r
844 UINT32 ProcessorPae : 1;\r
845 UINT32 ProcessorMce : 1;\r
846 UINT32 ProcessorCx8 : 1;\r
847 UINT32 ProcessorApic : 1;\r
848 UINT32 ProcessorReserved1 : 1;\r
849 UINT32 ProcessorSep : 1;\r
850 UINT32 ProcessorMtrr : 1;\r
851 UINT32 ProcessorPge : 1;\r
852 UINT32 ProcessorMca : 1;\r
853 UINT32 ProcessorCmov : 1;\r
854 UINT32 ProcessorPat : 1;\r
855 UINT32 ProcessorPse36 : 1;\r
856 UINT32 ProcessorPsn : 1;\r
857 UINT32 ProcessorClfsh : 1;\r
858 UINT32 ProcessorReserved2 : 1;\r
859 UINT32 ProcessorDs : 1;\r
860 UINT32 ProcessorAcpi : 1;\r
861 UINT32 ProcessorMmx : 1;\r
862 UINT32 ProcessorFxsr : 1;\r
863 UINT32 ProcessorSse : 1;\r
864 UINT32 ProcessorSse2 : 1;\r
865 UINT32 ProcessorSs : 1;\r
866 UINT32 ProcessorReserved3 : 1;\r
867 UINT32 ProcessorTm : 1;\r
868 UINT32 ProcessorReserved4 : 2;\r
98cb9ae8 869} PROCESSOR_FEATURE_FLAGS;\r
870\r
f06c92a6 871typedef struct {\r
2f88bd3a
MK		 872 UINT16 ProcessorReserved1 : 1;\r
873 UINT16 ProcessorUnknown : 1;\r
874 UINT16 Processor64BitCapable : 1;\r
875 UINT16 ProcessorMultiCore : 1;\r
876 UINT16 ProcessorHardwareThread : 1;\r
877 UINT16 ProcessorExecuteProtection : 1;\r
878 UINT16 ProcessorEnhancedVirtualization : 1;\r
879 UINT16 ProcessorPowerPerformanceCtrl : 1;\r
880 UINT16 Processor128BitCapable : 1;\r
881 UINT16 ProcessorArm64SocId : 1;\r
882 UINT16 ProcessorReserved2 : 6;\r
f06c92a6
AC		 883} PROCESSOR_CHARACTERISTIC_FLAGS;\r
884\r
4e1f316c
RC		 885///\r
886/// Processor Information - Status\r
887///\r
888typedef union {\r
889 struct {\r
2f88bd3a
MK		 890 UINT8 CpuStatus : 3; ///< Indicates the status of the processor.\r
891 UINT8 Reserved1 : 3; ///< Reserved for future use. Must be set to zero.\r
892 UINT8 SocketPopulated : 1; ///< Indicates if the processor socket is populated or not.\r
893 UINT8 Reserved2 : 1; ///< Reserved for future use. Must be set to zero.\r
4e1f316c 894 } Bits;\r
2f88bd3a 895 UINT8 Data;\r
4e1f316c
RC		 896} PROCESSOR_STATUS_DATA;\r
897\r
98cb9ae8 898typedef struct {\r
2f88bd3a
MK		 899 PROCESSOR_SIGNATURE Signature;\r
900 PROCESSOR_FEATURE_FLAGS FeatureFlags;\r
6800ac83 901} PROCESSOR_ID_DATA;\r
98cb9ae8 902\r
4135253b 903///\r
af2dc6a7 904/// Processor Information (Type 4).\r
4135253b 905///\r
9095d37b
LG		 906/// The information in this structure defines the attributes of a single processor;\r
907/// a separate structure instance is provided for each system processor socket/slot.\r
908/// For example, a system with an IntelDX2 processor would have a single\r
af2dc6a7 909/// structure instance, while a system with an IntelSX2 processor would have a structure\r
9095d37b 910/// to describe the main CPU, and a second structure to describe the 80487 co-processor.\r
98cb9ae8 911///\r
9095d37b 912typedef struct {\r
2f88bd3a
MK		 913 SMBIOS_STRUCTURE Hdr;\r
914 SMBIOS_TABLE_STRING Socket;\r
915 UINT8 ProcessorType; ///< The enumeration value from PROCESSOR_TYPE_DATA.\r
916 UINT8 ProcessorFamily; ///< The enumeration value from PROCESSOR_FAMILY_DATA.\r
917 SMBIOS_TABLE_STRING ProcessorManufacturer;\r
918 PROCESSOR_ID_DATA ProcessorId;\r
919 SMBIOS_TABLE_STRING ProcessorVersion;\r
920 PROCESSOR_VOLTAGE Voltage;\r
921 UINT16 ExternalClock;\r
922 UINT16 MaxSpeed;\r
923 UINT16 CurrentSpeed;\r
924 UINT8 Status;\r
925 UINT8 ProcessorUpgrade; ///< The enumeration value from PROCESSOR_UPGRADE.\r
926 UINT16 L1CacheHandle;\r
927 UINT16 L2CacheHandle;\r
928 UINT16 L3CacheHandle;\r
929 SMBIOS_TABLE_STRING SerialNumber;\r
930 SMBIOS_TABLE_STRING AssetTag;\r
931 SMBIOS_TABLE_STRING PartNumber;\r
61ce5861 932 //\r
933 // Add for smbios 2.5\r
934 //\r
2f88bd3a
MK		 935 UINT8 CoreCount;\r
936 UINT8 EnabledCoreCount;\r
937 UINT8 ThreadCount;\r
938 UINT16 ProcessorCharacteristics;\r
61ce5861 939 //\r
940 // Add for smbios 2.6\r
941 //\r
2f88bd3a 942 UINT16 ProcessorFamily2;\r
6cd35c62
EL		 943 //\r
944 // Add for smbios 3.0\r
945 //\r
2f88bd3a
MK		 946 UINT16 CoreCount2;\r
947 UINT16 EnabledCoreCount2;\r
948 UINT16 ThreadCount2;\r
61ce5861 949} SMBIOS_TABLE_TYPE4;\r
950\r
98cb9ae8 951///\r
af2dc6a7 952/// Memory Controller Error Detecting Method.\r
98cb9ae8 953///\r
9095d37b 954typedef enum {\r
98cb9ae8 955 ErrorDetectingMethodOther = 0x01,\r
956 ErrorDetectingMethodUnknown = 0x02,\r
957 ErrorDetectingMethodNone = 0x03,\r
958 ErrorDetectingMethodParity = 0x04,\r
959 ErrorDetectingMethod32Ecc = 0x05,\r
960 ErrorDetectingMethod64Ecc = 0x06,\r
961 ErrorDetectingMethod128Ecc = 0x07,\r
962 ErrorDetectingMethodCrc = 0x08\r
963} MEMORY_ERROR_DETECT_METHOD;\r
964\r
965///\r
af2dc6a7 966/// Memory Controller Error Correcting Capability.\r
98cb9ae8 967///\r
968typedef struct {\r
2f88bd3a
MK		 969 UINT8 Other : 1;\r
970 UINT8 Unknown : 1;\r
971 UINT8 None : 1;\r
972 UINT8 SingleBitErrorCorrect : 1;\r
973 UINT8 DoubleBitErrorCorrect : 1;\r
974 UINT8 ErrorScrubbing : 1;\r
975 UINT8 Reserved : 2;\r
98cb9ae8 976} MEMORY_ERROR_CORRECT_CAPABILITY;\r
977\r
978///\r
af2dc6a7 979/// Memory Controller Information - Interleave Support.\r
98cb9ae8 980///\r
9095d37b 981typedef enum {\r
98cb9ae8 982 MemoryInterleaveOther = 0x01,\r
983 MemoryInterleaveUnknown = 0x02,\r
984 MemoryInterleaveOneWay = 0x03,\r
985 MemoryInterleaveTwoWay = 0x04,\r
986 MemoryInterleaveFourWay = 0x05,\r
987 MemoryInterleaveEightWay = 0x06,\r
988 MemoryInterleaveSixteenWay = 0x07\r
989} MEMORY_SUPPORT_INTERLEAVE_TYPE;\r
990\r
991///\r
af2dc6a7 992/// Memory Controller Information - Memory Speeds.\r
98cb9ae8 993///\r
994typedef struct {\r
2f88bd3a
MK		 995 UINT16 Other : 1;\r
996 UINT16 Unknown : 1;\r
997 UINT16 SeventyNs : 1;\r
998 UINT16 SixtyNs : 1;\r
999 UINT16 FiftyNs : 1;\r
1000 UINT16 Reserved : 11;\r
98cb9ae8 1001} MEMORY_SPEED_TYPE;\r
1002\r
4135253b 1003///\r
af2dc6a7 1004/// Memory Controller Information (Type 5, Obsolete).\r
4135253b 1005///\r
9095d37b
LG		 1006/// The information in this structure defines the attributes of the system's memory controller(s)\r
1007/// and the supported attributes of any memory-modules present in the sockets controlled by\r
1008/// this controller.\r
1009/// Note: This structure, and its companion Memory Module Information (Type 6, Obsolete),\r
af2dc6a7 1010/// are obsolete starting with version 2.1 of this specification. The Physical Memory Array (Type 16)\r
98cb9ae8 1011/// and Memory Device (Type 17) structures should be used instead. BIOS providers might\r
1012/// choose to implement both memory description types to allow existing DMI browsers\r
1013/// to properly display the system's memory attributes.\r
1014///\r
61ce5861 1015typedef struct {\r
2f88bd3a
MK		 1016 SMBIOS_STRUCTURE Hdr;\r
1017 UINT8 ErrDetectMethod; ///< The enumeration value from MEMORY_ERROR_DETECT_METHOD.\r
1018 MEMORY_ERROR_CORRECT_CAPABILITY ErrCorrectCapability;\r
1019 UINT8 SupportInterleave; ///< The enumeration value from MEMORY_SUPPORT_INTERLEAVE_TYPE.\r
1020 UINT8 CurrentInterleave; ///< The enumeration value from MEMORY_SUPPORT_INTERLEAVE_TYPE .\r
1021 UINT8 MaxMemoryModuleSize;\r
1022 MEMORY_SPEED_TYPE SupportSpeed;\r
1023 UINT16 SupportMemoryType;\r
1024 UINT8 MemoryModuleVoltage;\r
1025 UINT8 AssociatedMemorySlotNum;\r
1026 UINT16 MemoryModuleConfigHandles[1];\r
61ce5861 1027} SMBIOS_TABLE_TYPE5;\r
1028\r
98cb9ae8 1029///\r
1030/// Memory Module Information - Memory Types\r
1031///\r
1032typedef struct {\r
2f88bd3a
MK		 1033 UINT16 Other : 1;\r
1034 UINT16 Unknown : 1;\r
1035 UINT16 Standard : 1;\r
1036 UINT16 FastPageMode : 1;\r
1037 UINT16 Edo : 1;\r
1038 UINT16 Parity : 1;\r
1039 UINT16 Ecc : 1;\r
1040 UINT16 Simm : 1;\r
1041 UINT16 Dimm : 1;\r
1042 UINT16 BurstEdo : 1;\r
1043 UINT16 Sdram : 1;\r
1044 UINT16 Reserved : 5;\r
98cb9ae8 1045} MEMORY_CURRENT_TYPE;\r
1046\r
1047///\r
af2dc6a7 1048/// Memory Module Information - Memory Size.\r
98cb9ae8 1049///\r
1050typedef struct {\r
2f88bd3a
MK		 1051 UINT8 InstalledOrEnabledSize : 7; ///< Size (n), where 2**n is the size in MB.\r
1052 UINT8 SingleOrDoubleBank : 1;\r
98cb9ae8 1053} MEMORY_INSTALLED_ENABLED_SIZE;\r
1054\r
4135253b 1055///\r
1056/// Memory Module Information (Type 6, Obsolete)\r
1057///\r
9095d37b 1058/// One Memory Module Information structure is included for each memory-module socket\r
98cb9ae8 1059/// in the system. The structure describes the speed, type, size, and error status\r
9095d37b
LG		 1060/// of each system memory module. The supported attributes of each module are described\r
1061/// by the "owning" Memory Controller Information structure.\r
1062/// Note: This structure, and its companion Memory Controller Information (Type 5, Obsolete),\r
af2dc6a7 1063/// are obsolete starting with version 2.1 of this specification. The Physical Memory Array (Type 16)\r
98cb9ae8 1064/// and Memory Device (Type 17) structures should be used instead.\r
1065///\r
61ce5861 1066typedef struct {\r
2f88bd3a
MK		 1067 SMBIOS_STRUCTURE Hdr;\r
1068 SMBIOS_TABLE_STRING SocketDesignation;\r
1069 UINT8 BankConnections;\r
1070 UINT8 CurrentSpeed;\r
1071 MEMORY_CURRENT_TYPE CurrentMemoryType;\r
1072 MEMORY_INSTALLED_ENABLED_SIZE InstalledSize;\r
1073 MEMORY_INSTALLED_ENABLED_SIZE EnabledSize;\r
1074 UINT8 ErrorStatus;\r
61ce5861 1075} SMBIOS_TABLE_TYPE6;\r
1076\r
98cb9ae8 1077///\r
af2dc6a7 1078/// Cache Information - SRAM Type.\r
98cb9ae8 1079///\r
1080typedef struct {\r
2f88bd3a
MK		 1081 UINT16 Other : 1;\r
1082 UINT16 Unknown : 1;\r
1083 UINT16 NonBurst : 1;\r
1084 UINT16 Burst : 1;\r
1085 UINT16 PipelineBurst : 1;\r
1086 UINT16 Synchronous : 1;\r
1087 UINT16 Asynchronous : 1;\r
1088 UINT16 Reserved : 9;\r
98cb9ae8 1089} CACHE_SRAM_TYPE_DATA;\r
1090\r
1091///\r
af2dc6a7 1092/// Cache Information - Error Correction Type.\r
98cb9ae8 1093///\r
1094typedef enum {\r
1095 CacheErrorOther = 0x01,\r
1096 CacheErrorUnknown = 0x02,\r
1097 CacheErrorNone = 0x03,\r
1098 CacheErrorParity = 0x04,\r
6800ac83 1099 CacheErrorSingleBit = 0x05, ///< ECC\r
1100 CacheErrorMultiBit = 0x06 ///< ECC\r
98cb9ae8 1101} CACHE_ERROR_TYPE_DATA;\r
1102\r
1103///\r
9095d37b 1104/// Cache Information - System Cache Type.\r
98cb9ae8 1105///\r
1106typedef enum {\r
1107 CacheTypeOther = 0x01,\r
1108 CacheTypeUnknown = 0x02,\r
1109 CacheTypeInstruction = 0x03,\r
1110 CacheTypeData = 0x04,\r
1111 CacheTypeUnified = 0x05\r
1112} CACHE_TYPE_DATA;\r
1113\r
1114///\r
9095d37b 1115/// Cache Information - Associativity.\r
98cb9ae8 1116///\r
1117typedef enum {\r
1118 CacheAssociativityOther = 0x01,\r
1119 CacheAssociativityUnknown = 0x02,\r
1120 CacheAssociativityDirectMapped = 0x03,\r
1121 CacheAssociativity2Way = 0x04,\r
1122 CacheAssociativity4Way = 0x05,\r
1123 CacheAssociativityFully = 0x06,\r
1124 CacheAssociativity8Way = 0x07,\r
1125 CacheAssociativity16Way = 0x08,\r
3507ab19 1126 CacheAssociativity12Way = 0x09,\r
1127 CacheAssociativity24Way = 0x0A,\r
1128 CacheAssociativity32Way = 0x0B,\r
1129 CacheAssociativity48Way = 0x0C,\r
7ddba202
SZ		 1130 CacheAssociativity64Way = 0x0D,\r
1131 CacheAssociativity20Way = 0x0E\r
98cb9ae8 1132} CACHE_ASSOCIATIVITY_DATA;\r
1133\r
4135253b 1134///\r
af2dc6a7 1135/// Cache Information (Type 7).\r
4135253b 1136///\r
9095d37b 1137/// The information in this structure defines the attributes of CPU cache device in the system.\r
98cb9ae8 1138/// One structure is specified for each such device, whether the device is internal to\r
1139/// or external to the CPU module. Cache modules can be associated with a processor structure\r
af2dc6a7 1140/// in one or two ways, depending on the SMBIOS version.\r
98cb9ae8 1141///\r
61ce5861 1142typedef struct {\r
2f88bd3a
MK		 1143 SMBIOS_STRUCTURE Hdr;\r
1144 SMBIOS_TABLE_STRING SocketDesignation;\r
1145 UINT16 CacheConfiguration;\r
1146 UINT16 MaximumCacheSize;\r
1147 UINT16 InstalledSize;\r
1148 CACHE_SRAM_TYPE_DATA SupportedSRAMType;\r
1149 CACHE_SRAM_TYPE_DATA CurrentSRAMType;\r
1150 UINT8 CacheSpeed;\r
1151 UINT8 ErrorCorrectionType; ///< The enumeration value from CACHE_ERROR_TYPE_DATA.\r
1152 UINT8 SystemCacheType; ///< The enumeration value from CACHE_TYPE_DATA.\r
1153 UINT8 Associativity; ///< The enumeration value from CACHE_ASSOCIATIVITY_DATA.\r
ff6a1f32
SZ		 1154 //\r
1155 // Add for smbios 3.1.0\r
1156 //\r
2f88bd3a
MK		 1157 UINT32 MaximumCacheSize2;\r
1158 UINT32 InstalledSize2;\r
61ce5861 1159} SMBIOS_TABLE_TYPE7;\r
1160\r
98cb9ae8 1161///\r
9095d37b 1162/// Port Connector Information - Connector Types.\r
98cb9ae8 1163///\r
1164typedef enum {\r
2f88bd3a
MK		 1165 PortConnectorTypeNone = 0x00,\r
1166 PortConnectorTypeCentronics = 0x01,\r
1167 PortConnectorTypeMiniCentronics = 0x02,\r
1168 PortConnectorTypeProprietary = 0x03,\r
1169 PortConnectorTypeDB25Male = 0x04,\r
1170 PortConnectorTypeDB25Female = 0x05,\r
1171 PortConnectorTypeDB15Male = 0x06,\r
1172 PortConnectorTypeDB15Female = 0x07,\r
1173 PortConnectorTypeDB9Male = 0x08,\r
1174 PortConnectorTypeDB9Female = 0x09,\r
1175 PortConnectorTypeRJ11 = 0x0A,\r
1176 PortConnectorTypeRJ45 = 0x0B,\r
1177 PortConnectorType50PinMiniScsi = 0x0C,\r
1178 PortConnectorTypeMiniDin = 0x0D,\r
1179 PortConnectorTypeMicroDin = 0x0E,\r
1180 PortConnectorTypePS2 = 0x0F,\r
1181 PortConnectorTypeInfrared = 0x10,\r
1182 PortConnectorTypeHpHil = 0x11,\r
1183 PortConnectorTypeUsb = 0x12,\r
1184 PortConnectorTypeSsaScsi = 0x13,\r
1185 PortConnectorTypeCircularDin8Male = 0x14,\r
1186 PortConnectorTypeCircularDin8Female = 0x15,\r
1187 PortConnectorTypeOnboardIde = 0x16,\r
1188 PortConnectorTypeOnboardFloppy = 0x17,\r
1189 PortConnectorType9PinDualInline = 0x18,\r
1190 PortConnectorType25PinDualInline = 0x19,\r
1191 PortConnectorType50PinDualInline = 0x1A,\r
1192 PortConnectorType68PinDualInline = 0x1B,\r
1193 PortConnectorTypeOnboardSoundInput = 0x1C,\r
1194 PortConnectorTypeMiniCentronicsType14 = 0x1D,\r
1195 PortConnectorTypeMiniCentronicsType26 = 0x1E,\r
1196 PortConnectorTypeHeadPhoneMiniJack = 0x1F,\r
1197 PortConnectorTypeBNC = 0x20,\r
1198 PortConnectorType1394 = 0x21,\r
1199 PortConnectorTypeSasSata = 0x22,\r
1200 PortConnectorTypeUsbTypeC = 0x23,\r
1201 PortConnectorTypePC98 = 0xA0,\r
1202 PortConnectorTypePC98Hireso = 0xA1,\r
1203 PortConnectorTypePCH98 = 0xA2,\r
1204 PortConnectorTypePC98Note = 0xA3,\r
1205 PortConnectorTypePC98Full = 0xA4,\r
1206 PortConnectorTypeOther = 0xFF\r
98cb9ae8 1207} MISC_PORT_CONNECTOR_TYPE;\r
1208\r
1209///\r
9095d37b 1210/// Port Connector Information - Port Types\r
98cb9ae8 1211///\r
1212typedef enum {\r
2f88bd3a
MK		 1213 PortTypeNone = 0x00,\r
1214 PortTypeParallelXtAtCompatible = 0x01,\r
1215 PortTypeParallelPortPs2 = 0x02,\r
1216 PortTypeParallelPortEcp = 0x03,\r
1217 PortTypeParallelPortEpp = 0x04,\r
1218 PortTypeParallelPortEcpEpp = 0x05,\r
1219 PortTypeSerialXtAtCompatible = 0x06,\r
1220 PortTypeSerial16450Compatible = 0x07,\r
1221 PortTypeSerial16550Compatible = 0x08,\r
1222 PortTypeSerial16550ACompatible = 0x09,\r
1223 PortTypeScsi = 0x0A,\r
1224 PortTypeMidi = 0x0B,\r
1225 PortTypeJoyStick = 0x0C,\r
1226 PortTypeKeyboard = 0x0D,\r
1227 PortTypeMouse = 0x0E,\r
1228 PortTypeSsaScsi = 0x0F,\r
1229 PortTypeUsb = 0x10,\r
1230 PortTypeFireWire = 0x11,\r
1231 PortTypePcmciaTypeI = 0x12,\r
1232 PortTypePcmciaTypeII = 0x13,\r
1233 PortTypePcmciaTypeIII = 0x14,\r
1234 PortTypeCardBus = 0x15,\r
1235 PortTypeAccessBusPort = 0x16,\r
1236 PortTypeScsiII = 0x17,\r
1237 PortTypeScsiWide = 0x18,\r
1238 PortTypePC98 = 0x19,\r
1239 PortTypePC98Hireso = 0x1A,\r
1240 PortTypePCH98 = 0x1B,\r
1241 PortTypeVideoPort = 0x1C,\r
1242 PortTypeAudioPort = 0x1D,\r
1243 PortTypeModemPort = 0x1E,\r
1244 PortTypeNetworkPort = 0x1F,\r
1245 PortTypeSata = 0x20,\r
1246 PortTypeSas = 0x21,\r
1247 PortTypeMfdp = 0x22, ///< Multi-Function Display Port\r
1248 PortTypeThunderbolt = 0x23,\r
1249 PortType8251Compatible = 0xA0,\r
1250 PortType8251FifoCompatible = 0xA1,\r
1251 PortTypeOther = 0xFF\r
98cb9ae8 1252} MISC_PORT_TYPE;\r
1253\r
4135253b 1254///\r
af2dc6a7 1255/// Port Connector Information (Type 8).\r
4135253b 1256///\r
9095d37b
LG		 1257/// The information in this structure defines the attributes of a system port connector,\r
1258/// e.g. parallel, serial, keyboard, or mouse ports. The port's type and connector information\r
98cb9ae8 1259/// are provided. One structure is present for each port provided by the system.\r
1260///\r
61ce5861 1261typedef struct {\r
2f88bd3a
MK		 1262 SMBIOS_STRUCTURE Hdr;\r
1263 SMBIOS_TABLE_STRING InternalReferenceDesignator;\r
1264 UINT8 InternalConnectorType; ///< The enumeration value from MISC_PORT_CONNECTOR_TYPE.\r
1265 SMBIOS_TABLE_STRING ExternalReferenceDesignator;\r
1266 UINT8 ExternalConnectorType; ///< The enumeration value from MISC_PORT_CONNECTOR_TYPE.\r
1267 UINT8 PortType; ///< The enumeration value from MISC_PORT_TYPE.\r
61ce5861 1268} SMBIOS_TABLE_TYPE8;\r
1269\r
98cb9ae8 1270///\r
1271/// System Slots - Slot Type\r
1272///\r
1273typedef enum {\r
2f88bd3a
MK		 1274 SlotTypeOther = 0x01,\r
1275 SlotTypeUnknown = 0x02,\r
1276 SlotTypeIsa = 0x03,\r
1277 SlotTypeMca = 0x04,\r
1278 SlotTypeEisa = 0x05,\r
1279 SlotTypePci = 0x06,\r
1280 SlotTypePcmcia = 0x07,\r
1281 SlotTypeVlVesa = 0x08,\r
1282 SlotTypeProprietary = 0x09,\r
1283 SlotTypeProcessorCardSlot = 0x0A,\r
1284 SlotTypeProprietaryMemoryCardSlot = 0x0B,\r
1285 SlotTypeIORiserCardSlot = 0x0C,\r
1286 SlotTypeNuBus = 0x0D,\r
1287 SlotTypePci66MhzCapable = 0x0E,\r
1288 SlotTypeAgp = 0x0F,\r
1289 SlotTypeApg2X = 0x10,\r
1290 SlotTypeAgp4X = 0x11,\r
1291 SlotTypePciX = 0x12,\r
1292 SlotTypeAgp8X = 0x13,\r
1293 SlotTypeM2Socket1_DP = 0x14,\r
1294 SlotTypeM2Socket1_SD = 0x15,\r
1295 SlotTypeM2Socket2 = 0x16,\r
1296 SlotTypeM2Socket3 = 0x17,\r
1297 SlotTypeMxmTypeI = 0x18,\r
1298 SlotTypeMxmTypeII = 0x19,\r
1299 SlotTypeMxmTypeIIIStandard = 0x1A,\r
1300 SlotTypeMxmTypeIIIHe = 0x1B,\r
1301 SlotTypeMxmTypeIV = 0x1C,\r
1302 SlotTypeMxm30TypeA = 0x1D,\r
1303 SlotTypeMxm30TypeB = 0x1E,\r
1304 SlotTypePciExpressGen2Sff_8639 = 0x1F,\r
1305 SlotTypePciExpressGen3Sff_8639 = 0x20,\r
1306 SlotTypePciExpressMini52pinWithBSKO = 0x21, ///< PCI Express Mini 52-pin (CEM spec. 2.0) with bottom-side keep-outs.\r
ff6a1f32 1307 SlotTypePciExpressMini52pinWithoutBSKO = 0x22, ///< PCI Express Mini 52-pin (CEM spec. 2.0) without bottom-side keep-outs.\r
2f88bd3a
MK		 1308 SlotTypePciExpressMini76pin = 0x23, ///< PCI Express Mini 76-pin (CEM spec. 2.0) Corresponds to Display-Mini card.\r
1309 SlotTypeCXLFlexbus10 = 0x30,\r
1310 SlotTypePC98C20 = 0xA0,\r
1311 SlotTypePC98C24 = 0xA1,\r
1312 SlotTypePC98E = 0xA2,\r
1313 SlotTypePC98LocalBus = 0xA3,\r
1314 SlotTypePC98Card = 0xA4,\r
1315 SlotTypePciExpress = 0xA5,\r
1316 SlotTypePciExpressX1 = 0xA6,\r
1317 SlotTypePciExpressX2 = 0xA7,\r
1318 SlotTypePciExpressX4 = 0xA8,\r
1319 SlotTypePciExpressX8 = 0xA9,\r
1320 SlotTypePciExpressX16 = 0xAA,\r
1321 SlotTypePciExpressGen2 = 0xAB,\r
1322 SlotTypePciExpressGen2X1 = 0xAC,\r
1323 SlotTypePciExpressGen2X2 = 0xAD,\r
1324 SlotTypePciExpressGen2X4 = 0xAE,\r
1325 SlotTypePciExpressGen2X8 = 0xAF,\r
1326 SlotTypePciExpressGen2X16 = 0xB0,\r
1327 SlotTypePciExpressGen3 = 0xB1,\r
1328 SlotTypePciExpressGen3X1 = 0xB2,\r
1329 SlotTypePciExpressGen3X2 = 0xB3,\r
1330 SlotTypePciExpressGen3X4 = 0xB4,\r
1331 SlotTypePciExpressGen3X8 = 0xB5,\r
1332 SlotTypePciExpressGen3X16 = 0xB6,\r
1333 SlotTypePciExpressGen4 = 0xB8,\r
1334 SlotTypePciExpressGen4X1 = 0xB9,\r
1335 SlotTypePciExpressGen4X2 = 0xBA,\r
1336 SlotTypePciExpressGen4X4 = 0xBB,\r
1337 SlotTypePciExpressGen4X8 = 0xBC,\r
1338 SlotTypePciExpressGen4X16 = 0xBD\r
98cb9ae8 1339} MISC_SLOT_TYPE;\r
1340\r
1341///\r
af2dc6a7 1342/// System Slots - Slot Data Bus Width.\r
98cb9ae8 1343///\r
1344typedef enum {\r
2f88bd3a
MK		 1345 SlotDataBusWidthOther = 0x01,\r
1346 SlotDataBusWidthUnknown = 0x02,\r
1347 SlotDataBusWidth8Bit = 0x03,\r
1348 SlotDataBusWidth16Bit = 0x04,\r
1349 SlotDataBusWidth32Bit = 0x05,\r
1350 SlotDataBusWidth64Bit = 0x06,\r
1351 SlotDataBusWidth128Bit = 0x07,\r
1352 SlotDataBusWidth1X = 0x08, ///< Or X1\r
1353 SlotDataBusWidth2X = 0x09, ///< Or X2\r
1354 SlotDataBusWidth4X = 0x0A, ///< Or X4\r
1355 SlotDataBusWidth8X = 0x0B, ///< Or X8\r
1356 SlotDataBusWidth12X = 0x0C, ///< Or X12\r
1357 SlotDataBusWidth16X = 0x0D, ///< Or X16\r
1358 SlotDataBusWidth32X = 0x0E ///< Or X32\r
98cb9ae8 1359} MISC_SLOT_DATA_BUS_WIDTH;\r
1360\r
1361///\r
af2dc6a7 1362/// System Slots - Current Usage.\r
98cb9ae8 1363///\r
1364typedef enum {\r
2f88bd3a
MK		 1365 SlotUsageOther = 0x01,\r
1366 SlotUsageUnknown = 0x02,\r
1367 SlotUsageAvailable = 0x03,\r
1368 SlotUsageInUse = 0x04,\r
1369 SlotUsageUnavailable = 0x05\r
98cb9ae8 1370} MISC_SLOT_USAGE;\r
1371\r
1372///\r
9095d37b 1373/// System Slots - Slot Length.\r
98cb9ae8 1374///\r
1375typedef enum {\r
1376 SlotLengthOther = 0x01,\r
1377 SlotLengthUnknown = 0x02,\r
1378 SlotLengthShort = 0x03,\r
1379 SlotLengthLong = 0x04\r
1380} MISC_SLOT_LENGTH;\r
1381\r
1382///\r
9095d37b 1383/// System Slots - Slot Characteristics 1.\r
98cb9ae8 1384///\r
1385typedef struct {\r
2f88bd3a
MK		 1386 UINT8 CharacteristicsUnknown : 1;\r
1387 UINT8 Provides50Volts : 1;\r
1388 UINT8 Provides33Volts : 1;\r
1389 UINT8 SharedSlot : 1;\r
1390 UINT8 PcCard16Supported : 1;\r
1391 UINT8 CardBusSupported : 1;\r
1392 UINT8 ZoomVideoSupported : 1;\r
1393 UINT8 ModemRingResumeSupported : 1;\r
98cb9ae8 1394} MISC_SLOT_CHARACTERISTICS1;\r
1395///\r
9095d37b 1396/// System Slots - Slot Characteristics 2.\r
98cb9ae8 1397///\r
1398typedef struct {\r
2f88bd3a
MK		 1399 UINT8 PmeSignalSupported : 1;\r
1400 UINT8 HotPlugDevicesSupported : 1;\r
1401 UINT8 SmbusSignalSupported : 1;\r
1402 UINT8 BifurcationSupported : 1;\r
1403 UINT8 AsyncSurpriseRemoval : 1;\r
1404 UINT8 FlexbusSlotCxl10Capable : 1;\r
1405 UINT8 FlexbusSlotCxl20Capable : 1;\r
1406 UINT8 Reserved : 1; ///< Set to 0.\r
98cb9ae8 1407} MISC_SLOT_CHARACTERISTICS2;\r
1408\r
28eeb08d
ALA		 1409///\r
1410/// System Slots - Slot Height\r
1411///\r
1412typedef enum {\r
1413 SlotHeightNone = 0x00,\r
1414 SlotHeightOther = 0x01,\r
1415 SlotHeightUnknown = 0x02,\r
1416 SlotHeightFullHeight = 0x03,\r
1417 SlotHeightLowProfile = 0x04\r
1418} MISC_SLOT_HEIGHT;\r
1419\r
cfcca3c2
SZ		 1420///\r
1421/// System Slots - Peer Segment/Bus/Device/Function/Width Groups\r
1422///\r
1423typedef struct {\r
2f88bd3a
MK		 1424 UINT16 SegmentGroupNum;\r
1425 UINT8 BusNum;\r
1426 UINT8 DevFuncNum;\r
1427 UINT8 DataBusWidth;\r
cfcca3c2
SZ		 1428} MISC_SLOT_PEER_GROUP;\r
1429\r
4135253b 1430///\r
1431/// System Slots (Type 9)\r
1432///\r
9095d37b 1433/// The information in this structure defines the attributes of a system slot.\r
98cb9ae8 1434/// One structure is provided for each slot in the system.\r
1435///\r
1436///\r
61ce5861 1437typedef struct {\r
2f88bd3a
MK		 1438 SMBIOS_STRUCTURE Hdr;\r
1439 SMBIOS_TABLE_STRING SlotDesignation;\r
1440 UINT8 SlotType; ///< The enumeration value from MISC_SLOT_TYPE.\r
1441 UINT8 SlotDataBusWidth; ///< The enumeration value from MISC_SLOT_DATA_BUS_WIDTH.\r
1442 UINT8 CurrentUsage; ///< The enumeration value from MISC_SLOT_USAGE.\r
1443 UINT8 SlotLength; ///< The enumeration value from MISC_SLOT_LENGTH.\r
1444 UINT16 SlotID;\r
1445 MISC_SLOT_CHARACTERISTICS1 SlotCharacteristics1;\r
1446 MISC_SLOT_CHARACTERISTICS2 SlotCharacteristics2;\r
61ce5861 1447 //\r
1448 // Add for smbios 2.6\r
1449 //\r
2f88bd3a
MK		 1450 UINT16 SegmentGroupNum;\r
1451 UINT8 BusNum;\r
1452 UINT8 DevFuncNum;\r
cfcca3c2
SZ		 1453 //\r
1454 // Add for smbios 3.2\r
1455 //\r
2f88bd3a
MK		 1456 UINT8 DataBusWidth;\r
1457 UINT8 PeerGroupingCount;\r
1458 MISC_SLOT_PEER_GROUP PeerGroups[1];\r
885efcd3 1459 //\r
1460 // Add for smbios 3.4\r
1461 //\r
2f88bd3a
MK		 1462 UINT8 SlotInformation;\r
1463 UINT8 SlotPhysicalWidth;\r
1464 UINT16 SlotPitch;\r
28eeb08d
ALA		 1465 //\r
1466 // Add for smbios 3.5\r
1467 //\r
1468 UINT8 SlotHeight; ///< The enumeration value from MISC_SLOT_HEIGHT.\r
61ce5861 1469} SMBIOS_TABLE_TYPE9;\r
1470\r
98cb9ae8 1471///\r
9095d37b 1472/// On Board Devices Information - Device Types.\r
98cb9ae8 1473///\r
1474typedef enum {\r
1475 OnBoardDeviceTypeOther = 0x01,\r
1476 OnBoardDeviceTypeUnknown = 0x02,\r
1477 OnBoardDeviceTypeVideo = 0x03,\r
1478 OnBoardDeviceTypeScsiController = 0x04,\r
1479 OnBoardDeviceTypeEthernet = 0x05,\r
1480 OnBoardDeviceTypeTokenRing = 0x06,\r
119c1688
SZ		 1481 OnBoardDeviceTypeSound = 0x07,\r
1482 OnBoardDeviceTypePATAController = 0x08,\r
1483 OnBoardDeviceTypeSATAController = 0x09,\r
1484 OnBoardDeviceTypeSASController = 0x0A\r
98cb9ae8 1485} MISC_ONBOARD_DEVICE_TYPE;\r
1486\r
bf7ea009 1487///\r
1488/// Device Item Entry\r
1489///\r
61ce5861 1490typedef struct {\r
2f88bd3a 1491 UINT8 DeviceType; ///< Bit [6:0] - enumeration type of device from MISC_ONBOARD_DEVICE_TYPE.\r
af2dc6a7 1492 ///< Bit 7 - 1 : device enabled, 0 : device disabled.\r
2f88bd3a 1493 SMBIOS_TABLE_STRING DescriptionString;\r
61ce5861 1494} DEVICE_STRUCT;\r
1495\r
4135253b 1496///\r
af2dc6a7 1497/// On Board Devices Information (Type 10, obsolete).\r
4135253b 1498///\r
9095d37b
LG		 1499/// Note: This structure is obsolete starting with version 2.6 specification; the Onboard Devices Extended\r
1500/// Information (Type 41) structure should be used instead . BIOS providers can choose to implement both\r
1501/// types to allow existing SMBIOS browsers to properly display the system's onboard devices information.\r
1502/// The information in this structure defines the attributes of devices that are onboard (soldered onto)\r
98cb9ae8 1503/// a system element, usually the baseboard. In general, an entry in this table implies that the BIOS\r
1504/// has some level of control over the enabling of the associated device for use by the system.\r
1505///\r
61ce5861 1506typedef struct {\r
2f88bd3a
MK		 1507 SMBIOS_STRUCTURE Hdr;\r
1508 DEVICE_STRUCT Device[1];\r
61ce5861 1509} SMBIOS_TABLE_TYPE10;\r
1510\r
4135253b 1511///\r
af2dc6a7 1512/// OEM Strings (Type 11).\r
9095d37b
LG		 1513/// This structure contains free form strings defined by the OEM. Examples of this are:\r
1514/// Part Numbers for Reference Documents for the system, contact information for the manufacturer, etc.\r
4135253b 1515///\r
61ce5861 1516typedef struct {\r
2f88bd3a
MK		 1517 SMBIOS_STRUCTURE Hdr;\r
1518 UINT8 StringCount;\r
61ce5861 1519} SMBIOS_TABLE_TYPE11;\r
1520\r
4135253b 1521///\r
af2dc6a7 1522/// System Configuration Options (Type 12).\r
4135253b 1523///\r
9095d37b 1524/// This structure contains information required to configure the base board's Jumpers and Switches.\r
98cb9ae8 1525///\r
61ce5861 1526typedef struct {\r
2f88bd3a
MK		 1527 SMBIOS_STRUCTURE Hdr;\r
1528 UINT8 StringCount;\r
61ce5861 1529} SMBIOS_TABLE_TYPE12;\r
1530\r
4135253b 1531///\r
af2dc6a7 1532/// BIOS Language Information (Type 13).\r
4135253b 1533///\r
9095d37b
LG		 1534/// The information in this structure defines the installable language attributes of the BIOS.\r
1535///\r
61ce5861 1536typedef struct {\r
2f88bd3a
MK		 1537 SMBIOS_STRUCTURE Hdr;\r
1538 UINT8 InstallableLanguages;\r
1539 UINT8 Flags;\r
1540 UINT8 Reserved[15];\r
1541 SMBIOS_TABLE_STRING CurrentLanguages;\r
61ce5861 1542} SMBIOS_TABLE_TYPE13;\r
1543\r
119c1688
SZ		 1544///\r
1545/// Group Item Entry\r
1546///\r
1547typedef struct {\r
2f88bd3a
MK		 1548 UINT8 ItemType;\r
1549 UINT16 ItemHandle;\r
119c1688
SZ		 1550} GROUP_STRUCT;\r
1551\r
1552///\r
1553/// Group Associations (Type 14).\r
1554///\r
9095d37b
LG		 1555/// The Group Associations structure is provided for OEMs who want to specify\r
1556/// the arrangement or hierarchy of certain components (including other Group Associations)\r
1557/// within the system.\r
119c1688
SZ		 1558///\r
1559typedef struct {\r
2f88bd3a
MK		 1560 SMBIOS_STRUCTURE Hdr;\r
1561 SMBIOS_TABLE_STRING GroupName;\r
1562 GROUP_STRUCT Group[1];\r
119c1688
SZ		 1563} SMBIOS_TABLE_TYPE14;\r
1564\r
98cb9ae8 1565///\r
af2dc6a7 1566/// System Event Log - Event Log Types.\r
9095d37b 1567///\r
98cb9ae8 1568typedef enum {\r
2f88bd3a
MK		 1569 EventLogTypeReserved = 0x00,\r
1570 EventLogTypeSingleBitECC = 0x01,\r
1571 EventLogTypeMultiBitECC = 0x02,\r
1572 EventLogTypeParityMemErr = 0x03,\r
1573 EventLogTypeBusTimeOut = 0x04,\r
1574 EventLogTypeIOChannelCheck = 0x05,\r
1575 EventLogTypeSoftwareNMI = 0x06,\r
1576 EventLogTypePOSTMemResize = 0x07,\r
1577 EventLogTypePOSTErr = 0x08,\r
1578 EventLogTypePCIParityErr = 0x09,\r
1579 EventLogTypePCISystemErr = 0x0A,\r
1580 EventLogTypeCPUFailure = 0x0B,\r
1581 EventLogTypeEISATimeOut = 0x0C,\r
1582 EventLogTypeMemLogDisabled = 0x0D,\r
1583 EventLogTypeLoggingDisabled = 0x0E,\r
1584 EventLogTypeSysLimitExce = 0x10,\r
1585 EventLogTypeAsyncHWTimer = 0x11,\r
1586 EventLogTypeSysConfigInfo = 0x12,\r
1587 EventLogTypeHDInfo = 0x13,\r
1588 EventLogTypeSysReconfig = 0x14,\r
1589 EventLogTypeUncorrectCPUErr = 0x15,\r
1590 EventLogTypeAreaResetAndClr = 0x16,\r
1591 EventLogTypeSystemBoot = 0x17,\r
1592 EventLogTypeUnused = 0x18, ///< 0x18 - 0x7F\r
1593 EventLogTypeAvailForSys = 0x80, ///< 0x80 - 0xFE\r
1594 EventLogTypeEndOfLog = 0xFF\r
98cb9ae8 1595} EVENT_LOG_TYPE_DATA;\r
1596\r
1597///\r
9095d37b
LG		 1598/// System Event Log - Variable Data Format Types.\r
1599///\r
98cb9ae8 1600typedef enum {\r
2f88bd3a
MK		 1601 EventLogVariableNone = 0x00,\r
1602 EventLogVariableHandle = 0x01,\r
1603 EventLogVariableMutilEvent = 0x02,\r
1604 EventLogVariableMutilEventHandle = 0x03,\r
1605 EventLogVariablePOSTResultBitmap = 0x04,\r
1606 EventLogVariableSysManagementType = 0x05,\r
1607 EventLogVariableMutliEventSysManagmentType = 0x06,\r
1608 EventLogVariableUnused = 0x07,\r
1609 EventLogVariableOEMAssigned = 0x80\r
55deb978 1610} EVENT_LOG_VARIABLE_DATA;\r
98cb9ae8 1611\r
98cb9ae8 1612///\r
1613/// Event Log Type Descriptors\r
1614///\r
1615typedef struct {\r
2f88bd3a
MK		 1616 UINT8 LogType; ///< The enumeration value from EVENT_LOG_TYPE_DATA.\r
1617 UINT8 DataFormatType;\r
98cb9ae8 1618} EVENT_LOG_TYPE;\r
1619\r
4135253b 1620///\r
af2dc6a7 1621/// System Event Log (Type 15).\r
4135253b 1622///\r
9095d37b
LG		 1623/// The presence of this structure within the SMBIOS data returned for a system indicates\r
1624/// that the system supports an event log. An event log is a fixed-length area within a\r
1625/// non-volatile storage element, starting with a fixed-length (and vendor-specific) header\r
1626/// record, followed by one or more variable-length log records.\r
98cb9ae8 1627///\r
61ce5861 1628typedef struct {\r
2f88bd3a
MK		 1629 SMBIOS_STRUCTURE Hdr;\r
1630 UINT16 LogAreaLength;\r
1631 UINT16 LogHeaderStartOffset;\r
1632 UINT16 LogDataStartOffset;\r
1633 UINT8 AccessMethod;\r
1634 UINT8 LogStatus;\r
1635 UINT32 LogChangeToken;\r
1636 UINT32 AccessMethodAddress;\r
1637 UINT8 LogHeaderFormat;\r
1638 UINT8 NumberOfSupportedLogTypeDescriptors;\r
1639 UINT8 LengthOfLogTypeDescriptor;\r
1640 EVENT_LOG_TYPE EventLogTypeDescriptors[1];\r
61ce5861 1641} SMBIOS_TABLE_TYPE15;\r
1642\r
98cb9ae8 1643///\r
af2dc6a7 1644/// Physical Memory Array - Location.\r
98cb9ae8 1645///\r
1646typedef enum {\r
1647 MemoryArrayLocationOther = 0x01,\r
1648 MemoryArrayLocationUnknown = 0x02,\r
1649 MemoryArrayLocationSystemBoard = 0x03,\r
1650 MemoryArrayLocationIsaAddonCard = 0x04,\r
1651 MemoryArrayLocationEisaAddonCard = 0x05,\r
1652 MemoryArrayLocationPciAddonCard = 0x06,\r
1653 MemoryArrayLocationMcaAddonCard = 0x07,\r
1654 MemoryArrayLocationPcmciaAddonCard = 0x08,\r
1655 MemoryArrayLocationProprietaryAddonCard = 0x09,\r
1656 MemoryArrayLocationNuBus = 0x0A,\r
1657 MemoryArrayLocationPc98C20AddonCard = 0xA0,\r
1658 MemoryArrayLocationPc98C24AddonCard = 0xA1,\r
1659 MemoryArrayLocationPc98EAddonCard = 0xA2,\r
9e50ef63 1660 MemoryArrayLocationPc98LocalBusAddonCard = 0xA3,\r
885efcd3 1661 MemoryArrayLocationCXLAddonCard = 0xA4\r
98cb9ae8 1662} MEMORY_ARRAY_LOCATION;\r
1663\r
1664///\r
af2dc6a7 1665/// Physical Memory Array - Use.\r
98cb9ae8 1666///\r
1667typedef enum {\r
2f88bd3a
MK		 1668 MemoryArrayUseOther = 0x01,\r
1669 MemoryArrayUseUnknown = 0x02,\r
1670 MemoryArrayUseSystemMemory = 0x03,\r
1671 MemoryArrayUseVideoMemory = 0x04,\r
1672 MemoryArrayUseFlashMemory = 0x05,\r
1673 MemoryArrayUseNonVolatileRam = 0x06,\r
1674 MemoryArrayUseCacheMemory = 0x07\r
98cb9ae8 1675} MEMORY_ARRAY_USE;\r
1676\r
1677///\r
9095d37b 1678/// Physical Memory Array - Error Correction Types.\r
98cb9ae8 1679///\r
1680typedef enum {\r
2f88bd3a
MK		 1681 MemoryErrorCorrectionOther = 0x01,\r
1682 MemoryErrorCorrectionUnknown = 0x02,\r
1683 MemoryErrorCorrectionNone = 0x03,\r
1684 MemoryErrorCorrectionParity = 0x04,\r
1685 MemoryErrorCorrectionSingleBitEcc = 0x05,\r
1686 MemoryErrorCorrectionMultiBitEcc = 0x06,\r
1687 MemoryErrorCorrectionCrc = 0x07\r
98cb9ae8 1688} MEMORY_ERROR_CORRECTION;\r
1689\r
4135253b 1690///\r
af2dc6a7 1691/// Physical Memory Array (Type 16).\r
4135253b 1692///\r
9095d37b
LG		 1693/// This structure describes a collection of memory devices that operate\r
1694/// together to form a memory address space.\r
98cb9ae8 1695///\r
61ce5861 1696typedef struct {\r
2f88bd3a
MK		 1697 SMBIOS_STRUCTURE Hdr;\r
1698 UINT8 Location; ///< The enumeration value from MEMORY_ARRAY_LOCATION.\r
1699 UINT8 Use; ///< The enumeration value from MEMORY_ARRAY_USE.\r
1700 UINT8 MemoryErrorCorrection; ///< The enumeration value from MEMORY_ERROR_CORRECTION.\r
1701 UINT32 MaximumCapacity;\r
1702 UINT16 MemoryErrorInformationHandle;\r
1703 UINT16 NumberOfMemoryDevices;\r
7ddba202
SZ		 1704 //\r
1705 // Add for smbios 2.7\r
1706 //\r
2f88bd3a 1707 UINT64 ExtendedMaximumCapacity;\r
61ce5861 1708} SMBIOS_TABLE_TYPE16;\r
1709\r
98cb9ae8 1710///\r
af2dc6a7 1711/// Memory Device - Form Factor.\r
98cb9ae8 1712///\r
1713typedef enum {\r
2f88bd3a
MK		 1714 MemoryFormFactorOther = 0x01,\r
1715 MemoryFormFactorUnknown = 0x02,\r
1716 MemoryFormFactorSimm = 0x03,\r
1717 MemoryFormFactorSip = 0x04,\r
1718 MemoryFormFactorChip = 0x05,\r
1719 MemoryFormFactorDip = 0x06,\r
1720 MemoryFormFactorZip = 0x07,\r
1721 MemoryFormFactorProprietaryCard = 0x08,\r
1722 MemoryFormFactorDimm = 0x09,\r
1723 MemoryFormFactorTsop = 0x0A,\r
1724 MemoryFormFactorRowOfChips = 0x0B,\r
1725 MemoryFormFactorRimm = 0x0C,\r
1726 MemoryFormFactorSodimm = 0x0D,\r
1727 MemoryFormFactorSrimm = 0x0E,\r
1728 MemoryFormFactorFbDimm = 0x0F,\r
1729 MemoryFormFactorDie = 0x10\r
98cb9ae8 1730} MEMORY_FORM_FACTOR;\r
1731\r
1732///\r
1733/// Memory Device - Type\r
1734///\r
1735typedef enum {\r
2f88bd3a
MK		 1736 MemoryTypeOther = 0x01,\r
1737 MemoryTypeUnknown = 0x02,\r
1738 MemoryTypeDram = 0x03,\r
1739 MemoryTypeEdram = 0x04,\r
1740 MemoryTypeVram = 0x05,\r
1741 MemoryTypeSram = 0x06,\r
1742 MemoryTypeRam = 0x07,\r
1743 MemoryTypeRom = 0x08,\r
1744 MemoryTypeFlash = 0x09,\r
1745 MemoryTypeEeprom = 0x0A,\r
1746 MemoryTypeFeprom = 0x0B,\r
1747 MemoryTypeEprom = 0x0C,\r
1748 MemoryTypeCdram = 0x0D,\r
1749 MemoryType3Dram = 0x0E,\r
1750 MemoryTypeSdram = 0x0F,\r
1751 MemoryTypeSgram = 0x10,\r
1752 MemoryTypeRdram = 0x11,\r
1753 MemoryTypeDdr = 0x12,\r
1754 MemoryTypeDdr2 = 0x13,\r
1755 MemoryTypeDdr2FbDimm = 0x14,\r
1756 MemoryTypeDdr3 = 0x18,\r
1757 MemoryTypeFbd2 = 0x19,\r
1758 MemoryTypeDdr4 = 0x1A,\r
1759 MemoryTypeLpddr = 0x1B,\r
1760 MemoryTypeLpddr2 = 0x1C,\r
1761 MemoryTypeLpddr3 = 0x1D,\r
1762 MemoryTypeLpddr4 = 0x1E,\r
1763 MemoryTypeLogicalNonVolatileDevice = 0x1F,\r
1764 MemoryTypeHBM = 0x20,\r
1765 MemoryTypeHBM2 = 0x21,\r
1766 MemoryTypeDdr5 = 0x22,\r
1767 MemoryTypeLpddr5 = 0x23\r
98cb9ae8 1768} MEMORY_DEVICE_TYPE;\r
1769\r
cfcca3c2
SZ		 1770///\r
1771/// Memory Device - Type Detail\r
1772///\r
98cb9ae8 1773typedef struct {\r
2f88bd3a
MK		 1774 UINT16 Reserved : 1;\r
1775 UINT16 Other : 1;\r
1776 UINT16 Unknown : 1;\r
1777 UINT16 FastPaged : 1;\r
1778 UINT16 StaticColumn : 1;\r
1779 UINT16 PseudoStatic : 1;\r
1780 UINT16 Rambus : 1;\r
1781 UINT16 Synchronous : 1;\r
1782 UINT16 Cmos : 1;\r
1783 UINT16 Edo : 1;\r
1784 UINT16 WindowDram : 1;\r
1785 UINT16 CacheDram : 1;\r
1786 UINT16 Nonvolatile : 1;\r
1787 UINT16 Registered : 1;\r
1788 UINT16 Unbuffered : 1;\r
1789 UINT16 LrDimm : 1;\r
98cb9ae8 1790} MEMORY_DEVICE_TYPE_DETAIL;\r
1791\r
cfcca3c2
SZ		 1792///\r
1793/// Memory Device - Memory Technology\r
1794///\r
1795typedef enum {\r
2f88bd3a
MK		 1796 MemoryTechnologyOther = 0x01,\r
1797 MemoryTechnologyUnknown = 0x02,\r
1798 MemoryTechnologyDram = 0x03,\r
1799 MemoryTechnologyNvdimmN = 0x04,\r
1800 MemoryTechnologyNvdimmF = 0x05,\r
1801 MemoryTechnologyNvdimmP = 0x06,\r
4b7edd78
ZG		 1802 //\r
1803 // This definition is updated to represent Intel\r
885efcd3 1804 // Optane DC Persistent Memory in SMBIOS spec 3.4.0\r
4b7edd78 1805 //\r
2f88bd3a 1806 MemoryTechnologyIntelOptanePersistentMemory = 0x07\r
cfcca3c2
SZ		 1807} MEMORY_DEVICE_TECHNOLOGY;\r
1808\r
1809///\r
1810/// Memory Device - Memory Operating Mode Capability\r
1811///\r
1812typedef union {\r
1813 ///\r
1814 /// Individual bit fields\r
1815 ///\r
1816 struct {\r
2f88bd3a
MK		 1817 UINT16 Reserved : 1; ///< Set to 0.\r
1818 UINT16 Other : 1;\r
1819 UINT16 Unknown : 1;\r
1820 UINT16 VolatileMemory : 1;\r
1821 UINT16 ByteAccessiblePersistentMemory : 1;\r
1822 UINT16 BlockAccessiblePersistentMemory : 1;\r
1823 UINT16 Reserved2 : 10; ///< Set to 0.\r
cfcca3c2
SZ		 1824 } Bits;\r
1825 ///\r
1826 /// All bit fields as a 16-bit value\r
1827 ///\r
2f88bd3a 1828 UINT16 Uint16;\r
cfcca3c2
SZ		 1829} MEMORY_DEVICE_OPERATING_MODE_CAPABILITY;\r
1830\r
4135253b 1831///\r
af2dc6a7 1832/// Memory Device (Type 17).\r
4135253b 1833///\r
9095d37b 1834/// This structure describes a single memory device that is part of\r
98cb9ae8 1835/// a larger Physical Memory Array (Type 16).\r
9095d37b
LG		 1836/// Note: If a system includes memory-device sockets, the SMBIOS implementation\r
1837/// includes a Memory Device structure instance for each slot, whether or not the\r
98cb9ae8 1838/// socket is currently populated.\r
1839///\r
61ce5861 1840typedef struct {\r
2f88bd3a
MK		 1841 SMBIOS_STRUCTURE Hdr;\r
1842 UINT16 MemoryArrayHandle;\r
1843 UINT16 MemoryErrorInformationHandle;\r
1844 UINT16 TotalWidth;\r
1845 UINT16 DataWidth;\r
1846 UINT16 Size;\r
1847 UINT8 FormFactor; ///< The enumeration value from MEMORY_FORM_FACTOR.\r
1848 UINT8 DeviceSet;\r
1849 SMBIOS_TABLE_STRING DeviceLocator;\r
1850 SMBIOS_TABLE_STRING BankLocator;\r
1851 UINT8 MemoryType; ///< The enumeration value from MEMORY_DEVICE_TYPE.\r
1852 MEMORY_DEVICE_TYPE_DETAIL TypeDetail;\r
1853 UINT16 Speed;\r
1854 SMBIOS_TABLE_STRING Manufacturer;\r
1855 SMBIOS_TABLE_STRING SerialNumber;\r
1856 SMBIOS_TABLE_STRING AssetTag;\r
1857 SMBIOS_TABLE_STRING PartNumber;\r
61ce5861 1858 //\r
1859 // Add for smbios 2.6\r
9095d37b 1860 //\r
2f88bd3a 1861 UINT8 Attributes;\r
7ddba202
SZ		 1862 //\r
1863 // Add for smbios 2.7\r
1864 //\r
2f88bd3a 1865 UINT32 ExtendedSize;\r
cfcca3c2
SZ		 1866 //\r
1867 // Keep using name "ConfiguredMemoryClockSpeed" for compatibility\r
1868 // although this field is renamed from "Configured Memory Clock Speed"\r
1869 // to "Configured Memory Speed" in smbios 3.2.0.\r
1870 //\r
2f88bd3a 1871 UINT16 ConfiguredMemoryClockSpeed;\r
4a228334
EL		 1872 //\r
1873 // Add for smbios 2.8.0\r
1874 //\r
2f88bd3a
MK		 1875 UINT16 MinimumVoltage;\r
1876 UINT16 MaximumVoltage;\r
1877 UINT16 ConfiguredVoltage;\r
cfcca3c2
SZ		 1878 //\r
1879 // Add for smbios 3.2.0\r
1880 //\r
2f88bd3a
MK		 1881 UINT8 MemoryTechnology; ///< The enumeration value from MEMORY_DEVICE_TECHNOLOGY\r
1882 MEMORY_DEVICE_OPERATING_MODE_CAPABILITY MemoryOperatingModeCapability;\r
1883 SMBIOS_TABLE_STRING FirmwareVersion;\r
1884 UINT16 ModuleManufacturerID;\r
1885 UINT16 ModuleProductID;\r
1886 UINT16 MemorySubsystemControllerManufacturerID;\r
1887 UINT16 MemorySubsystemControllerProductID;\r
1888 UINT64 NonVolatileSize;\r
1889 UINT64 VolatileSize;\r
1890 UINT64 CacheSize;\r
1891 UINT64 LogicalSize;\r
67ead55b
MC		 1892 //\r
1893 // Add for smbios 3.3.0\r
1894 //\r
2f88bd3a
MK		 1895 UINT32 ExtendedSpeed;\r
1896 UINT32 ExtendedConfiguredMemorySpeed;\r
61ce5861 1897} SMBIOS_TABLE_TYPE17;\r
1898\r
98cb9ae8 1899///\r
9095d37b 1900/// 32-bit Memory Error Information - Error Type.\r
98cb9ae8 1901///\r
9095d37b 1902typedef enum {\r
2f88bd3a
MK		 1903 MemoryErrorOther = 0x01,\r
1904 MemoryErrorUnknown = 0x02,\r
1905 MemoryErrorOk = 0x03,\r
1906 MemoryErrorBadRead = 0x04,\r
1907 MemoryErrorParity = 0x05,\r
1908 MemoryErrorSigleBit = 0x06,\r
1909 MemoryErrorDoubleBit = 0x07,\r
1910 MemoryErrorMultiBit = 0x08,\r
1911 MemoryErrorNibble = 0x09,\r
1912 MemoryErrorChecksum = 0x0A,\r
1913 MemoryErrorCrc = 0x0B,\r
1914 MemoryErrorCorrectSingleBit = 0x0C,\r
1915 MemoryErrorCorrected = 0x0D,\r
1916 MemoryErrorUnCorrectable = 0x0E\r
98cb9ae8 1917} MEMORY_ERROR_TYPE;\r
1918\r
1919///\r
9095d37b 1920/// 32-bit Memory Error Information - Error Granularity.\r
98cb9ae8 1921///\r
9095d37b 1922typedef enum {\r
2f88bd3a
MK		 1923 MemoryGranularityOther = 0x01,\r
1924 MemoryGranularityOtherUnknown = 0x02,\r
1925 MemoryGranularityDeviceLevel = 0x03,\r
1926 MemoryGranularityMemPartitionLevel = 0x04\r
98cb9ae8 1927} MEMORY_ERROR_GRANULARITY;\r
1928\r
1929///\r
9095d37b 1930/// 32-bit Memory Error Information - Error Operation.\r
98cb9ae8 1931///\r
9095d37b 1932typedef enum {\r
2f88bd3a
MK		 1933 MemoryErrorOperationOther = 0x01,\r
1934 MemoryErrorOperationUnknown = 0x02,\r
1935 MemoryErrorOperationRead = 0x03,\r
1936 MemoryErrorOperationWrite = 0x04,\r
1937 MemoryErrorOperationPartialWrite = 0x05\r
98cb9ae8 1938} MEMORY_ERROR_OPERATION;\r
1939\r
4135253b 1940///\r
af2dc6a7 1941/// 32-bit Memory Error Information (Type 18).\r
9095d37b
LG		 1942///\r
1943/// This structure identifies the specifics of an error that might be detected\r
98cb9ae8 1944/// within a Physical Memory Array.\r
4135253b 1945///\r
61ce5861 1946typedef struct {\r
2f88bd3a
MK		 1947 SMBIOS_STRUCTURE Hdr;\r
1948 UINT8 ErrorType; ///< The enumeration value from MEMORY_ERROR_TYPE.\r
1949 UINT8 ErrorGranularity; ///< The enumeration value from MEMORY_ERROR_GRANULARITY.\r
1950 UINT8 ErrorOperation; ///< The enumeration value from MEMORY_ERROR_OPERATION.\r
1951 UINT32 VendorSyndrome;\r
1952 UINT32 MemoryArrayErrorAddress;\r
1953 UINT32 DeviceErrorAddress;\r
1954 UINT32 ErrorResolution;\r
61ce5861 1955} SMBIOS_TABLE_TYPE18;\r
1956\r
4135253b 1957///\r
af2dc6a7 1958/// Memory Array Mapped Address (Type 19).\r
4135253b 1959///\r
9095d37b 1960/// This structure provides the address mapping for a Physical Memory Array.\r
98cb9ae8 1961/// One structure is present for each contiguous address range described.\r
1962///\r
61ce5861 1963typedef struct {\r
2f88bd3a
MK		 1964 SMBIOS_STRUCTURE Hdr;\r
1965 UINT32 StartingAddress;\r
1966 UINT32 EndingAddress;\r
1967 UINT16 MemoryArrayHandle;\r
1968 UINT8 PartitionWidth;\r
7ddba202
SZ		 1969 //\r
1970 // Add for smbios 2.7\r
1971 //\r
2f88bd3a
MK		 1972 UINT64 ExtendedStartingAddress;\r
1973 UINT64 ExtendedEndingAddress;\r
61ce5861 1974} SMBIOS_TABLE_TYPE19;\r
1975\r
4135253b 1976///\r
af2dc6a7 1977/// Memory Device Mapped Address (Type 20).\r
4135253b 1978///\r
9095d37b
LG		 1979/// This structure maps memory address space usually to a device-level granularity.\r
1980/// One structure is present for each contiguous address range described.\r
98cb9ae8 1981///\r
61ce5861 1982typedef struct {\r
2f88bd3a
MK		 1983 SMBIOS_STRUCTURE Hdr;\r
1984 UINT32 StartingAddress;\r
1985 UINT32 EndingAddress;\r
1986 UINT16 MemoryDeviceHandle;\r
1987 UINT16 MemoryArrayMappedAddressHandle;\r
1988 UINT8 PartitionRowPosition;\r
1989 UINT8 InterleavePosition;\r
1990 UINT8 InterleavedDataDepth;\r
7ddba202
SZ		 1991 //\r
1992 // Add for smbios 2.7\r
1993 //\r
2f88bd3a
MK		 1994 UINT64 ExtendedStartingAddress;\r
1995 UINT64 ExtendedEndingAddress;\r
61ce5861 1996} SMBIOS_TABLE_TYPE20;\r
1997\r
98cb9ae8 1998///\r
1999/// Built-in Pointing Device - Type\r
2000///\r
2001typedef enum {\r
2f88bd3a
MK		 2002 PointingDeviceTypeOther = 0x01,\r
2003 PointingDeviceTypeUnknown = 0x02,\r
2004 PointingDeviceTypeMouse = 0x03,\r
2005 PointingDeviceTypeTrackBall = 0x04,\r
2006 PointingDeviceTypeTrackPoint = 0x05,\r
2007 PointingDeviceTypeGlidePoint = 0x06,\r
2008 PointingDeviceTouchPad = 0x07,\r
2009 PointingDeviceTouchScreen = 0x08,\r
2010 PointingDeviceOpticalSensor = 0x09\r
98cb9ae8 2011} BUILTIN_POINTING_DEVICE_TYPE;\r
2012\r
2013///\r
af2dc6a7 2014/// Built-in Pointing Device - Interface.\r
98cb9ae8 2015///\r
2016typedef enum {\r
2f88bd3a
MK		 2017 PointingDeviceInterfaceOther = 0x01,\r
2018 PointingDeviceInterfaceUnknown = 0x02,\r
2019 PointingDeviceInterfaceSerial = 0x03,\r
2020 PointingDeviceInterfacePs2 = 0x04,\r
2021 PointingDeviceInterfaceInfrared = 0x05,\r
2022 PointingDeviceInterfaceHpHil = 0x06,\r
2023 PointingDeviceInterfaceBusMouse = 0x07,\r
2024 PointingDeviceInterfaceADB = 0x08,\r
2025 PointingDeviceInterfaceBusMouseDB9 = 0xA0,\r
2026 PointingDeviceInterfaceBusMouseMicroDin = 0xA1,\r
28eeb08d
ALA		 2027 PointingDeviceInterfaceUsb = 0xA2,\r
2028 PointingDeviceInterfaceI2c = 0xA3,\r
2029 PointingDeviceInterfaceSpi = 0xA4\r
98cb9ae8 2030} BUILTIN_POINTING_DEVICE_INTERFACE;\r
2031\r
4135253b 2032///\r
af2dc6a7 2033/// Built-in Pointing Device (Type 21).\r
4135253b 2034///\r
9095d37b 2035/// This structure describes the attributes of the built-in pointing device for the\r
af2dc6a7 2036/// system. The presence of this structure does not imply that the built-in\r
9095d37b 2037/// pointing device is active for the system's use!\r
98cb9ae8 2038///\r
61ce5861 2039typedef struct {\r
2f88bd3a
MK		 2040 SMBIOS_STRUCTURE Hdr;\r
2041 UINT8 Type; ///< The enumeration value from BUILTIN_POINTING_DEVICE_TYPE.\r
2042 UINT8 Interface; ///< The enumeration value from BUILTIN_POINTING_DEVICE_INTERFACE.\r
2043 UINT8 NumberOfButtons;\r
61ce5861 2044} SMBIOS_TABLE_TYPE21;\r
2045\r
98cb9ae8 2046///\r
2047/// Portable Battery - Device Chemistry\r
2048///\r
9095d37b 2049typedef enum {\r
2f88bd3a
MK		 2050 PortableBatteryDeviceChemistryOther = 0x01,\r
2051 PortableBatteryDeviceChemistryUnknown = 0x02,\r
2052 PortableBatteryDeviceChemistryLeadAcid = 0x03,\r
2053 PortableBatteryDeviceChemistryNickelCadmium = 0x04,\r
2054 PortableBatteryDeviceChemistryNickelMetalHydride = 0x05,\r
2055 PortableBatteryDeviceChemistryLithiumIon = 0x06,\r
2056 PortableBatteryDeviceChemistryZincAir = 0x07,\r
2057 PortableBatteryDeviceChemistryLithiumPolymer = 0x08\r
98cb9ae8 2058} PORTABLE_BATTERY_DEVICE_CHEMISTRY;\r
2059\r
4135253b 2060///\r
af2dc6a7 2061/// Portable Battery (Type 22).\r
4135253b 2062///\r
9095d37b
LG		 2063/// This structure describes the attributes of the portable battery(s) for the system.\r
2064/// The structure contains the static attributes for the group. Each structure describes\r
1f9f8414 2065/// a single battery pack's attributes.\r
98cb9ae8 2066///\r
61ce5861 2067typedef struct {\r
2f88bd3a
MK		 2068 SMBIOS_STRUCTURE Hdr;\r
2069 SMBIOS_TABLE_STRING Location;\r
2070 SMBIOS_TABLE_STRING Manufacturer;\r
2071 SMBIOS_TABLE_STRING ManufactureDate;\r
2072 SMBIOS_TABLE_STRING SerialNumber;\r
2073 SMBIOS_TABLE_STRING DeviceName;\r
2074 UINT8 DeviceChemistry; ///< The enumeration value from PORTABLE_BATTERY_DEVICE_CHEMISTRY.\r
2075 UINT16 DeviceCapacity;\r
2076 UINT16 DesignVoltage;\r
2077 SMBIOS_TABLE_STRING SBDSVersionNumber;\r
2078 UINT8 MaximumErrorInBatteryData;\r
2079 UINT16 SBDSSerialNumber;\r
2080 UINT16 SBDSManufactureDate;\r
2081 SMBIOS_TABLE_STRING SBDSDeviceChemistry;\r
2082 UINT8 DesignCapacityMultiplier;\r
2083 UINT32 OEMSpecific;\r
61ce5861 2084} SMBIOS_TABLE_TYPE22;\r
2085\r
4135253b 2086///\r
2087/// System Reset (Type 23)\r
2088///\r
9095d37b 2089/// This structure describes whether Automatic System Reset functions enabled (Status).\r
98cb9ae8 2090/// If the system has a watchdog Timer and the timer is not reset (Timer Reset)\r
9095d37b
LG		 2091/// before the Interval elapses, an automatic system reset will occur. The system will re-boot\r
2092/// according to the Boot Option. This function may repeat until the Limit is reached, at which time\r
2093/// the system will re-boot according to the Boot Option at Limit.\r
98cb9ae8 2094///\r
61ce5861 2095typedef struct {\r
2f88bd3a
MK		 2096 SMBIOS_STRUCTURE Hdr;\r
2097 UINT8 Capabilities;\r
2098 UINT16 ResetCount;\r
2099 UINT16 ResetLimit;\r
2100 UINT16 TimerInterval;\r
2101 UINT16 Timeout;\r
61ce5861 2102} SMBIOS_TABLE_TYPE23;\r
2103\r
4135253b 2104///\r
af2dc6a7 2105/// Hardware Security (Type 24).\r
4135253b 2106///\r
9095d37b 2107/// This structure describes the system-wide hardware security settings.\r
98cb9ae8 2108///\r
61ce5861 2109typedef struct {\r
2f88bd3a
MK		 2110 SMBIOS_STRUCTURE Hdr;\r
2111 UINT8 HardwareSecuritySettings;\r
61ce5861 2112} SMBIOS_TABLE_TYPE24;\r
2113\r
4135253b 2114///\r
af2dc6a7 2115/// System Power Controls (Type 25).\r
4135253b 2116///\r
9095d37b
LG		 2117/// This structure describes the attributes for controlling the main power supply to the system.\r
2118/// Software that interprets this structure uses the month, day, hour, minute, and second values\r
2119/// to determine the number of seconds until the next power-on of the system. The presence of\r
2120/// this structure implies that a timed power-on facility is available for the system.\r
98cb9ae8 2121///\r
61ce5861 2122typedef struct {\r
2f88bd3a
MK		 2123 SMBIOS_STRUCTURE Hdr;\r
2124 UINT8 NextScheduledPowerOnMonth;\r
2125 UINT8 NextScheduledPowerOnDayOfMonth;\r
2126 UINT8 NextScheduledPowerOnHour;\r
2127 UINT8 NextScheduledPowerOnMinute;\r
2128 UINT8 NextScheduledPowerOnSecond;\r
61ce5861 2129} SMBIOS_TABLE_TYPE25;\r
2130\r
98cb9ae8 2131///\r
af2dc6a7 2132/// Voltage Probe - Location and Status.\r
98cb9ae8 2133///\r
2134typedef struct {\r
2f88bd3a
MK		 2135 UINT8 VoltageProbeSite : 5;\r
2136 UINT8 VoltageProbeStatus : 3;\r
98cb9ae8 2137} MISC_VOLTAGE_PROBE_LOCATION;\r
2138\r
4135253b 2139///\r
2140/// Voltage Probe (Type 26)\r
2141///\r
9095d37b 2142/// This describes the attributes for a voltage probe in the system.\r
98cb9ae8 2143/// Each structure describes a single voltage probe.\r
2144///\r
61ce5861 2145typedef struct {\r
2f88bd3a
MK		 2146 SMBIOS_STRUCTURE Hdr;\r
2147 SMBIOS_TABLE_STRING Description;\r
2148 MISC_VOLTAGE_PROBE_LOCATION LocationAndStatus;\r
2149 UINT16 MaximumValue;\r
2150 UINT16 MinimumValue;\r
2151 UINT16 Resolution;\r
2152 UINT16 Tolerance;\r
2153 UINT16 Accuracy;\r
2154 UINT32 OEMDefined;\r
2155 UINT16 NominalValue;\r
61ce5861 2156} SMBIOS_TABLE_TYPE26;\r
2157\r
98cb9ae8 2158///\r
af2dc6a7 2159/// Cooling Device - Device Type and Status.\r
98cb9ae8 2160///\r
2161typedef struct {\r
2f88bd3a
MK		 2162 UINT8 CoolingDevice : 5;\r
2163 UINT8 CoolingDeviceStatus : 3;\r
98cb9ae8 2164} MISC_COOLING_DEVICE_TYPE;\r
2165\r
4135253b 2166///\r
2167/// Cooling Device (Type 27)\r
2168///\r
9095d37b
LG		 2169/// This structure describes the attributes for a cooling device in the system.\r
2170/// Each structure describes a single cooling device.\r
2171///\r
61ce5861 2172typedef struct {\r
2f88bd3a
MK		 2173 SMBIOS_STRUCTURE Hdr;\r
2174 UINT16 TemperatureProbeHandle;\r
2175 MISC_COOLING_DEVICE_TYPE DeviceTypeAndStatus;\r
2176 UINT8 CoolingUnitGroup;\r
2177 UINT32 OEMDefined;\r
2178 UINT16 NominalSpeed;\r
7ddba202
SZ		 2179 //\r
2180 // Add for smbios 2.7\r
2181 //\r
2f88bd3a 2182 SMBIOS_TABLE_STRING Description;\r
61ce5861 2183} SMBIOS_TABLE_TYPE27;\r
2184\r
98cb9ae8 2185///\r
af2dc6a7 2186/// Temperature Probe - Location and Status.\r
98cb9ae8 2187///\r
2188typedef struct {\r
2f88bd3a
MK		 2189 UINT8 TemperatureProbeSite : 5;\r
2190 UINT8 TemperatureProbeStatus : 3;\r
98cb9ae8 2191} MISC_TEMPERATURE_PROBE_LOCATION;\r
2192\r
4135253b 2193///\r
af2dc6a7 2194/// Temperature Probe (Type 28).\r
4135253b 2195///\r
9095d37b
LG		 2196/// This structure describes the attributes for a temperature probe in the system.\r
2197/// Each structure describes a single temperature probe.\r
98cb9ae8 2198///\r
61ce5861 2199typedef struct {\r
2f88bd3a
MK		 2200 SMBIOS_STRUCTURE Hdr;\r
2201 SMBIOS_TABLE_STRING Description;\r
2202 MISC_TEMPERATURE_PROBE_LOCATION LocationAndStatus;\r
2203 UINT16 MaximumValue;\r
2204 UINT16 MinimumValue;\r
2205 UINT16 Resolution;\r
2206 UINT16 Tolerance;\r
2207 UINT16 Accuracy;\r
2208 UINT32 OEMDefined;\r
2209 UINT16 NominalValue;\r
61ce5861 2210} SMBIOS_TABLE_TYPE28;\r
2211\r
98cb9ae8 2212///\r
af2dc6a7 2213/// Electrical Current Probe - Location and Status.\r
98cb9ae8 2214///\r
2215typedef struct {\r
2f88bd3a
MK		 2216 UINT8 ElectricalCurrentProbeSite : 5;\r
2217 UINT8 ElectricalCurrentProbeStatus : 3;\r
98cb9ae8 2218} MISC_ELECTRICAL_CURRENT_PROBE_LOCATION;\r
2219\r
4135253b 2220///\r
af2dc6a7 2221/// Electrical Current Probe (Type 29).\r
4135253b 2222///\r
98cb9ae8 2223/// This structure describes the attributes for an electrical current probe in the system.\r
9095d37b 2224/// Each structure describes a single electrical current probe.\r
98cb9ae8 2225///\r
61ce5861 2226typedef struct {\r
2f88bd3a
MK		 2227 SMBIOS_STRUCTURE Hdr;\r
2228 SMBIOS_TABLE_STRING Description;\r
2229 MISC_ELECTRICAL_CURRENT_PROBE_LOCATION LocationAndStatus;\r
2230 UINT16 MaximumValue;\r
2231 UINT16 MinimumValue;\r
2232 UINT16 Resolution;\r
2233 UINT16 Tolerance;\r
2234 UINT16 Accuracy;\r
2235 UINT32 OEMDefined;\r
2236 UINT16 NominalValue;\r
61ce5861 2237} SMBIOS_TABLE_TYPE29;\r
2238\r
4135253b 2239///\r
af2dc6a7 2240/// Out-of-Band Remote Access (Type 30).\r
4135253b 2241///\r
9095d37b
LG		 2242/// This structure describes the attributes and policy settings of a hardware facility\r
2243/// that may be used to gain remote access to a hardware system when the operating system\r
2244/// is not available due to power-down status, hardware failures, or boot failures.\r
98cb9ae8 2245///\r
61ce5861 2246typedef struct {\r
2f88bd3a
MK		 2247 SMBIOS_STRUCTURE Hdr;\r
2248 SMBIOS_TABLE_STRING ManufacturerName;\r
2249 UINT8 Connections;\r
61ce5861 2250} SMBIOS_TABLE_TYPE30;\r
2251\r
4135253b 2252///\r
af2dc6a7 2253/// Boot Integrity Services (BIS) Entry Point (Type 31).\r
4135253b 2254///\r
9095d37b
LG		 2255/// Structure type 31 (decimal) is reserved for use by the Boot Integrity Services (BIS).\r
2256///\r
61ce5861 2257typedef struct {\r
2f88bd3a
MK		 2258 SMBIOS_STRUCTURE Hdr;\r
2259 UINT8 Checksum;\r
2260 UINT8 Reserved1;\r
2261 UINT16 Reserved2;\r
2262 UINT32 BisEntry16;\r
2263 UINT32 BisEntry32;\r
2264 UINT64 Reserved3;\r
2265 UINT32 Reserved4;\r
61ce5861 2266} SMBIOS_TABLE_TYPE31;\r
2267\r
98cb9ae8 2268///\r
af2dc6a7 2269/// System Boot Information - System Boot Status.\r
98cb9ae8 2270///\r
2271typedef enum {\r
2f88bd3a
MK		 2272 BootInformationStatusNoError = 0x00,\r
2273 BootInformationStatusNoBootableMedia = 0x01,\r
2274 BootInformationStatusNormalOSFailedLoading = 0x02,\r
2275 BootInformationStatusFirmwareDetectedFailure = 0x03,\r
2276 BootInformationStatusOSDetectedFailure = 0x04,\r
2277 BootInformationStatusUserRequestedBoot = 0x05,\r
2278 BootInformationStatusSystemSecurityViolation = 0x06,\r
2279 BootInformationStatusPreviousRequestedImage = 0x07,\r
2280 BootInformationStatusWatchdogTimerExpired = 0x08,\r
2281 BootInformationStatusStartReserved = 0x09,\r
2282 BootInformationStatusStartOemSpecific = 0x80,\r
2283 BootInformationStatusStartProductSpecific = 0xC0\r
98cb9ae8 2284} MISC_BOOT_INFORMATION_STATUS_DATA_TYPE;\r
2285\r
4135253b 2286///\r
af2dc6a7 2287/// System Boot Information (Type 32).\r
4135253b 2288///\r
9095d37b
LG		 2289/// The client system firmware, e.g. BIOS, communicates the System Boot Status to the\r
2290/// client's Pre-boot Execution Environment (PXE) boot image or OS-present management\r
2291/// application via this structure. When used in the PXE environment, for example,\r
2292/// this code identifies the reason the PXE was initiated and can be used by boot-image\r
2293/// software to further automate an enterprise's PXE sessions. For example, an enterprise\r
2294/// could choose to automatically download a hardware-diagnostic image to a client whose\r
98cb9ae8 2295/// reason code indicated either a firmware- or operating system-detected hardware failure.\r
2296///\r
61ce5861 2297typedef struct {\r
2f88bd3a
MK		 2298 SMBIOS_STRUCTURE Hdr;\r
2299 UINT8 Reserved[6];\r
2300 UINT8 BootStatus; ///< The enumeration value from MISC_BOOT_INFORMATION_STATUS_DATA_TYPE.\r
61ce5861 2301} SMBIOS_TABLE_TYPE32;\r
2302\r
4135253b 2303///\r
af2dc6a7 2304/// 64-bit Memory Error Information (Type 33).\r
4135253b 2305///\r
9095d37b 2306/// This structure describes an error within a Physical Memory Array,\r
98cb9ae8 2307/// when the error address is above 4G (0xFFFFFFFF).\r
9095d37b 2308///\r
61ce5861 2309typedef struct {\r
2f88bd3a
MK		 2310 SMBIOS_STRUCTURE Hdr;\r
2311 UINT8 ErrorType; ///< The enumeration value from MEMORY_ERROR_TYPE.\r
2312 UINT8 ErrorGranularity; ///< The enumeration value from MEMORY_ERROR_GRANULARITY.\r
2313 UINT8 ErrorOperation; ///< The enumeration value from MEMORY_ERROR_OPERATION.\r
2314 UINT32 VendorSyndrome;\r
2315 UINT64 MemoryArrayErrorAddress;\r
2316 UINT64 DeviceErrorAddress;\r
2317 UINT32 ErrorResolution;\r
61ce5861 2318} SMBIOS_TABLE_TYPE33;\r
2319\r
98cb9ae8 2320///\r
9095d37b 2321/// Management Device - Type.\r
98cb9ae8 2322///\r
2323typedef enum {\r
2f88bd3a
MK		 2324 ManagementDeviceTypeOther = 0x01,\r
2325 ManagementDeviceTypeUnknown = 0x02,\r
2326 ManagementDeviceTypeLm75 = 0x03,\r
2327 ManagementDeviceTypeLm78 = 0x04,\r
2328 ManagementDeviceTypeLm79 = 0x05,\r
2329 ManagementDeviceTypeLm80 = 0x06,\r
2330 ManagementDeviceTypeLm81 = 0x07,\r
2331 ManagementDeviceTypeAdm9240 = 0x08,\r
2332 ManagementDeviceTypeDs1780 = 0x09,\r
2333 ManagementDeviceTypeMaxim1617 = 0x0A,\r
2334 ManagementDeviceTypeGl518Sm = 0x0B,\r
2335 ManagementDeviceTypeW83781D = 0x0C,\r
2336 ManagementDeviceTypeHt82H791 = 0x0D\r
98cb9ae8 2337} MISC_MANAGEMENT_DEVICE_TYPE;\r
2338\r
2339///\r
9095d37b 2340/// Management Device - Address Type.\r
98cb9ae8 2341///\r
2342typedef enum {\r
2343 ManagementDeviceAddressTypeOther = 0x01,\r
2344 ManagementDeviceAddressTypeUnknown = 0x02,\r
2345 ManagementDeviceAddressTypeIOPort = 0x03,\r
2346 ManagementDeviceAddressTypeMemory = 0x04,\r
2347 ManagementDeviceAddressTypeSmbus = 0x05\r
2348} MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE;\r
2349\r
4135253b 2350///\r
af2dc6a7 2351/// Management Device (Type 34).\r
4135253b 2352///\r
9095d37b 2353/// The information in this structure defines the attributes of a Management Device.\r
98cb9ae8 2354/// A Management Device might control one or more fans or voltage, current, or temperature\r
2355/// probes as defined by one or more Management Device Component structures.\r
2356///\r
61ce5861 2357typedef struct {\r
2f88bd3a
MK		 2358 SMBIOS_STRUCTURE Hdr;\r
2359 SMBIOS_TABLE_STRING Description;\r
2360 UINT8 Type; ///< The enumeration value from MISC_MANAGEMENT_DEVICE_TYPE.\r
2361 UINT32 Address;\r
2362 UINT8 AddressType; ///< The enumeration value from MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE.\r
61ce5861 2363} SMBIOS_TABLE_TYPE34;\r
2364\r
4135253b 2365///\r
2366/// Management Device Component (Type 35)\r
2367///\r
9095d37b
LG		 2368/// This structure associates a cooling device or environmental probe with structures\r
2369/// that define the controlling hardware device and (optionally) the component's thresholds.\r
98cb9ae8 2370///\r
61ce5861 2371typedef struct {\r
2f88bd3a
MK		 2372 SMBIOS_STRUCTURE Hdr;\r
2373 SMBIOS_TABLE_STRING Description;\r
2374 UINT16 ManagementDeviceHandle;\r
2375 UINT16 ComponentHandle;\r
2376 UINT16 ThresholdHandle;\r
61ce5861 2377} SMBIOS_TABLE_TYPE35;\r
2378\r
4135253b 2379///\r
af2dc6a7 2380/// Management Device Threshold Data (Type 36).\r
4135253b 2381///\r
9095d37b
LG		 2382/// The information in this structure defines threshold information for\r
2383/// a component (probe or cooling-unit) contained within a Management Device.\r
98cb9ae8 2384///\r
61ce5861 2385typedef struct {\r
2f88bd3a
MK		 2386 SMBIOS_STRUCTURE Hdr;\r
2387 UINT16 LowerThresholdNonCritical;\r
2388 UINT16 UpperThresholdNonCritical;\r
2389 UINT16 LowerThresholdCritical;\r
2390 UINT16 UpperThresholdCritical;\r
2391 UINT16 LowerThresholdNonRecoverable;\r
2392 UINT16 UpperThresholdNonRecoverable;\r
61ce5861 2393} SMBIOS_TABLE_TYPE36;\r
2394\r
bf7ea009 2395///\r
af2dc6a7 2396/// Memory Channel Entry.\r
bf7ea009 2397///\r
61ce5861 2398typedef struct {\r
2f88bd3a
MK		 2399 UINT8 DeviceLoad;\r
2400 UINT16 DeviceHandle;\r
61ce5861 2401} MEMORY_DEVICE;\r
2402\r
98cb9ae8 2403///\r
af2dc6a7 2404/// Memory Channel - Channel Type.\r
98cb9ae8 2405///\r
2406typedef enum {\r
2f88bd3a
MK		 2407 MemoryChannelTypeOther = 0x01,\r
2408 MemoryChannelTypeUnknown = 0x02,\r
2409 MemoryChannelTypeRambus = 0x03,\r
2410 MemoryChannelTypeSyncLink = 0x04\r
98cb9ae8 2411} MEMORY_CHANNEL_TYPE;\r
2412\r
4135253b 2413///\r
2414/// Memory Channel (Type 37)\r
2415///\r
98cb9ae8 2416/// The information in this structure provides the correlation between a Memory Channel\r
9095d37b 2417/// and its associated Memory Devices. Each device presents one or more loads to the channel.\r
af2dc6a7 2418/// The sum of all device loads cannot exceed the channel's defined maximum.\r
98cb9ae8 2419///\r
61ce5861 2420typedef struct {\r
2f88bd3a
MK		 2421 SMBIOS_STRUCTURE Hdr;\r
2422 UINT8 ChannelType;\r
2423 UINT8 MaximumChannelLoad;\r
2424 UINT8 MemoryDeviceCount;\r
2425 MEMORY_DEVICE MemoryDevice[1];\r
61ce5861 2426} SMBIOS_TABLE_TYPE37;\r
2427\r
98cb9ae8 2428///\r
2429/// IPMI Device Information - BMC Interface Type\r
2430///\r
2431typedef enum {\r
2f88bd3a
MK		 2432 IPMIDeviceInfoInterfaceTypeUnknown = 0x00,\r
2433 IPMIDeviceInfoInterfaceTypeKCS = 0x01, ///< The Keyboard Controller Style.\r
2434 IPMIDeviceInfoInterfaceTypeSMIC = 0x02, ///< The Server Management Interface Chip.\r
2435 IPMIDeviceInfoInterfaceTypeBT = 0x03, ///< The Block Transfer\r
2436 IPMIDeviceInfoInterfaceTypeSSIF = 0x04 ///< SMBus System Interface\r
98cb9ae8 2437} BMC_INTERFACE_TYPE;\r
2438\r
4135253b 2439///\r
af2dc6a7 2440/// IPMI Device Information (Type 38).\r
4135253b 2441///\r
7ddba202 2442/// The information in this structure defines the attributes of an\r
98cb9ae8 2443/// Intelligent Platform Management Interface (IPMI) Baseboard Management Controller (BMC).\r
7ddba202
SZ		 2444///\r
2445/// The Type 42 structure can also be used to describe a physical management controller\r
2446/// host interface and one or more protocols that share that interface. If IPMI is not\r
2447/// shared with other protocols, either the Type 38 or Type 42 structures can be used.\r
2448/// Providing Type 38 is recommended for backward compatibility.\r
2449///\r
61ce5861 2450typedef struct {\r
2f88bd3a
MK		 2451 SMBIOS_STRUCTURE Hdr;\r
2452 UINT8 InterfaceType; ///< The enumeration value from BMC_INTERFACE_TYPE.\r
2453 UINT8 IPMISpecificationRevision;\r
2454 UINT8 I2CSlaveAddress;\r
2455 UINT8 NVStorageDeviceAddress;\r
2456 UINT64 BaseAddress;\r
2457 UINT8 BaseAddressModifier_InterruptInfo;\r
2458 UINT8 InterruptNumber;\r
61ce5861 2459} SMBIOS_TABLE_TYPE38;\r
2460\r
98cb9ae8 2461///\r
af2dc6a7 2462/// System Power Supply - Power Supply Characteristics.\r
98cb9ae8 2463///\r
2464typedef struct {\r
2f88bd3a
MK		 2465 UINT16 PowerSupplyHotReplaceable : 1;\r
2466 UINT16 PowerSupplyPresent : 1;\r
2467 UINT16 PowerSupplyUnplugged : 1;\r
2468 UINT16 InputVoltageRangeSwitch : 4;\r
2469 UINT16 PowerSupplyStatus : 3;\r
2470 UINT16 PowerSupplyType : 4;\r
2471 UINT16 Reserved : 2;\r
98cb9ae8 2472} SYS_POWER_SUPPLY_CHARACTERISTICS;\r
2473\r
4135253b 2474///\r
af2dc6a7 2475/// System Power Supply (Type 39).\r
4135253b 2476///\r
7ddba202
SZ		 2477/// This structure identifies attributes of a system power supply. One instance\r
2478/// of this record is present for each possible power supply in a system.\r
98cb9ae8 2479///\r
61ce5861 2480typedef struct {\r
2f88bd3a
MK		 2481 SMBIOS_STRUCTURE Hdr;\r
2482 UINT8 PowerUnitGroup;\r
2483 SMBIOS_TABLE_STRING Location;\r
2484 SMBIOS_TABLE_STRING DeviceName;\r
2485 SMBIOS_TABLE_STRING Manufacturer;\r
2486 SMBIOS_TABLE_STRING SerialNumber;\r
2487 SMBIOS_TABLE_STRING AssetTagNumber;\r
2488 SMBIOS_TABLE_STRING ModelPartNumber;\r
2489 SMBIOS_TABLE_STRING RevisionLevel;\r
2490 UINT16 MaxPowerCapacity;\r
2491 SYS_POWER_SUPPLY_CHARACTERISTICS PowerSupplyCharacteristics;\r
2492 UINT16 InputVoltageProbeHandle;\r
2493 UINT16 CoolingDeviceHandle;\r
2494 UINT16 InputCurrentProbeHandle;\r
61ce5861 2495} SMBIOS_TABLE_TYPE39;\r
2496\r
bf7ea009 2497///\r
9095d37b 2498/// Additional Information Entry Format.\r
bf7ea009 2499///\r
9095d37b 2500typedef struct {\r
2f88bd3a
MK		 2501 UINT8 EntryLength;\r
2502 UINT16 ReferencedHandle;\r
2503 UINT8 ReferencedOffset;\r
2504 SMBIOS_TABLE_STRING EntryString;\r
2505 UINT8 Value[1];\r
cfcca3c2 2506} ADDITIONAL_INFORMATION_ENTRY;\r
61ce5861 2507\r
4135253b 2508///\r
af2dc6a7 2509/// Additional Information (Type 40).\r
4135253b 2510///\r
9095d37b
LG		 2511/// This structure is intended to provide additional information for handling unspecified\r
2512/// enumerated values and interim field updates in another structure.\r
98cb9ae8 2513///\r
61ce5861 2514typedef struct {\r
2f88bd3a
MK		 2515 SMBIOS_STRUCTURE Hdr;\r
2516 UINT8 NumberOfAdditionalInformationEntries;\r
2517 ADDITIONAL_INFORMATION_ENTRY AdditionalInfoEntries[1];\r
61ce5861 2518} SMBIOS_TABLE_TYPE40;\r
2519\r
98cb9ae8 2520///\r
af2dc6a7 2521/// Onboard Devices Extended Information - Onboard Device Types.\r
98cb9ae8 2522///\r
2f88bd3a 2523typedef enum {\r
98cb9ae8 2524 OnBoardDeviceExtendedTypeOther = 0x01,\r
2525 OnBoardDeviceExtendedTypeUnknown = 0x02,\r
2526 OnBoardDeviceExtendedTypeVideo = 0x03,\r
2527 OnBoardDeviceExtendedTypeScsiController = 0x04,\r
2528 OnBoardDeviceExtendedTypeEthernet = 0x05,\r
2529 OnBoardDeviceExtendedTypeTokenRing = 0x06,\r
2530 OnBoardDeviceExtendedTypeSound = 0x07,\r
2531 OnBoardDeviceExtendedTypePATAController = 0x08,\r
2532 OnBoardDeviceExtendedTypeSATAController = 0x09,\r
28eeb08d
ALA		 2533 OnBoardDeviceExtendedTypeSASController = 0x0A,\r
2534 OnBoardDeviceExtendedTypeWirelessLAN = 0x0B,\r
2535 OnBoardDeviceExtendedTypeBluetooth = 0x0C,\r
2536 OnBoardDeviceExtendedTypeWWAN = 0x0D,\r
2537 OnBoardDeviceExtendedTypeeMMC = 0x0E,\r
2538 OnBoardDeviceExtendedTypeNvme = 0x0F,\r
2539 OnBoardDeviceExtendedTypeUfc = 0x10\r
98cb9ae8 2540} ONBOARD_DEVICE_EXTENDED_INFO_TYPE;\r
2541\r
4135253b 2542///\r
af2dc6a7 2543/// Onboard Devices Extended Information (Type 41).\r
4135253b 2544///\r
9095d37b
LG		 2545/// The information in this structure defines the attributes of devices that\r
2546/// are onboard (soldered onto) a system element, usually the baseboard.\r
2547/// In general, an entry in this table implies that the BIOS has some level of\r
2548/// control over the enabling of the associated device for use by the system.\r
98cb9ae8 2549///\r
61ce5861 2550typedef struct {\r
2f88bd3a
MK		 2551 SMBIOS_STRUCTURE Hdr;\r
2552 SMBIOS_TABLE_STRING ReferenceDesignation;\r
2553 UINT8 DeviceType; ///< The enumeration value from ONBOARD_DEVICE_EXTENDED_INFO_TYPE\r
2554 UINT8 DeviceTypeInstance;\r
2555 UINT16 SegmentGroupNum;\r
2556 UINT8 BusNum;\r
2557 UINT8 DevFuncNum;\r
61ce5861 2558} SMBIOS_TABLE_TYPE41;\r
2559\r
78ab44cb
AC		 2560///\r
2561/// Management Controller Host Interface - Protocol Record Data Format.\r
2562///\r
2563typedef struct {\r
2f88bd3a
MK		 2564 UINT8 ProtocolType;\r
2565 UINT8 ProtocolTypeDataLen;\r
2566 UINT8 ProtocolTypeData[1];\r
78ab44cb
AC		 2567} MC_HOST_INTERFACE_PROTOCOL_RECORD;\r
2568\r
043026ac
SZ		 2569///\r
2570/// Management Controller Host Interface - Interface Types.\r
2571/// 00h - 3Fh: MCTP Host Interfaces\r
2572///\r
2f88bd3a
MK		 2573typedef enum {\r
2574 MCHostInterfaceTypeNetworkHostInterface = 0x40,\r
2575 MCHostInterfaceTypeOemDefined = 0xF0\r
043026ac
SZ		 2576} MC_HOST_INTERFACE_TYPE;\r
2577\r
2578///\r
2579/// Management Controller Host Interface - Protocol Types.\r
2580///\r
2f88bd3a
MK		 2581typedef enum {\r
2582 MCHostInterfaceProtocolTypeIPMI = 0x02,\r
2583 MCHostInterfaceProtocolTypeMCTP = 0x03,\r
2584 MCHostInterfaceProtocolTypeRedfishOverIP = 0x04,\r
2585 MCHostInterfaceProtocolTypeOemDefined = 0xF0\r
043026ac
SZ		 2586} MC_HOST_INTERFACE_PROTOCOL_TYPE;\r
2587\r
7ddba202
SZ		 2588///\r
2589/// Management Controller Host Interface (Type 42).\r
2590///\r
2591/// The information in this structure defines the attributes of a Management\r
2592/// Controller Host Interface that is not discoverable by "Plug and Play" mechanisms.\r
2593///\r
2594/// Type 42 should be used for management controller host interfaces that use protocols\r
2595/// other than IPMI or that use multiple protocols on a single host interface type.\r
2596///\r
2597/// This structure should also be provided if IPMI is shared with other protocols\r
2598/// over the same interface hardware. If IPMI is not shared with other protocols,\r
2599/// either the Type 38 or Type 42 structures can be used. Providing Type 38 is\r
2600/// recommended for backward compatibility. The structures are not required to\r
2601/// be mutually exclusive. Type 38 and Type 42 structures may be implemented\r
2602/// simultaneously to provide backward compatibility with IPMI applications or drivers\r
2603/// that do not yet recognize the Type 42 structure.\r
2604///\r
2605typedef struct {\r
2f88bd3a
MK		 2606 SMBIOS_STRUCTURE Hdr;\r
2607 UINT8 InterfaceType; ///< The enumeration value from MC_HOST_INTERFACE_TYPE\r
2608 UINT8 InterfaceTypeSpecificDataLength;\r
2609 UINT8 InterfaceTypeSpecificData[4]; ///< This field has a minimum of four bytes\r
7ddba202
SZ		 2610} SMBIOS_TABLE_TYPE42;\r
2611\r
f06c92a6
AC		 2612///\r
2613/// Processor Specific Block - Processor Architecture Type\r
2614///\r
2f88bd3a 2615typedef enum {\r
f06c92a6
AC		 2616 ProcessorSpecificBlockArchTypeReserved = 0x00,\r
2617 ProcessorSpecificBlockArchTypeIa32 = 0x01,\r
2618 ProcessorSpecificBlockArchTypeX64 = 0x02,\r
2619 ProcessorSpecificBlockArchTypeItanium = 0x03,\r
2620 ProcessorSpecificBlockArchTypeAarch32 = 0x04,\r
2621 ProcessorSpecificBlockArchTypeAarch64 = 0x05,\r
2622 ProcessorSpecificBlockArchTypeRiscVRV32 = 0x06,\r
2623 ProcessorSpecificBlockArchTypeRiscVRV64 = 0x07,\r
2624 ProcessorSpecificBlockArchTypeRiscVRV128 = 0x08\r
2625} PROCESSOR_SPECIFIC_BLOCK_ARCH_TYPE;\r
2626\r
2627///\r
2628/// Processor Specific Block is the standard container of processor-specific data.\r
2629///\r
2630typedef struct {\r
2f88bd3a
MK		 2631 UINT8 Length;\r
2632 UINT8 ProcessorArchType;\r
f06c92a6
AC		 2633 ///\r
2634 /// Below followed by Processor-specific data\r
2635 ///\r
2636 ///\r
2637} PROCESSOR_SPECIFIC_BLOCK;\r
2638\r
2639///\r
2640/// Processor Additional Information(Type 44).\r
2641///\r
2642/// The information in this structure defines the processor additional information in case\r
2643/// SMBIOS type 4 is not sufficient to describe processor characteristics.\r
2644/// The SMBIOS type 44 structure has a reference handle field to link back to the related\r
2645/// SMBIOS type 4 structure. There may be multiple SMBIOS type 44 structures linked to the\r
2646/// same SMBIOS type 4 structure. For example, when cores are not identical in a processor,\r
2647/// SMBIOS type 44 structures describe different core-specific information.\r
2648///\r
2649/// SMBIOS type 44 defines the standard header for the processor-specific block, while the\r
2650/// contents of processor-specific data are maintained by processor\r
2651/// architecture workgroups or vendors in separate documents.\r
2652///\r
2653typedef struct {\r
2f88bd3a
MK		 2654 SMBIOS_STRUCTURE Hdr;\r
2655 SMBIOS_HANDLE RefHandle; ///< This field refer to associated SMBIOS type 4\r
f06c92a6
AC		 2656 ///\r
2657 /// Below followed by Processor-specific block\r
2658 ///\r
2f88bd3a 2659 PROCESSOR_SPECIFIC_BLOCK ProcessorSpecificBlock;\r
f06c92a6
AC		 2660} SMBIOS_TABLE_TYPE44;\r
2661\r
713e4b00
LA		 2662///\r
2663/// TPM Device (Type 43).\r
2664///\r
2665typedef struct {\r
2f88bd3a
MK		 2666 SMBIOS_STRUCTURE Hdr;\r
2667 UINT8 VendorID[4];\r
2668 UINT8 MajorSpecVersion;\r
2669 UINT8 MinorSpecVersion;\r
2670 UINT32 FirmwareVersion1;\r
2671 UINT32 FirmwareVersion2;\r
2672 SMBIOS_TABLE_STRING Description;\r
2673 UINT64 Characteristics;\r
2674 UINT32 OemDefined;\r
713e4b00
LA		 2675} SMBIOS_TABLE_TYPE43;\r
2676\r
28eeb08d
ALA		 2677///\r
2678/// Firmware Inventory Version Format Type (Type 45).\r
2679///\r
2680typedef enum {\r
2681 VersionFormatTypeFreeForm = 0x00,\r
2682 VersionFormatTypeMajorMinor = 0x01,\r
2683 VersionFormatType32BitHex = 0x02,\r
2684 VersionFormatType64BitHex = 0x03,\r
2685 VersionFormatTypeReserved = 0x04, /// 0x04 - 0x7F are reserved\r
2686 VersionFormatTypeOem = 0x80 /// 0x80 - 0xFF are BIOS Vendor/OEM-specific\r
2687} FIRMWARE_INVENTORY_VERSION_FORMAT_TYPE;\r
2688\r
2689///\r
2690/// Firmware Inventory Firmware Id Format Type (Type 45).\r
2691///\r
2692typedef enum {\r
2693 FirmwareIdFormatTypeFreeForm = 0x00,\r
2694 FirmwareIdFormatTypeUuid = 0x01,\r
2695 FirmwareIdFormatTypeReserved = 0x04, /// 0x04 - 0x7F are reserved\r
2696 InventoryFirmwareIdFormatTypeOem = 0x80 /// 0x80 - 0xFF are BIOS Vendor/OEM-specific\r
2697} FIRMWARE_INVENTORY_FIRMWARE_ID_FORMAT_TYPE;\r
2698\r
2699///\r
2700/// Firmware Inventory Firmware Characteristics (Type 45).\r
2701///\r
2702typedef enum {\r
2703 CharacteristicsUpdatable = 0x00,\r
2704 CharacteristicsWriteProtected = 0x01,\r
2705 CharacteristicsReserved = 0x02 /// 0x02 - 0x0F are reserved\r
2706} FIRMWARE_INVENTORY_CHARACTERISTICS;\r
2707\r
2708///\r
2709/// Firmware Inventory State Information (Type 45).\r
2710///\r
2711typedef enum {\r
2712 FirmwareInventoryStateOther = 0x01,\r
2713 FirmwareInventoryStateUnknown = 0x02,\r
2714 FirmwareInventoryStateDisabled = 0x03,\r
2715 FirmwareInventoryStateEnabled = 0x04,\r
2716 FirmwareInventoryStateAbsent = 0x05,\r
2717 FirmwareInventoryStateStandbyOffline = 0x06,\r
2718 FirmwareInventoryStateStandbySpare = 0x07,\r
2719 FirmwareInventoryStateUnavailableOffline = 0x08,\r
2720} FIRMWARE_INVENTORY_STATE;\r
2721\r
2722///\r
2723/// Firmware Inventory Information (Type 45)\r
2724///\r
2725/// The information in this structure defines an inventory of firmware\r
2726/// components in the system. This can include firmware components such as\r
2727/// BIOS, BMC, as well as firmware for other devices in the system.\r
2728/// The information can be used by software to display the firmware inventory\r
2729/// in a uniform manner. It can also be used by a management controller,\r
2730/// such as a BMC, for remote system management.\r
2731/// This structure is not intended to replace other standard programmatic\r
2732/// interfaces for firmware updates.\r
2733/// One Type 45 structure is provided for each firmware component.\r
2734///\r
2735typedef struct {\r
2736 SMBIOS_STRUCTURE Hdr;\r
2737 SMBIOS_HANDLE RefHandle;\r
2738\r
2739 UINT8 FirmwareComponentName;\r
2740 UINT8 FirmwareVersion;\r
2741 UINT8 FirmwareVersionFormat; ///< The enumeration value from FIRMWARE_INVENTORY_VERSION_FORMAT_TYPE\r
2742 UINT8 FirmwareId;\r
2743 UINT8 FirmwareIdFormat;\r
2744 UINT8 ReleaseDate;\r
2745 UINT8 Manufacturer;\r
2746 UINT8 LowestSupportedVersion;\r
2747 UINT64 ImageSize;\r
2748 UINT32 Characteristics;\r
2749 UINT8 State;\r
2750 UINT8 AssociatedComponentCount;\r
2751 ///\r
2752 /// zero or n-number of handles depends on AssociatedComponentCount\r
2753 /// handles are of type SMBIOS_HANDLE\r
2754 ///\r
2755} SMBIOS_TABLE_TYPE45;\r
2756\r
2757///\r
2758/// String Property IDs (Type 46).\r
2759///\r
2760typedef enum {\r
2761 StringPropertyIdNone = 0x0000,\r
2762 StringPropertyIdDevicePath = 0x0001,\r
2763 StringPropertyIdReserved = 0x0002, /// Reserved 0x0002 - 0x7FFF\r
2764 StringPropertyIdBiosVendor = 0x8000, /// BIOS vendor 0x8000 - 0xBFFF\r
2765 StringPropertyIdOem = 0xC000 /// OEM range 0xC000 - 0xFFFF\r
2766} STRING_PROPERTY_ID;\r
2767\r
2768///\r
2769/// This structure defines a string property for another structure.\r
2770/// This allows adding string properties that are common to several structures\r
2771/// without having to modify the definitions of these structures.\r
2772/// Multiple type 46 structures can add string properties to the same\r
2773/// parent structure.\r
2774///\r
2775typedef struct {\r
2776 SMBIOS_STRUCTURE Hdr;\r
2777 SMBIOS_HANDLE RefHandle;\r
2778 UINT16 StringPropertyId;\r
2779 UINT8 StringPropertyValue;\r
2780 SMBIOS_HANDLE ParentHandle;\r
2781} SMBIOS_TABLE_TYPE46;\r
2782\r
4135253b 2783///\r
2784/// Inactive (Type 126)\r
2785///\r
61ce5861 2786typedef struct {\r
2f88bd3a 2787 SMBIOS_STRUCTURE Hdr;\r
61ce5861 2788} SMBIOS_TABLE_TYPE126;\r
2789\r
4135253b 2790///\r
2791/// End-of-Table (Type 127)\r
2792///\r
61ce5861 2793typedef struct {\r
2f88bd3a 2794 SMBIOS_STRUCTURE Hdr;\r
61ce5861 2795} SMBIOS_TABLE_TYPE127;\r
2796\r
4135253b 2797///\r
af2dc6a7 2798/// Union of all the possible SMBIOS record types.\r
4135253b 2799///\r
61ce5861 2800typedef union {\r
2f88bd3a
MK		 2801 SMBIOS_STRUCTURE *Hdr;\r
2802 SMBIOS_TABLE_TYPE0 *Type0;\r
2803 SMBIOS_TABLE_TYPE1 *Type1;\r
2804 SMBIOS_TABLE_TYPE2 *Type2;\r
2805 SMBIOS_TABLE_TYPE3 *Type3;\r
2806 SMBIOS_TABLE_TYPE4 *Type4;\r
2807 SMBIOS_TABLE_TYPE5 *Type5;\r
2808 SMBIOS_TABLE_TYPE6 *Type6;\r
2809 SMBIOS_TABLE_TYPE7 *Type7;\r
2810 SMBIOS_TABLE_TYPE8 *Type8;\r
2811 SMBIOS_TABLE_TYPE9 *Type9;\r
2812 SMBIOS_TABLE_TYPE10 *Type10;\r
2813 SMBIOS_TABLE_TYPE11 *Type11;\r
2814 SMBIOS_TABLE_TYPE12 *Type12;\r
2815 SMBIOS_TABLE_TYPE13 *Type13;\r
2816 SMBIOS_TABLE_TYPE14 *Type14;\r
2817 SMBIOS_TABLE_TYPE15 *Type15;\r
2818 SMBIOS_TABLE_TYPE16 *Type16;\r
2819 SMBIOS_TABLE_TYPE17 *Type17;\r
2820 SMBIOS_TABLE_TYPE18 *Type18;\r
2821 SMBIOS_TABLE_TYPE19 *Type19;\r
2822 SMBIOS_TABLE_TYPE20 *Type20;\r
2823 SMBIOS_TABLE_TYPE21 *Type21;\r
2824 SMBIOS_TABLE_TYPE22 *Type22;\r
2825 SMBIOS_TABLE_TYPE23 *Type23;\r
2826 SMBIOS_TABLE_TYPE24 *Type24;\r
2827 SMBIOS_TABLE_TYPE25 *Type25;\r
2828 SMBIOS_TABLE_TYPE26 *Type26;\r
2829 SMBIOS_TABLE_TYPE27 *Type27;\r
2830 SMBIOS_TABLE_TYPE28 *Type28;\r
2831 SMBIOS_TABLE_TYPE29 *Type29;\r
2832 SMBIOS_TABLE_TYPE30 *Type30;\r
2833 SMBIOS_TABLE_TYPE31 *Type31;\r
2834 SMBIOS_TABLE_TYPE32 *Type32;\r
2835 SMBIOS_TABLE_TYPE33 *Type33;\r
2836 SMBIOS_TABLE_TYPE34 *Type34;\r
2837 SMBIOS_TABLE_TYPE35 *Type35;\r
2838 SMBIOS_TABLE_TYPE36 *Type36;\r
2839 SMBIOS_TABLE_TYPE37 *Type37;\r
2840 SMBIOS_TABLE_TYPE38 *Type38;\r
2841 SMBIOS_TABLE_TYPE39 *Type39;\r
2842 SMBIOS_TABLE_TYPE40 *Type40;\r
2843 SMBIOS_TABLE_TYPE41 *Type41;\r
2844 SMBIOS_TABLE_TYPE42 *Type42;\r
2845 SMBIOS_TABLE_TYPE43 *Type43;\r
2846 SMBIOS_TABLE_TYPE44 *Type44;\r
28eeb08d
ALA		 2847 SMBIOS_TABLE_TYPE45 *Type45;\r
2848 SMBIOS_TABLE_TYPE46 *Type46;\r
2f88bd3a
MK		 2849 SMBIOS_TABLE_TYPE126 *Type126;\r
2850 SMBIOS_TABLE_TYPE127 *Type127;\r
2851 UINT8 *Raw;\r
61ce5861 2852} SMBIOS_STRUCTURE_POINTER;\r
2853\r
766f4bc1 2854#pragma pack()\r
2855\r
a7ed1e2e 2856#endif\r
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